make format-py

Author: soheilshahrouz

dev/pylint_check.py

@@ -132,7 +132,7 @@ def expand_paths():
     """Build a list of all python files to process by going through 'paths_to_lint'"""
 
     paths = []
-    for (path, is_recursive) in paths_to_lint:
+    for path, is_recursive in paths_to_lint:
         # Make sure all hard-coded paths point to .py files
         if path.is_file():
             if path.suffix.lower() != ".py":

dev/submit_slurm.py

@@ -188,7 +188,7 @@ def get_resource_estimates(filepath):
                 mem_bytes = float(match.groupdict()["mem_bytes"])
 
     time_minutes = time_sec / 60
-    mem_mb = mem_bytes / (1024 ** 2)
+    mem_mb = mem_bytes / (1024**2)
 
     return time_minutes, mem_mb
 

dev/vtr_gdb_pretty_printers.py

@@ -7,8 +7,10 @@
 
     https://docs.verilogtorouting.org/en/latest/dev/developing#vtr-pretty-printers
 """
+
 import re
 
+
 # VTR related
 class VtrStrongIdPrinter:
     def __init__(self, val, typename="vtr::StrongId"):

odin_ii/regression_test/tools/8_bit_arithmetic_power_output.py

@@ -11,12 +11,12 @@ def make_output_vector(power):
     print("c")
     next_a = 0
     for i in range(0, 512):
-        value = next_a ** power
+        value = next_a**power
         output = f"{value:#0{4}x}"
         print(output[0:2] + output[-2:])
         if i % 2 == 1:
             next_a += 1
-    value = next_a ** power
+    value = next_a**power
     output = f"{value:#0{4}x}"
     print(output[0:2] + output[-2:])
     print("0x00")

odin_ii/regression_test/tools/asr_vector_maker.py

@@ -67,7 +67,7 @@ def make_input_vector(bits):
     # One for each value (2^bits)
     # a rising edge for each line ( * 2)
     # a line for reset ( + 1)
-    lines = ((2 ** bits) * 2) + 2
+    lines = ((2**bits) * 2) + 2
     for i in range(0, lines):
         if i < (lines - 1):
             inputs[0].append(value)

vpr/scripts/profile/util.py

@@ -5,6 +5,7 @@
 import socket
 import getpass
 
+
 # working on the task directory
 def sort_runs(runs):
     natural_sort(runs)

vtr_flow/benchmarks/system_verilog/f4pga/make_sv_flattened.py

@@ -1,46 +1,51 @@
 """
 Module for flattening the SV design files.
 """
+
 import os
 import re
 
+
 def find_verilog_files():
     """Find all Verilog (.sv, .v) files in the current directory."""
-    return [f for f in os.listdir('.') if f.endswith(('.sv', '.v'))]
+    return [f for f in os.listdir(".") if f.endswith((".sv", ".v"))]
+
 
 def identify_top_module(file_list):
     """Identify the file containing the top module definition."""
     top_module_regex = re.compile(r"module\s+top\s*\(")
     for file in file_list:
-        with open(file, 'r') as f:
+        with open(file, "r") as f:
             for line in f:
                 if top_module_regex.search(line):
                     return file
     return None
 
+
 def create_flattened_file(top_file, file_list):
     """Create a flattened Verilog file with all file contents."""
     current_dir = os.path.basename(os.getcwd())
     output_file_name = f"flattened_{current_dir}.sv"
 
-    with open(output_file_name, 'w') as output_file:
+    with open(output_file_name, "w") as output_file:
         if top_file:
             # Write the top module first
-            with open(top_file, 'r') as top_module:
+            with open(top_file, "r") as top_module:
                 output_file.write(f"// Content from {top_file}\n")
                 output_file.write(top_module.read())
                 output_file.write("\n\n")
 
         # Write the rest of the files
         for file in file_list:
             if file != top_file:
-                with open(file, 'r') as verilog_file:
+                with open(file, "r") as verilog_file:
                     output_file.write(f"// Content from {file}\n")
                     output_file.write(verilog_file.read())
                     output_file.write("\n\n")
 
     print(f"Flattened file created: {output_file_name}")
 
+
 def main():
     """Main function to generate the flattened Verilog file."""
     print("Searching for Verilog files...")
@@ -61,5 +66,6 @@ def main():
     print("Creating flattened file...")
     create_flattened_file(top_file, verilog_files)
 
+
 if __name__ == "__main__":
     main()

vtr_flow/scripts/arch_gen/arch_gen.py

@@ -172,7 +172,7 @@ def xLUT(LUT_size, num_LUT):
 
 
 def xCLB(k_LUT, N_BLE, I_CLB, I_BLE, fracture_level, num_FF, crossbar_str):
-    O_LUT = 2 ** fracture_level
+    O_LUT = 2**fracture_level
     O_soft = O_LUT
     O_ble = O_soft
     O_CLB = N_BLE * O_ble
@@ -430,7 +430,7 @@ def xCLB(k_LUT, N_BLE, I_CLB, I_BLE, fracture_level, num_FF, crossbar_str):
         else:
             special_stage = False
 
-            num_LUT = 2 ** frac_stage
+            num_LUT = 2**frac_stage
             LUT_size = k_LUT - frac_stage
 
         idx = "[" + str(LUT_size - 1) + ":0]"

vtr_flow/scripts/benchtracker/flask_cors/six.py

@@ -687,7 +687,6 @@ def reraise(tp, value, tb=None):
             raise value.with_traceback(tb)
         raise value
 
-
 else:
 
     def exec_(_code_, _globs_=None, _locs_=None):
@@ -809,13 +808,13 @@ def wrapper(f):
 
         return wrapper
 
-
 else:
     wraps = functools.wraps
 
 
 def with_metaclass(meta, *bases):
     """Create a base class with a metaclass."""
+
     # This requires a bit of explanation: the basic idea is to make a dummy
     # metaclass for one level of class instantiation that replaces itself with
     # the actual metaclass.

vtr_flow/scripts/benchtracker/populate_db.py

@@ -25,6 +25,7 @@
 nullval = "-1"
 type_map = {int: "INT", float: "REAL", str: "TEXT"}
 
+
 # main program sequence
 def main():
     params = Params()
@@ -59,6 +60,7 @@ def update_db(params, db):
     # check if table for task exists; if not then create it
     task_table_name = params.task_table_name
     create_table(params, db, task_table_name)
+
     # load up latest run and parsed date for task
     def check_last_runs_table(runs):
         natural_sort(runs)

vtr_flow/scripts/blif_splicer.py

@@ -88,9 +88,11 @@
                 # and is not 're') with the name of the circuit.
 
                 sections[sectionNumber] += " ".join(
-                    name + "_" + word
-                    if word != "re" and any(char not in nonNetChars for char in word)
-                    else word
+                    (
+                        name + "_" + word
+                        if word != "re" and any(char not in nonNetChars for char in word)
+                        else word
+                    )
                     for word in line.split(" ")
                 )
 

vtr_flow/scripts/download_noc_mlp.py

@@ -17,6 +17,7 @@
 import shutil
 import errno
 
+
 class ExtractionError(Exception):
     """
     Raised when extracting the downlaoded file fails
@@ -39,8 +40,9 @@ def parse_args():
                     does nothing (unless --force is specified).
                   """
     )
-    parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter,
-                                     description=description)
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=description
+    )
 
     parser.add_argument(
         "--vtr_flow_dir",
@@ -132,7 +134,7 @@ def extract_to_vtr_flow_dir(args, tar_gz_filename):
                 raise ExtractionError("{} should be a directory".format(directory))
 
     # Create a temporary working directory
-    tmpdir = tempfile.mkdtemp(suffix="download_NoC_MLP", dir= os.path.abspath("."))
+    tmpdir = tempfile.mkdtemp(suffix="download_NoC_MLP", dir=os.path.abspath("."))
     try:
         # Extract the contents of the .tar.gz archive directly into the destination directory
         with tarfile.open(tar_gz_filename, "r:gz") as tar:

vtr_flow/scripts/download_titan.py

@@ -41,8 +41,9 @@ def parse_args():
                     does nothing (unless --force is specified).
                   """
     )
-    parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter,
-                                     description=description)
+    parser = argparse.ArgumentParser(
+        formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=description
+    )
 
     parser.add_argument(
         "--titan_version", default="2.0.0", help="Titan release version to download"

vtr_flow/scripts/python_libs/vtr/__init__.py

@@ -1,6 +1,7 @@
 """
     __init__ for the VTR python module
 """
+
 from .util import (
     load_config_lines,
     CommandRunner,

vtr_flow/scripts/python_libs/vtr/abc/__init__.py

@@ -1,4 +1,5 @@
 """
     __init__ for abc module
 """
+
 from .abc import run, run_lec

vtr_flow/scripts/python_libs/vtr/abc/abc.py

@@ -1,13 +1,15 @@
 """
     Module to run ABC with its various options
 """
+
 import shutil
 from collections import OrderedDict
 from pathlib import Path
 from vtr import determine_lut_size, verify_file, CommandRunner
 from vtr import paths
 from vtr.error import InspectError
 
+
 # pylint: disable=too-many-arguments, too-many-locals
 def run(
     architecture_file,
@@ -186,24 +188,26 @@ def run(
                 ]
             )
             if abc_script is None
-            else "; ".join(
-                [
-                    "read {pre_abc_blif}".format(pre_abc_blif=pre_abc_blif.name),
-                    "time",
-                    "resyn",
-                    "resyn2",
-                    "if -K {lut_size}".format(lut_size=lut_size),
-                    "time",
-                    "scleanup",
-                    "write_hie {pre_abc_blif} {post_abc_raw_blif}".format(
-                        pre_abc_blif=pre_abc_blif.name,
-                        post_abc_raw_blif=post_abc_raw_blif.name,
-                    ),
-                    "print_stats",
-                ]
+            else (
+                "; ".join(
+                    [
+                        "read {pre_abc_blif}".format(pre_abc_blif=pre_abc_blif.name),
+                        "time",
+                        "resyn",
+                        "resyn2",
+                        "if -K {lut_size}".format(lut_size=lut_size),
+                        "time",
+                        "scleanup",
+                        "write_hie {pre_abc_blif} {post_abc_raw_blif}".format(
+                            pre_abc_blif=pre_abc_blif.name,
+                            post_abc_raw_blif=post_abc_raw_blif.name,
+                        ),
+                        "print_stats",
+                    ]
+                )
+                if use_old_abc_script
+                else abc_script
             )
-            if use_old_abc_script
-            else abc_script
         )
 
         cmd = [abc_exec, "-c", abc_script]

vtr_flow/scripts/python_libs/vtr/ace/__init__.py

@@ -1,4 +1,5 @@
 """
     init for the ACE module
 """
+
 from .ace import run

vtr_flow/scripts/python_libs/vtr/ace/ace.py

@@ -1,9 +1,11 @@
 """
     Module to run ACE with its various options
 """
+
 from pathlib import Path
 from vtr import verify_file, CommandRunner, paths
 
+
 # pylint: disable=too-many-arguments
 def run(
     circuit_file,

vtr_flow/scripts/python_libs/vtr/flow.py

@@ -1,6 +1,7 @@
 """
     Module to run the VTR flow. This module calls other modules that then access the tools like VPR.
 """
+
 import shutil
 from pathlib import Path
 from collections import OrderedDict
@@ -258,9 +259,9 @@ def run(
         if should_run_stage(VtrStage.ACE, start_stage, end_stage):
             vtr.ace.run(
                 next_stage_netlist,
-                old_netlist=post_odin_netlist
-                if start_stage == VtrStage.ODIN
-                else post_yosys_netlist,
+                old_netlist=(
+                    post_odin_netlist if start_stage == VtrStage.ODIN else post_yosys_netlist
+                ),
                 output_netlist=post_ace_netlist,
                 output_activity_file=post_ace_activity_file,
                 command_runner=command_runner,

vtr_flow/scripts/python_libs/vtr/log_parse.py

@@ -1,6 +1,7 @@
 """
     module that contains functions to inspect various files to determine important values
 """
+
 import re
 from collections import OrderedDict
 from pathlib import Path
@@ -25,7 +26,7 @@ def __init__(self, name, filename, regex_str, default_value=None):
         self._filename = filename
         # Look for the specified pattern somewhere in the line, but any characters
         # can occur before and after it. Detailed in GitHub Issue #2743.
-        self._regex = re.compile(f'^.*{regex_str}.*$')
+        self._regex = re.compile(f"^.*{regex_str}.*$")
         self._default_value = default_value
 
     def name(self):

vtr_flow/scripts/python_libs/vtr/odin/__init__.py

@@ -1,4 +1,5 @@
 """
     init for the ODIN module
 """
+
 from .odin import run

vtr_flow/scripts/python_libs/vtr/odin/odin.py

@@ -1,6 +1,7 @@
 """
     Module to run ODIN II with its various arguments
 """
+
 import os
 import shutil
 from collections import OrderedDict

vtr_flow/scripts/python_libs/vtr/parmys/__init__.py

@@ -1,5 +1,6 @@
 """
     init for the YOSYS module
 """
+
 from .parmys import run
 from .parmys import YOSYS_PARSERS

vtr_flow/scripts/python_libs/vtr/parmys/parmys.py

@@ -1,6 +1,7 @@
 """
     Module to run Parmys with its various arguments
 """
+
 import os
 import shutil
 from collections import OrderedDict