Merge branch 'master' of https://github.com/verilog-to-routing/vtr-verilog-to-routing into debug_3d_sw

Author: amin1377

.gitignore

@@ -155,3 +155,8 @@ tags
 cmake-build-debug
 cmake-build-release
 /.metadata/
+
+#
+# Clangd
+#
+compile_commands.json

doc/src/api/vpr/route_tree.rst

@@ -20,3 +20,10 @@ RouteTreeNode
 .. doxygenclass:: RouteTreeNode
    :project: vpr
    :members:
+
+RTExploredNode
+-------------
+
+.. doxygenclass:: RTExploredNode
+   :project: vpr
+   :members:

doc/src/api/vprinternals/router_heap.rst

@@ -2,30 +2,13 @@
 Router Heap
 ==============
 
-t_heap
-----------
-.. doxygenstruct:: t_heap
-   :project: vpr
-   :members:
-
 HeapInterface
 ----------
 .. doxygenclass:: HeapInterface
    :project: vpr
    :members:
 
-HeapStorage
-----------
-.. doxygenclass:: HeapStorage
-   :project: vpr
-   :members:
-
-KAryHeap
+DAryHeap
 ----------
-.. doxygenclass:: KAryHeap
+.. doxygenclass:: DAryHeap
    :project: vpr
-
-FourAryHeap
-----------
-.. doxygenclass:: FourAryHeap
-   :project: vpr

doc/src/vpr/command_line_usage.rst

@@ -200,12 +200,14 @@ General Options
 
 .. option:: --device <string>
 
-    Specifies which device layout/floorplan to use from the architecture file.
+    Specifies which device layout/floorplan to use from the architecture file.  Valid values are:
 
-    ``auto`` uses the smallest device satisfying the circuit's resource requirements.
-    Other values are assumed to be the names of device layouts defined in the :ref:`arch_grid_layout` section of the architecture file.
+    * ``auto`` VPR uses the smallest device satisfying the circuit's resource requirements.  This option will use the ``<auto_layout>`` tag if it is present in the architecture file in order to construct the smallest FPGA that has sufficient resources to fit the design. If the ``<auto_layout>`` tag is not present, the ``auto`` option chooses the smallest device amongst all the architecture file's ``<fixed_layout>`` specifications into which the design can be packed.
+    * Any string matching ``name`` attribute of a device layout defined with a ``<fixed_layout>`` tag in the :ref:`arch_grid_layout` section of the architecture file.
 
-    .. note:: If the architecture contains both ``<auto_layout>`` and ``<fixed_layout>`` specifications, specifying an ``auto`` device will use the ``<auto_layout>``.
+    If the value specified is neither ``auto`` nor matches the ``name`` attribute value of a ``<fixed_layout>`` tag, VPR issues an error.
+       
+    .. note:: If the only layout in the architecture file is a single device specified using ``<fixed_layout>``, it is recommended to always specify the ``--device`` option; this prevents the value ``--device auto`` from interfering with operations supported only for ``<fixed_layout>`` grids.
 
     **Default:** ``auto``
 
@@ -1394,15 +1396,17 @@ The following options are only valid when the router is in timing-driven mode (t
 
     **Default:** ``safe``
 
-.. option:: --routing_budgets_algorithm { disable | minimax | scale_delay }
+.. option:: --routing_budgets_algorithm { disable | minimax | yoyo | scale_delay }
 
     .. warning:: Experimental
 
     Controls how the routing budgets are created. Routing budgets are used to guid VPR's routing algorithm to consider both short path and long path timing constraints :cite:`RCV_algorithm`.
 
     ``disable`` is used to disable the budget feature. This uses the default VPR and ignores hold time constraints.
 
-    ``minimax`` sets the minimum and maximum budgets by distributing the long path and short path slacks depending on the the current delay values. This uses the routing cost valleys and Minimax-PERT algorithm :cite:`minimax_pert,RCV_algorithm`.
+    ``minimax`` sets the minimum and maximum budgets by distributing the long path and short path slacks depending on the the current delay values. This uses the Minimax-PERT algorithm :cite:`minimax_pert`.
+
+    ``yoyo`` allocates budgets using minimax algorithm (as above), and enables hold slack resolution in the router using the Routing Cost Valleys (RCV) algorithm :cite:`RCV_algorithm`.
 
     ``scale_delay`` has the minimum budgets set to 0 and the maximum budgets is set to the delay of a net scaled by the pin criticality (net delay/pin criticality).
 

libs/libarchfpga/src/physical_types.h

@@ -1382,7 +1382,7 @@ class t_pb_graph_pin {
     float tco_max = std::numeric_limits<float>::quiet_NaN(); /* For sequential logic elements the maximum clock to output time */
     t_pb_graph_pin* associated_clock_pin = nullptr;          /* For sequentail elements, the associated clock */
 
-    /* This member is used when flat-routing and has_choking_spot are enabled.
+    /* This member is used when flat-routing and router_opt_choke_points are enabled.
      * It is used to identify choke points.
      * This is only valid for IPINs, and it only contain the pins that are reachable to the pin by a forwarding path.
      * It doesn't take into account feed-back connection.

utils/route_diag/src/main.cpp

@@ -114,7 +114,7 @@ static void do_one_route(const Netlist<>& net_list,
             is_flat);
     enable_router_debug(router_opts, ParentNetId(), sink_node, 1, &router);
     bool found_path;
-    t_heap cheapest;
+    RTExploredNode cheapest;
     ConnectionParameters conn_params(ParentNetId::INVALID(),
                                      -1,
                                      false,

vpr/src/base/SetupVPR.cpp

@@ -318,7 +318,7 @@ void SetupVPR(const t_options* options,
         vtr::ScopedStartFinishTimer timer("Allocate intra-cluster resources");
         // The following two functions should be called when the data structured related to t_pb_graph_node, t_pb_type,
         // and t_pb_graph_edge are initialized
-        alloc_and_load_intra_cluster_resources(routerOpts->has_choking_spot);
+        alloc_and_load_intra_cluster_resources(routerOpts->has_choke_point);
         add_intra_tile_switches();
     }
 
@@ -510,7 +510,7 @@ static void SetupRouterOpts(const t_options& Options, t_router_opts* RouterOpts)
     RouterOpts->max_logged_overused_rr_nodes = Options.max_logged_overused_rr_nodes;
     RouterOpts->generate_rr_node_overuse_report = Options.generate_rr_node_overuse_report;
     RouterOpts->flat_routing = Options.flat_routing;
-    RouterOpts->has_choking_spot = Options.has_choking_spot;
+    RouterOpts->has_choke_point = Options.router_opt_choke_points;
     RouterOpts->custom_3d_sb_fanin_fanout = Options.custom_3d_sb_fanin_fanout;
     RouterOpts->with_timing_analysis = Options.timing_analysis;
 }

vpr/src/base/ShowSetup.cpp

@@ -255,11 +255,11 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) {
         VTR_LOG("false\n");
     }
 
-    VTR_LOG("RouterOpts.has_choking_spot: ");
-    if (RouterOpts.has_choking_spot) {
-        VTR_LOG("true\n");
+    VTR_LOG("RouterOpts.choke_points: ");
+    if (RouterOpts.has_choke_point) {
+        VTR_LOG("on\n");
     } else {
-        VTR_LOG("false\n");
+        VTR_LOG("off\n");
     }
 
     VTR_ASSERT(GLOBAL == RouterOpts.route_type || DETAILED == RouterOpts.route_type);
@@ -468,9 +468,6 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) {
             case e_heap_type::FOUR_ARY_HEAP:
                 VTR_LOG("FOUR_ARY_HEAP\n");
                 break;
-            case e_heap_type::BUCKET_HEAP_APPROXIMATION:
-                VTR_LOG("BUCKET_HEAP_APPROXIMATION\n");
-                break;
             default:
                 VPR_FATAL_ERROR(VPR_ERROR_UNKNOWN, "Unknown router_heap\n");
         }

vpr/src/base/place_and_route.cpp

@@ -398,7 +398,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
 
     init_route_structs(router_net_list,
                        router_opts.bb_factor,
-                       router_opts.has_choking_spot,
+                       router_opts.has_choke_point,
                        is_flat);
 
     restore_routing(best_routing,

vpr/src/base/read_options.cpp

@@ -272,7 +272,7 @@ struct RouteBudgetsAlgorithm {
     }
 
     std::vector<std::string> default_choices() {
-        return {"minimax", "scale_delay", "disable"};
+        return {"minimax", "yoyo", "scale_delay", "disable"};
     }
 };
 
@@ -1063,8 +1063,6 @@ struct ParseRouterHeap {
             conv_value.set_value(e_heap_type::BINARY_HEAP);
         else if (str == "four_ary")
             conv_value.set_value(e_heap_type::FOUR_ARY_HEAP);
-        else if (str == "bucket")
-            conv_value.set_value(e_heap_type::BUCKET_HEAP_APPROXIMATION);
         else {
             std::stringstream msg;
             msg << "Invalid conversion from '" << str << "' to e_heap_type (expected one of: " << argparse::join(default_choices(), ", ") << ")";
@@ -1077,11 +1075,9 @@ struct ParseRouterHeap {
         ConvertedValue<std::string> conv_value;
         if (val == e_heap_type::BINARY_HEAP)
             conv_value.set_value("binary");
-        else if (val == e_heap_type::FOUR_ARY_HEAP)
-            conv_value.set_value("four_ary");
         else {
-            VTR_ASSERT(val == e_heap_type::BUCKET_HEAP_APPROXIMATION);
-            conv_value.set_value("bucket");
+            VTR_ASSERT(val == e_heap_type::FOUR_ARY_HEAP);
+            conv_value.set_value("four_ary");
         }
         return conv_value;
     }
@@ -2491,13 +2487,13 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio
         .default_value("off")
         .show_in(argparse::ShowIn::HELP_ONLY);
 
-    route_grp.add_argument(args.has_choking_spot, "--has_choking_spot")
+    route_grp.add_argument<bool, ParseOnOff>(args.router_opt_choke_points, "--router_opt_choke_points")
         .help(
             ""
-            "Some FPGA architectures, due to the lack of full connectivity inside the cluster, may have"
-            " a choking spot inside the cluster. Thus, if routing doesn't converge, enabling this option may"
-            " help it.")
-        .default_value("false")
+            "Some FPGA architectures with limited fan-out options within a cluster (e.g. fracturable LUTs with shared pins) do" 
+            " not converge well in routing unless these fan-out choke points are discovered and optimized for during net routing." 
+            " This option helps router convergence for such architectures.")
+        .default_value("on")
         .show_in(argparse::ShowIn::HELP_ONLY);
 
 

vpr/src/base/read_options.h

@@ -218,7 +218,7 @@ struct t_options {
     argparse::ArgValue<int> reorder_rr_graph_nodes_threshold;
     argparse::ArgValue<int> reorder_rr_graph_nodes_seed;
     argparse::ArgValue<bool> flat_routing;
-    argparse::ArgValue<bool> has_choking_spot;
+    argparse::ArgValue<bool> router_opt_choke_points;
     argparse::ArgValue<int> route_verbosity;
     argparse::ArgValue<int> custom_3d_sb_fanin_fanout;
 

vpr/src/base/read_route.cpp

@@ -20,7 +20,6 @@
 #include <ctime>
 #include <sstream>
 #include <string>
-#include <unordered_set>
 
 #include "atom_netlist.h"
 #include "atom_netlist_utils.h"
@@ -46,7 +45,6 @@
 #include "route_common.h"
 #include "route_tree.h"
 #include "read_route.h"
-#include "four_ary_heap.h"
 
 #include "old_traceback.h"
 
@@ -109,7 +107,7 @@ bool read_route(const char* route_file, const t_router_opts& router_opts, bool v
     const Netlist<>& router_net_list = (flat_router) ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
     init_route_structs(router_net_list,
                        router_opts.bb_factor,
-                       router_opts.has_choking_spot,
+                       router_opts.has_choke_point,
                        flat_router);
 
     /*Check dimensions*/

vpr/src/base/vpr_types.h

@@ -1339,7 +1339,7 @@ struct t_router_opts {
     bool generate_rr_node_overuse_report;
 
     bool flat_routing;
-    bool has_choking_spot;
+    bool has_choke_point;
 
     int custom_3d_sb_fanin_fanout = 1;
 
@@ -1607,14 +1607,18 @@ constexpr bool is_src_sink(e_rr_type type) { return (type == SOURCE || type == S
  *                     is being used.
  *   @param backward_path_cost  Total cost of the path up to and including this
  *                     node.
- *   @param occ        The current occupancy of the associated rr node
+ *   @param R_upstream Upstream resistance to ground from this node in the current
+ *                     path search (connection routing), including the resistance
+ *                     of the node itself (device_ctx.rr_nodes[index].R).
+ *   @param occ        The current occupancy of the associated rr node.
  */
 struct t_rr_node_route_inf {
     RREdgeId prev_edge;
 
     float acc_cost;
     float path_cost;
     float backward_path_cost;
+    float R_upstream;
 
   public: //Accessors
     short occ() const { return occ_; }

vpr/src/place/net_cost_handler.cpp

@@ -31,8 +31,9 @@
 #include "placer_state.h"
 #include "move_utils.h"
 #include "place_timing_update.h"
-#include "noc_place_utils.h"
 #include "vtr_math.h"
+#include "vtr_ndmatrix.h"
+#include "vtr_ndoffsetmatrix.h"
 
 #include <array>
 
@@ -53,9 +54,6 @@ constexpr std::array<float, MAX_FANOUT_CROSSING_COUNT> cross_count = {1.0000, 1.
                                                                       2.5610, 2.5864, 2.6117, 2.6371, 2.6625, 2.6887, 2.7148, 2.7410,
                                                                       2.7671, 2.7933};
 
-
-
-
 /**
  * @brief If the moving pin is of type type SINK, update bb_pin_sink_count_new which stores the number of sink pins on each layer of "net_id"
  * @param pin_old_loc Old location of the moving pin
@@ -229,6 +227,70 @@ void NetCostHandler::alloc_and_load_chan_w_factors_for_place_cost_(float place_c
             chany_place_cost_fac_[high][low] = pow((double)chany_place_cost_fac_[high][low], (double)place_cost_exp);
         }
     }
+    
+    if (device_ctx.grid.get_num_layers() > 1) {
+        alloc_and_load_for_fast_vertical_cost_update_(place_cost_exp);
+    }
+}
+
+void NetCostHandler::alloc_and_load_for_fast_vertical_cost_update_(float place_cost_exp) {
+    const auto& device_ctx = g_vpr_ctx.device();
+    const auto& rr_graph = device_ctx.rr_graph;
+    
+    const size_t grid_height = device_ctx.grid.height();
+    const size_t grid_width = device_ctx.grid.width();
+
+
+    chanz_place_cost_fac_ = vtr::NdMatrix<float, 4>({grid_width, grid_height, grid_width, grid_height}, 0.);
+
+    vtr::NdMatrix<float, 2> tile_num_inter_die_conn({grid_width, grid_height}, 0.);                           
+
+    for (const auto& src_rr_node : rr_graph.nodes()) {
+        for (const auto& rr_edge_idx : rr_graph.configurable_edges(src_rr_node)) {
+            const auto& sink_rr_node = rr_graph.edge_sink_node(src_rr_node, rr_edge_idx);
+            if (rr_graph.node_layer(src_rr_node) != rr_graph.node_layer(sink_rr_node)) {
+                // We assume that the nodes driving the inter-layer connection or being driven by it
+                // are not streched across multiple tiles
+                int src_x = rr_graph.node_xhigh(src_rr_node);
+                int src_y = rr_graph.node_yhigh(src_rr_node);
+                VTR_ASSERT(rr_graph.node_xlow(src_rr_node) == src_x && rr_graph.node_ylow(src_rr_node) == src_y);
+
+                tile_num_inter_die_conn[src_x][src_y]++;
+            }
+        }
+
+        for (const auto& rr_edge_idx : rr_graph.non_configurable_edges(src_rr_node)) {
+            const auto& sink_rr_node = rr_graph.edge_sink_node(src_rr_node, rr_edge_idx);
+            if (rr_graph.node_layer(src_rr_node) != rr_graph.node_layer(sink_rr_node)) {
+                int src_x = rr_graph.node_xhigh(src_rr_node);
+                VTR_ASSERT(rr_graph.node_xlow(src_rr_node) == src_x && rr_graph.node_xlow(src_rr_node) == src_x);
+                int src_y = rr_graph.node_yhigh(src_rr_node);
+                VTR_ASSERT(rr_graph.node_ylow(src_rr_node) == src_y && rr_graph.node_ylow(src_rr_node) == src_y);
+                tile_num_inter_die_conn[src_x][src_y]++;
+            }
+        }
+    }
+
+    for (int x_high = 0; x_high < (int)device_ctx.grid.width(); x_high++) {
+        for (int y_high = 0; y_high < (int)device_ctx.grid.height(); y_high++) {
+            for (int x_low = 0; x_low <= x_high; x_low++) {
+                for (int y_low = 0; y_low <= y_high; y_low++) {
+                    int num_inter_die_conn = 0;
+                    for (int x = x_low; x <= x_high; x++) {
+                        for (int y = y_low; y <= y_high; y++) {
+                            num_inter_die_conn += tile_num_inter_die_conn[x][y];
+                        }
+                    }
+                    int seen_num_tiles = (x_high - x_low + 1) * (y_high - y_low + 1);
+                    chanz_place_cost_fac_[x_high][y_high][x_low][y_low] = seen_num_tiles / static_cast<float>(num_inter_die_conn);
+
+                    chanz_place_cost_fac_[x_high][y_high][x_low][y_low] = pow(
+                        (double)chanz_place_cost_fac_[x_high][y_high][x_low][y_low],
+                        (double)place_cost_exp);
+                }
+            }
+        }
+    }
 }
 
 double NetCostHandler::comp_bb_cost(e_cost_methods method) {
@@ -1395,6 +1457,8 @@ double NetCostHandler::get_net_cube_bb_cost_(ClusterNetId net_id, bool use_ts) {
 
     const t_bb& bb = use_ts ? ts_bb_coord_new_[net_id] : placer_state_.move().bb_coords[net_id];
 
+    const bool is_multi_layer = (g_vpr_ctx.device().grid.get_num_layers() > 1);
+
     double crossing = wirelength_crossing_count(cluster_ctx.clb_nlist.net_pins(net_id).size());
 
     /* Could insert a check for xmin == xmax.  In that case, assume  *
@@ -1413,6 +1477,9 @@ double NetCostHandler::get_net_cube_bb_cost_(ClusterNetId net_id, bool use_ts) {
     double ncost;
     ncost = (bb.xmax - bb.xmin + 1) * crossing * chanx_place_cost_fac_[bb.ymax][bb.ymin - 1];
     ncost += (bb.ymax - bb.ymin + 1) * crossing * chany_place_cost_fac_[bb.xmax][bb.xmin - 1];
+    if (is_multi_layer) {
+        ncost += (bb.layer_max - bb.layer_min) * crossing * chanz_place_cost_fac_[bb.xmax][bb.ymax][bb.xmin][bb.ymin];
+    }
 
     return ncost;
 }