equivalent: delete pin_physical_index from clustered netlist

Signed-off-by: Alessandro Comodi <[email protected]>

Author: acomodi

vpr/src/base/check_netlist.cpp

@@ -94,7 +94,7 @@ static int check_connections_to_global_clb_pins(ClusterNetId net_id, int verbosi
         auto logical_type = cluster_ctx.clb_nlist.block_type(blk_id);
         auto physical_type = pick_best_physical_type(logical_type);
 
-        int log_index = cluster_ctx.clb_nlist.pin_physical_index(pin_id);
+        int log_index = cluster_ctx.clb_nlist.pin_logical_index(pin_id);
         int pin_index = get_physical_pin(physical_type, logical_type, log_index);
 
         if (physical_type->is_ignored_pin[pin_index] != net_is_ignored

vpr/src/base/clustered_netlist.cpp

@@ -30,8 +30,8 @@ t_logical_block_type_ptr ClusteredNetlist::block_type(const ClusterBlockId id) c
     return block_types_[id];
 }
 
-ClusterNetId ClusteredNetlist::block_net(const ClusterBlockId blk_id, const int phys_pin_index) const {
-    auto pin_id = block_pin(blk_id, phys_pin_index);
+ClusterNetId ClusteredNetlist::block_net(const ClusterBlockId blk_id, const int logical_pin_index) const {
+    auto pin_id = block_pin(blk_id, logical_pin_index);
 
     if (pin_id) {
         return pin_net(pin_id);
@@ -50,11 +50,11 @@ int ClusteredNetlist::block_pin_net_index(const ClusterBlockId blk_id, const int
     return OPEN;
 }
 
-ClusterPinId ClusteredNetlist::block_pin(const ClusterBlockId blk, const int phys_pin_index) const {
+ClusterPinId ClusteredNetlist::block_pin(const ClusterBlockId blk, const int logical_pin_index) const {
     VTR_ASSERT_SAFE(valid_block_id(blk));
-    VTR_ASSERT_SAFE_MSG(phys_pin_index >= 0 && phys_pin_index < static_cast<ssize_t>(block_logical_pins_[blk].size()), "Physical pin index must be in range");
+    VTR_ASSERT_SAFE_MSG(logical_pin_index >= 0 && logical_pin_index < static_cast<ssize_t>(block_logical_pins_[blk].size()), "Logical pin index must be in range");
 
-    return block_logical_pins_[blk][phys_pin_index];
+    return block_logical_pins_[blk][logical_pin_index];
 }
 
 bool ClusteredNetlist::block_contains_primary_input(const ClusterBlockId blk) const {
@@ -75,23 +75,17 @@ bool ClusteredNetlist::block_contains_primary_output(const ClusterBlockId blk) c
  * Pins
  *
  */
-int ClusteredNetlist::pin_physical_index(const ClusterPinId id) const {
-    VTR_ASSERT_SAFE(valid_pin_id(id));
-
-    return pin_physical_index_[id];
-}
-
 int ClusteredNetlist::pin_logical_index(const ClusterPinId pin_id) const {
     VTR_ASSERT_SAFE(valid_pin_id(pin_id));
 
     return pin_logical_index_[pin_id];
 }
 
-int ClusteredNetlist::net_pin_physical_index(const ClusterNetId net_id, int net_pin_index) const {
+int ClusteredNetlist::net_pin_logical_index(const ClusterNetId net_id, int net_pin_index) const {
     auto pin_id = net_pin(net_id, net_pin_index);
 
     if (pin_id) {
-        return pin_physical_index(pin_id);
+        return pin_logical_index(pin_id);
     }
 
     return OPEN; //No valid pin found
@@ -141,20 +135,6 @@ ClusterBlockId ClusteredNetlist::create_block(const char* name, t_pb* pb, t_logi
     return blk_id;
 }
 
-void ClusteredNetlist::set_pin_physical_index(const ClusterPinId pin, const int phys_pin_index) {
-    VTR_ASSERT_SAFE(valid_pin_id(pin));
-    auto blk = pin_block(pin);
-
-    int old_phys_pin_index = pin_physical_index(pin);
-
-    //Invalidate old mapping
-    block_logical_pins_[blk][old_phys_pin_index] = ClusterPinId::INVALID();
-
-    //Update mappings
-    pin_physical_index_[pin] = phys_pin_index;
-    block_logical_pins_[blk][phys_pin_index] = pin;
-}
-
 ClusterPortId ClusteredNetlist::create_port(const ClusterBlockId blk_id, const std::string name, BitIndex width, PortType type) {
     ClusterPortId port_id = find_port(blk_id, name);
     if (!port_id) {
@@ -175,7 +155,6 @@ ClusterPortId ClusteredNetlist::create_port(const ClusterBlockId blk_id, const s
 ClusterPinId ClusteredNetlist::create_pin(const ClusterPortId port_id, BitIndex port_bit, const ClusterNetId net_id, const PinType pin_type_, int pin_index, bool is_const) {
     ClusterPinId pin_id = Netlist::create_pin(port_id, port_bit, net_id, pin_type_, is_const);
 
-    pin_physical_index_.push_back(pin_index);
     pin_logical_index_.push_back(pin_index);
 
     ClusterBlockId block_id = port_block(port_id);
@@ -249,7 +228,7 @@ void ClusteredNetlist::clean_ports_impl(const vtr::vector_map<ClusterPortId, Clu
 
 void ClusteredNetlist::clean_pins_impl(const vtr::vector_map<ClusterPinId, ClusterPinId>& pin_id_map) {
     //Update all the pin values
-    pin_physical_index_ = clean_and_reorder_values(pin_physical_index_, pin_id_map);
+    pin_logical_index_ = clean_and_reorder_values(pin_logical_index_, pin_id_map);
 }
 
 void ClusteredNetlist::clean_nets_impl(const vtr::vector_map<ClusterNetId, ClusterNetId>& net_id_map) {
@@ -263,8 +242,8 @@ void ClusteredNetlist::rebuild_block_refs_impl(const vtr::vector_map<ClusterPinI
     for (auto blk : blocks()) {
         block_logical_pins_[blk] = std::vector<ClusterPinId>(get_max_num_pins(block_type(blk)), ClusterPinId::INVALID()); //Reset
         for (auto pin : block_pins(blk)) {
-            int phys_pin_index = pin_physical_index(pin);
-            block_logical_pins_[blk][phys_pin_index] = pin;
+            int logical_pin_index = pin_logical_index(pin);
+            block_logical_pins_[blk][logical_pin_index] = pin;
         }
     }
 }
@@ -290,7 +269,6 @@ void ClusteredNetlist::shrink_to_fit_impl() {
     block_logical_pins_.shrink_to_fit();
 
     //Pin data
-    pin_physical_index_.shrink_to_fit();
     pin_logical_index_.shrink_to_fit();
 
     //Net data
@@ -318,7 +296,7 @@ bool ClusteredNetlist::validate_port_sizes_impl(size_t /*num_ports*/) const {
 }
 
 bool ClusteredNetlist::validate_pin_sizes_impl(size_t num_pins) const {
-    if (pin_physical_index_.size() != num_pins) {
+    if (pin_logical_index_.size() != num_pins) {
         return false;
     }
     return true;

vpr/src/base/clustered_netlist.h

@@ -68,12 +68,12 @@
  * Pins
  * ----
  * The only piece of unique pin information is:
- *       physical_pin_index_
+ *       logical_pin_index_
  *
- * Example of physical_pin_index_
+ * Example of logical_pin_index_
  * ---------------------
- * Given a ClusterPinId, physical_pin_index_ will return the index of the pin within its block
- * relative to the t_logical_block_type (physical description of the block).
+ * Given a ClusterPinId, logical_pin_index_ will return the index of the pin within its block
+ * relative to the t_logical_block_type (logical description of the block).
  *
  *           +-----------+
  *       0-->|O         X|-->3
@@ -83,7 +83,7 @@
  *
  * The index skips over unused pins, e.g. CLB has 6 pins (3 in, 3 out, numbered [0...5]), where
  * the first two ins, and last two outs are used. Indices [0,1] represent the ins, and [4,5]
- * represent the outs. Indices [2,3] are unused. Therefore, physical_pin_index_[92] = 5.
+ * represent the outs. Indices [2,3] are unused. Therefore, logical_pin_index_[92] = 5.
  *
  * Nets
  * ----
@@ -134,8 +134,8 @@ class ClusteredNetlist : public Netlist<ClusterBlockId, ClusterPortId, ClusterPi
     //Returns the count on the net of the block attached
     int block_pin_net_index(const ClusterBlockId blk_id, const int pin_index) const;
 
-    //Returns the logical pin Id associated with the specified block and physical pin index
-    ClusterPinId block_pin(const ClusterBlockId blk, const int phys_pin_index) const;
+    //Returns the logical pin Id associated with the specified block and logical pin index
+    ClusterPinId block_pin(const ClusterBlockId blk, const int logical_pin_index) const;
 
     //Returns true if the specified block contains a primary input (e.g. BLIF .input primitive)
     bool block_contains_primary_input(const ClusterBlockId blk) const;
@@ -147,20 +147,16 @@ class ClusteredNetlist : public Netlist<ClusterBlockId, ClusterPortId, ClusterPi
      * Pins
      */
 
-    //Returns the physical pin index (i.e. pin index on the
-    //t_physical_tile_type) of the specified logical pin
-    int pin_physical_index(const ClusterPinId id) const;
-
     //Returns the logical pin index (i.e. pin index on the
     //t_logical_block_type) of the cluster pin
     int pin_logical_index(const ClusterPinId pin_id) const;
 
     //Finds the net_index'th net pin (e.g. the 6th pin of the net) and
-    //returns the physical pin index (i.e. pin index on the t_logical_block_type)
+    //returns the logical pin index (i.e. pin index on the t_logical_block_type)
     //of the block to which the pin belongs
     //  net_id        : The net
     //  net_pin_index : The index of the pin in the net
-    int net_pin_physical_index(const ClusterNetId net_id, int net_pin_index) const;
+    int net_pin_logical_index(const ClusterNetId net_id, int net_pin_index) const;
 
     /*
      * Nets
@@ -194,11 +190,6 @@ class ClusteredNetlist : public Netlist<ClusterBlockId, ClusterPortId, ClusterPi
     //  is_const   : Indicates whether the pin holds a constant value (e. g. vcc/gnd)
     ClusterPinId create_pin(const ClusterPortId port_id, BitIndex port_bit, const ClusterNetId net_id, const PinType pin_type, int pin_index, bool is_const = false);
 
-    //Sets the mapping of a ClusterPinId to the block's type descriptor's pin index
-    //  pin_id   : The pin to be set
-    //  index    : The new index to set the pin to
-    void set_pin_physical_index(const ClusterPinId pin_id, const int index);
-
     //Create an empty, or return an existing net in the netlist
     //  name     : The unique name of the net
     ClusterNetId create_net(const std::string name);
@@ -253,12 +244,9 @@ class ClusteredNetlist : public Netlist<ClusterBlockId, ClusterPortId, ClusterPi
     vtr::vector_map<ClusterBlockId, std::vector<ClusterPinId>> block_logical_pins_; //The logical pin associated with each physical tile pin
 
     //Pins
-    vtr::vector_map<ClusterPinId, int> pin_physical_index_; //The physical pin index (i.e. pin index
-                                                            //in t_physical_tile_type) corresponding
-                                                            //to the clustered pin
-    vtr::vector_map<ClusterPinId, int> pin_logical_index_;  //The logical pin index of this block (i.e. pin index
-                                                            //in t_logical_block_type) corresponding
-                                                            //to the clustered pin
+    vtr::vector_map<ClusterPinId, int> pin_logical_index_; //The logical pin index of this block (i.e. pin index
+                                                           //in t_logical_block_type) corresponding
+                                                           //to the clustered pin
 
     //Nets
     vtr::vector_map<ClusterNetId, bool> net_is_ignored_; //Boolean mapping indicating if the net is ignored

vpr/src/base/read_netlist.cpp

@@ -971,8 +971,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) {
                     //Asserts the ClusterBlockId is the same when ClusterNetId & pin BitIndex is provided
                     VTR_ASSERT(blk_id == clb_nlist.pin_block(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id])));
                     //Asserts the block's pin index is the same
-                    VTR_ASSERT(j == clb_nlist.pin_physical_index(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id])));
-                    VTR_ASSERT(j == clb_nlist.net_pin_physical_index(clb_net_id, count[clb_net_id]));
+                    VTR_ASSERT(j == clb_nlist.pin_logical_index(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id])));
+                    VTR_ASSERT(j == clb_nlist.net_pin_logical_index(clb_net_id, count[clb_net_id]));
 
                     // nets connecting to global pins are marked as global nets
                     if (tile_type->is_pin_global[physical_pin]) {
@@ -986,8 +986,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) {
 
                 } else {
                     VTR_ASSERT(DRIVER == tile_type->class_inf[tile_type->pin_class[physical_pin]].type);
-                    VTR_ASSERT(j == clb_nlist.pin_physical_index(*(clb_nlist.net_pins(clb_net_id).begin())));
-                    VTR_ASSERT(j == clb_nlist.net_pin_physical_index(clb_net_id, 0));
+                    VTR_ASSERT(j == clb_nlist.pin_logical_index(*(clb_nlist.net_pins(clb_net_id).begin())));
+                    VTR_ASSERT(j == clb_nlist.net_pin_logical_index(clb_net_id, 0));
                 }
             }
         }

vpr/src/base/read_route.cpp

@@ -378,7 +378,7 @@ static void process_global_blocks(std::ifstream& fp, ClusterNetId inet, const ch
                           x, y, place_ctx.block_locs[bnum].loc.x, place_ctx.block_locs[bnum].loc.y);
             }
 
-            int pin_index = cluster_ctx.clb_nlist.net_pin_physical_index(inet, pin_counter);
+            int pin_index = net_pin_tile_index(inet, pin_counter);
             if (physical_tile_type(bnum)->pin_class[pin_index] != atoi(tokens[7].c_str())) {
                 vpr_throw(VPR_ERROR_ROUTE, filename, lineno,
                           "The pin class %d of %lu net does not match given ",

vpr/src/base/vpr_context.h

@@ -248,6 +248,9 @@ struct PlacementContext : public Context {
     //Clustered block placement locations
     vtr::vector_map<ClusterBlockId, t_block_loc> block_locs;
 
+    //Clustered pin placement mapping with physical pin
+    vtr::vector_map<ClusterPinId, int> physical_pins;
+
     //Clustered block associated with each grid location (i.e. inverse of block_locs)
     vtr::Matrix<t_grid_blocks> grid_blocks; //[0..device_ctx.grid.width()-1][0..device_ctx.grid.width()-1]
 

vpr/src/place/place.cpp

@@ -487,6 +487,11 @@ void try_place(const t_placer_opts& placer_opts,
 
     initial_placement(placer_opts.pad_loc_type, placer_opts.pad_loc_file.c_str());
 
+    // Update physical pin values
+    for (auto block_id : cluster_ctx.clb_nlist.blocks()) {
+        place_sync_external_block_connections(block_id);
+    }
+
     init_draw_coords((float)width_fac);
     //Enables fast look-up of atom pins connect to CLB pins
     ClusteredPinAtomPinsLookup netlist_pin_lookup(cluster_ctx.clb_nlist, pb_gpin_lookup);
@@ -1385,7 +1390,7 @@ static void update_net_bb(const ClusterNetId net,
         }
     } else {
         //For large nets, update bounding box incrementally
-        int iblk_pin = cluster_ctx.clb_nlist.pin_physical_index(blk_pin);
+        int iblk_pin = pin_tile_index(blk_pin);
 
         t_physical_tile_type_ptr blk_type = physical_tile_type(blk);
         int pin_width_offset = blk_type->pin_width_offset[iblk_pin];
@@ -1491,8 +1496,8 @@ static float comp_td_point_to_point_delay(const PlaceDelayModel* delay_model, Cl
         ClusterBlockId source_block = cluster_ctx.clb_nlist.pin_block(source_pin);
         ClusterBlockId sink_block = cluster_ctx.clb_nlist.pin_block(sink_pin);
 
-        int source_block_ipin = cluster_ctx.clb_nlist.pin_physical_index(source_pin);
-        int sink_block_ipin = cluster_ctx.clb_nlist.pin_physical_index(sink_pin);
+        int source_block_ipin = cluster_ctx.clb_nlist.pin_logical_index(source_pin);
+        int sink_block_ipin = cluster_ctx.clb_nlist.pin_logical_index(sink_pin);
 
         int source_x = place_ctx.block_locs[source_block].loc.x;
         int source_y = place_ctx.block_locs[source_block].loc.y;
@@ -1799,7 +1804,7 @@ static void alloc_and_load_net_pin_indices() {
             continue;
         netpin = 0;
         for (auto pin_id : cluster_ctx.clb_nlist.net_pins(net_id)) {
-            int pin_index = cluster_ctx.clb_nlist.pin_physical_index(pin_id);
+            int pin_index = cluster_ctx.clb_nlist.pin_logical_index(pin_id);
             ClusterBlockId block_id = cluster_ctx.clb_nlist.pin_block(pin_id);
             net_pin_indices[block_id][pin_index] = netpin;
             netpin++;
@@ -1836,7 +1841,7 @@ static void get_bb_from_scratch(ClusterNetId net_id, t_bb* coords, t_bb* num_on_
     auto& grid = device_ctx.grid;
 
     ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id);
-    pnum = cluster_ctx.clb_nlist.net_pin_physical_index(net_id, 0);
+    pnum = net_pin_tile_index(net_id, 0);
     VTR_ASSERT(pnum >= 0);
     x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum];
     y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum];
@@ -1855,7 +1860,7 @@ static void get_bb_from_scratch(ClusterNetId net_id, t_bb* coords, t_bb* num_on_
 
     for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) {
         bnum = cluster_ctx.clb_nlist.pin_block(pin_id);
-        pnum = cluster_ctx.clb_nlist.pin_physical_index(pin_id);
+        pnum = pin_tile_index(pin_id);
         x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum];
         y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum];
 
@@ -1995,7 +2000,7 @@ static void get_non_updateable_bb(ClusterNetId net_id, t_bb* bb_coord_new) {
     auto& device_ctx = g_vpr_ctx.device();
 
     ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id);
-    pnum = cluster_ctx.clb_nlist.net_pin_physical_index(net_id, 0);
+    pnum = net_pin_tile_index(net_id, 0);
     x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum];
     y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum];
 
@@ -2006,7 +2011,7 @@ static void get_non_updateable_bb(ClusterNetId net_id, t_bb* bb_coord_new) {
 
     for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) {
         bnum = cluster_ctx.clb_nlist.pin_block(pin_id);
-        pnum = cluster_ctx.clb_nlist.pin_physical_index(pin_id);
+        pnum = pin_tile_index(pin_id);
         x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum];
         y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum];
 

vpr/src/place/place_macro.cpp

@@ -495,7 +495,7 @@ static bool net_is_driven_by_direct(ClusterNetId clb_net) {
     auto& cluster_ctx = g_vpr_ctx.clustering();
 
     ClusterBlockId block_id = cluster_ctx.clb_nlist.net_driver_block(clb_net);
-    int pin_index = cluster_ctx.clb_nlist.net_pin_physical_index(clb_net, 0);
+    int pin_index = cluster_ctx.clb_nlist.net_pin_logical_index(clb_net, 0);
 
     auto direct = f_idirect_from_blk_pin[cluster_ctx.clb_nlist.block_type(block_id)->index][pin_index];