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Add flat version of sync_netlists_to_routing
1 parent a342b67 commit 58b5eac

16 files changed

+482
-93
lines changed

‎libs/libarchfpga/src/physical_types.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1671,6 +1671,9 @@ constexpr std::array<const char*, size_t(SwitchType::NUM_SWITCH_TYPES)> SWITCH_T
16711671
*/
16721672
constexpr const char* VPR_DELAYLESS_SWITCH_NAME = "__vpr_delayless_switch__";
16731673

1674+
/* Internal switch: used by the flat router */
1675+
constexpr const char* VPR_INTERNAL_SWITCH_NAME = "Internal Switch";
1676+
16741677
enum class BufferSize {
16751678
AUTO,
16761679
ABSOLUTE

‎libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -526,7 +526,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
526526
bool found_arch_name = false;
527527
std::string string_name = std::string(name);
528528
// The string name has the format of "Internal Switch/delay". So, I have to use compare to specify the portion I want to be compared.
529-
bool is_internal_sw = string_name.compare(0, 15, "Internal Switch") == 0;
529+
bool is_internal_sw = string_name.compare(0, strlen(VPR_INTERNAL_SWITCH_NAME), VPR_INTERNAL_SWITCH_NAME) == 0;
530530
for (const auto& arch_sw_inf: arch_switch_inf_) {
531531
if (string_name == arch_sw_inf.name || is_internal_sw) {
532532
found_arch_name = true;

‎utils/fasm/src/main.cpp

Lines changed: 3 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ using namespace std;
2323
#include "fasm.h"
2424

2525
#include "post_routing_pb_pin_fixup.h"
26+
#include "sync_netlists_to_routing_flat.h"
2627

2728
/*
2829
* Exit codes to signal success/failure to scripts
@@ -86,25 +87,14 @@ int main(int argc, const char **argv) {
8687
bool is_flat = vpr_setup.RouterOpts.flat_routing;
8788
if (flow_succeeded) {
8889
if(is_flat) {
89-
sync_netlists_to_routing((const Netlist<>&) g_vpr_ctx.atom().nlist,
90-
g_vpr_ctx.device(),
91-
g_vpr_ctx.mutable_atom(),
92-
g_vpr_ctx.atom().lookup,
93-
g_vpr_ctx.mutable_clustering(),
94-
g_vpr_ctx.placement(),
95-
g_vpr_ctx.routing(),
96-
vpr_setup.PackerOpts.pack_verbosity > 2,
97-
is_flat);
90+
sync_netlists_to_routing_flat();
9891
} else {
9992
sync_netlists_to_routing((const Netlist<>&) g_vpr_ctx.clustering().clb_nlist,
10093
g_vpr_ctx.device(),
10194
g_vpr_ctx.mutable_atom(),
102-
g_vpr_ctx.atom().lookup,
10395
g_vpr_ctx.mutable_clustering(),
10496
g_vpr_ctx.placement(),
105-
g_vpr_ctx.routing(),
106-
vpr_setup.PackerOpts.pack_verbosity > 2,
107-
is_flat);
97+
vpr_setup.PackerOpts.pack_verbosity > 2);
10898
}
10999
}
110100

‎utils/fasm/test/test_fasm.cpp

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -9,13 +9,15 @@
99
#include "fasm_utils.h"
1010
#include "arch_util.h"
1111
#include "rr_graph_writer.h"
12-
#include "post_routing_pb_pin_fixup.h"
1312
#include <sstream>
1413
#include <fstream>
1514
#include <regex>
1615
#include <cmath>
1716
#include <algorithm>
1817

18+
#include "post_routing_pb_pin_fixup.h"
19+
#include "sync_netlists_to_routing_flat.h"
20+
1921
static constexpr const char kArchFile[] = "test_fasm_arch.xml";
2022
static constexpr const char kRrGraphFile[] = "test_fasm_rrgraph.xml";
2123

@@ -327,15 +329,16 @@ TEST_CASE("fasm_integration_test", "[fasm]") {
327329
/* Sync netlist to the actual routing (necessary if there are block
328330
ports with equivalent pins) */
329331
if (flow_succeeded) {
330-
sync_netlists_to_routing((const Netlist<>&) g_vpr_ctx.clustering().clb_nlist,
331-
g_vpr_ctx.device(),
332-
g_vpr_ctx.mutable_atom(),
333-
g_vpr_ctx.atom().lookup,
334-
g_vpr_ctx.mutable_clustering(),
335-
g_vpr_ctx.placement(),
336-
g_vpr_ctx.routing(),
337-
vpr_setup.PackerOpts.pack_verbosity > 2,
338-
is_flat);
332+
if (is_flat) {
333+
sync_netlists_to_routing_flat();
334+
} else {
335+
sync_netlists_to_routing((const Netlist<>&) g_vpr_ctx.clustering().clb_nlist,
336+
g_vpr_ctx.device(),
337+
g_vpr_ctx.mutable_atom(),
338+
g_vpr_ctx.mutable_clustering(),
339+
g_vpr_ctx.placement(),
340+
vpr_setup.PackerOpts.pack_verbosity > 2);
341+
}
339342
}
340343

341344
std::stringstream fasm_string;

‎vpr/src/base/atom_lookup.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,6 @@ ClusterNetId AtomLookup::clb_net(const AtomNetId net_id) const {
103103
}
104104

105105
void AtomLookup::set_atom_clb_net(const AtomNetId net_id, const ClusterNetId clb_net_index) {
106-
VTR_ASSERT(net_id);
107106
//If either are invalid remove any mapping
108107
if (!net_id && clb_net_index != ClusterNetId::INVALID()) {
109108
//Remove

‎vpr/src/base/vpr_api.cpp

Lines changed: 14 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@
8383
#include "arch_util.h"
8484

8585
#include "post_routing_pb_pin_fixup.h"
86-
86+
#include "sync_netlists_to_routing_flat.h"
8787

8888
#include "load_flat_place.h"
8989

@@ -1441,27 +1441,26 @@ bool vpr_analysis_flow(const Netlist<>& net_list,
14411441
* - Turn on verbose output when users require verbose output
14421442
* for packer (default verbosity is set to 2 for compact logs)
14431443
*/
1444-
if (!is_flat) {
1445-
if (route_status.success()) {
1444+
if (route_status.success()) {
1445+
if (is_flat) {
1446+
sync_netlists_to_routing_flat();
1447+
} else {
14461448
sync_netlists_to_routing(net_list,
14471449
g_vpr_ctx.device(),
14481450
g_vpr_ctx.mutable_atom(),
1449-
g_vpr_ctx.atom().lookup,
14501451
g_vpr_ctx.mutable_clustering(),
14511452
g_vpr_ctx.placement(),
1452-
g_vpr_ctx.routing(),
1453-
vpr_setup.PackerOpts.pack_verbosity > 2,
1454-
is_flat);
1455-
1456-
std::string post_routing_packing_output_file_name = vpr_setup.PackerOpts.output_file + ".post_routing";
1457-
write_packing_results_to_xml(vpr_setup.PackerOpts.global_clocks,
1458-
Arch.architecture_id,
1459-
post_routing_packing_output_file_name.c_str());
1460-
} else {
1461-
VTR_LOG_WARN("Synchronization between packing and routing results is not applied due to illegal circuit implementation\n");
1453+
vpr_setup.PackerOpts.pack_verbosity > 2);
14621454
}
1463-
VTR_LOG("\n");
1455+
1456+
std::string post_routing_packing_output_file_name = vpr_setup.PackerOpts.output_file + ".post_routing";
1457+
write_packing_results_to_xml(vpr_setup.PackerOpts.global_clocks,
1458+
Arch.architecture_id,
1459+
post_routing_packing_output_file_name.c_str());
1460+
} else {
1461+
VTR_LOG_WARN("Synchronization between packing and routing results is not applied due to illegal circuit implementation\n");
14641462
}
1463+
VTR_LOG("\n");
14651464

14661465
vpr_analysis(net_list,
14671466
vpr_setup,

‎vpr/src/base/vpr_context.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -515,6 +515,9 @@ struct RoutingContext : public Context {
515515
* @brief User specified routing constraints
516516
*/
517517
UserRouteConstraints constraints;
518+
519+
/** Is flat routing enabled? */
520+
bool is_flat;
518521
};
519522

520523
/**

‎vpr/src/pack/post_routing_pb_pin_fixup.cpp

Lines changed: 8 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -48,15 +48,13 @@ static std::vector<e_side> find_physical_tile_pin_side(t_physical_tile_type_ptr
4848
* - if the net id does not match, we update the clustering context
4949
*******************************************************************/
5050
static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_list,
51-
const AtomContext& atom_ctx,
5251
const DeviceContext& device_ctx,
5352
ClusteringContext& clustering_ctx,
54-
const vtr::vector<RRNodeId, ParentNetId>& rr_node_nets,
53+
const vtr::vector<RRNodeId, ClusterNetId>& rr_node_nets,
5554
const t_pl_loc& grid_coord,
5655
const ClusterBlockId& blk_id,
5756
size_t& num_mismatches,
58-
const bool& verbose,
59-
bool is_flat) {
57+
const bool& verbose) {
6058
const int sub_tile_z = grid_coord.sub_tile;
6159
const int coord_x = grid_coord.x;
6260
const int coord_y = grid_coord.y;
@@ -210,15 +208,7 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li
210208
continue;
211209
}
212210

213-
ClusterNetId cluster_equivalent_net_id = ClusterNetId::INVALID();
214-
if (is_flat) {
215-
cluster_equivalent_net_id = atom_ctx.lookup.clb_net(convert_to_atom_net_id(routing_net_id));
216-
if (routing_net_id != ParentNetId::INVALID()) {
217-
VTR_ASSERT(cluster_equivalent_net_id != ClusterNetId::INVALID());
218-
}
219-
} else {
220-
cluster_equivalent_net_id = convert_to_cluster_net_id(routing_net_id);
221-
}
211+
ClusterNetId cluster_equivalent_net_id = convert_to_cluster_net_id(routing_net_id);
222212

223213
/* If the net from the routing results matches the net from the packing results,
224214
* nothing to be changed. Move on to the next net.
@@ -1046,24 +1036,19 @@ static void update_cluster_routing_traces_with_post_routing_results(AtomContext&
10461036
void sync_netlists_to_routing(const Netlist<>& net_list,
10471037
const DeviceContext& device_ctx,
10481038
AtomContext& atom_ctx,
1049-
const AtomLookup& atom_look_up,
10501039
ClusteringContext& clustering_ctx,
10511040
const PlacementContext& placement_ctx,
1052-
const RoutingContext& routing_ctx,
1053-
const bool& verbose,
1054-
bool is_flat) {
1041+
const bool& verbose) {
10551042
vtr::ScopedStartFinishTimer timer("Synchronize the packed netlist to routing optimization");
10561043

10571044
/* Reset the database for post-routing clb net mapping */
10581045
clustering_ctx.post_routing_clb_pin_nets.clear();
10591046
clustering_ctx.pre_routing_net_pin_mapping.clear();
10601047

10611048
/* Create net-to-rr_node mapping */
1062-
vtr::vector<RRNodeId, ParentNetId> rr_node_nets = annotate_rr_node_nets(net_list,
1049+
vtr::vector<RRNodeId, ClusterNetId> rr_node_nets = annotate_rr_node_nets(clustering_ctx,
10631050
device_ctx,
1064-
routing_ctx,
1065-
verbose,
1066-
is_flat);
1051+
verbose);
10671052

10681053
IntraLbPbPinLookup intra_lb_pb_pin_lookup(device_ctx.logical_block_types);
10691054

@@ -1076,25 +1061,18 @@ void sync_netlists_to_routing(const Netlist<>& net_list,
10761061
/* Update the core logic (center blocks of the FPGA) */
10771062
for (const ParentBlockId& blk_id : net_list.blocks()) {
10781063
/* We know the entrance to grid info and mapping results, do the fix-up for this block */
1079-
ClusterBlockId clb_blk_id;
1080-
if (is_flat) {
1081-
clb_blk_id = atom_look_up.atom_clb(convert_to_atom_block_id(blk_id));
1082-
} else {
1083-
clb_blk_id = convert_to_cluster_block_id(blk_id);
1084-
}
1064+
ClusterBlockId clb_blk_id = convert_to_cluster_block_id(blk_id);
10851065
VTR_ASSERT(clb_blk_id != ClusterBlockId::INVALID());
10861066

10871067
if (seen_block_ids.insert(clb_blk_id).second) {
10881068
update_cluster_pin_with_post_routing_results(net_list,
1089-
atom_ctx,
10901069
device_ctx,
10911070
clustering_ctx,
10921071
rr_node_nets,
10931072
placement_ctx.block_locs()[clb_blk_id].loc,
10941073
clb_blk_id,
10951074
num_mismatches,
1096-
verbose,
1097-
is_flat);
1075+
verbose);
10981076

10991077
update_cluster_routing_traces_with_post_routing_results(atom_ctx,
11001078
intra_lb_pb_pin_lookup,

‎vpr/src/pack/post_routing_pb_pin_fixup.h

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12,11 +12,8 @@
1212
void sync_netlists_to_routing(const Netlist<>& net_list,
1313
const DeviceContext& device_ctx,
1414
AtomContext& atom_ctx,
15-
const AtomLookup& atom_lookup,
1615
ClusteringContext& clustering_ctx,
1716
const PlacementContext& placement_ctx,
18-
const RoutingContext& routing_ctx,
19-
const bool& verbose,
20-
bool is_flat);
17+
const bool& verbose);
2118

2219
#endif

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