created a task for mlp going through Odin-ii

Author: saaramahmoudi

vtr_flow/benchmarks/noc/Large_Designs/MLP/shared_verilog/hard_block_include.v

@@ -0,0 +1,3 @@
+`define dsp_top
+`define noc_router_adapter_block
+`define memory

vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_noc_mlp_odin_ii/config/config.txt

@@ -0,0 +1,43 @@
+##############################################
+# Configuration file for running experiments
+##############################################
+
+# Path to directory of circuits to use
+circuits_dir=benchmarks/noc/Large_Designs/MLP_1/verilog
+
+# Path to directory of architectures to use
+archs_dir=arch/noc/mesh_noc_topology
+
+# Path to directory containing the verilog includes file(s)
+includes_dir=benchmarks/noc/Large_Designs/MLP/shared_verilog
+
+# Path to directory of NoC Traffic Patterns to use
+noc_traffics_dir=benchmarks/noc/Large_Designs/MLP_1
+
+# Add circuits to list to sweep
+circuit_list_add=mlp1_complete_engine.v
+
+# Add architectures to list to sweep
+arch_list_add=coffe_7nm_NoC_mesh_topology.xml
+
+# Add NoC Traffic Patterns to list to sweep
+noc_traffic_list_add=mlp_1.flows
+
+# Add include files to the list.
+# Some benchmarks instantiate hard dsp and memory blocks 
+# This functionality is guarded under the `dsp_top` and other macros. 
+# The hard_block_include.v file 
+# defines this macros, thereby enabling instantiations of the hard blocks
+include_list_add=hard_block_include.v
+
+# Parse info and how to parse
+parse_file=vpr_standard.txt
+
+# How to parse QoR info
+qor_parse_file=qor_standard.txt
+
+# Pass requirements
+pass_requirements_file=pass_requirements.txt
+
+# Script parameters
+script_params =-starting_stage odin --pack --place