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fixed PR suggestions
1 parent 894cbae commit 4de5741

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2 files changed

+15
-15
lines changed

2 files changed

+15
-15
lines changed

vpr/src/base/read_options.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -221,7 +221,6 @@ struct t_options {
221221
argparse::ArgValue<int> route_verbosity;
222222
argparse::ArgValue<int> custom_3d_sb_fanin_fanout;
223223

224-
225224
/* Timing-driven router options only */
226225
argparse::ArgValue<float> astar_fac;
227226
argparse::ArgValue<float> astar_offset;

vpr/src/route/rr_graph.cpp

Lines changed: 15 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,6 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder,
180180
static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder& rr_graph_builder,
181181
t_rr_graph_storage& L_rr_node,
182182
const RRGraphView& rr_graph,
183-
const t_router_opts& router_opts,
184183
const int num_seg_types,
185184
const int num_seg_types_x,
186185
const t_unified_to_parallel_seg_index& seg_index_map,
@@ -209,7 +208,8 @@ static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder
209208
const t_clb_to_clb_directs* clb_to_clb_directs,
210209
bool is_global_graph,
211210
const enum e_clock_modeling clock_modeling,
212-
bool is_flat);
211+
bool is_flat,
212+
const int route_verbosity);
213213

214214
static void alloc_and_load_intra_cluster_rr_graph(RRGraphBuilder& rr_graph_builder,
215215
const DeviceGrid& grid,
@@ -666,7 +666,6 @@ static void build_rr_graph(const t_graph_type graph_type,
666666
const std::vector<t_physical_tile_type>& types,
667667
const DeviceGrid& grid,
668668
t_chan_width nodes_per_chan,
669-
t_router_opts router_opts,
670669
const enum e_switch_block_type sb_type,
671670
const int Fs,
672671
const std::vector<t_switchblock_inf>& switchblocks,
@@ -684,7 +683,8 @@ static void build_rr_graph(const t_graph_type graph_type,
684683
const int num_directs,
685684
int* wire_to_rr_ipin_switch,
686685
bool is_flat,
687-
int* Warnings);
686+
int* Warnings,
687+
const t_router_opts& router_opts);
688688

689689
static void build_intra_cluster_rr_graph(const t_graph_type graph_type,
690690
const DeviceGrid& grid,
@@ -771,7 +771,6 @@ void create_rr_graph(const t_graph_type graph_type,
771771
block_types,
772772
grid,
773773
nodes_per_chan,
774-
router_opts,
775774
det_routing_arch->switch_block_type,
776775
det_routing_arch->Fs,
777776
det_routing_arch->switchblocks,
@@ -788,7 +787,9 @@ void create_rr_graph(const t_graph_type graph_type,
788787
directs, num_directs,
789788
&det_routing_arch->wire_to_rr_ipin_switch,
790789
is_flat,
791-
Warnings);
790+
Warnings,
791+
router_opts
792+
);
792793
}
793794
}
794795

@@ -997,7 +998,6 @@ static void build_rr_graph(const t_graph_type graph_type,
997998
const std::vector<t_physical_tile_type>& types,
998999
const DeviceGrid& grid,
9991000
t_chan_width nodes_per_chan,
1000-
t_router_opts router_opts,
10011001
const enum e_switch_block_type sb_type,
10021002
const int Fs,
10031003
const std::vector<t_switchblock_inf>& switchblocks,
@@ -1015,7 +1015,8 @@ static void build_rr_graph(const t_graph_type graph_type,
10151015
const int num_directs,
10161016
int* wire_to_rr_ipin_switch,
10171017
bool is_flat,
1018-
int* Warnings) {
1018+
int* Warnings,
1019+
const t_router_opts& router_opts) {
10191020
vtr::ScopedStartFinishTimer timer("Build routing resource graph");
10201021

10211022
/* Reset warning flag */
@@ -1396,7 +1397,7 @@ static void build_rr_graph(const t_graph_type graph_type,
13961397
auto update_chan_width = alloc_and_load_rr_graph(
13971398
device_ctx.rr_graph_builder,
13981399

1399-
device_ctx.rr_graph_builder.rr_nodes(), device_ctx.rr_graph, router_opts, segment_inf.size(),
1400+
device_ctx.rr_graph_builder.rr_nodes(), device_ctx.rr_graph, segment_inf.size(),
14001401
segment_inf_x.size(),
14011402
segment_index_map,
14021403
chan_details_x, chan_details_y,
@@ -1414,7 +1415,8 @@ static void build_rr_graph(const t_graph_type graph_type,
14141415
directs, num_directs, clb_to_clb_directs,
14151416
is_global_graph,
14161417
clock_modeling,
1417-
is_flat);
1418+
is_flat,
1419+
router_opts.route_verbosity);
14181420

14191421
// Verify no incremental node allocation.
14201422
// AA: Note that in the case of dedicated networks, we are currently underestimating the additional node count due to the clock networks.
@@ -2069,7 +2071,6 @@ static std::vector<vtr::Matrix<int>> alloc_and_load_actual_fc(const std::vector<
20692071
static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder& rr_graph_builder,
20702072
t_rr_graph_storage& L_rr_node,
20712073
const RRGraphView& rr_graph,
2072-
const t_router_opts& router_opts,
20732074
const int num_seg_types,
20742075
const int num_seg_types_x,
20752076
const t_unified_to_parallel_seg_index& seg_index_map,
@@ -2098,7 +2099,8 @@ static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder
20982099
const t_clb_to_clb_directs* clb_to_clb_directs,
20992100
bool is_global_graph,
21002101
const enum e_clock_modeling clock_modeling,
2101-
bool /*is_flat*/) {
2102+
bool /*is_flat*/,
2103+
const int route_verbosity) {
21022104
//We take special care when creating RR graph edges (there are typically many more
21032105
//edges than nodes in an RR graph).
21042106
//
@@ -2122,7 +2124,7 @@ static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder
21222124
bool switches_remapped = false;
21232125

21242126
// Define verbosity locally using router_opts
2125-
const int verbosity = router_opts.route_verbosity;
2127+
const int verbosity = route_verbosity;
21262128

21272129
int num_edges = 0;
21282130
/* Connection SINKS and SOURCES to their pins - Initializing IPINs/OPINs. */
@@ -2286,7 +2288,6 @@ static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder
22862288
}
22872289
}
22882290

2289-
22902291
if(grid.get_num_layers() > 1 && sb_conn_map != nullptr){
22912292
uniquify_edges(des_3d_rr_edges_to_create);
22922293
alloc_and_load_edges(rr_graph_builder, des_3d_rr_edges_to_create);

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