[Golden Result] patch golden results for the analytic placer where the Travis/Kokoro shows different QoR than the local machine. Should discuss if the patch is needed or not

Author: tangxifan

vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/config/golden_results.txt

@@ -1,2 +1,2 @@
 arch                       	circuit        	script_params	vtr_flow_elapsed_time	error	odin_synth_time	max_odin_mem	abc_depth	abc_synth_time	abc_cec_time	abc_sec_time	max_abc_mem	ace_time	max_ace_mem	num_clb	num_io	num_memories	num_mult	vpr_status	vpr_revision          	vpr_build_info                	vpr_compiler                                         	vpr_compiled       	hostname             	rundir                                                                                                                                                                                     	max_vpr_mem	num_primary_inputs	num_primary_outputs	num_pre_packed_nets	num_pre_packed_blocks	num_netlist_clocks	num_post_packed_nets	num_post_packed_blocks	device_width	device_height	device_grid_tiles	device_limiting_resources	device_name	pack_time	placed_wirelength_est	place_time	place_quench_time	placed_CPD_est	placed_setup_TNS_est	placed_setup_WNS_est	placed_geomean_nonvirtual_intradomain_critical_path_delay_est	place_quench_timing_analysis_time	place_quench_sta_time	place_total_timing_analysis_time	place_total_sta_time	min_chan_width	routed_wirelength	min_chan_width_route_success_iteration	logic_block_area_total	logic_block_area_used	min_chan_width_routing_area_total	min_chan_width_routing_area_per_tile	min_chan_width_route_time	min_chan_width_total_timing_analysis_time	min_chan_width_total_sta_time	crit_path_routed_wirelength	crit_path_route_success_iteration	crit_path_total_nets_routed	crit_path_total_connections_routed	crit_path_total_heap_pushes	crit_path_total_heap_pops	critical_path_delay	geomean_nonvirtual_intradomain_critical_path_delay	setup_TNS	setup_WNS	hold_TNS	hold_WNS	crit_path_routing_area_total	crit_path_routing_area_per_tile	crit_path_route_time	crit_path_total_timing_analysis_time	crit_path_total_sta_time
-k6_frac_N10_mem32K_40nm.xml	ch_intrinsics.v	common       	3.15                 	     	0.05           	6712        	3        	0.31          	-1          	-1          	31536      	-1      	-1         	65     	99    	1           	0       	success   	v8.0.0-2808-g534e35fc1	release IPO VTR_ASSERT_LEVEL=2	GNU 8.4.0 on Linux-3.10.0-1127.18.2.el7.x86_64 x86_64	2020-09-13T17:39:59	lnissrv4.eng.utah.edu	/research/ece/lnis/USERS/tang/github/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/run002/k6_frac_N10_mem32K_40nm.xml/ch_intrinsics.v/common	37584      	99                	130                	363                	493                  	1                 	251                 	295                   	12          	12           	144              	clb                      	auto       	0.11     	1019                 	0.26      	0.00             	2.00621       	-204.675            	-2.00621            	2.00621                                                      	0.000404203                      	0.000362763          	0.00325482                      	0.00310504          	34            	2012             	20                                    	5.66058e+06           	4.05111e+06          	293002.                          	2034.74                             	1.27                     	0.171838                                 	0.158701                     	1800                       	11                               	538                        	688                               	65774                      	22088                    	2.48711            	2.48711                                           	-239.345 	-2.48711 	0       	0       	360780.                     	2505.42                        	0.04                	0.0208505                           	0.0197607               
+k6_frac_N10_mem32K_40nm.xml	ch_intrinsics.v	common       	3.15                 	     	0.05           	6712        	3        	0.31          	-1          	-1          	31536      	-1      	-1         	65     	99    	1           	0       	success   	v8.0.0-2808-g534e35fc1	release IPO VTR_ASSERT_LEVEL=2	GNU 8.4.0 on Linux-3.10.0-1127.18.2.el7.x86_64 x86_64	2020-09-13T17:39:59	lnissrv4.eng.utah.edu	/research/ece/lnis/USERS/tang/github/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/run002/k6_frac_N10_mem32K_40nm.xml/ch_intrinsics.v/common	37584      	99                	130                	363                	493                  	1                 	251                 	295                   	12          	12           	144              	clb                      	auto       	0.11     	1019                 	0.26      	0.00             	2.00621       	-204.675            	-2.00621            	2.00621                                                      	0.000404203                      	0.000362763          	0.00325482                      	0.00310504          	50            	2012             	20                                    	5.66058e+06           	4.05111e+06          	406292.                          	2821.48                             	1.27                     	0.171838                                 	0.158701                     	1800                       	11                               	538                        	688                               	65774                      	22088                    	2.48711            	2.48711                                           	-239.345 	-2.48711 	0       	0       	520805.                     	3616.70                        	0.04                	0.0208505                           	0.0197607