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soheilshahrouzsoheilshahrouz
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Merge branch 'master' into temp_lookahead_chan_cong and resolve confilicts
2 parents 167d8da + 532bc04 commit 468be05

23 files changed

+125
-130
lines changed

‎utils/route_diag/src/main.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,7 @@ int main(int argc, const char **argv) {
292292

293293
alloc_routing_structs(chan_width,
294294
vpr_setup.RouterOpts,
295-
&vpr_setup.RoutingArch,
295+
vpr_setup.RoutingArch,
296296
vpr_setup.Segments,
297297
Arch.directs,
298298
is_flat);

‎vpr/src/analytical_place/detailed_placer.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ AnnealerDetailedPlacer::AnnealerDetailedPlacer(const BlkLocRegistry& curr_cluste
6565
place_delay_model = PlacementDelayModelCreator::create_delay_model(vpr_setup.PlacerOpts,
6666
vpr_setup.RouterOpts,
6767
(const Netlist<>&)clustered_netlist,
68-
&vpr_setup.RoutingArch,
68+
vpr_setup.RoutingArch,
6969
vpr_setup.Segments,
7070
arch.Chans,
7171
arch.directs,

‎vpr/src/base/SetupVPR.cpp

Lines changed: 36 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -38,10 +38,12 @@ static void SetupNocOpts(const t_options& Options,
3838
t_noc_opts* NocOpts);
3939
static void SetupServerOpts(const t_options& Options,
4040
t_server_opts* ServerOpts);
41-
static void SetupRoutingArch(const t_arch& Arch, t_det_routing_arch* RoutingArch);
41+
42+
static void SetupRoutingArch(const t_arch& Arch, t_det_routing_arch& RoutingArch);
43+
4244
static void SetupTiming(const t_options& Options, const bool TimingEnabled, t_timing_inf* Timing);
4345
static void SetupSwitches(const t_arch& Arch,
44-
t_det_routing_arch* RoutingArch,
46+
t_det_routing_arch& RoutingArch,
4547
const std::vector<t_arch_switch_inf>& arch_switches);
4648
static void SetupAnalysisOpts(const t_options& Options, t_analysis_opts& analysis_opts);
4749
static void SetupPowerOpts(const t_options& Options, t_power_opts* power_opts, t_arch* Arch);
@@ -97,7 +99,7 @@ void SetupVPR(const t_options* options,
9799
t_analysis_opts* analysisOpts,
98100
t_noc_opts* nocOpts,
99101
t_server_opts* serverOpts,
100-
t_det_routing_arch* routingArch,
102+
t_det_routing_arch& routingArch,
101103
std::vector<t_lb_type_rr_node>** packerRRGraphs,
102104
std::vector<t_segment_inf>& segments,
103105
t_timing_inf* timing,
@@ -231,9 +233,9 @@ void SetupVPR(const t_options* options,
231233
SetupTiming(*options, timingenabled, timing);
232234
SetupPackerOpts(*options, packerOpts);
233235
SetupAPOpts(*options, *apOpts);
234-
routingArch->write_rr_graph_filename = options->write_rr_graph_file;
235-
routingArch->read_rr_graph_filename = options->read_rr_graph_file;
236-
routingArch->read_rr_edge_override_filename = options->read_rr_edge_override_file;
236+
routingArch.write_rr_graph_filename = options->write_rr_graph_file;
237+
routingArch.read_rr_graph_filename = options->read_rr_graph_file;
238+
routingArch.read_rr_edge_override_filename = options->read_rr_edge_override_file;
237239

238240
for (auto has_global_routing : arch->layer_global_routing) {
239241
device_ctx.inter_cluster_prog_routing_resources.emplace_back(has_global_routing);
@@ -355,17 +357,17 @@ static void SetupTiming(const t_options& Options, const bool TimingEnabled, t_ti
355357
* from the arch file with the special switches that VPR needs.
356358
*/
357359
static void SetupSwitches(const t_arch& Arch,
358-
t_det_routing_arch* RoutingArch,
360+
t_det_routing_arch& RoutingArch,
359361
const std::vector<t_arch_switch_inf>& arch_switches) {
360362
auto& device_ctx = g_vpr_ctx.mutable_device();
361363

362364
int switches_to_copy = (int)arch_switches.size();
363365
int num_arch_switches = (int)arch_switches.size();
364366

365-
find_ipin_cblock_switch_index(Arch, RoutingArch->wire_to_arch_ipin_switch, RoutingArch->wire_to_arch_ipin_switch_between_dice);
367+
find_ipin_cblock_switch_index(Arch, RoutingArch.wire_to_arch_ipin_switch, RoutingArch.wire_to_arch_ipin_switch_between_dice);
366368

367369
/* Depends on device_ctx.num_arch_switches */
368-
RoutingArch->delayless_switch = num_arch_switches++;
370+
RoutingArch.delayless_switch = num_arch_switches++;
369371

370372
/* Alloc the list now that we know the final num_arch_switches value */
371373
device_ctx.arch_switch_inf.resize(num_arch_switches);
@@ -377,32 +379,32 @@ static void SetupSwitches(const t_arch& Arch,
377379
}
378380

379381
/* Delayless switch for connecting sinks and sources with their pins. */
380-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].set_type(SwitchType::MUX);
381-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].name = std::string(VPR_DELAYLESS_SWITCH_NAME);
382-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].R = 0.;
383-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].Cin = 0.;
384-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].Cout = 0.;
385-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].set_Tdel(t_arch_switch_inf::UNDEFINED_FANIN, 0.);
386-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
387-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].mux_trans_size = 0.;
388-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buf_size_type = BufferSize::ABSOLUTE;
389-
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buf_size = 0.;
390-
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buffered(), "Delayless switch expected to be buffered (isolating)");
391-
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].configurable(), "Delayless switch expected to be configurable");
382+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].set_type(SwitchType::MUX);
383+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].name = std::string(VPR_DELAYLESS_SWITCH_NAME);
384+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].R = 0.;
385+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].Cin = 0.;
386+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].Cout = 0.;
387+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].set_Tdel(t_arch_switch_inf::UNDEFINED_FANIN, 0.);
388+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
389+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].mux_trans_size = 0.;
390+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].buf_size_type = BufferSize::ABSOLUTE;
391+
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].buf_size = 0.;
392+
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch.delayless_switch].buffered(), "Delayless switch expected to be buffered (isolating)");
393+
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch.delayless_switch].configurable(), "Delayless switch expected to be configurable");
392394

393-
device_ctx.all_sw_inf[RoutingArch->delayless_switch] = device_ctx.arch_switch_inf[RoutingArch->delayless_switch];
395+
device_ctx.all_sw_inf[RoutingArch.delayless_switch] = device_ctx.arch_switch_inf[RoutingArch.delayless_switch];
394396

395-
RoutingArch->global_route_switch = RoutingArch->delayless_switch;
397+
RoutingArch.global_route_switch = RoutingArch.delayless_switch;
396398

397-
device_ctx.delayless_switch_idx = RoutingArch->delayless_switch;
399+
device_ctx.delayless_switch_idx = RoutingArch.delayless_switch;
398400

399401
//Warn about non-zero Cout values for the ipin switch, since these values have no effect.
400402
//VPR do not model the R/C's of block internal routing connection.
401403
//
402404
//Note that we don't warn about the R value as it may be used to size the buffer (if buf_size_type is AUTO)
403-
if (device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout != 0.) {
405+
if (device_ctx.arch_switch_inf[RoutingArch.wire_to_arch_ipin_switch].Cout != 0.) {
404406
VTR_LOG_WARN("Non-zero switch output capacitance (%g) has no effect when switch '%s' is used for connection block inputs\n",
405-
device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout, Arch.ipin_cblock_switch_name[0].c_str());
407+
device_ctx.arch_switch_inf[RoutingArch.wire_to_arch_ipin_switch].Cout, Arch.ipin_cblock_switch_name[0].c_str());
406408
}
407409
}
408410

@@ -412,18 +414,18 @@ static void SetupSwitches(const t_arch& Arch,
412414
* Since checks are already done, this just copies values across
413415
*/
414416
static void SetupRoutingArch(const t_arch& Arch,
415-
t_det_routing_arch* RoutingArch) {
416-
RoutingArch->switch_block_type = Arch.SBType;
417-
RoutingArch->R_minW_nmos = Arch.R_minW_nmos;
418-
RoutingArch->R_minW_pmos = Arch.R_minW_pmos;
419-
RoutingArch->Fs = Arch.Fs;
420-
RoutingArch->directionality = BI_DIRECTIONAL;
417+
t_det_routing_arch& RoutingArch) {
418+
RoutingArch.switch_block_type = Arch.SBType;
419+
RoutingArch.R_minW_nmos = Arch.R_minW_nmos;
420+
RoutingArch.R_minW_pmos = Arch.R_minW_pmos;
421+
RoutingArch.Fs = Arch.Fs;
422+
RoutingArch.directionality = BI_DIRECTIONAL;
421423
if (!Arch.Segments.empty()) {
422-
RoutingArch->directionality = Arch.Segments[0].directionality;
424+
RoutingArch.directionality = Arch.Segments[0].directionality;
423425
}
424426

425427
/* copy over the switch block information */
426-
RoutingArch->switchblocks = Arch.switchblocks;
428+
RoutingArch.switchblocks = Arch.switchblocks;
427429
}
428430

429431
static void SetupRouterOpts(const t_options& Options, t_router_opts* RouterOpts) {

‎vpr/src/base/SetupVPR.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ void SetupVPR(const t_options* Options,
1818
t_analysis_opts* AnalysisOpts,
1919
t_noc_opts* NocOpts,
2020
t_server_opts* ServerOpts,
21-
t_det_routing_arch* RoutingArch,
21+
t_det_routing_arch& RoutingArch,
2222
std::vector<t_lb_type_rr_node>** PackerRRGraphs,
2323
std::vector<t_segment_inf>& Segments,
2424
t_timing_inf* Timing,

‎vpr/src/base/place_and_route.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
4848
const t_arch* arch,
4949
bool verify_binary_search,
5050
int min_chan_width_hint,
51-
t_det_routing_arch* det_routing_arch,
51+
t_det_routing_arch& det_routing_arch,
5252
std::vector<t_segment_inf>& segment_inf,
5353
NetPinsMatrix<float>& net_delay,
5454
const std::shared_ptr<SetupHoldTimingInfo>& timing_info,
@@ -83,13 +83,13 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
8383
graph_type = e_graph_type::GLOBAL;
8484
graph_directionality = e_graph_type::BIDIR;
8585
} else {
86-
graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
87-
graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
86+
graph_type = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
87+
graph_directionality = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
8888
}
8989

9090
VTR_ASSERT(!net_delay.empty());
9191

92-
if (det_routing_arch->directionality == BI_DIRECTIONAL)
92+
if (det_routing_arch.directionality == BI_DIRECTIONAL)
9393
udsd_multiplier = 1;
9494
else
9595
udsd_multiplier = 2;
@@ -116,14 +116,14 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
116116
}
117117

118118
/* Constraints must be checked to not break rr_graph generator */
119-
if (det_routing_arch->directionality == UNI_DIRECTIONAL) {
119+
if (det_routing_arch.directionality == UNI_DIRECTIONAL) {
120120
if (current % 2 != 0) {
121121
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
122122
"Tried odd chan width (%d) in uni-directional routing architecture (chan width must be even).\n",
123123
current);
124124
}
125125
} else {
126-
if (det_routing_arch->Fs % 3) {
126+
if (det_routing_arch.Fs % 3) {
127127
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
128128
"Fs must be three in bidirectional mode.\n");
129129
}
@@ -158,7 +158,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
158158
}
159159
}
160160

161-
if ((current * 3) < det_routing_arch->Fs) {
161+
if ((current * 3) < det_routing_arch.Fs) {
162162
VTR_LOG("Width factor is now below specified Fs. Stop search.\n");
163163
final = high;
164164
break;
@@ -350,7 +350,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
350350
prev2_success = prev_success;
351351
prev_success = success;
352352
current--;
353-
if (det_routing_arch->directionality == UNI_DIRECTIONAL) {
353+
if (det_routing_arch.directionality == UNI_DIRECTIONAL) {
354354
current--; /* width must be even */
355355
}
356356
}

‎vpr/src/base/place_and_route.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
2929
const t_arch* arch,
3030
bool verify_binary_search,
3131
int min_chan_width_hint,
32-
t_det_routing_arch* det_routing_arch,
32+
t_det_routing_arch& det_routing_arch,
3333
std::vector<t_segment_inf>& segment_inf,
3434
NetPinsMatrix<float>& net_delay,
3535
const std::shared_ptr<SetupHoldTimingInfo>& timing_info,

‎vpr/src/base/vpr_api.cpp

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -293,7 +293,7 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a
293293
&vpr_setup->AnalysisOpts,
294294
&vpr_setup->NocOpts,
295295
&vpr_setup->ServerOpts,
296-
&vpr_setup->RoutingArch,
296+
vpr_setup->RoutingArch,
297297
&vpr_setup->PackerRRGraph,
298298
vpr_setup->Segments,
299299
&vpr_setup->Timing,
@@ -830,7 +830,7 @@ void vpr_place(const Netlist<>& net_list,
830830
vpr_setup.AnalysisOpts,
831831
vpr_setup.NocOpts,
832832
arch.Chans,
833-
&vpr_setup.RoutingArch,
833+
vpr_setup.RoutingArch,
834834
vpr_setup.Segments,
835835
arch.directs,
836836
g_vpr_ctx.atom().flat_placement_info(),
@@ -848,7 +848,7 @@ void vpr_place(const Netlist<>& net_list,
848848
}
849849

850850
void vpr_load_placement(t_vpr_setup& vpr_setup,
851-
const std::vector<t_direct_inf> directs) {
851+
const std::vector<t_direct_inf>& directs) {
852852
vtr::ScopedStartFinishTimer timer("Load Placement");
853853

854854
const auto& device_ctx = g_vpr_ctx.device();
@@ -1044,7 +1044,7 @@ RouteStatus vpr_route_fixed_W(const Netlist<>& net_list,
10441044
fixed_channel_width,
10451045
vpr_setup.RouterOpts,
10461046
vpr_setup.AnalysisOpts,
1047-
&vpr_setup.RoutingArch,
1047+
vpr_setup.RoutingArch,
10481048
vpr_setup.Segments,
10491049
net_delay,
10501050
timing_info,
@@ -1081,7 +1081,7 @@ RouteStatus vpr_route_min_W(const Netlist<>& net_list,
10811081
&arch,
10821082
router_opts.verify_binary_search,
10831083
router_opts.min_channel_width_hint,
1084-
&vpr_setup.RoutingArch,
1084+
vpr_setup.RoutingArch,
10851085
vpr_setup.Segments,
10861086
net_delay,
10871087
timing_info,
@@ -1121,7 +1121,7 @@ RouteStatus vpr_load_routing(t_vpr_setup& vpr_setup,
11211121

11221122
void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_width_fac, bool is_flat) {
11231123
auto& device_ctx = g_vpr_ctx.mutable_device();
1124-
auto det_routing_arch = &vpr_setup.RoutingArch;
1124+
t_det_routing_arch& det_routing_arch = vpr_setup.RoutingArch;
11251125
auto& router_opts = vpr_setup.RouterOpts;
11261126

11271127
e_graph_type graph_type;
@@ -1130,8 +1130,8 @@ void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_wi
11301130
graph_type = e_graph_type::GLOBAL;
11311131
graph_directionality = e_graph_type::BIDIR;
11321132
} else {
1133-
graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
1134-
graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
1133+
graph_type = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
1134+
graph_directionality = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
11351135
}
11361136

11371137
t_chan_width chan_width = init_chan(chan_width_fac, arch.Chans, graph_directionality);
@@ -1293,7 +1293,7 @@ void vpr_setup_vpr(t_options* Options,
12931293
t_analysis_opts* AnalysisOpts,
12941294
t_noc_opts* NocOpts,
12951295
t_server_opts* ServerOpts,
1296-
t_det_routing_arch* RoutingArch,
1296+
t_det_routing_arch& RoutingArch,
12971297
std::vector<t_lb_type_rr_node>** PackerRRGraph,
12981298
std::vector<t_segment_inf>& Segments,
12991299
t_timing_inf* Timing,
@@ -1518,7 +1518,7 @@ void vpr_power_estimation(const t_vpr_setup& vpr_setup,
15181518

15191519
/* Initialize the power module */
15201520
bool power_error = power_init(vpr_setup.FileNameOpts.PowerFile.c_str(),
1521-
vpr_setup.FileNameOpts.CmosTechFile.c_str(), &Arch, &vpr_setup.RoutingArch);
1521+
vpr_setup.FileNameOpts.CmosTechFile.c_str(), &Arch, vpr_setup.RoutingArch);
15221522
if (power_error) {
15231523
VTR_LOG_ERROR("Power initialization failed.\n");
15241524
}
@@ -1529,8 +1529,7 @@ void vpr_power_estimation(const t_vpr_setup& vpr_setup,
15291529
VTR_LOG("Running power estimation\n");
15301530

15311531
/* Run power estimation */
1532-
e_power_ret_code power_ret_code = power_total(&power_runtime_s, vpr_setup,
1533-
&Arch, &vpr_setup.RoutingArch);
1532+
e_power_ret_code power_ret_code = power_total(&power_runtime_s, vpr_setup, &Arch, vpr_setup.RoutingArch);
15341533

15351534
/* Check for errors/warnings */
15361535
if (power_ret_code == POWER_RET_CODE_ERRORS) {

‎vpr/src/base/vpr_api.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ void vpr_place(const Netlist<>& net_list,
8282

8383
///@brief Loads a previous placement
8484
void vpr_load_placement(t_vpr_setup& vpr_setup,
85-
const std::vector<t_direct_inf> directs);
85+
const std::vector<t_direct_inf>& directs);
8686

8787
/* Routing */
8888

@@ -186,7 +186,7 @@ void vpr_setup_vpr(t_options* Options,
186186
t_analysis_opts* AnalysisOpts,
187187
t_noc_opts* NocOpts,
188188
t_server_opts* ServerOpts,
189-
t_det_routing_arch* RoutingArch,
189+
t_det_routing_arch& RoutingArch,
190190
std::vector<t_lb_type_rr_node>** PackerRRGraph,
191191
std::vector<t_segment_inf>& Segments,
192192
t_timing_inf* Timing,

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