Skip to content

Commit 365bbd6

Browse files
amirarjmand93amirarjmand93
committed
Tests on
1 parent 7b44ebe commit 365bbd6

File tree

2 files changed

+26
-26
lines changed

2 files changed

+26
-26
lines changed

‎.github/workflows/nightly_test.yml

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -49,22 +49,22 @@ jobs:
4949
matrix:
5050
include:
5151
- {test: "vtr_reg_nightly_test1", cores: "16", options: "", cmake: "", extra_pkgs: ""}
52-
#- {test: "vtr_reg_nightly_test1_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
53-
#- {test: "vtr_reg_nightly_test2", cores: "16", options: "", cmake: "", extra_pkgs: ""}
54-
#- {test: "vtr_reg_nightly_test2_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
55-
#- {test: "vtr_reg_nightly_test3", cores: "16", options: "", cmake: "", extra_pkgs: ""}
56-
#- {test: "vtr_reg_nightly_test3_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
57-
#- {test: "vtr_reg_nightly_test4", cores: "16", options: "", cmake: "", extra_pkgs: ""}
58-
#- {test: "vtr_reg_nightly_test4_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
59-
#- {test: "vtr_reg_nightly_test5", cores: "16", options: "", cmake: "", extra_pkgs: ""}
60-
#- {test: "vtr_reg_nightly_test6", cores: "16", options: "", cmake: "", extra_pkgs: ""}
61-
#- {test: "vtr_reg_nightly_test7", cores: "16", options: "", cmake: "", extra_pkgs: ""}
62-
#- {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
63-
#- {test: "vtr_reg_strong_odin", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
64-
#- {test: "vtr_reg_strong_odin", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
65-
#- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
66-
#- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
67-
#- {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=OFF", extra_pkgs: ""}
52+
- {test: "vtr_reg_nightly_test1_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
53+
- {test: "vtr_reg_nightly_test2", cores: "16", options: "", cmake: "", extra_pkgs: ""}
54+
- {test: "vtr_reg_nightly_test2_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
55+
- {test: "vtr_reg_nightly_test3", cores: "16", options: "", cmake: "", extra_pkgs: ""}
56+
- {test: "vtr_reg_nightly_test3_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
57+
- {test: "vtr_reg_nightly_test4", cores: "16", options: "", cmake: "", extra_pkgs: ""}
58+
- {test: "vtr_reg_nightly_test4_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
59+
- {test: "vtr_reg_nightly_test5", cores: "16", options: "", cmake: "", extra_pkgs: ""}
60+
- {test: "vtr_reg_nightly_test6", cores: "16", options: "", cmake: "", extra_pkgs: ""}
61+
- {test: "vtr_reg_nightly_test7", cores: "16", options: "", cmake: "", extra_pkgs: ""}
62+
- {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
63+
- {test: "vtr_reg_strong_odin", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
64+
- {test: "vtr_reg_strong_odin", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
65+
#- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""} Test turned off -> F4PGA conflicts with Yosys (version 42)
66+
- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
67+
- {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=OFF", extra_pkgs: ""}
6868

6969
env:
7070
DEBIAN_FRONTEND: "noninteractive"

‎vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/task_list.txt

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,16 @@
11
#Refer to Issue #1770 for details.
2-
##regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/adder_trees
2+
#regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/adder_trees
33

4-
#regression_tests/vtr_reg_nightly_test1/vpr_reg_mcnc_equiv
5-
#regression_tests/vtr_reg_nightly_test1/vpr_reg_mcnc
6-
#regression_tests/vtr_reg_nightly_test1/vtr_reg_fpu_soft_logic_arch
7-
#regression_tests/vtr_reg_nightly_test1/vtr_reg_fpu_hard_block_arch
4+
regression_tests/vtr_reg_nightly_test1/vpr_reg_mcnc_equiv
5+
regression_tests/vtr_reg_nightly_test1/vpr_reg_mcnc
6+
regression_tests/vtr_reg_nightly_test1/vtr_reg_fpu_soft_logic_arch
7+
regression_tests/vtr_reg_nightly_test1/vtr_reg_fpu_hard_block_arch
88
regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/figure_8
99
##regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/FIR_filters @TODO
1010
##regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/FIR_filters_frac @TODO
1111
regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/multless_consts
12-
#regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores
13-
#regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores_frac
14-
##regression_tests/vtr_reg_nightly_test1/symbiflow
15-
#regression_tests/vtr_reg_nightly_test1/power_extended_arch_list
16-
#regression_tests/vtr_reg_nightly_test1/power_extended_circuit_list
12+
regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores
13+
regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores_frac
14+
#regression_tests/vtr_reg_nightly_test1/symbiflow
15+
regression_tests/vtr_reg_nightly_test1/power_extended_arch_list
16+
regression_tests/vtr_reg_nightly_stest1/power_extended_circuit_list

0 commit comments

Comments
 (0)