[Infra]: generate vtr_reg_yosys_odin golden results

Signed-off-by: Seyed Alireza Damghani <[email protected]>

Author: sdamghan

vtr_flow/tasks/regression_tests/vtr_reg_yosys_odin/vtr_benchmarks/config/config.txt

@@ -31,7 +31,6 @@ circuit_list_add=stereovision3.v
 circuit_list_add=LU8PEEng.v
 circuit_list_add=LU32PEEng.v
 circuit_list_add=mcml.v
-circuit_list_add=LU64PEEng.v
 
 # Add architectures to list to sweep
 arch_list_add=k6_frac_N10_frac_chain_mem32K_40nm.xml