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Copy file name to clipboardExpand all lines: doc/src/vpr/placement_constraints.rst
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VPR Placement Constraints
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=========================
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VPR supports running flows with placement constraints. Placement constraints are set on primitives to lock them down to specified regions on the FPGA chip. The placement constraints should be specified by the user using an XML constraints file format, as described in the section below. When VPR is run with placement constraints, both the packing and placement flows are performed in such a way that the constraints are respected. The packing stage does not pack any primitives together that have conflicting floorplan constraints. The placement stage considers the floorplan constraints when choosing a location for each clustered block during initial placement, and does not move any block outside of its constraint boundaries during place moves.
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VPR supports running flows with placement constraints. Placement constraints are set on primitives to lock them down to specified regions on the FPGA chip. For example, a user may use placement constraints to lock down pins to specific locations on the chip. Also, groups of primitives may be locked down to regions on the chip in CAD flows that use floorplanning or modular design, or to hand-place a timing critical piece.
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The placement constraints should be specified by the user using an XML constraints file format, as described in the section below. When VPR is run with placement constraints, both the packing and placement flows are performed in such a way that the constraints are respected. The packing stage does not pack any primitives together that have conflicting floorplan constraints. The placement stage considers the floorplan constraints when choosing a location for each clustered block during initial placement, and does not move any block outside of its constraint boundaries during place moves.
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A Constraints File Example
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--------------------------
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.. code-block:: xml
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:caption: An example of a placement constraints file in XML format.
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:linenos:
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<vpr_constraints tool_name="vpr">
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<partition_list>
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<partition name="Part0">
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<add_atom name_pattern="li354">
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<add_atom name_pattern="alu*"> <!-- Regular expressions can be used to provide name patterns of the primitives to be added -->
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<add_atom name_pattern="n877">
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<add_region x_low="3" y_low="1" x_high="7" y_high="2"> <!-- Two rectangular regions are specified, together describing an L-shaped region -->
<add_region x_low="3" y_low="3" x_high="7" y_high="7" subtile="0"> <!-- One specific location is specified -->
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<add_atom name_pattern="n4917">
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<add_atom name_pattern="n6010">
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</partition>
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</partition_list>
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</vpr_constraints>
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.. _end:
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Constraints File Format
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-----------------------
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:req_param name_pattern:
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The name of the atom.
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The ``name_pattern`` can either be the exact name of the atom from the atom netlist produced by VPR. It can also be a regular expression, in which case VPR will add all atoms from the netlist which have a portion of their name matching the regular expression to the partition.
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The ``name_pattern`` can be the exact name of the atom from the input atom netlist that was passed to VPR. It can also be a regular expression, in which case VPR will add all atoms from the netlist which have a portion of their name matching the regular expression to the partition. For example, if a module contains primitives named in the pattern of "alu[0]", "alu[1]", and "alu[2]", the regular expression "alu*" would add all of the primitives from that module.
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Region
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^^^^^^
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:opt_param subtile:
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Each x, y location on the grid may contain multiple locations known as subtiles. This paramter is an optional value specifying the subtile location that the atom(s) of the partition shall be constrained to.
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The optional ``subtile`` attribute is useful when the user would like to constrain a primitive to one specific x, y, subtile location on the chip. In this case, ``x_low`` can be set to equal ``x_high``, ``y_low`` can equal ``y_high``, and the subtile attribute can be specified.
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The optional ``subtile`` attribute is commonly used when constraining an atom to a specific location on the chip (e.g. an exact I/O location). It is legal to use with larger regions, but uncommon.
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If a user would like to specify an area on the chip with an unusual shape (e.g. L-shaped or T-shaped), they can simply add multiple ``<add_region>`` tags to cover the area specified.
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A Constraints File Example
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--------------------------
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.. code-block:: xml
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:caption: An example of a placement constraints file in XML format.
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