Merge pull request #1355 from tangxifan/pb_pin_fixup

Post routing cluster block pin fix-up

Author: vaughnbetz

doc/src/vpr/file_formats.rst

@@ -585,6 +585,14 @@ The io pad is set to inpad mode and is driven by the inpad:
         </block>
     ...
 
+.. note:: ``.net`` files may be outputted at two stages:
+          - After packing is completed, the packing results will be outputted. The ``.net`` file can be loaded as an input for placer, router and analyzer. Note that the file may **not** represent the final packing results as the analyzer will apply synchronization between packing and routing results.
+          - After analysis is completed, updated packing results will be outputted. This is due to that VPR router may swap pin mapping in packing results for optimizations. In such cases, packing results are synchronized with routing results. The outputted ``.net`` file will have a postfix of ``.post_routing`` as compared to the original packing results. It could happen that VPR router does not apply any pin swapping and the two ``.net`` files are the same. In both cases, the post-analysis ``.net`` file should be considered to be **the final packing results** for downstream tools, e.g., bitstream generator. Users may load the post-routing ``.net`` file in VPR's analysis flow to sign-off the final results.
+
+.. warning:: Currently, the packing result synchronization is only applicable to input pins which may be remapped to different nets during routing optimization. If your architecture defines `link_instance_pin_xml_syntax_` equivalence for output pins, the packing results still mismatch the routing results! 
+
+.. _link_instance_pin_xml_syntax: https://docs.verilogtorouting.org/en/latest/arch/reference/#tag-%3Coutputname= 
+
 .. _vpr_place_file:
 
 Placement File Format (.place)

vpr/src/base/netlist_writer.cpp

@@ -1864,7 +1864,17 @@ class NetlistWriterVisitor : public NetlistVisitor {
                 if (impl_input_net_id) {
                     //If there is a valid net connected in the implementation
                     AtomNetId logical_net_id = atom_ctx.nlist.port_net(port_id, orig_index);
-                    VTR_ASSERT(impl_input_net_id == logical_net_id);
+
+                    // Fatal error should be flagged when the net marked in implementation
+                    // does not match the net marked in input netlist
+                    if (impl_input_net_id != logical_net_id) {
+                        VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER,
+                                        "Unmatch:\n\tlogical net is '%s' at pin '%lu'\n\timplmented net is '%s' at pin '%s'\n",
+                                        atom_ctx.nlist.net_name(logical_net_id).c_str(),
+                                        size_t(orig_index),
+                                        atom_ctx.nlist.net_name(impl_input_net_id).c_str(),
+                                        gpin->to_string().c_str());
+                    }
 
                     //Mark the permutation.
                     //  The net originally located at orig_index in the atom netlist

vpr/src/base/vpr_api.cpp

@@ -67,6 +67,7 @@
 #include "constant_nets.h"
 #include "atom_netlist_utils.h"
 #include "cluster.h"
+#include "output_clustering.h"
 
 #include "pack_report.h"
 #include "overuse_report.h"
@@ -81,6 +82,8 @@
 
 #include "arch_util.h"
 
+#include "post_routing_pb_pin_fixup.h"
+
 #include "log.h"
 #include "iostream"
 
@@ -587,6 +590,10 @@ void vpr_load_packing(t_vpr_setup& vpr_setup, const t_arch& arch) {
 
     auto& cluster_ctx = g_vpr_ctx.mutable_clustering();
 
+    /* Ensure we have a clean start with void net remapping information */
+    cluster_ctx.post_routing_clb_pin_nets.clear();
+    cluster_ctx.pre_routing_net_pin_mapping.clear();
+
     cluster_ctx.clb_nlist = read_netlist(vpr_setup.FileNameOpts.NetFile.c_str(),
                                          &arch,
                                          vpr_setup.FileNameOpts.verify_file_digests,
@@ -743,8 +750,6 @@ RouteStatus vpr_route_flow(t_vpr_setup& vpr_setup, const t_arch& arch) {
             }
         }
 
-        VTR_LOG("\n");
-
         //Echo files
         if (vpr_setup.Timing.timing_analysis_enabled) {
             if (isEchoFileEnabled(E_ECHO_FINAL_ROUTING_TIMING_GRAPH)) {
@@ -1183,6 +1188,30 @@ bool vpr_analysis_flow(t_vpr_setup& vpr_setup, const t_arch& Arch, const RouteSt
         VTR_LOG("*****************************************************************************************\n");
     }
 
+    /* If routing is successful, apply post-routing annotations
+     * - apply logic block pin fix-up
+     *
+     * Note: 
+     *   - Turn on verbose output when users require verbose output
+     *     for packer (default verbosity is set to 2 for compact logs)
+     */
+    if (route_status.success()) {
+        sync_netlists_to_routing(g_vpr_ctx.device(),
+                                 g_vpr_ctx.mutable_atom(),
+                                 g_vpr_ctx.mutable_clustering(),
+                                 g_vpr_ctx.placement(),
+                                 g_vpr_ctx.routing(),
+                                 vpr_setup.PackerOpts.pack_verbosity > 2);
+
+        std::string post_routing_packing_output_file_name = vpr_setup.PackerOpts.output_file + ".post_routing";
+        write_packing_results_to_xml(vpr_setup.PackerOpts.global_clocks,
+                                     Arch.architecture_id,
+                                     post_routing_packing_output_file_name.c_str());
+    } else {
+        VTR_LOG_WARN("Sychronization between packing and routing results is not applied due to illegal circuit implementation\n");
+    }
+    VTR_LOG("\n");
+
     vpr_analysis(vpr_setup, Arch, route_status);
 
     return true;

vpr/src/base/vpr_context.h

@@ -268,6 +268,16 @@ struct ClusteringContext : public Context {
 
     ///@brief New netlist class derived from Netlist
     ClusteredNetlist clb_nlist;
+
+    /* Database for nets of each clb block pin after routing stage
+     * - post_routing_clb_pin_nets:
+     *     mapping of pb_type pins to clustered net ids
+     * - pre_routing_net_pin_mapping:
+     *     a copy of mapping for current pb_route index to previous pb_route index
+     *     Record the previous pin mapping for finding the correct pin index during timing analysis
+     */
+    std::map<ClusterBlockId, std::map<int, ClusterNetId>> post_routing_clb_pin_nets;
+    std::map<ClusterBlockId, std::map<int, int>> pre_routing_net_pin_mapping;
 };
 
 /**

vpr/src/base/vpr_types.cpp

@@ -70,7 +70,7 @@ t_mode* t_pb::get_mode() const {
 }
 
 /**
- * @brief Returns the t_pb associated with the specified gnode which is contained
+ * @brief Returns the read-only t_pb associated with the specified gnode which is contained
  *        within the current pb
  */
 const t_pb* t_pb::find_pb(const t_pb_graph_node* gnode) const {
@@ -96,6 +96,33 @@ const t_pb* t_pb::find_pb(const t_pb_graph_node* gnode) const {
     return nullptr; //Not found
 }
 
+/**
+ * @brief Returns the mutable t_pb associated with the specified gnode which is contained
+ *        within the current pb
+ */
+t_pb* t_pb::find_mutable_pb(const t_pb_graph_node* gnode) {
+    //Base case
+    if (pb_graph_node == gnode) {
+        return this;
+    }
+
+    //Search recursively
+    for (int ichild_type = 0; ichild_type < get_num_child_types(); ++ichild_type) {
+        if (child_pbs[ichild_type] == nullptr) continue;
+
+        for (int ipb = 0; ipb < get_num_children_of_type(ichild_type); ++ipb) {
+            t_pb* child_pb = &child_pbs[ichild_type][ipb];
+
+            t_pb* found_pb = child_pb->find_mutable_pb(gnode);
+            if (found_pb != nullptr) {
+                VTR_ASSERT(found_pb->pb_graph_node == gnode);
+                return found_pb; //Found
+            }
+        }
+    }
+    return nullptr; //Not found
+}
+
 const t_pb* t_pb::find_pb_for_model(const std::string& blif_model) const {
     //Base case
     const t_model* model = pb_graph_node->pb_type->model;

vpr/src/base/vpr_types.h

@@ -325,11 +325,17 @@ class t_pb {
     t_mode* get_mode() const;
 
     /**
-     * @brief Returns the t_pb associated with the specified gnode which is contained
+     * @brief Returns the read-only t_pb associated with the specified gnode which is contained
      *        within the current pb
      */
     const t_pb* find_pb(const t_pb_graph_node* gnode) const;
 
+    /**
+     * @brief Returns the mutable t_pb associated with the specified gnode which is contained
+     *        within the current pb
+     */
+    t_pb* find_mutable_pb(const t_pb_graph_node* gnode);
+
     const t_pb* find_pb_for_model(const std::string& blif_model) const;
 
     ///@brief Returns the root pb containing this pb

vpr/src/pack/output_clustering.cpp

@@ -26,6 +26,7 @@
 #include "output_clustering.h"
 #include "read_xml_arch_file.h"
 #include "vpr_utils.h"
+#include "pack.h"
 
 #define LINELENGTH 1024
 #define TAB_LENGTH 4
@@ -615,3 +616,26 @@ void output_clustering(const vtr::vector<ClusterBlockId, std::vector<t_intra_lb_
         }
     }
 }
+
+/********************************************************************
+ * An useful API to output packing results to a XML file
+ * This function is a wrapper for the function output_clustering()
+ * but remove all the requirements on input data structures that
+ * have to be built with other APIs
+ *
+ * As such, this function is expected to be a standard API 
+ * which can be called anytime and anywhere after packing is finished.
+ ********************************************************************/
+void write_packing_results_to_xml(const bool& global_clocks,
+                                  const std::string& architecture_id,
+                                  const char* out_fname) {
+    vtr::vector<ClusterBlockId, std::vector<t_intra_lb_net>*> intra_lb_routing_placeholder;
+    std::unordered_set<AtomNetId> is_clock = alloc_and_load_is_clock(global_clocks);
+
+    output_clustering(intra_lb_routing_placeholder,
+                      global_clocks,
+                      is_clock,
+                      architecture_id,
+                      out_fname,
+                      false);
+}

vpr/src/pack/output_clustering.h

@@ -7,4 +7,6 @@
 
 void output_clustering(const vtr::vector<ClusterBlockId, std::vector<t_intra_lb_net>*>& intra_lb_routing, bool global_clocks, const std::unordered_set<AtomNetId>& is_clock, const std::string& architecture_id, const char* out_fname, bool skip_clustering);
 
+void write_packing_results_to_xml(const bool& global_clocks, const std::string& architecture_id, const char* out_fname);
+
 #endif

vpr/src/pack/pack.cpp

@@ -26,7 +26,6 @@
 /* #define DUMP_PB_GRAPH 1 */
 /* #define DUMP_BLIF_INPUT 1 */
 
-static std::unordered_set<AtomNetId> alloc_and_load_is_clock(bool global_clocks);
 static bool try_size_device_grid(const t_arch& arch, const std::map<t_logical_block_type_ptr, size_t>& num_type_instances, float target_device_utilization, std::string device_layout_name);
 
 static t_ext_pin_util_targets parse_target_external_pin_util(std::vector<std::string> specs);

vpr/src/pack/pack.h

@@ -1,7 +1,9 @@
 #ifndef PACK_H
 #define PACK_H
 #include <vector>
+#include <unordered_set>
 #include "vpr_types.h"
+#include "atom_netlist_fwd.h"
 
 bool try_pack(t_packer_opts* packer_opts,
               const t_analysis_opts* analysis_opts,
@@ -13,4 +15,6 @@ bool try_pack(t_packer_opts* packer_opts,
 
 float get_arch_switch_info(short switch_index, int switch_fanin, float& Tdel_switch, float& R_switch, float& Cout_switch);
 
+std::unordered_set<AtomNetId> alloc_and_load_is_clock(bool global_clocks);
+
 #endif