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1 | | -arch circuit vpr_revision vpr_status min_chan_width critical_path_delay pack_time place_time min_chan_width_route_time crit_path_route_time routed_wirelength max_odin_mem max_abc_mem max_vpr_mem num_pre_packed_nets num_pre_packed_blocks num_post_packed_nets num_clb num_io num_outputs num_memories num_mult error |
2 | | -k6_frac_N10_40nm.xml alu4.pre-vpr.blif 7857406 success 50 4.99681 1.82764 0.462103 0.897286 0.103467 6564 -1 -1 39964 926 934 462 76 14 8 -1 -1 |
3 | | -k6_frac_N10_40nm.xml apex2.pre-vpr.blif 7857406 success 68 5.64308 1.78936 0.924976 2.75465 0.236966 11852 -1 -1 51016 1113 1116 657 91 38 3 -1 -1 |
4 | | -k6_frac_N10_40nm.xml apex4.pre-vpr.blif 7857406 success 70 4.77454 1.54475 0.689288 2.28632 0.218718 10187 -1 -1 44608 897 916 554 75 9 19 -1 -1 |
5 | | -k6_frac_N10_40nm.xml bigkey.pre-vpr.blif 7857406 success 34 3.14343 1.6418 1.05617 1.28244 0.130747 8137 -1 -1 70824 1364 1561 560 70 229 197 -1 -1 |
6 | | -k6_frac_N10_40nm.xml clma.pre-vpr.blif 7857406 success 92 8.02666 5.4159 4.14961 13.2877 1.06077 45792 -1 -1 126016 3672 3754 2295 286 62 82 -1 -1 |
7 | | -k6_frac_N10_40nm.xml des.pre-vpr.blif 7857406 success 50 3.70299 0.361867 1.00134 1.17393 0.157662 9269 -1 -1 70276 954 1199 581 46 256 245 -1 -1 |
8 | | -k6_frac_N10_40nm.xml diffeq.pre-vpr.blif 7857406 success 50 5.13846 0.771449 0.456533 0.460252 0.087255 5578 -1 -1 53568 1371 1410 564 62 64 39 -1 -1 |
9 | | -k6_frac_N10_40nm.xml dsip.pre-vpr.blif 7857406 success 36 3.1119 2.09406 1.32238 1.62338 0.162101 8489 -1 -1 70500 1362 1559 569 70 229 197 -1 -1 |
10 | | -k6_frac_N10_40nm.xml elliptic.pre-vpr.blif 7857406 success 64 8.01815 3.13288 1.72837 2.75992 0.321581 17268 -1 -1 103044 3421 3535 1224 161 131 114 -1 -1 |
11 | | -k6_frac_N10_40nm.xml ex1010.pre-vpr.blif 7857406 success 96 6.67466 4.84049 2.16821 8.57459 1.01538 40960 -1 -1 127280 2659 2669 1398 244 10 10 -1 -1 |
12 | | -k6_frac_N10_40nm.xml ex5p.pre-vpr.blif 7857406 success 62 4.05175 1.1003 0.464945 1.01455 0.148027 6772 -1 -1 31724 761 824 424 58 8 63 -1 -1 |
13 | | -k6_frac_N10_40nm.xml frisc.pre-vpr.blif 7857406 success 76 9.29797 2.68731 1.86003 3.22729 0.363086 22970 -1 -1 84452 3175 3291 1263 166 20 116 -1 -1 |
14 | | -k6_frac_N10_40nm.xml misex3.pre-vpr.blif 7857406 success 52 4.65352 1.37346 0.450423 1.15297 0.117278 7081 -1 -1 39344 828 842 454 67 14 14 -1 -1 |
15 | | -k6_frac_N10_40nm.xml pdc.pre-vpr.blif 7857406 success 88 6.65713 5.29743 2.1997 10.2506 0.774356 36582 -1 -1 117180 2839 2879 1461 240 16 40 -1 -1 |
16 | | -k6_frac_N10_40nm.xml s298.pre-vpr.blif 7857406 success 50 6.40345 1.24536 0.335227 0.672838 0.12007 5275 -1 -1 33972 726 732 358 59 4 6 -1 -1 |
17 | | -k6_frac_N10_40nm.xml s38417.pre-vpr.blif 7857406 success 60 5.25297 3.25968 2.93675 2.98679 0.336826 23179 -1 -1 100008 4782 4888 2048 238 29 106 -1 -1 |
18 | | -k6_frac_N10_40nm.xml s38584.1.pre-vpr.blif 7857406 success 64 5.05934 2.39164 2.95643 2.84341 0.393328 23701 -1 -1 92632 4457 4761 2070 224 38 304 -1 -1 |
19 | | -k6_frac_N10_40nm.xml seq.pre-vpr.blif 7857406 success 68 5.07225 1.46498 0.620637 1.85509 0.1554 9871 -1 -1 41752 1006 1041 567 80 41 35 -1 -1 |
20 | | -k6_frac_N10_40nm.xml spla.pre-vpr.blif 7857406 success 74 6.56705 4.13951 1.50804 5.63014 0.487862 24329 -1 -1 91868 2232 2278 1138 189 16 46 -1 -1 |
21 | | -k6_frac_N10_40nm.xml tseng.pre-vpr.blif 7857406 success 48 4.9473 0.666122 0.454368 0.449119 0.072536 4912 -1 -1 39624 1461 1583 498 60 52 122 -1 -1 |
| 1 | +arch circuit vpr_revision vpr_status error num_pre_packed_nets num_pre_packed_blocks num_post_packed_nets num_post_packed_blocks device_width device_height num_clb num_io num_outputs num_memories num_mult placed_wirelength_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est min_chan_width routed_wirelength min_chan_width_route_success_iteration crit_path_routed_wirelength crit_path_route_success_iteration critical_path_delay setup_TNS setup_WNS pack_time place_time min_chan_width_route_time crit_path_route_time max_vpr_mem max_odin_mem max_abc_mem |
| 2 | +k6_frac_N10_40nm.xml alu4.pre-vpr.blif a4f8983 success 926 934 451 98 9 9 76 14 8 -1 -1 4380 4.42576 -31.3662 -4.42576 50 7152 29 6422 18 4.86151 -33.8265 -4.86151 2.03615 1.01058 2.30341 0.243699 30536 -1 -1 |
| 3 | +k6_frac_N10_40nm.xml apex2.pre-vpr.blif a4f8983 success 1113 1116 644 133 10 10 92 38 3 -1 -1 7168 5.05862 -15.0372 -5.05862 74 12302 16 12524 19 5.45662 -15.9765 -5.45662 2.06121 1.69299 5.6902 0.56717 35960 -1 -1 |
| 4 | +k6_frac_N10_40nm.xml apex4.pre-vpr.blif a4f8983 success 897 916 555 104 9 9 76 9 19 -1 -1 5985 4.52861 -75.5345 -4.52861 74 10287 16 9962 19 5.12628 -81.7848 -5.12628 1.67731 1.28548 4.42585 0.308382 30532 -1 -1 |
| 5 | +k6_frac_N10_40nm.xml bigkey.pre-vpr.blif a4f8983 success 1364 1561 555 496 14 14 70 229 197 -1 -1 4549 2.85918 -645.685 -2.85918 40 7836 15 7534 13 3.07412 -712.35 -3.07412 1.96109 1.74315 2.3505 0.195437 54476 -1 -1 |
| 6 | +k6_frac_N10_40nm.xml clma.pre-vpr.blif a4f8983 success 3672 3754 2282 429 17 17 285 62 82 -1 -1 27967 7.96592 -382.33 -7.96592 92 46656 38 44089 19 8.53633 -410.332 -8.53633 8.76513 10.9033 25.9077 1.64501 90848 -1 -1 |
| 7 | +k6_frac_N10_40nm.xml des.pre-vpr.blif a4f8983 success 954 1199 595 547 16 16 46 256 245 -1 -1 5940 3.88682 -733.847 -3.88682 38 10670 16 9550 16 4.46127 -830.036 -4.46127 0.668025 2.48455 2.59211 0.179229 64488 -1 -1 |
| 8 | +k6_frac_N10_40nm.xml diffeq.pre-vpr.blif a4f8983 success 1371 1410 572 165 8 8 62 64 39 -1 -1 3526 4.59998 -1008.86 -4.59998 50 5681 45 4931 15 5.22874 -1083.23 -5.22874 0.825195 0.934436 1.13754 0.121286 50500 -1 -1 |
| 9 | +k6_frac_N10_40nm.xml dsip.pre-vpr.blif a4f8983 success 1362 1559 572 496 14 14 70 229 197 -1 -1 4709 2.98212 -650.211 -2.98212 34 9515 24 8467 15 3.28063 -747.756 -3.28063 3.15013 1.70162 2.26495 0.183794 54468 -1 -1 |
| 10 | +k6_frac_N10_40nm.xml elliptic.pre-vpr.blif a4f8983 success 3421 3535 1219 406 13 13 161 131 114 -1 -1 10754 7.09701 -4179.21 -7.09701 68 18905 14 16271 18 7.20683 -4317.88 -7.20683 4.65375 3.6381 8.07188 0.714699 69864 -1 -1 |
| 11 | +k6_frac_N10_40nm.xml ex1010.pre-vpr.blif a4f8983 success 2659 2669 1385 265 16 16 245 10 10 -1 -1 24944 6.22397 -59.1491 -6.22397 98 42268 17 40385 18 6.65322 -62.8066 -6.65322 7.7826 6.10372 29.8078 1.89975 79568 -1 -1 |
| 12 | +k6_frac_N10_40nm.xml ex5p.pre-vpr.blif a4f8983 success 761 824 422 129 8 8 58 8 63 -1 -1 3848 3.70513 -168.219 -3.70513 62 6650 26 6142 17 4.11844 -188.885 -4.11844 1.20274 0.885512 1.81144 0.233623 25900 -1 -1 |
| 13 | +k6_frac_N10_40nm.xml frisc.pre-vpr.blif a4f8983 success 3175 3291 1241 302 13 13 166 20 116 -1 -1 13919 8.24225 -4198.7 -8.24225 80 22542 13 21073 14 8.90071 -4624.78 -8.90071 4.17894 4.27477 9.77213 0.809343 61640 -1 -1 |
| 14 | +k6_frac_N10_40nm.xml misex3.pre-vpr.blif a4f8983 success 828 842 446 95 9 9 67 14 14 -1 -1 4252 4.2215 -56.0719 -4.2215 52 7561 45 7076 18 4.55164 -61.3479 -4.55164 1.69302 1.03077 2.59943 0.297574 29948 -1 -1 |
| 15 | +k6_frac_N10_40nm.xml pdc.pre-vpr.blif a4f8983 success 2839 2879 1444 297 16 16 241 16 40 -1 -1 22462 6.31645 -229.374 -6.31645 88 39489 40 36165 18 6.58278 -240.585 -6.58278 8.92213 6.00409 31.7149 1.53536 79812 -1 -1 |
| 16 | +k6_frac_N10_40nm.xml s298.pre-vpr.blif a4f8983 success 726 732 369 69 8 8 59 4 6 -1 -1 3520 6.26232 -50.1534 -6.26232 52 5795 14 5420 18 6.85559 -54.1891 -6.85559 1.4201 0.802709 2.42742 0.192326 25560 -1 -1 |
| 17 | +k6_frac_N10_40nm.xml s38417.pre-vpr.blif a4f8983 success 4782 4888 2115 372 16 16 237 29 106 -1 -1 15251 4.89562 -3421.39 -4.89562 60 25383 39 21345 17 5.34149 -3623 -5.34149 3.78281 5.8916 6.81605 1.09638 82244 -1 -1 |
| 18 | +k6_frac_N10_40nm.xml s38584.1.pre-vpr.blif a4f8983 success 4457 4761 2084 566 15 15 224 38 304 -1 -1 14758 4.17736 -2858.88 -4.17736 66 23925 13 21956 14 5.03821 -3046.08 -5.03821 3.52695 5.84845 6.31535 0.633555 75176 -1 -1 |
| 19 | +k6_frac_N10_40nm.xml seq.pre-vpr.blif a4f8983 success 1006 1041 568 156 9 9 80 41 35 -1 -1 6044 4.41671 -125.51 -4.41671 74 10043 16 10140 17 4.62874 -135.735 -4.62874 1.71436 1.36358 4.46171 0.360023 31048 -1 -1 |
| 20 | +k6_frac_N10_40nm.xml spla.pre-vpr.blif a4f8983 success 2232 2278 1137 250 14 14 188 16 46 -1 -1 15394 5.78502 -198.311 -5.78502 74 26374 41 25583 20 6.42588 -215.736 -6.42588 5.53245 3.61308 7.66705 1.0422 63492 -1 -1 |
| 21 | +k6_frac_N10_40nm.xml tseng.pre-vpr.blif a4f8983 success 1461 1583 486 234 8 8 60 52 122 -1 -1 2605 4.32376 -1128.56 -4.32376 50 5014 12 4311 12 4.98359 -1275.42 -4.98359 0.807933 0.938737 1.24214 0.156245 41184 -1 -1 |
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