[Infra]: copying the non-synthesizable include files to the temp directory

	 and ignoring them as the design benchmark set for synthesis

Signed-off-by: Seyed Alireza Damghani <[email protected]>

Author: sdamghan

vtr_flow/scripts/python_libs/vtr/odin/odin.py

@@ -25,6 +25,12 @@ def create_circuits_list(main_circuit, include_files):
     if include_files:
         # Verify that files are Paths or convert them to Paths + check that they exist
         for include in include_files:
+            file_extension = os.path.splitext(include)[-1]
+            # if the include file is not in the supported HDLs, we drop it
+            # NOTE: the include file is already copied to the temp folder
+            if file_extension not in FILE_TYPES:
+                continue
+
             include_file = vtr.verify_file(include, "Circuit")
             circuit_list.append(include_file.name)
 

vtr_flow/scripts/python_libs/vtr/yosys/yosys.py

@@ -29,12 +29,18 @@
 
 
 def create_circuits_list(main_circuit, include_files):
-    """Create a list of all (.v) and (.vh) files"""
+    """Create a list of supported HDL files"""
     circuit_list = []
     # Check include files exist
     if include_files:
         # Verify that files are Paths or convert them to Paths + check that they exist
         for include in include_files:
+            file_extension = os.path.splitext(include)[-1]
+            # if the include file is not in the supported HDLs, we drop it
+            # NOTE: the include file is already copied to the temp folder
+            if file_extension not in FILE_TYPES:
+                continue
+
             include_file = vtr.verify_file(include, "Circuit")
             circuit_list.append(include_file.name)