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[core] debugging
1 parent de0d0bc commit 0a1bc20

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2 files changed

+6
-35
lines changed

2 files changed

+6
-35
lines changed

vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -125,10 +125,7 @@ void build_rr_graph_edges(const RRGraphView& rr_graph,
125125
build_rr_graph_edges_for_source_nodes(rr_graph, rr_graph_builder, rr_node_driver_switches, grids, layer, num_edges_to_create);
126126
build_rr_graph_edges_for_sink_nodes(rr_graph, rr_graph_builder, rr_node_driver_switches, grids, layer, num_edges_to_create);
127127

128-
vtr::Point<size_t> gsb_range(grids.width() - 2, grids.height() - 2);
129-
if (perimeter_cb) {
130-
gsb_range.set(grids.width() - 1, grids.height() - 1);
131-
}
128+
vtr::Point<size_t> gsb_range(grids.width() - 1, grids.height() - 1);
132129

133130
/* Go Switch Block by Switch Block */
134131
for (size_t ix = 0; ix <= gsb_range.x(); ++ix) {

vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp

Lines changed: 5 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -625,30 +625,6 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
625625
const size_t& layer,
626626
const vtr::Point<size_t>& gsb_coordinate,
627627
const bool& perimeter_cb) {
628-
/* Bounding box for GSB ranges on routing tracks.
629-
* Note that when perimeter connection blocks are not allowed,
630-
* - top side routing tracks for any GSB exist on y = [0, H-2)
631-
* - right side routing tracks for any GSB exist on x = [0, W-2)
632-
* - bottom side routing tracks for any GSB exist on y = [1, H-1)
633-
* - left side routing tracks for any GSB exist on x = [1, W-1)
634-
* Note that when perimeter connection blocks are allowed,
635-
* - top side routing tracks for any GSB exist on y = [0, H-1)
636-
* - right side routing tracks for any GSB exist on x = [0, W-1)
637-
* - bottom side routing tracks for any GSB exist on y = [0, H)
638-
* - left side routing tracks for any GSB exist on x = [0, W)
639-
*/
640-
std::map<e_side, vtr::Point<size_t>> track_range;
641-
track_range[TOP] = vtr::Point<size_t>(0, grids.height() - 2);
642-
track_range[RIGHT] = vtr::Point<size_t>(0, grids.width() - 2);
643-
track_range[BOTTOM] = vtr::Point<size_t>(0, grids.height() - 2);
644-
track_range[LEFT] = vtr::Point<size_t>(0, grids.width() - 2);
645-
if (perimeter_cb) {
646-
track_range[TOP] = vtr::Point<size_t>(0, grids.height() - 1);
647-
track_range[RIGHT] = vtr::Point<size_t>(0, grids.width() - 1);
648-
track_range[BOTTOM] = vtr::Point<size_t>(0, grids.height() - 1);
649-
track_range[LEFT] = vtr::Point<size_t>(0, grids.width() - 1);
650-
}
651-
652628
/* Create an object to return */
653629
RRGSB rr_gsb;
654630

@@ -683,8 +659,8 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
683659

684660
switch (side) {
685661
case TOP: /* TOP = 0 */
686-
/* For the border, we should take special care. The top column (H-1) does not have any top side routing channel. Any lower column may have (<= H-2) */
687-
if (track_range[side_manager.get_side()].x() > gsb_coordinate.y() || gsb_coordinate.y() > track_range[side_manager.get_side()].y()) {
662+
/* For the border, we should take special care. */
663+
if (gsb_coordinate.y() == grids.height() - 1) {
688664
rr_gsb.clear_one_side(side_manager.get_side());
689665
break;
690666
}
@@ -714,7 +690,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
714690
break;
715691
case RIGHT: /* RIGHT = 1 */
716692
/* For the border, we should take special care. The rightmost column (W-1) does not have any right side routing channel. If perimeter connection block is not enabled, even the last second rightmost column (W-2) does not have any right side routing channel */
717-
if (track_range[side_manager.get_side()].x() > gsb_coordinate.x() || gsb_coordinate.x() > track_range[side_manager.get_side()].y()) {
693+
if (gsb_coordinate.x() == grids.width() - 1) {
718694
rr_gsb.clear_one_side(side_manager.get_side());
719695
break;
720696
}
@@ -743,8 +719,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
743719
OPIN, opin_grid_side[1]);
744720
break;
745721
case BOTTOM: /* BOTTOM = 2*/
746-
/* For the border, we should take special care */
747-
if (track_range[side_manager.get_side()].x() > gsb_coordinate.y() || gsb_coordinate.y() > track_range[side_manager.get_side()].y()) {
722+
if (!perimeter_cb && gsb_coordinate.y() == 0) {
748723
rr_gsb.clear_one_side(side_manager.get_side());
749724
break;
750725
}
@@ -773,8 +748,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
773748
OPIN, opin_grid_side[1]);
774749
break;
775750
case LEFT: /* LEFT = 3 */
776-
/* For the border, we should take special care */
777-
if (track_range[side_manager.get_side()].x() > gsb_coordinate.x() || gsb_coordinate.x() > track_range[side_manager.get_side()].y()) {
751+
if (!perimeter_cb && gsb_coordinate.x() == 0) {
778752
rr_gsb.clear_one_side(side_manager.get_side());
779753
break;
780754
}

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