Skip to content

Commit 004b829

Browse files
committed
added xy attribute to custom switchblock
1 parent 26bac8c commit 004b829

File tree

4 files changed

+36
-4
lines changed

4 files changed

+36
-4
lines changed

libs/libarchfpga/src/parse_switchblocks.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -372,6 +372,11 @@ void check_switchblock(const t_switchblock_inf* sb, const t_arch* arch) {
372372
check_bidir_switchblock(&(sb->permutation_map));
373373
}
374374

375+
/*check if type is XY_SPECIFIED, at least one of x and y is described in the architecture file*/
376+
if(sb->location == e_sb_location::E_XY_SPECIFIED){
377+
VTR_ASSERT(sb->x != -1 || sb->y != -1);
378+
}
379+
375380
/* check that specified wires exist */
376381
for (const auto& wireconn : sb->wireconns) {
377382
check_wireconn(arch, wireconn);

libs/libarchfpga/src/physical_types.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -253,7 +253,8 @@ enum e_sb_location {
253253
E_CORNER,
254254
E_FRINGE, /* perimeter minus corners */
255255
E_CORE,
256-
E_EVERYWHERE
256+
E_EVERYWHERE,
257+
E_XY_SPECIFIED
257258
};
258259

259260
/*************************************************************************************************/
@@ -1878,6 +1879,9 @@ struct t_switchblock_inf {
18781879
e_sb_location location; /* where on the FPGA this switchblock should be built (i.e. perimeter, core, everywhere) */
18791880
e_directionality directionality; /* the directionality of this switchblock (unidir/bidir) */
18801881

1882+
int x = -1; /* The exact x-axis location that this SB is used, meaningful when location is set to E_XY_specified */
1883+
int y = -1; /* The exact y-axis location that this SB is used, meanignful when location is set to E_XY_specified */
1884+
18811885
t_permutation_map permutation_map; /* map holding the permutation functions attributed to this switchblock */
18821886

18831887
std::vector<t_wireconn_inf> wireconns; /* list of wire types/groups this SB will connect */

libs/libarchfpga/src/read_xml_arch_file.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4081,11 +4081,19 @@ static void ProcessSwitchblocks(pugi::xml_node Parent, t_arch* arch, const pugiu
40814081
sb.location = E_CORNER;
40824082
} else if (strcmp(tmp, "FRINGE") == 0) {
40834083
sb.location = E_FRINGE;
4084+
} else if (strcmp(tmp,"XY_SPECIFIED") == 0){
4085+
sb.location = E_XY_SPECIFIED;
40844086
} else {
40854087
archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), "unrecognized switchblock location: %s\n", tmp);
40864088
}
40874089
}
40884090

4091+
/* get the switchblock coordinate only if sb.location is set to E_XY_SPECIFIED*/
4092+
if(sb.location == e_sb_location::E_XY_SPECIFIED){
4093+
sb.x = get_attribute(SubElem, "x", loc_data, ReqOpt::OPTIONAL).as_int(-1);
4094+
sb.y = get_attribute(SubElem, "y", loc_data, ReqOpt::OPTIONAL).as_int(-1);
4095+
}
4096+
40894097
/* get switchblock permutation functions */
40904098
SubElem = get_first_child(Node, "switchfuncs", loc_data);
40914099
read_sb_switchfuncs(SubElem, &sb, loc_data);

vpr/src/route/build_switchblocks.cpp

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -268,7 +268,7 @@ int get_wire_segment_length(const DeviceGrid& grid, e_rr_type chan_type, const t
268268
static int get_switchpoint_of_wire(const DeviceGrid& grid, e_rr_type chan_type, const t_chan_seg_details& wire_details, int seg_coord, e_side sb_side);
269269

270270
/* returns true if the coordinates x/y do not correspond to the location specified by 'location' */
271-
static bool sb_not_here(const DeviceGrid& grid, int x, int y, e_sb_location location);
271+
static bool sb_not_here(const DeviceGrid& grid, int x, int y, e_sb_location location, int sb_x, int sb_y);
272272

273273
/* checks if the specified coordinates represent a corner of the FPGA */
274274
static bool is_corner(const DeviceGrid& grid, int x, int y);
@@ -324,10 +324,11 @@ t_sb_connection_map* alloc_and_load_switchblock_permutations(const t_chan_detail
324324
if (directionality != sb.directionality) {
325325
VPR_FATAL_ERROR(VPR_ERROR_ARCH, "alloc_and_load_switchblock_connections: Switchblock %s does not match directionality of architecture\n", sb.name.c_str());
326326
}
327+
327328
/* Iterate over the x,y coordinates spanning the FPGA. */
328329
for (size_t x_coord = 0; x_coord < grid.width(); x_coord++) {
329330
for (size_t y_coord = 0; y_coord <= grid.height(); y_coord++) {
330-
if (sb_not_here(grid, x_coord, y_coord, sb.location)) {
331+
if (sb_not_here(grid, x_coord, y_coord, sb.location, sb.x, sb.y)) {
331332
continue;
332333
}
333334
/* now we iterate over all the potential side1->side2 connections */
@@ -362,7 +363,7 @@ void free_switchblock_permutations(t_sb_connection_map* sb_conns) {
362363
}
363364

364365
/* returns true if the coordinates x/y do not correspond to the location specified by 'location' */
365-
static bool sb_not_here(const DeviceGrid& grid, int x, int y, e_sb_location location) {
366+
static bool sb_not_here(const DeviceGrid& grid, int x, int y, e_sb_location location, int sb_x, int sb_y) {
366367
bool sb_not_here = true;
367368

368369
switch (location) {
@@ -388,6 +389,20 @@ static bool sb_not_here(const DeviceGrid& grid, int x, int y, e_sb_location loca
388389
if (is_perimeter(grid, x, y) && !is_corner(grid, x, y)) {
389390
sb_not_here = false;
390391
}
392+
break;
393+
case E_XY_SPECIFIED:
394+
if(x == sb_x && y == sb_y){
395+
sb_not_here = false;
396+
}
397+
398+
if(x == sb_x && sb_y == -1){
399+
sb_not_here = false;
400+
}
401+
402+
if(sb_x == -1 && y == sb_y){
403+
sb_not_here = false;
404+
}
405+
391406
break;
392407
default:
393408
VPR_FATAL_ERROR(VPR_ERROR_ARCH, "sb_not_here: unrecognized location enum: %d\n", location);

0 commit comments

Comments
 (0)