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Test #8627: Scheduled
June 5, 2024 00:44 14h 30m 23s master
June 5, 2024 00:44 14h 30m 23s
Merge pull request #2446 from verilog-to-routing/routing_constraints
Test #8621: Commit 7c79bb1 pushed by vaughnbetz
June 4, 2024 23:16 15h 57m 1s master
June 4, 2024 23:16 15h 57m 1s
Merge branch 'master' into openfpga
Test #8618: Commit d1b89e5 pushed by tangxifan
June 4, 2024 20:29 8h 26m 22s openfpga
June 4, 2024 20:29 8h 26m 22s
[WIP] Tileable Routing Resource Graph Builder
Test #8617: Pull request #2135 synchronize by tangxifan
June 4, 2024 20:29 8h 3m 33s openfpga
June 4, 2024 20:29 8h 3m 33s
June 4, 2024 20:22 17h 37m 10s
[vpr] bypass 0-fan-in node in power estimator
Test #8614: Commit 91e62d5 pushed by tangxifan
June 4, 2024 19:05 18h 55m 21s openfpga
June 4, 2024 19:05 18h 55m 21s
fixed sdc file copy and parmys abs path to temp folder issue
Test #8611: Pull request #2427 synchronize by WhiteNinjaZ
June 4, 2024 17:51 7h 44m 27s byuccl:fix_sdc
June 4, 2024 17:51 7h 44m 27s
fixed sdc file copy and parmys abs path to temp folder issue
Test #8610: Pull request #2427 synchronize by WhiteNinjaZ
June 4, 2024 17:50 10h 17m 8s byuccl:fix_sdc
June 4, 2024 17:50 10h 17m 8s