modified arithmetic-related c++ code to compile with the partial implementation of the draft standard of c++11 that gcc 4.4.x uses.

specificaly, modified:
verilog_preprocessor
generate_fir
synth (in multless_consts/verilog)

git-svn-id: https://vtr-verilog-to-routing.googlecode.com/svn/trunk@4466 8e3573b8-cf2c-4f14-ef6d-137439e28b8b

Author: golvok

verilog_preprocessor/Makefile

@@ -9,7 +9,7 @@ default: $(EXE)
 run: Md5Core.vv
 
 $(EXE): $(EXE).c++
-	g++ -Wall -Wextra -Werror -pedantic -std=c++11 $< -o $@ -ggdb -D_GLIBCXX_DEBUG
+	g++ -Wall -Wextra -Werror -pedantic -std=c++0x $< -o $@ -ggdb -D_GLIBCXX_DEBUG
 
 test: Md5Core.v
 	less $<

verilog_preprocessor/verilog_preprocessor.c++

@@ -22,6 +22,7 @@
 #include <deque>
 #include <stack>
 #include <math.h>
+#include <stdexcept>
 
 using namespace std;
 
@@ -130,9 +131,13 @@ private:
 
 void macro_expansion_pass(istream& is, ostream& os, const vector<string>& predef_macros) {
 	unordered_map<string,Macro> name2macro;
-	for (const string& predef_macro_name : predef_macros) {
-		name2macro.insert(make_pair(predef_macro_name, Macro(predef_macro_name, {}, "")));
-		os << "`define " << predef_macro_name << "\n";
+	for (
+		auto predef_macro_name = predef_macros.begin();
+		predef_macro_name != predef_macros.end();
+		++predef_macro_name
+	) {
+		name2macro.insert(make_pair(*predef_macro_name, Macro(*predef_macro_name, {}, "")));
+		os << "`define " << *predef_macro_name << "\n";
 	}
 	IfdefState ifdef_state{};
 
@@ -265,8 +270,8 @@ void module_redeclaration_pass(istream& is, ostream& os) {
 				os << '(';
 
 				bool needs_redecl = false;
-				for (auto& param : module_params) {
-					if (param.find("input ") == 0 || param.find("output ") == 0) {
+				for (auto param = module_params.begin(); param != module_params.end(); ++param) {
+					if (param->find("input ") == 0 || param->find("output ") == 0) {
 						needs_redecl = true;
 						break;
 					}
@@ -299,7 +304,6 @@ void module_redeclaration_pass(istream& is, ostream& os) {
 				if (needs_redecl) {
 					for (size_t i = 0; i < module_params.size(); ++i) {
 						string::size_type position_of_reg = string::npos;
-						string::size_type position_of_wire = string::npos;
 						if (module_param_types[i].find("output") != string::npos
 							&& (position_of_reg = module_param_types[i].find("reg")) != string::npos) {
 							// the case of an output reg
@@ -392,10 +396,14 @@ void twodim_reduction_pass_rewrite(
 	unordered_multimap<size_t,string> length2name;
 	size_t longest_name = 2;
 
-	for (const auto& name_and_size : name2size) {
-		length2name.insert(make_pair(name_and_size.first.size(),name_and_size.first));
-		if (name_and_size.first.size() > longest_name) {
-			longest_name = name_and_size.first.size();
+	for (
+		auto name_and_size = name2size.begin();
+		name_and_size != name2size.end();
+		++name_and_size
+	) {
+		length2name.insert(make_pair(name_and_size->first.size(),name_and_size->first));
+		if (name_and_size->first.size() > longest_name) {
+			longest_name = name_and_size->first.size();
 		}
 	}
 
@@ -414,8 +422,8 @@ void twodim_reduction_pass_rewrite(
 		if (!is.eof()) {
 			string comment_line = skipToNextLineIfComment(last_few_chars[0],last_few_chars[1],is);
 			if (comment_line.size() > 0) {
-				for (char c : comment_line) {
-					last_few_chars.push_back(c);
+				for (size_t i = 0; i < comment_line.size(); ++i) {
+					last_few_chars.push_back(comment_line[i]);
 				}
 				flush_buffer = true;
 				goto continue_and_ouput;
@@ -487,8 +495,8 @@ void twodim_reduction_pass_rewrite(
 
 					if (!good) {
 						last_few_chars.push_back('[');
-						for (char c : inside_brackets) {
-							last_few_chars.push_back(c);
+						for (size_t i = 0; i < inside_brackets.size(); ++i) {
+							last_few_chars.push_back(inside_brackets[i]);
 						}
 						flush_buffer = true;
 						goto continue_and_ouput;
@@ -537,10 +545,14 @@ void final_touches_pass(istream& is, ostream& os) {
 	size_t buffer_size = 0;
 	unordered_multimap<size_t,string> length2name;
 
-	for (const auto& string_to_find : ft_strings_to_find) {
-		length2name.insert(make_pair(string_to_find.first.size(),string_to_find.first));
-		if (string_to_find.first.size() > buffer_size) {
-			buffer_size = string_to_find.first.size();
+	for (
+		auto string_to_find = ft_strings_to_find.begin();
+		string_to_find != ft_strings_to_find.end();
+		++string_to_find
+	) {
+		length2name.insert(make_pair(string_to_find->first.size(),string_to_find->first));
+		if (string_to_find->first.size() > buffer_size) {
+			buffer_size = string_to_find->first.size();
 		}
 	}
 
@@ -559,8 +571,8 @@ void final_touches_pass(istream& is, ostream& os) {
 		if (!is.eof()) {
 			string comment_line = skipToNextLineIfComment(last_few_chars[0],last_few_chars[1],is);
 			if (comment_line.size() > 0) {
-				for (char c : comment_line) {
-					last_few_chars.push_back(c);
+				for (size_t i = 0; i < comment_line.size(); ++i) {
+					last_few_chars.push_back(comment_line[i]);
 				}
 				flush_buffer = true;
 				goto continue_and_ouput;
@@ -621,8 +633,8 @@ void final_touches_pass(istream& is, ostream& os) {
 				for (size_t i = 0; i < found_match.size(); ++i) {
 					last_few_chars.pop_back();
 				}
-				for (char c : output_str) {
-					last_few_chars.push_back(c);
+				for (size_t i = 0; i < output_str.size(); ++i) {
+					last_few_chars.push_back(output_str[i]);
 				}
 			}
 		}
@@ -804,10 +816,14 @@ std::pair<bool,WireInfo> WireInfo::parseWire(string& decl) {
 		);
 		success = false;
 	} else {
-		for (auto bracket_location : bracket_locations) {
+		for (
+			auto bracket_location = bracket_locations.begin();
+			bracket_location != bracket_locations.end();
+			++bracket_location
+		) {
 			string dim_decl = decl.substr(
-				bracket_location + 1,
-				decl.find_first_of("]",bracket_location) - (bracket_location + 1)
+				*bracket_location + 1,
+				decl.find_first_of("]",*bracket_location) - (*bracket_location + 1)
 			);
 			try {
 				std::pair<size_t,size_t> dim_pair = parseVectorDeclation(dim_decl);
@@ -970,7 +986,7 @@ enum class GendefineType : size_t {
 	CHOOSE_TO,
 	CHOOSE_FROM,
 	ALWAYS_LIST,
-	MOD_OP,
+	MOD_OP
 };
 
 namespace std {

vtr_flow/benchmarks/arithmetic/FIR_filters/verilog/Makefile

@@ -1,7 +1,7 @@
 ODIN=odin_II.exe
 
 generate_fir: generate_fir.c++
-	g++ -Wall -Wextra -Werror -pedantic -std=c++11 generate_fir.c++ -o generate_fir
+	g++ -Wall -Wextra -Werror -pedantic -std=c++0x generate_fir.c++ -o generate_fir
 
 test: generate_fir
 	./generate_fir | less

vtr_flow/benchmarks/arithmetic/FIR_filters/verilog/generate_fir.c++

@@ -186,14 +186,14 @@ int main(int argc, char const *argv[]) {
 		"	o_out\n"
 		");\n"
 		"	// Data Width\n"
-		"	parameter dw = %zu; //Data input/output bits\n"
+		"	parameter dw = %lu; //Data input/output bits\n"
 		"\n"
 		"	// Number of filter coefficients\n"
-		"	parameter N = %zu;\n"
-		"	parameter N_UNIQ = %zu; // ciel(N/2) assuming symmetric filter coefficients\n"
+		"	parameter N = %lu;\n"
+		"	parameter N_UNIQ = %lu; // ciel(N/2) assuming symmetric filter coefficients\n"
 		"\n"
 		"	//Number of extra valid cycles needed to align output (i.e. computation pipeline depth + input/output registers\n"
-		"	localparam N_VALID_REGS = %zu;\n"
+		"	localparam N_VALID_REGS = %lu;\n"
 		"\n"
 		"	input clk;\n"
 		"	input reset;\n"
@@ -204,12 +204,12 @@ int main(int argc, char const *argv[]) {
 		"	output [dw-1:0] o_out; // signed\n"
 		"\n"
 		"	// Data Width dervied parameters\n"
-		"	localparam dw_add_int = %zu; //Internal adder precision bits\n"
-		"	localparam dw_mult_int = %zu; //Internal multiplier precision bits\n"
-		"	localparam scale_factor = %zu; //Multiplier normalization shift amount\n"
+		"	localparam dw_add_int = %lu; //Internal adder precision bits\n"
+		"	localparam dw_mult_int = %lu; //Internal multiplier precision bits\n"
+		"	localparam scale_factor = %lu; //Multiplier normalization shift amount\n"
 		"\n"
 		"	// Number of extra registers in INPUT_PIPELINE_REG to prevent contention for CHAIN_END's chain adders\n"
-		"	localparam N_INPUT_REGS = %zu;\n"
+		"	localparam N_INPUT_REGS = %lu;\n"
 		"\n"
 		,
 		DATA_WIDTH,

vtr_flow/benchmarks/arithmetic/multless_consts/verilog/synth/Makefile

@@ -1,6 +1,6 @@
 CC=gcc
 CXX=g++
-CXXFLAGS ?= -O3 -fomit-frame-pointer -Wall -Wextra -pedantic -Werror -std=c++11
+CXXFLAGS ?= -O3 -fomit-frame-pointer -Wall -Wextra -pedantic -Werror -Wno-long-long
 CFLAGS=$(CXXFLAGS)
 LINKFLAGS=
 

vtr_flow/benchmarks/arithmetic/multless_consts/verilog/synth/arith.h

@@ -1,3 +1,5 @@
+#include <stdlib.h>
+
 inline coeff_t fundamental(coeff_t z) {
     ASSERT(z > (coeff_t)0);
     while((z & (coeff_t)1) == 0) 

vtr_flow/benchmarks/arithmetic/multless_consts/verilog/synth/chains.cpp

@@ -5,11 +5,14 @@
 int MAX_NPRINT = 5;
 bool PRINT_INSTRS = false;
 bool PRINT_CHAINS = false;
-enum { CHAINS_PLAIN, CHAINS_C } PRINT_CHAINS_MODE = CHAINS_PLAIN;
+typedef enum { CHAINS_PLAIN, CHAINS_C } t_print_chains_mode;
+t_print_chains_mode PRINT_CHAINS_MODE = CHAINS_PLAIN;
+
 bool PRINT_ALL_CHAINS = true;
 
 bool PRINT_COSTS = false;
-enum { COSTS_PLAIN, COSTS_C } PRINT_COSTS_MODE = COSTS_C;
+typedef enum { COSTS_PLAIN, COSTS_C } t_print_costs_mode;
+t_print_costs_mode PRINT_COSTS_MODE = COSTS_C;
 int MIN_SHIFT = 0;
 
 coeff_t MAX_NUM;
@@ -107,7 +110,7 @@ void insert_all_sumdiffs(cost_t dest_cost, coeff_t num1, coeff_t num2) {
 void generate_add_coeffs(cost_t src1_cost, cost_t src2_cost, cost_t dest_cost) {
     cfvec_t &src1 = COSTVECS[src1_cost];
     cfvec_t &src2 = COSTVECS[src2_cost];
-    cfvec_t &dest = COSTVECS[dest_cost];
+    // cfvec_t &dest = COSTVECS[dest_cost];
     for(cfviter_t s1 = src1.begin(); s1 != src1.end(); ++s1) {
 	for(cfviter_t s2 = src2.begin(); s2 != src2.end(); ++s2) {
 	    insert_all_sumdiffs(dest_cost, *s1, *s2);
@@ -118,7 +121,7 @@ void generate_add_coeffs(cost_t src1_cost, cost_t src2_cost, cost_t dest_cost) {
 void generate_mul_coeffs(cost_t src1_cost, cost_t src2_cost, cost_t dest_cost) {
     cfvec_t &src1 = COSTVECS[src1_cost];
     cfvec_t &src2 = COSTVECS[src2_cost];
-    cfvec_t &dest = COSTVECS[dest_cost];
+    // cfvec_t &dest = COSTVECS[dest_cost];
     for(cfviter_t s1 = src1.begin(); s1 != src1.end(); ++s1) {
 	for(cfviter_t s2 = src2.begin(); s2 != src2.end(); ++s2) {
 	    coeff_t prod = (*s1) * (*s2);
@@ -131,7 +134,7 @@ void generate_mul_coeffs(cost_t src1_cost, cost_t src2_cost, cost_t dest_cost) {
 void generate_leapfrog2(cost_t src1_cost, cost_t src2_cost, cost_t dest_cost) {
     cfvec_t &src1 = COSTVECS[src1_cost];
     cfvec_t &src2 = COSTVECS[src2_cost];
-    cfvec_t &dest = COSTVECS[dest_cost];
+    // cfvec_t &dest = COSTVECS[dest_cost];
     for(cfviter_t s1 = src1.begin(); s1 != src1.end(); ++s1) {
 	addmap_t leap1;
 	compute_all_sumdiffs(leap1, *s1, 1);
@@ -156,7 +159,7 @@ void generate_leapfrog2(cost_t src1_cost, cost_t src2_cost, cost_t dest_cost) {
 void generate_leapfrog3(cost_t src1_cost, cost_t src3_cost, cost_t dest_cost) {
     cfvec_t &src1 = COSTVECS[src1_cost];
     cfvec_t &src3 = COSTVECS[src3_cost];
-    cfvec_t &dest = COSTVECS[dest_cost];
+    // cfvec_t &dest = COSTVECS[dest_cost];
     for(cfviter_t s1 = src1.begin(); s1 != src1.end(); ++s1) {
 	addmap_t leap1;
 	compute_all_sumdiffs(leap1, *s1, 1);

vtr_flow/benchmarks/arithmetic/multless_consts/verilog/synth/cmdline.cpp

@@ -11,22 +11,20 @@
 #define xfree  free
 #define xstrdup strdup
 
-char * flatten_string_array(char** strings, int count, char *delimitor) {
-    if(count > 0) {
+char * flatten_string_array(char** strings, int count, const char* delimitor) {
 	int len = 0, i, ofs;
 	char * result;
 	for(i = 0; i < count; i++) 
 	    len += strlen(strings[i])+1;
 
 	result = (char*) xmalloc( sizeof(char) * len + 1 );
+    result[0] = '\0';
 	ofs = 0;
 	for(i = 0; i < count; i++) {
 	    if(i!=0) ofs += strlen(strings[i-1]) + 1;
 	    sprintf(result + ofs, "%s%s", strings[i], delimitor);
 	}
 	return result;
-    }
-    else return "";
 }
 
 cmdline_t * cmdline_new(int argc, char **argv) {

vtr_flow/benchmarks/arithmetic/multless_consts/verilog/synth/synth_main.cpp

@@ -1,5 +1,7 @@
 #include "synth.cpp"
 
+#include <stdio.h>
+
 reg_t tmpreg() { static int c=100; return c++; }
 reg_t destreg() { static int c=1; return c++; }
 regmap_t regs;