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[Nucleo_F4x1RE] Use HSE_BYPASS
Signed-off-by: Frederic Pillon <[email protected]>
1 parent 6aa5ee9 commit e2424f1

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2 files changed

+30
-49
lines changed

2 files changed

+30
-49
lines changed

variants/NUCLEO_F401RE/variant.cpp

+17-24
Original file line numberDiff line numberDiff line change
@@ -112,14 +112,14 @@ extern "C" {
112112
/**
113113
* @brief System Clock Configuration
114114
* The system Clock is configured as follow :
115-
* System Clock source = PLL (HSI)
115+
* System Clock source = PLL (HSE_BYPASS)
116116
* SYSCLK(Hz) = 84000000
117117
* HCLK(Hz) = 84000000
118118
* AHB Prescaler = 1
119119
* APB1 Prescaler = 2
120120
* APB2 Prescaler = 1
121-
* HSI Frequency(Hz) = 16000000
122-
* PLL_M = 16
121+
* HSE Frequency(Hz) = 8000000
122+
* PLL_M = 8
123123
* PLL_N = 336
124124
* PLL_P = 4
125125
* PLL_Q = 7
@@ -131,41 +131,34 @@ extern "C" {
131131
*/
132132
WEAK void SystemClock_Config(void)
133133
{
134-
RCC_ClkInitTypeDef RCC_ClkInitStruct;
135-
RCC_OscInitTypeDef RCC_OscInitStruct;
134+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
135+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
136136

137-
/* Enable Power Control clock */
137+
/* Configure the main internal regulator output voltage */
138138
__HAL_RCC_PWR_CLK_ENABLE();
139-
140-
/* The voltage scaling allows optimizing the power consumption when the device is
141-
clocked below the maximum system frequency, to update the voltage scaling value
142-
regarding system frequency refer to product datasheet. */
143139
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
144-
145-
/* Enable HSI Oscillator and activate PLL with HSI as source */
146-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
147-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
148-
RCC_OscInitStruct.HSICalibrationValue = 0x10;
140+
/* Initializes the CPU, AHB and APB busses clocks */
141+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
142+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
149143
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
150-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
151-
RCC_OscInitStruct.PLL.PLLM = 16;
144+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
145+
RCC_OscInitStruct.PLL.PLLM = 8;
152146
RCC_OscInitStruct.PLL.PLLN = 336;
153147
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
154148
RCC_OscInitStruct.PLL.PLLQ = 7;
155149
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
156-
/* Initialization Error */
157-
while (1);
150+
Error_Handler();
158151
}
159-
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
160-
clocks dividers */
161-
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
152+
/* Initializes the CPU, AHB and APB busses clocks */
153+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
154+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
162155
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
163156
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
164157
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
165158
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
159+
166160
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
167-
/* Initialization Error */
168-
while (1);
161+
Error_Handler();
169162
}
170163
}
171164

variants/NUCLEO_F411RE/variant.cpp

+13-25
Original file line numberDiff line numberDiff line change
@@ -112,17 +112,17 @@ extern "C" {
112112
/**
113113
* @brief System Clock Configuration
114114
* The system Clock is configured as follow :
115-
* System Clock source = PLL (HSI)
115+
* System Clock source = PLL (HSE_BYPASS)
116116
* SYSCLK(Hz) = 10000000
117117
* HCLK(Hz) = 10000000
118118
* AHB Prescaler = 1
119119
* APB1 Prescaler = 2
120120
* APB2 Prescaler = 1
121-
* HSI Frequency(Hz) = 16000000
122-
* PLL_M = 8
121+
* HSE Frequency(Hz) = 8000000
122+
* PLL_M = 4
123123
* PLL_N = 100
124-
* PLL_P = 4
125-
* PLL_Q = 2
124+
* PLL_P = 2
125+
* PLL_Q = 4
126126
* VDD(V) = 3.3
127127
* Main regulator output voltage = Scale1 mode
128128
* Flash Latency(WS) = 3
@@ -131,30 +131,24 @@ extern "C" {
131131
*/
132132
WEAK void SystemClock_Config(void)
133133
{
134-
RCC_OscInitTypeDef RCC_OscInitStruct;
135-
RCC_ClkInitTypeDef RCC_ClkInitStruct;
136-
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
134+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
135+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
137136

138137
/* Configure the main internal regulator output voltage */
139138
__HAL_RCC_PWR_CLK_ENABLE();
140-
141139
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
142-
143140
/* Initializes the CPU, AHB and APB busses clocks */
144-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE;
145-
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
146-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
147-
RCC_OscInitStruct.HSICalibrationValue = 16;
141+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
142+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
148143
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
149-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
150-
RCC_OscInitStruct.PLL.PLLM = 8;
144+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
145+
RCC_OscInitStruct.PLL.PLLM = 4;
151146
RCC_OscInitStruct.PLL.PLLN = 100;
152147
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
153148
RCC_OscInitStruct.PLL.PLLQ = 4;
154149
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
155-
_Error_Handler(__FILE__, __LINE__);
150+
Error_Handler();
156151
}
157-
158152
/* Initializes the CPU, AHB and APB busses clocks */
159153
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
160154
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
@@ -164,13 +158,7 @@ WEAK void SystemClock_Config(void)
164158
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
165159

166160
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
167-
_Error_Handler(__FILE__, __LINE__);
168-
}
169-
170-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
171-
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
172-
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
173-
_Error_Handler(__FILE__, __LINE__);
161+
Error_Handler();
174162
}
175163
}
176164
#ifdef __cplusplus

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