@@ -112,14 +112,14 @@ extern "C" {
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/* *
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* @brief System Clock Configuration
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* The system Clock is configured as follow :
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- * System Clock source = PLL (HSI )
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+ * System Clock source = PLL (HSE_BYPASS )
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* SYSCLK(Hz) = 84000000
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* HCLK(Hz) = 84000000
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* AHB Prescaler = 1
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* APB1 Prescaler = 2
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* APB2 Prescaler = 1
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- * HSI Frequency(Hz) = 16000000
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- * PLL_M = 16
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+ * HSE Frequency(Hz) = 8000000
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+ * PLL_M = 8
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* PLL_N = 336
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* PLL_P = 4
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* PLL_Q = 7
@@ -131,41 +131,34 @@ extern "C" {
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*/
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WEAK void SystemClock_Config (void )
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{
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- RCC_ClkInitTypeDef RCC_ClkInitStruct ;
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- RCC_OscInitTypeDef RCC_OscInitStruct ;
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+ RCC_OscInitTypeDef RCC_OscInitStruct = {} ;
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+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {} ;
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- /* Enable Power Control clock */
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+ /* Configure the main internal regulator output voltage */
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__HAL_RCC_PWR_CLK_ENABLE ();
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-
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- /* The voltage scaling allows optimizing the power consumption when the device is
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- clocked below the maximum system frequency, to update the voltage scaling value
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- regarding system frequency refer to product datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE2);
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-
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- /* Enable HSI Oscillator and activate PLL with HSI as source */
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- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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- RCC_OscInitStruct.HSICalibrationValue = 0x10 ;
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+ /* Initializes the CPU, AHB and APB busses clocks */
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+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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+ RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
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RCC_OscInitStruct.PLL .PLLState = RCC_PLL_ON;
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- RCC_OscInitStruct.PLL .PLLSource = RCC_PLLSOURCE_HSI ;
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- RCC_OscInitStruct.PLL .PLLM = 16 ;
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+ RCC_OscInitStruct.PLL .PLLSource = RCC_PLLSOURCE_HSE ;
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+ RCC_OscInitStruct.PLL .PLLM = 8 ;
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RCC_OscInitStruct.PLL .PLLN = 336 ;
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RCC_OscInitStruct.PLL .PLLP = RCC_PLLP_DIV4;
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RCC_OscInitStruct.PLL .PLLQ = 7 ;
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if (HAL_RCC_OscConfig (&RCC_OscInitStruct) != HAL_OK) {
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- /* Initialization Error */
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- while (1 );
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+ Error_Handler ();
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}
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- /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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- clocks dividers */
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- RCC_ClkInitStruct. ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2) ;
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+ /* Initializes the CPU, AHB and APB busses clocks */
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+ RCC_ClkInitStruct. ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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+
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if (HAL_RCC_ClockConfig (&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
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- /* Initialization Error */
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- while (1 );
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+ Error_Handler ();
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}
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}
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