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Initial C2 support (#227)
1 parent 1bdd490 commit 38097a1

17 files changed

+24693
-24465
lines changed

boards.txt

+24,566-24,413
Large diffs are not rendered by default.

cores/esp32/Esp.cpp

+3
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,9 @@ extern "C" {
4848
#include "esp32s3/rom/spi_flash.h"
4949
#include "soc/efuse_reg.h"
5050
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
51+
#elif CONFIG_IDF_TARGET_ESP32C2
52+
#include "esp32c2/rom/spi_flash.h"
53+
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000
5154
#elif CONFIG_IDF_TARGET_ESP32C3
5255
#include "esp32c3/rom/spi_flash.h"
5356
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000

cores/esp32/HardwareSerial.cpp

+8
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,8 @@
2626
#define SOC_RX0 3
2727
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
2828
#define SOC_RX0 44
29+
#elif CONFIG_IDF_TARGET_ESP32C2
30+
#define SOC_RX0 19
2931
#elif CONFIG_IDF_TARGET_ESP32C3
3032
#define SOC_RX0 20
3133
#elif CONFIG_IDF_TARGET_ESP32C6
@@ -40,6 +42,8 @@
4042
#define SOC_TX0 1
4143
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
4244
#define SOC_TX0 43
45+
#elif CONFIG_IDF_TARGET_ESP32C2
46+
#define SOC_TX0 20
4347
#elif CONFIG_IDF_TARGET_ESP32C3
4448
#define SOC_TX0 21
4549
#elif CONFIG_IDF_TARGET_ESP32C6
@@ -59,6 +63,8 @@ void serialEvent(void) {}
5963
#define RX1 9
6064
#elif CONFIG_IDF_TARGET_ESP32S2
6165
#define RX1 18
66+
#elif CONFIG_IDF_TARGET_ESP32C2
67+
#define RX1 9
6268
#elif CONFIG_IDF_TARGET_ESP32C3
6369
#define RX1 18
6470
#elif CONFIG_IDF_TARGET_ESP32S3
@@ -75,6 +81,8 @@ void serialEvent(void) {}
7581
#define TX1 10
7682
#elif CONFIG_IDF_TARGET_ESP32S2
7783
#define TX1 17
84+
#elif CONFIG_IDF_TARGET_ESP32C2
85+
#define TX1 10
7886
#elif CONFIG_IDF_TARGET_ESP32C3
7987
#define TX1 19
8088
#elif CONFIG_IDF_TARGET_ESP32S3

cores/esp32/esp32-hal-adc.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ esp_err_t __analogChannelConfig(adc_bitwidth_t width, adc_attenuation_t atten, i
9191
log_e("adc_cali_create_scheme_curve_fitting failed with error: %d", err);
9292
return err;
9393
}
94-
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
94+
#elif !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
9595
log_d("Deleting ADC_UNIT_%d line cali handle",adc_unit);
9696
err = adc_cali_delete_scheme_line_fitting(adc_cali_handle[adc_unit]);
9797
if(err != ESP_OK){
@@ -278,7 +278,7 @@ uint32_t __analogReadMilliVolts(uint8_t pin){
278278
.bitwidth = __analogWidth,
279279
};
280280
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_cali_handle[adc_unit]);
281-
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
281+
#elif !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
282282
adc_cali_line_fitting_config_t cali_config = {
283283
.unit_id = adc_unit,
284284
.bitwidth = __analogWidth,

cores/esp32/esp32-hal-cpu.c

+6-4
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "esp_attr.h"
2020
#include "esp_log.h"
2121
#include "soc/rtc.h"
22-
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
22+
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
2323
#include "soc/rtc_cntl_reg.h"
2424
#include "soc/apb_ctrl_reg.h"
2525
#endif
@@ -38,6 +38,8 @@
3838
#elif CONFIG_IDF_TARGET_ESP32S3
3939
#include "freertos/xtensa_timer.h"
4040
#include "esp32s3/rom/rtc.h"
41+
#elif CONFIG_IDF_TARGET_ESP32C2
42+
#include "esp32c2/rom/rtc.h"
4143
#elif CONFIG_IDF_TARGET_ESP32C3
4244
#include "esp32c3/rom/rtc.h"
4345
#elif CONFIG_IDF_TARGET_ESP32C6
@@ -153,7 +155,7 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
153155
}
154156

155157
static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
156-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
158+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
157159
return APB_CLK_FREQ;
158160
#else
159161
if(conf->freq_mhz >= 80){
@@ -228,7 +230,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
228230
}
229231
//Make the frequency change
230232
rtc_clk_cpu_freq_set_config_fast(&conf);
231-
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
233+
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
232234
if(capb != apb){
233235
//Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
234236
//if(conf.freq_mhz < 80){
@@ -241,7 +243,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
241243
}
242244
#endif
243245
//Update FreeRTOS Tick Divisor
244-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
246+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
245247

246248
#elif CONFIG_IDF_TARGET_ESP32S3
247249

cores/esp32/esp32-hal-i2c-slave.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw)
168168

169169
static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
170170
{
171-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
171+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
172172
return hw->sr.slave_addressed;
173173
#else
174174
return hw->status_reg.slave_addressed;
@@ -177,7 +177,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
177177

178178
static inline bool i2c_ll_slave_rw(i2c_dev_t *hw)//not exposed by hal_ll
179179
{
180-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
180+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
181181
return hw->sr.slave_rw;
182182
#else
183183
return hw->status_reg.slave_rw;

cores/esp32/esp32-hal-matrix.c

+2
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,8 @@
2424
#include "esp32s2/rom/gpio.h"
2525
#elif CONFIG_IDF_TARGET_ESP32S3
2626
#include "esp32s3/rom/gpio.h"
27+
#elif CONFIG_IDF_TARGET_ESP32C2
28+
#include "esp32c2/rom/gpio.h"
2729
#elif CONFIG_IDF_TARGET_ESP32C3
2830
#include "esp32c3/rom/gpio.h"
2931
#elif CONFIG_IDF_TARGET_ESP32C6

cores/esp32/esp32-hal-misc.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
#endif //CONFIG_BT_ENABLED
3030
#include <sys/time.h>
3131
#include "soc/rtc.h"
32-
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
32+
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
3333
#include "soc/rtc_cntl_reg.h"
3434
#include "soc/apb_ctrl_reg.h"
3535
#endif
@@ -45,6 +45,8 @@
4545
#include "esp32s2/rom/rtc.h"
4646
#elif CONFIG_IDF_TARGET_ESP32S3
4747
#include "esp32s3/rom/rtc.h"
48+
#elif CONFIG_IDF_TARGET_ESP32C2
49+
#include "esp32c2/rom/rtc.h"
4850
#elif CONFIG_IDF_TARGET_ESP32C3
4951
#include "esp32c3/rom/rtc.h"
5052
#elif CONFIG_IDF_TARGET_ESP32C6

cores/esp32/esp32-hal-rgb-led.c

+5
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,6 @@
1+
#include "soc/soc_caps.h"
2+
#if SOC_RMT_SUPPORTED
3+
14
#include "esp32-hal-rgb-led.h"
25

36

@@ -42,3 +45,5 @@ void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue
4245
}
4346
rmtWrite(_pin, led_data, RMT_SYMBOLS_OF(led_data), RMT_WAIT_FOR_EVER);
4447
}
48+
49+
#endif /* SOC_RMT_SUPPORTED */

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