diff --git a/cores/arduino/chip.h b/cores/arduino/chip.h
index df828d9d09..d4bcdc90a0 100644
--- a/cores/arduino/chip.h
+++ b/cores/arduino/chip.h
@@ -38,6 +38,8 @@
#include "usb_interface.h"
#endif //USBCON
+#include "ethernet.h"
+
/* Define attribute */
#if defined ( __GNUC__ ) /* GCC CS3 */
#define WEAK __attribute__ ((weak))
diff --git a/cores/arduino/main.cpp b/cores/arduino/main.cpp
index 5b44fe9e62..2d7589cc36 100644
--- a/cores/arduino/main.cpp
+++ b/cores/arduino/main.cpp
@@ -45,6 +45,9 @@ int main( void )
for (;;)
{
+ // Define by Ethernet library. It is defined as __weak.
+ stm32_eth_scheduler();
+
loop();
if (serialEventRun) serialEventRun();
}
diff --git a/cores/arduino/stm32/PeripheralPins.h b/cores/arduino/stm32/PeripheralPins.h
index 996dd2af4a..5f68d2f09c 100644
--- a/cores/arduino/stm32/PeripheralPins.h
+++ b/cores/arduino/stm32/PeripheralPins.h
@@ -62,5 +62,8 @@ extern const PinMap PinMap_SPI_SSEL[];
extern const PinMap PinMap_CAN_RD[];
extern const PinMap PinMap_CAN_TD[];
+//*** ETHERNET ***
+extern const PinMap PinMap_Ethernet[];
+
#endif
diff --git a/cores/arduino/stm32/ethernet.h b/cores/arduino/stm32/ethernet.h
new file mode 100644
index 0000000000..7fffd68835
--- /dev/null
+++ b/cores/arduino/stm32/ethernet.h
@@ -0,0 +1,69 @@
+/**
+ ******************************************************************************
+ * @file ethernet.h
+ * @author WI6LABS
+ * @version V1.0.0
+ * @date 14-June-2017
+ * @brief Header for ethernet background task for LwIP stack.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT(c) 2016 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __ETHERNET_H
+#define __ETHERNET_H
+
+/* Includes ------------------------------------------------------------------*/
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+/* This function is defined by the NativeEthernet library and it is used as
+background task inside the main loop. */
+__weak void stm32_eth_scheduler(void)
+{
+ /* NOTE : This function should not be modified. It is defined in the Ethernet
+ library.
+ */
+}
+
+void stm32_eth_scheduler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ETHERNET_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/cores/arduino/stm32/pinmap.c b/cores/arduino/stm32/pinmap.c
index 4a6402d713..fcdf0c635b 100644
--- a/cores/arduino/stm32/pinmap.c
+++ b/cores/arduino/stm32/pinmap.c
@@ -82,3 +82,11 @@ void* pinmap_merge_peripheral(void* a, void* b) {
// error("pinmap mis-match");
return NP;
}
+
+PinName pin_pinName(const PinMap* map) {
+ if(map->pin != (PinName)NC) {
+ return map->pin;
+ } else {
+ return (PinName)NC;
+ }
+}
diff --git a/cores/arduino/stm32/pinmap.h b/cores/arduino/stm32/pinmap.h
index 88af8afbc5..58344fdca9 100644
--- a/cores/arduino/stm32/pinmap.h
+++ b/cores/arduino/stm32/pinmap.h
@@ -39,6 +39,8 @@ typedef struct {
bool pin_in_pinmap(PinName pin, const PinMap* map);
void pin_function(PinName pin, int function);
+PinName pin_pinName(const PinMap* map);
+
void* pinmap_peripheral(PinName pin, const PinMap* map);
uint32_t pinmap_function(PinName pin, const PinMap* map);
void* pinmap_find_peripheral(PinName pin, const PinMap* map);
diff --git a/platform.txt b/platform.txt
index 646c7f09eb..57514237f7 100644
--- a/platform.txt
+++ b/platform.txt
@@ -10,7 +10,7 @@ version=1.0.0
# STM compile variables
# ----------------------
-compiler.stm.extra_include="-I{build.core.path}/avr" "-I{build.core.path}/stm32" "-I{build.system.path}/Drivers/{build.series}_HAL_Driver/Inc/" "-I{build.system.path}/Drivers/{build.series}_HAL_Driver/Src/" "-I{build.system.path}/{build.series}/" "-I{build.variant.path}/usb" "-I{build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc" "-I{build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core/Src"
+compiler.stm.extra_include="-I{build.core.path}/avr" "-I{build.core.path}/stm32" "-I{build.system.path}/Drivers/{build.series}_HAL_Driver/Inc/" "-I{build.system.path}/Drivers/{build.series}_HAL_Driver/Src/" "-I{build.system.path}/{build.series}/" "-I{build.variant.path}/usb" "-I{build.variant.path}/Ethernet" "-I{build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc" "-I{build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core/Src"
# "-I{build.system.path}/Drivers/BSP/Components" "-I{build.system.path}/Middlewares/Third_Party/FatFs/src" "-I{build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core/Src" "-I{build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Class/HID/Inc"
diff --git a/variants/NUCLEO_F429ZI/Ethernet/lwipopts.h b/variants/NUCLEO_F429ZI/Ethernet/lwipopts.h
new file mode 100644
index 0000000000..ae718cba6a
--- /dev/null
+++ b/variants/NUCLEO_F429ZI/Ethernet/lwipopts.h
@@ -0,0 +1,251 @@
+/**
+ ******************************************************************************
+ * @file LwIP/LwIP_HTTP_Server_Raw/Inc/lwipopts.h
+ * @author MCD Application Team
+ * @version V1.5.0
+ * @date 17-February-2017
+ * @brief lwIP Options Configuration.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics International N.V.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted, provided that the following conditions are met:
+ *
+ * 1. Redistribution of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of other
+ * contributors to this software may be used to endorse or promote products
+ * derived from this software without specific written permission.
+ * 4. This software, including modifications and/or derivative works of this
+ * software, must execute solely and exclusively on microcontroller or
+ * microprocessor devices manufactured by or for STMicroelectronics.
+ * 5. Redistribution and use of this software other than as permitted under
+ * this license is void and will automatically terminate your rights under
+ * this license.
+ *
+ * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+ * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+ * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
+ * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+/**
+ * NO_SYS==1: Provides VERY minimal functionality. Otherwise,
+ * use lwIP facilities.
+ */
+#define NO_SYS 1
+
+/**
+ * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
+ * critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#define SYS_LIGHTWEIGHT_PROT 0
+
+/* ---------- Memory options ---------- */
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
+ lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
+ byte alignment -> define MEM_ALIGNMENT to 2. */
+#define MEM_ALIGNMENT 4
+
+/* MEM_SIZE: the size of the heap memory. If the application will send
+a lot of data that needs to be copied, this should be set high. */
+#define MEM_SIZE (10*1024)
+
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
+ sends a lot of data out of ROM (or other static memory), this
+ should be set high. */
+#define MEMP_NUM_PBUF 10
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+ per active UDP "connection". */
+#define MEMP_NUM_UDP_PCB 6
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
+ connections. */
+#define MEMP_NUM_TCP_PCB 10
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
+ connections. */
+#define MEMP_NUM_TCP_PCB_LISTEN 6
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+ segments. */
+#define MEMP_NUM_TCP_SEG 8
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
+ timeouts. */
+#define MEMP_NUM_SYS_TIMEOUT 10
+
+
+/* ---------- Pbuf options ---------- */
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
+#define PBUF_POOL_SIZE 8
+
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
+#define PBUF_POOL_BUFSIZE 1524
+
+
+/* ---------- TCP options ---------- */
+#define LWIP_TCP 1
+#define TCP_TTL 255
+
+/* Controls if TCP should queue segments that arrive out of
+ order. Define to 0 if your device is low on memory. */
+#define TCP_QUEUE_OOSEQ 0
+
+/* TCP Maximum segment size. */
+#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
+
+/* TCP sender buffer space (bytes). */
+#define TCP_SND_BUF (4*TCP_MSS)
+
+/* TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
+ as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
+
+#define TCP_SND_QUEUELEN (2* TCP_SND_BUF/TCP_MSS)
+
+/* TCP receive window. */
+#define TCP_WND (2*TCP_MSS)
+
+
+/* ---------- ICMP options ---------- */
+#define LWIP_ICMP 1
+
+
+/* ---------- DHCP options ---------- */
+#define LWIP_DHCP 1
+
+/* ---------- DNS options ---------- */
+#define LWIP_DNS 1
+
+
+/* ---------- UDP options ---------- */
+#define LWIP_UDP 1
+#define UDP_TTL 255
+
+
+/* ---------- Statistics options ---------- */
+#define LWIP_STATS 0
+
+/* ---------- link callback options ---------- */
+/* LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
+ * whenever the link changes (i.e., link down)
+ */
+#define LWIP_NETIF_LINK_CALLBACK 1
+
+/*
+ --------------------------------------
+ ---------- Checksum options ----------
+ --------------------------------------
+*/
+
+/*
+The STM32F4x7 allows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware:
+ - To use this feature let the following define uncommented.
+ - To disable it and process by CPU comment the the checksum.
+*/
+#define CHECKSUM_BY_HARDWARE
+
+
+#ifdef CHECKSUM_BY_HARDWARE
+ /* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
+ #define CHECKSUM_GEN_IP 0
+ /* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
+ #define CHECKSUM_GEN_UDP 0
+ /* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
+ #define CHECKSUM_GEN_TCP 0
+ /* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
+ #define CHECKSUM_CHECK_IP 0
+ /* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
+ #define CHECKSUM_CHECK_UDP 0
+ /* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
+ #define CHECKSUM_CHECK_TCP 0
+ /* CHECKSUM_CHECK_ICMP==0: Check checksums by hardware for incoming ICMP packets.*/
+ #define CHECKSUM_GEN_ICMP 0
+#else
+ /* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
+ #define CHECKSUM_GEN_IP 1
+ /* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
+ #define CHECKSUM_GEN_UDP 1
+ /* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
+ #define CHECKSUM_GEN_TCP 1
+ /* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
+ #define CHECKSUM_CHECK_IP 1
+ /* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
+ #define CHECKSUM_CHECK_UDP 1
+ /* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
+ #define CHECKSUM_CHECK_TCP 1
+ /* CHECKSUM_CHECK_ICMP==1: Check checksums by hardware for incoming ICMP packets.*/
+ #define CHECKSUM_GEN_ICMP 1
+#endif
+
+
+/*
+ ----------------------------------------------
+ ---------- Sequential layer options ----------
+ ----------------------------------------------
+*/
+/**
+ * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
+ */
+#define LWIP_NETCONN 0
+
+/*
+ ------------------------------------
+ ---------- Socket options ----------
+ ------------------------------------
+*/
+/**
+ * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
+ */
+#define LWIP_SOCKET 0
+
+/*
+ ------------------------------------
+ ---------- httpd options ----------
+ ------------------------------------
+*/
+
+/** Set this to 1 to support CGI */
+#define LWIP_HTTPD_CGI 1
+
+/** Set this to 1 to support SSI (Server-Side-Includes) */
+#define LWIP_HTTPD_SSI 1
+
+/** Set this to 1 to include "fsdata_custom.c" instead of "fsdata.c" for the
+ * file system (to prevent changing the file included in CVS) */
+#define HTTPD_USE_CUSTOM_FSDATA 1
+
+/*
+ ------------------------------------
+ ---------- Custom options ----------
+ ------------------------------------
+*/
+
+/** Enables the Ethernet peripheral in RMII mode. If not defined, MII mode will
+ be enabled. Pin mapping must be configured for the selected mode
+ (see PinMap_Ethernet in PeripheralPins.c). */
+#define ETHERNET_RMII_MODE_CONFIGURATION 1
+
+/** Uncomment this line to use the ethernet input in interrupt mode.
+ * NOTE: LwIP stack documentation recommends to use the polling mode without
+ * an operating system. */
+//#define ETH_INPUT_USE_IT 1
+
+#endif /* __LWIPOPTS_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/variants/NUCLEO_F429ZI/PeripheralPins.c b/variants/NUCLEO_F429ZI/PeripheralPins.c
index 808c5fb595..a925b53155 100644
--- a/variants/NUCLEO_F429ZI/PeripheralPins.c
+++ b/variants/NUCLEO_F429ZI/PeripheralPins.c
@@ -337,3 +337,36 @@ const PinMap PinMap_CAN_TD[] = {
{PD1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
{NC, NP, 0}
};
+
+//*** Ethernet ***
+
+/* Configured for RMII mapping */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+const PinMap PinMap_Ethernet[] = {
+ // {PA0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
+ {PA1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
+ {PA2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
+ // {PA3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
+ {PA7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
+ // {PB0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
+ // {PB1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
+ // {PB5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
+ // {PB8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+ // {PB10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
+ // {PB11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
+ // {PB12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
+ {PB13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
+ {PC1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
+ // {PC2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
+ // {PC3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
+ {PC4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
+ {PC5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
+ // {PE2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+ // {PG8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
+ {PG11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
+ {PG13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
+ // {PG14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
+ {NC, NP, 0}
+};
+#endif
diff --git a/variants/NUCLEO_F429ZI/stm32f4xx_hal_conf.h b/variants/NUCLEO_F429ZI/stm32f4xx_hal_conf.h
index 81db646843..a1b0ab3776 100644
--- a/variants/NUCLEO_F429ZI/stm32f4xx_hal_conf.h
+++ b/variants/NUCLEO_F429ZI/stm32f4xx_hal_conf.h
@@ -62,7 +62,7 @@
// #define HAL_DCMI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
// #define HAL_DMA2D_MODULE_ENABLED
-// #define HAL_ETH_MODULE_ENABLED
+#define HAL_ETH_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
// #define HAL_NAND_MODULE_ENABLED
// #define HAL_NOR_MODULE_ENABLED
@@ -186,13 +186,12 @@
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
-#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
-#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
+#define ETH_RXBUFNB (5U) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
+#define ETH_TXBUFNB (5U) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS 0x01U
+/* LAN8742A PHY Address*/
+#define LAN8742A_PHY_ADDRESS 0x00U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY 0x000000FFU
/* PHY Configuration delay */
@@ -223,19 +222,15 @@
/* Section 4: Extended PHY Registers */
-#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */
-#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */
-#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */
+#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */
-#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
-#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
-#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
+#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */
+#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */
-#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
-#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
-#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
-#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
+#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */
+#define PHY_IMR ((uint16_t)0x1E) /*!< PHY Interrupt Mask register Offset */
+#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */
/* ################## SPI peripheral configuration ########################## */