From d0022d7ac36a9fe437a0db81bc66ef1e6a4ea93e Mon Sep 17 00:00:00 2001 From: "Frederic.Pillon" Date: Fri, 18 May 2018 13:46:53 +0200 Subject: [PATCH] [Disco-L475VG] Fix SystemClock_Config PLLM to 6 is not possible with PLLN set to 40. Fix USB clock to have 48MHz instead of MSI one Signed-off-by: Frederic.Pillon --- variants/DISCO_L475VG_IOT/variant.cpp | 35 ++++++++++++++++++--------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/variants/DISCO_L475VG_IOT/variant.cpp b/variants/DISCO_L475VG_IOT/variant.cpp index fdc4cf817b..5cb3111860 100644 --- a/variants/DISCO_L475VG_IOT/variant.cpp +++ b/variants/DISCO_L475VG_IOT/variant.cpp @@ -173,17 +173,17 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.MSICalibrationValue = 0; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; - RCC_OscInitStruct.PLL.PLLM = 6; + RCC_OscInitStruct.PLL.PLLM = 1; RCC_OscInitStruct.PLL.PLLN = 40; RCC_OscInitStruct.PLL.PLLP = 7; - RCC_OscInitStruct.PLL.PLLQ = 4; - RCC_OscInitStruct.PLL.PLLR = 4; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - while(1); + Error_Handler(); } RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK @@ -195,29 +195,42 @@ WEAK void SystemClock_Config(void) if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { - while(1); + Error_Handler(); } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_UART4 - |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_I2C2 + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2 + |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4 + |RCC_PERIPHCLK_UART5|RCC_PERIPHCLK_I2C1 + |RCC_PERIPHCLK_I2C2|RCC_PERIPHCLK_DFSDM1 |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_ADC; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1; + PeriphClkInit.Uart5ClockSelection = RCC_UART5CLKSOURCE_PCLK1; PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_SYSCLK; - PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_MSI; + PeriphClkInit.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_PCLK; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 24; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { - while(1); + Error_Handler(); } /**Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { - while(1); + Error_Handler(); } /**Configure the Systick interrupt time