From 43dec914b9cff870a7afee3b89ac09036d830e85 Mon Sep 17 00:00:00 2001
From: Cedric Honnet <honnet@telecom-paristech.org>
Date: Wed, 15 Mar 2023 14:16:36 +0100
Subject: [PATCH 1/2] Add STM32C011D6 support.
---
boards.txt | 8 +
cmake/boards_db.cmake | 86 +++++++++
.../boards_entry.txt | 6 +
.../ldscript.ld | 173 ++++++++++++++++++
.../variant_generic.cpp | 45 +++++
5 files changed, 318 insertions(+)
create mode 100644 variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/ldscript.ld
diff --git a/boards.txt b/boards.txt
index 69e3e759bf..c672f65851 100644
--- a/boards.txt
+++ b/boards.txt
@@ -1143,6 +1143,14 @@ GenC0.build.st_extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=
GenC0.upload.maximum_size=0
GenC0.upload.maximum_data_size=0
+# Generic C011D6YX
+GenC0.menu.pnum.GENERIC_C011D6YX=Generic C011D6Yx
+GenC0.menu.pnum.GENERIC_C011D6YX.upload.maximum_size=32768
+GenC0.menu.pnum.GENERIC_C011D6YX.upload.maximum_data_size=6144
+GenC0.menu.pnum.GENERIC_C011D6YX.build.board=GENERIC_C011D6YX
+GenC0.menu.pnum.GENERIC_C011D6YX.build.product_line=STM32C011xx
+GenC0.menu.pnum.GENERIC_C011D6YX.build.variant=STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P
+
# Generic C031C4Tx
GenC0.menu.pnum.GENERIC_C031C4TX=Generic C031C4Tx
GenC0.menu.pnum.GENERIC_C031C4TX.upload.maximum_size=16384
diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake
index b8bab7f719..517c778d67 100644
--- a/cmake/boards_db.cmake
+++ b/cmake/boards_db.cmake
@@ -6766,6 +6766,92 @@ target_compile_options(GENERIC_C031C6UX_serial_none INTERFACE
"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
)
+# GENERIC_C011D6YX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C011D6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P")
+set(GENERIC_C011D6YX_MAXSIZE 32768)
+set(GENERIC_C011D6YX_MAXDATASIZE 12288)
+set(GENERIC_C011D6YX_MCU cortex-m0plus)
+set(GENERIC_C011D6YX_FPCONF "-")
+add_library(GENERIC_C011D6YX INTERFACE)
+target_compile_options(GENERIC_C011D6YX INTERFACE
+ "SHELL:"
+ "SHELL:"
+ "SHELL:"
+ "SHELL: "
+ -mcpu=${GENERIC_C011D6YX_MCU}
+)
+target_compile_definitions(GENERIC_C011D6YX INTERFACE
+ "STM32C0xx"
+ "ARDUINO_GENERIC_C011D6YX"
+ "BOARD_NAME=\"GENERIC_C011D6YX\""
+ "BOARD_ID=GENERIC_C011D6YX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C011D6YX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+ ${GENERIC_C011D6YX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C011D6YX INTERFACE
+ "LINKER:--default-script=${GENERIC_C011D6YX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0"
+ "LINKER:--defsym=LD_MAX_SIZE=32768"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=12288"
+ "SHELL: "
+ -mcpu=${GENERIC_C011D6YX_MCU}
+)
+target_link_libraries(GENERIC_C011D6YX INTERFACE
+ arm_cortexM0l_math
+)
+
+add_library(GENERIC_C011D6YX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C011D6YX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_C011D6YX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C011D6YX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C011D6YX_serial_none INTERFACE)
+target_compile_options(GENERIC_C011D6YX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+# TODO: use following inspiration from other board?
+# add_library(NUCLEO_C031C6_usb_CDC INTERFACE)
+# target_compile_options(NUCLEO_C031C6_usb_CDC INTERFACE
+# "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+# )
+# add_library(NUCLEO_C031C6_usb_CDCgen INTERFACE)
+# target_compile_options(NUCLEO_C031C6_usb_CDCgen INTERFACE
+# "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+# )
+# add_library(NUCLEO_C031C6_usb_HID INTERFACE)
+# target_compile_options(NUCLEO_C031C6_usb_HID INTERFACE
+# "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+# )
+# add_library(NUCLEO_C031C6_usb_none INTERFACE)
+# target_compile_options(NUCLEO_C031C6_usb_none INTERFACE
+# "SHELL:"
+# )
+# add_library(NUCLEO_C031C6_xusb_FS INTERFACE)
+# target_compile_options(NUCLEO_C031C6_xusb_FS INTERFACE
+# "SHELL:"
+# )
+# add_library(NUCLEO_C031C6_xusb_HS INTERFACE)
+# target_compile_options(NUCLEO_C031C6_xusb_HS INTERFACE
+# "SHELL:-DUSE_USB_HS"
+# )
+# add_library(NUCLEO_C031C6_xusb_HSFS INTERFACE)
+# target_compile_options(NUCLEO_C031C6_xusb_HSFS INTERFACE
+# "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+# )
+
# GENERIC_F030C6TX
# -----------------------------------------------------------------------------
diff --git a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/boards_entry.txt b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/boards_entry.txt
index 0d6ec0346f..a69f04f132 100644
--- a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/boards_entry.txt
+++ b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/boards_entry.txt
@@ -4,12 +4,18 @@
# See: https://github.com/stm32duino/Arduino_Core_STM32/wiki/Add-a-new-variant-%28board%29
# Generic C011D6Yx
+
GenC0.menu.pnum.GENERIC_C011D6YX=Generic C011D6Yx
+GenC0.menu.pnum.GENERIC_C011D6YX.node="No_mass_storage_for_this_board_Use_STLink_upload_method"
GenC0.menu.pnum.GENERIC_C011D6YX.upload.maximum_size=32768
GenC0.menu.pnum.GENERIC_C011D6YX.upload.maximum_data_size=6144
+GenC0.menu.pnum.GENERIC_C011D6YX.build.mcu=cortex-m0plus
GenC0.menu.pnum.GENERIC_C011D6YX.build.board=GENERIC_C011D6YX
+GenC0.menu.pnum.GENERIC_C011D6YX.build.series=STM32C0xx
GenC0.menu.pnum.GENERIC_C011D6YX.build.product_line=STM32C011xx
GenC0.menu.pnum.GENERIC_C011D6YX.build.variant=STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P
+GenC0.menu.pnum.GENERIC_C011D6YX.build.cmsis_lib_gcc=arm_cortexM0l_math
+GenC0.menu.pnum.GENERIC_C011D6YX.build.extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0
# Generic C011F4Px
GenC0.menu.pnum.GENERIC_C011F4PX=Generic C011F4Px
diff --git a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/ldscript.ld b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/ldscript.ld
new file mode 100644
index 0000000000..c04eda55e2
--- /dev/null
+++ b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/ldscript.ld
@@ -0,0 +1,173 @@
+/**
+ ******************************************************************************
+ * @file LinkerScript.ld
+ * @author Modified from auto-generated file
+ * Abstract : Linker script for STM32C011D6Yx Device from stm32c0 series
+ * 32Kbytes FLASH
+ * 6Kbytes RAM
+ *
+ * Set heap size, stack size and stack location according
+ * to application requirements.
+ *
+ * Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.cpp b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.cpp
index b876310983..1c1badfee1 100644
--- a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.cpp
+++ b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.cpp
@@ -15,6 +15,7 @@
defined(ARDUINO_GENERIC_C011F6UX) || defined(ARDUINO_GENERIC_C031F4PX) ||\
defined(ARDUINO_GENERIC_C031F6PX)
#include "pins_arduino.h"
+#include "stm32yyxx_ll_utils.h"
// Digital PinName array
const PinName digitalPin[] = {
@@ -57,4 +58,48 @@ const uint32_t analogInputPin[] = {
12 // A12, PA14
};
+// ----------------------------------------------------------------------------
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief System Clock Configuration
+ * @param None
+ * @retval None
+ */
+// Removed the "WEAK" symbol as some of the following settings were overwritten
+void SystemClock_Config(void)
+{
+ LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
+
+ /* HSI configuration and activation */
+ LL_RCC_HSI_Enable();
+ while (LL_RCC_HSI_IsReady() != 1) {
+ }
+
+ LL_RCC_HSI_SetCalibTrimming(64);
+ LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1);
+ /* Set AHB prescaler*/
+ LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
+
+ /* Sysclk activation on the HSI */
+ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
+ while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) {
+ }
+
+ /* Set APB1 prescaler*/
+ LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
+ /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
+ LL_SetSystemCoreClock(48000000);
+
+ /* Update the time base */
+ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) {
+ Error_Handler();
+ }
+}
+
+#ifdef __cplusplus
+}
+#endif
#endif /* ARDUINO_GENERIC_* */
From 07d9043559e3e6d58ac2e371fc96aca61ea0b0d6 Mon Sep 17 00:00:00 2001
From: Cedric Honnet <honnet@telecom-paristech.org>
Date: Tue, 4 Apr 2023 20:49:43 -0400
Subject: [PATCH 2/2] STM32C0116-DK: adapt UART pins.
---
.../C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.h b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.h
index 19778f9b5b..95ab6845f8 100644
--- a/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.h
+++ b/variants/STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P/variant_generic.h
@@ -126,10 +126,10 @@
// Default pin used for generic 'Serial' instance
// Mandatory for Firmata
#ifndef PIN_SERIAL_RX
- #define PIN_SERIAL_RX PA1
+ #define PIN_SERIAL_RX PA10_R
#endif
#ifndef PIN_SERIAL_TX
- #define PIN_SERIAL_TX PA0
+ #define PIN_SERIAL_TX PA9_R
#endif
/*----------------------------------------------------------------------------