diff --git a/.github/workflows/Cmake.yml b/.github/workflows/Cmake.yml new file mode 100644 index 0000000000..f136ea76c2 --- /dev/null +++ b/.github/workflows/Cmake.yml @@ -0,0 +1,29 @@ +name: CMake config and build + +on: + push: + branches: + - main + pull_request: + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: +jobs: + cmake: + name: Check CMake usage + runs-on: ubuntu-latest + + steps: + - name: Checkout + uses: actions/checkout@main + + - name: Get latest CMake and Ninja + uses: lukka/get-cmake@latest + + - name: Configure + run: | + mkdir build + cmake -S CI/build/examples/BareMinimum -B ./build -G Ninja + + - name: Build example + working-directory: '${{ github.workspace }}/build' + run: ninja diff --git a/CI/build/examples/BareMinimum/CMakeLists.txt b/CI/build/examples/BareMinimum/CMakeLists.txt new file mode 100644 index 0000000000..9e816bee74 --- /dev/null +++ b/CI/build/examples/BareMinimum/CMakeLists.txt @@ -0,0 +1,48 @@ +# This file was autogenerated by cmake\scripts\cmake_easy_setup.py. +# Use it in your CMake configuration by `include()`'ing it. +# You can also copy it in your sketch's folder and edit it to fit your project. + +cmake_minimum_required(VERSION 3.21) + +# STEP 1: set up bases of environment +# ----------------------------------------------------------------------------- + +file(REAL_PATH "../../../../" CORE_PATH EXPAND_TILDE) +file(TO_CMAKE_PATH "${CORE_PATH}" CORE_PATH) + +set(BOARDNAME "NUCLEO_F103RB") + +list(APPEND CMAKE_MODULE_PATH ${CORE_PATH}/cmake) +set(CMAKE_TOOLCHAIN_FILE toolchain) + + +# You may remove this block when using this file as the sketch's CMakeLists.txt +if (NOT ${CMAKE_PARENT_LIST_FILE} STREQUAL ${CMAKE_CURRENT_LIST_FILE}) + # When we are imported from the main CMakeLists.txt, we should stop here + # not to interfere with the true build config. + return() +endif() + +project("BareMinimum_project") + +# STEP 2: configure the build +# ----------------------------------------------------------------------------- +include(set_board) +set_board("${BOARDNAME}") + +include(overall_settings) +overall_settings() + +include(build_sketch) +build_sketch(TARGET "BareMinimum" + SOURCES + BareMinimum.ino + DEPENDS + CMSIS_DSP + EEPROM + IWatchdog + Servo + SoftwareSerial + SPI + Wire +) diff --git a/README_CMAKE.md b/README_CMAKE.md new file mode 100644 index 0000000000..c29e7a26c0 --- /dev/null +++ b/README_CMAKE.md @@ -0,0 +1,66 @@ +CMake can now be used to build Arduino sketches with this core. +Examples of use can be found on this repo: [stm32duino/CMake_workspace](https://github.com/stm32duino/CMake_workspace). + +This README only provides a quick walk-through. +For all the glorious details, please head over to [the wiki](https://github.com/stm32duino/wiki/wiki/CMake_presentation). + +# Prerequisites + +- CMake version >= 3.21 +- Python3 version >= 3.9 +- `make` / `ninja` (prefer `ninja`) +- graphviz layout engines: `dot`, `sfdp` (optional) +- Python modules: `graphviz`, `jinja2`; install them with `pip install ...` + +Some additional dependencies (toolchain...) will be downloaded on the first build. + +If your system does not provide a recent enough version of CMake, a suitable version may be installed with [`pip`](https://pypi.org/): `pip install cmake`. + +# Usage + +This section will describe the process of building a sketch "by hand", with a system shell. Other methods, such as with an IDE plug-in, may require adaptations. + +Please see [stm32duino/CMake_workspace](https://github.com/stm32duino/CMake_workspace) for some quick examples; more may be added over time. + +First of all, there has to be a CMakeLists.txt in the sketch folder. + +- easy way: fire `cmake/scripts/cmake_easy_setup.py -b -s ` (this requires arduino-cli and jinja) +- advanced way: write your own by adapting from an example + +-------- + +__Board name__: either through the script or directly in the CMakeLists.txt, the board name is the identifier found in boards.txt. (Yes, CMake is made aware of boards.txt/platform.txt.) +In the following example, the value to retain would be "NUCLEO_F207ZG" (the part after "menu.pnum."): +``` +# NUCLEO_F207ZG board +Nucleo_144.menu.pnum.NUCLEO_F207ZG=Nucleo F207ZG +Nucleo_144.menu.pnum.NUCLEO_F207ZG.node=NODE_F207ZG +``` + +-------- + +Then CMake can be run to launch the configuration step. This is only needed on the very first time, at the beginning of the project. +```sh +cmake -S [sketch folder] -B [build folder] -G Ninja # "-G Ninja" -> generate ninja files (default = make) +``` +The build folder is conventionally located at the root of the sketch folder and named `build`, e.g. : +``` +. +|-- Blink/ +| |-- Blink.ino +| |-- CMakeLists.txt +| `-- build/ +``` + +Finally, the sketch can be (re-)built with `cmake --build `. +This can also be done by invoking the build tool (usually `make` or `ninja`) directly from the build folder. +**This last step is the only one needed in order to rebuild the project, even if some source files, or even the CMakeLists.txt, have changed.** + +For more details on how to use CMake, please read the CMake [User Interaction Guide](https://cmake.org/cmake/help/v3.21/guide/user-interaction/index.html). + +The official [CMake tutorial](https://cmake.org/cmake/help/latest/guide/tutorial/index.html) may also be useful for users looking to understand all the implementation details. + +# Caveats + +- The CMake build model makes it hard to auto-detect dependencies between the sketch and the Arduino libraries, and between Arduino libraries. Thus, you have to specify them manually; see the examples to see how. +- Uploading the binaries to the board is not implemented; this step is up to you, using the appropriate tool. If your board supports the "mass storage" method, you can simply copy the .bin file to your board drive in the file explorer. diff --git a/cmake/FindArduinoCtags.cmake b/cmake/FindArduinoCtags.cmake new file mode 100644 index 0000000000..50d58f58fa --- /dev/null +++ b/cmake/FindArduinoCtags.cmake @@ -0,0 +1,81 @@ +cmake_minimum_required(VERSION 3.21) +include(FetchContent) +include(FindPackageHandleStandardArgs) + +function(get_ctags) + cmake_host_system_information( + RESULT HOSTINFO + QUERY OS_NAME OS_PLATFORM + ) + list(GET HOSTINFO 0 HOST_OS) + list(GET HOSTINFO 1 HOST_ARCH) + + unset(CPUCODE) + string(TOUPPER ${HOST_ARCH} HOST_ARCH) + if (${HOST_ARCH} MATCHES "^(AMD64|X86_64|x64)$") + set(CPUCODE "x86_64") + elseif (${HOST_ARCH} MATCHES "^(ARM|ARM64)$") + # not sure there, am I specific enough? + set(CPUCODE "armv6") + elseif (${HOST_ARCH} MATCHES "^(I386|IA32|x86|i686)$") + set(CPUCODE "i686") + endif() + + unset(OSCODE) + unset(ARCHIVE_EXT) + if (${HOST_OS} STREQUAL "Linux") + if(${CPUCODE} STREQUAL "armv6") + set(OSCODE "linux-gnueabihf") + # ... I guess? Is there any further check to perform? + else() + set(OSCODE "pc-linux-gnu") + endif() + set(ARCHIVE_EXT ".tar.bz2") + elseif (${HOST_OS} STREQUAL "Windows") + if(${CPUCODE} MATCHES "i686|x86_64") + # ctags supports only 32-bit for Windows + set(CPUCODE "i686") + set(OSCODE "mingw32") + set(ARCHIVE_EXT ".zip") + endif() + elseif (${HOST_OS} STREQUAL "Darwin") + if(${CPUCODE} STREQUAL "x86_64") + set(OSCODE "apple-darwin") + set(ARCHIVE_EXT ".zip") + endif() + endif() + + # the SHA512 file is of the form "hash_in_hexa filename" + if(NOT EXISTS ${DL_DIR}/ctags_sha512.txt) + file(DOWNLOAD + "https://github.com/arduino/ctags/releases/download/5.8-arduino11/ctags-5.8-arduino11-${CPUCODE}-${OSCODE}${ARCHIVE_EXT}.sha512" + ${DL_DIR}/ctags_sha512.txt + ) + endif() + file(READ ${DL_DIR}/ctags_sha512.txt CHECKSUM_FULLTEXT) + string(SUBSTRING "${CHECKSUM_FULLTEXT}" 0 128 CHECKSUM) # keep just the hash; 512 bits make 128 hex characters + + FetchContent_Declare( + ctags + SOURCE_DIR ${DL_DIR}/dist/ctags + PREFIX ${DL_DIR} + URL "https://github.com/arduino/ctags/releases/download/5.8-arduino11/ctags-5.8-arduino11-${CPUCODE}-${OSCODE}${ARCHIVE_EXT}" + URL_HASH SHA512=${CHECKSUM} + UPDATE_DISCONNECTED + ) + message(STATUS "Downloading Arduino's ctags...") + FetchContent_MakeAvailable(ctags) + message(STATUS "Downloading Arduino's ctags... Done.") +endfunction() + +# ------------------------------------------------------------------------------- + +if(NOT EXISTS ${DL_DIR}/dist/ctags) + get_ctags() +endif() + +find_program(ARDUINOCTAGS_EXECUTABLE ctags PATHS ${DL_DIR}/dist/ctags NO_DEFAULT_PATH) + +find_package_handle_standard_args(ArduinoCtags DEFAULT_MSG + ARDUINOCTAGS_EXECUTABLE +) diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake new file mode 100644 index 0000000000..20355705cc --- /dev/null +++ b/cmake/boards_db.cmake @@ -0,0 +1,104600 @@ +# ACSIP_S76S +# ----------------------------------------------------------------------------- + +set(ACSIP_S76S_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(ACSIP_S76S_MAXSIZE 196608) +set(ACSIP_S76S_MAXDATASIZE 20480) +set(ACSIP_S76S_MCU cortex-m0plus) +set(ACSIP_S76S_FPCONF "-") +add_library(ACSIP_S76S INTERFACE) +target_compile_options(ACSIP_S76S INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${ACSIP_S76S_MCU} +) +target_compile_definitions(ACSIP_S76S INTERFACE + "STM32L0xx" + "ARDUINO_ACSIP_S76S" + "BOARD_NAME=\"ACSIP_S76S\"" + "BOARD_ID=ACSIP_S76S" + "VARIANT_H=\"variant_ACSIP_S76S.h\"" +) +target_include_directories(ACSIP_S76S INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${ACSIP_S76S_VARIANT_PATH} +) + +target_link_options(ACSIP_S76S INTERFACE + "LINKER:--default-script=${ACSIP_S76S_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${ACSIP_S76S_MCU} +) +target_link_libraries(ACSIP_S76S INTERFACE + arm_cortexM0l_math +) + +add_library(ACSIP_S76S_serial_disabled INTERFACE) +target_compile_options(ACSIP_S76S_serial_disabled INTERFACE + "SHELL:" +) +add_library(ACSIP_S76S_serial_generic INTERFACE) +target_compile_options(ACSIP_S76S_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(ACSIP_S76S_serial_none INTERFACE) +target_compile_options(ACSIP_S76S_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# AFROFLIGHT_F103CB +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_MCU cortex-m3) +set(AFROFLIGHT_F103CB_FPCONF "-") +add_library(AFROFLIGHT_F103CB INTERFACE) +target_compile_options(AFROFLIGHT_F103CB INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB" + "BOARD_NAME=\"AFROFLIGHT_F103CB\"" + "BOARD_ID=AFROFLIGHT_F103CB" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB INTERFACE + arm_cortexM3l_math +) + +add_library(AFROFLIGHT_F103CB_serial_disabled INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(AFROFLIGHT_F103CB_serial_generic INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(AFROFLIGHT_F103CB_serial_none INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(AFROFLIGHT_F103CB_usb_CDC INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(AFROFLIGHT_F103CB_usb_CDCgen INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(AFROFLIGHT_F103CB_usb_HID INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(AFROFLIGHT_F103CB_usb_none INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_usb_none INTERFACE + "SHELL:" +) +add_library(AFROFLIGHT_F103CB_xusb_FS INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(AFROFLIGHT_F103CB_xusb_HS INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(AFROFLIGHT_F103CB_xusb_HSFS INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# AFROFLIGHT_F103CB_12M +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_12M_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_12M_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_12M_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_12M_MCU cortex-m3) +set(AFROFLIGHT_F103CB_12M_FPCONF "-") +add_library(AFROFLIGHT_F103CB_12M INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_12M INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB_12M" + "BOARD_NAME=\"AFROFLIGHT_F103CB_12M\"" + "BOARD_ID=AFROFLIGHT_F103CB_12M" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_12M INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_12M_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_12M INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_12M_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_12M INTERFACE + arm_cortexM3l_math +) + +add_library(AFROFLIGHT_F103CB_12M_serial_disabled INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_serial_disabled INTERFACE + "SHELL:" +) +add_library(AFROFLIGHT_F103CB_12M_serial_generic INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(AFROFLIGHT_F103CB_12M_serial_none INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(AFROFLIGHT_F103CB_12M_usb_CDC INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(AFROFLIGHT_F103CB_12M_usb_CDCgen INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(AFROFLIGHT_F103CB_12M_usb_HID INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(AFROFLIGHT_F103CB_12M_usb_none INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_usb_none INTERFACE + "SHELL:" +) +add_library(AFROFLIGHT_F103CB_12M_xusb_FS INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_xusb_FS INTERFACE + "SHELL:" +) +add_library(AFROFLIGHT_F103CB_12M_xusb_HS INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(AFROFLIGHT_F103CB_12M_xusb_HSFS INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# AFROFLIGHT_F103CB_12M_dfu2 +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_12M_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_12M_dfu2_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_12M_dfu2_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_12M_dfu2_MCU cortex-m3) +set(AFROFLIGHT_F103CB_12M_dfu2_FPCONF "-") +add_library(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_dfu2_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB_12M" + "BOARD_NAME=\"AFROFLIGHT_F103CB_12M\"" + "BOARD_ID=AFROFLIGHT_F103CB_12M" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_12M_dfu2_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_12M_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_dfu2_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_12M_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# AFROFLIGHT_F103CB_12M_dfuo +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_12M_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_12M_dfuo_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_12M_dfuo_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_12M_dfuo_MCU cortex-m3) +set(AFROFLIGHT_F103CB_12M_dfuo_FPCONF "-") +add_library(AFROFLIGHT_F103CB_12M_dfuo INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_dfuo_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_12M_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB_12M" + "BOARD_NAME=\"AFROFLIGHT_F103CB_12M\"" + "BOARD_ID=AFROFLIGHT_F103CB_12M" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_12M_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_12M_dfuo_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_12M_dfuo INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_12M_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_dfuo_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_12M_dfuo INTERFACE + arm_cortexM3l_math +) + + +# AFROFLIGHT_F103CB_12M_hid +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_12M_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_12M_hid_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_12M_hid_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_12M_hid_MCU cortex-m3) +set(AFROFLIGHT_F103CB_12M_hid_FPCONF "-") +add_library(AFROFLIGHT_F103CB_12M_hid INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_12M_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_hid_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_12M_hid INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB_12M" + "BOARD_NAME=\"AFROFLIGHT_F103CB_12M\"" + "BOARD_ID=AFROFLIGHT_F103CB_12M" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_12M_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_12M_hid_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_12M_hid INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_12M_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_12M_hid_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_12M_hid INTERFACE + arm_cortexM3l_math +) + + +# AFROFLIGHT_F103CB_dfu2 +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_dfu2_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_dfu2_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_dfu2_MCU cortex-m3) +set(AFROFLIGHT_F103CB_dfu2_FPCONF "-") +add_library(AFROFLIGHT_F103CB_dfu2 INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_dfu2_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB" + "BOARD_NAME=\"AFROFLIGHT_F103CB\"" + "BOARD_ID=AFROFLIGHT_F103CB" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_dfu2_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_dfu2 INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_dfu2_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# AFROFLIGHT_F103CB_dfuo +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_dfuo_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_dfuo_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_dfuo_MCU cortex-m3) +set(AFROFLIGHT_F103CB_dfuo_FPCONF "-") +add_library(AFROFLIGHT_F103CB_dfuo INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_dfuo_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB" + "BOARD_NAME=\"AFROFLIGHT_F103CB\"" + "BOARD_ID=AFROFLIGHT_F103CB" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_dfuo_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_dfuo INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_dfuo_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_dfuo INTERFACE + arm_cortexM3l_math +) + + +# AFROFLIGHT_F103CB_hid +# ----------------------------------------------------------------------------- + +set(AFROFLIGHT_F103CB_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(AFROFLIGHT_F103CB_hid_MAXSIZE 131072) +set(AFROFLIGHT_F103CB_hid_MAXDATASIZE 20480) +set(AFROFLIGHT_F103CB_hid_MCU cortex-m3) +set(AFROFLIGHT_F103CB_hid_FPCONF "-") +add_library(AFROFLIGHT_F103CB_hid INTERFACE) +target_compile_options(AFROFLIGHT_F103CB_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_hid_MCU} +) +target_compile_definitions(AFROFLIGHT_F103CB_hid INTERFACE + "STM32F1xx" + "ARDUINO_AFROFLIGHT_F103CB" + "BOARD_NAME=\"AFROFLIGHT_F103CB\"" + "BOARD_ID=AFROFLIGHT_F103CB" + "VARIANT_H=\"variant_AFROFLIGHT_F103CB_XX.h\"" +) +target_include_directories(AFROFLIGHT_F103CB_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${AFROFLIGHT_F103CB_hid_VARIANT_PATH} +) + +target_link_options(AFROFLIGHT_F103CB_hid INTERFACE + "LINKER:--default-script=${AFROFLIGHT_F103CB_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${AFROFLIGHT_F103CB_hid_MCU} +) +target_link_libraries(AFROFLIGHT_F103CB_hid INTERFACE + arm_cortexM3l_math +) + + +# AGAFIA_SG0 +# ----------------------------------------------------------------------------- + +set(AGAFIA_SG0_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(AGAFIA_SG0_MAXSIZE 131072) +set(AGAFIA_SG0_MAXDATASIZE 36864) +set(AGAFIA_SG0_MCU cortex-m0plus) +set(AGAFIA_SG0_FPCONF "-") +add_library(AGAFIA_SG0 INTERFACE) +target_compile_options(AGAFIA_SG0 INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AGAFIA_SG0_MCU} +) +target_compile_definitions(AGAFIA_SG0 INTERFACE + "STM32G0xx" + "ARDUINO_AGAFIA_SG0" + "BOARD_NAME=\"AGAFIA_SG0\"" + "BOARD_ID=AGAFIA_SG0" + "VARIANT_H=\"variant_AGAFIA_SG0.h\"" +) +target_include_directories(AGAFIA_SG0 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${AGAFIA_SG0_VARIANT_PATH} +) + +target_link_options(AGAFIA_SG0 INTERFACE + "LINKER:--default-script=${AGAFIA_SG0_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${AGAFIA_SG0_MCU} +) +target_link_libraries(AGAFIA_SG0 INTERFACE + arm_cortexM0l_math +) + +add_library(AGAFIA_SG0_serial_disabled INTERFACE) +target_compile_options(AGAFIA_SG0_serial_disabled INTERFACE + "SHELL:" +) +add_library(AGAFIA_SG0_serial_generic INTERFACE) +target_compile_options(AGAFIA_SG0_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(AGAFIA_SG0_serial_none INTERFACE) +target_compile_options(AGAFIA_SG0_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(AGAFIA_SG0_usb_CDC INTERFACE) +target_compile_options(AGAFIA_SG0_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(AGAFIA_SG0_usb_CDCgen INTERFACE) +target_compile_options(AGAFIA_SG0_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(AGAFIA_SG0_usb_HID INTERFACE) +target_compile_options(AGAFIA_SG0_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(AGAFIA_SG0_usb_none INTERFACE) +target_compile_options(AGAFIA_SG0_usb_none INTERFACE + "SHELL:" +) + +# ARMED_V1 +# ----------------------------------------------------------------------------- + +set(ARMED_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(ARMED_V1_MAXSIZE 524288) +set(ARMED_V1_MAXDATASIZE 131072) +set(ARMED_V1_MCU cortex-m4) +set(ARMED_V1_FPCONF "fpv4-sp-d16-hard") +add_library(ARMED_V1 INTERFACE) +target_compile_options(ARMED_V1 INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${ARMED_V1_MCU} +) +target_compile_definitions(ARMED_V1 INTERFACE + "STM32F4xx" + "ARDUINO_ARMED_V1" + "BOARD_NAME=\"ARMED_V1\"" + "BOARD_ID=ARMED_V1" + "VARIANT_H=\"variant_ARMED_V1.h\"" +) +target_include_directories(ARMED_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${ARMED_V1_VARIANT_PATH} +) + +target_link_options(ARMED_V1 INTERFACE + "LINKER:--default-script=${ARMED_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${ARMED_V1_MCU} +) +target_link_libraries(ARMED_V1 INTERFACE + arm_cortexM4lf_math +) + +add_library(ARMED_V1_serial_disabled INTERFACE) +target_compile_options(ARMED_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(ARMED_V1_serial_generic INTERFACE) +target_compile_options(ARMED_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(ARMED_V1_serial_none INTERFACE) +target_compile_options(ARMED_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(ARMED_V1_usb_CDC INTERFACE) +target_compile_options(ARMED_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(ARMED_V1_usb_CDCgen INTERFACE) +target_compile_options(ARMED_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(ARMED_V1_usb_none INTERFACE) +target_compile_options(ARMED_V1_usb_none INTERFACE + "SHELL:" +) +add_library(ARMED_V1_xusb_FS INTERFACE) +target_compile_options(ARMED_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(ARMED_V1_xusb_HS INTERFACE) +target_compile_options(ARMED_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(ARMED_V1_xusb_HSFS INTERFACE) +target_compile_options(ARMED_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# AURORA_ONE +# ----------------------------------------------------------------------------- + +set(AURORA_ONE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030K(6-8)T") +set(AURORA_ONE_MAXSIZE 65536) +set(AURORA_ONE_MAXDATASIZE 8192) +set(AURORA_ONE_MCU cortex-m0plus) +set(AURORA_ONE_FPCONF "-") +add_library(AURORA_ONE INTERFACE) +target_compile_options(AURORA_ONE INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${AURORA_ONE_MCU} +) +target_compile_definitions(AURORA_ONE INTERFACE + "STM32G0xx" + "ARDUINO_AURORA_ONE" + "BOARD_NAME=\"AURORA_ONE\"" + "BOARD_ID=AURORA_ONE" + "VARIANT_H=\"variant_AURORA_ONE.h\"" +) +target_include_directories(AURORA_ONE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${AURORA_ONE_VARIANT_PATH} +) + +target_link_options(AURORA_ONE INTERFACE + "LINKER:--default-script=${AURORA_ONE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${AURORA_ONE_MCU} +) +target_link_libraries(AURORA_ONE INTERFACE + arm_cortexM0l_math +) + +add_library(AURORA_ONE_serial_disabled INTERFACE) +target_compile_options(AURORA_ONE_serial_disabled INTERFACE + "SHELL:" +) +add_library(AURORA_ONE_serial_generic INTERFACE) +target_compile_options(AURORA_ONE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(AURORA_ONE_serial_none INTERFACE) +target_compile_options(AURORA_ONE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(AURORA_ONE_usb_CDC INTERFACE) +target_compile_options(AURORA_ONE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(AURORA_ONE_usb_CDCgen INTERFACE) +target_compile_options(AURORA_ONE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(AURORA_ONE_usb_HID INTERFACE) +target_compile_options(AURORA_ONE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(AURORA_ONE_usb_none INTERFACE) +target_compile_options(AURORA_ONE_usb_none INTERFACE + "SHELL:" +) + +# B_G431B_ESC1 +# ----------------------------------------------------------------------------- + +set(B_G431B_ESC1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)U_G441CBU") +set(B_G431B_ESC1_MAXSIZE 131072) +set(B_G431B_ESC1_MAXDATASIZE 32768) +set(B_G431B_ESC1_MCU cortex-m4) +set(B_G431B_ESC1_FPCONF "fpv4-sp-d16-hard") +add_library(B_G431B_ESC1 INTERFACE) +target_compile_options(B_G431B_ESC1 INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_G431B_ESC1_MCU} +) +target_compile_definitions(B_G431B_ESC1 INTERFACE + "STM32G4xx" + "ARDUINO_B_G431B_ESC1" + "BOARD_NAME=\"B_G431B_ESC1\"" + "BOARD_ID=B_G431B_ESC1" + "VARIANT_H=\"variant_B_G431B_ESC1.h\"" +) +target_include_directories(B_G431B_ESC1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${B_G431B_ESC1_VARIANT_PATH} +) + +target_link_options(B_G431B_ESC1 INTERFACE + "LINKER:--default-script=${B_G431B_ESC1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_G431B_ESC1_MCU} +) +target_link_libraries(B_G431B_ESC1 INTERFACE + arm_cortexM4lf_math +) + +add_library(B_G431B_ESC1_serial_disabled INTERFACE) +target_compile_options(B_G431B_ESC1_serial_disabled INTERFACE + "SHELL:" +) +add_library(B_G431B_ESC1_serial_generic INTERFACE) +target_compile_options(B_G431B_ESC1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(B_G431B_ESC1_serial_none INTERFACE) +target_compile_options(B_G431B_ESC1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(B_G431B_ESC1_usb_CDC INTERFACE) +target_compile_options(B_G431B_ESC1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(B_G431B_ESC1_usb_CDCgen INTERFACE) +target_compile_options(B_G431B_ESC1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(B_G431B_ESC1_usb_HID INTERFACE) +target_compile_options(B_G431B_ESC1_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(B_G431B_ESC1_usb_none INTERFACE) +target_compile_options(B_G431B_ESC1_usb_none INTERFACE + "SHELL:" +) +add_library(B_G431B_ESC1_xusb_FS INTERFACE) +target_compile_options(B_G431B_ESC1_xusb_FS INTERFACE + "SHELL:" +) +add_library(B_G431B_ESC1_xusb_HS INTERFACE) +target_compile_options(B_G431B_ESC1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(B_G431B_ESC1_xusb_HSFS INTERFACE) +target_compile_options(B_G431B_ESC1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# B_L072Z_LRWAN1 +# ----------------------------------------------------------------------------- + +set(B_L072Z_LRWAN1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY") +set(B_L072Z_LRWAN1_MAXSIZE 196608) +set(B_L072Z_LRWAN1_MAXDATASIZE 20480) +set(B_L072Z_LRWAN1_MCU cortex-m0plus) +set(B_L072Z_LRWAN1_FPCONF "-") +add_library(B_L072Z_LRWAN1 INTERFACE) +target_compile_options(B_L072Z_LRWAN1 INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${B_L072Z_LRWAN1_MCU} +) +target_compile_definitions(B_L072Z_LRWAN1 INTERFACE + "STM32L0xx" + "ARDUINO_B_L072Z_LRWAN1" + "BOARD_NAME=\"B_L072Z_LRWAN1\"" + "BOARD_ID=B_L072Z_LRWAN1" + "VARIANT_H=\"variant_B_L072Z_LRWAN1.h\"" +) +target_include_directories(B_L072Z_LRWAN1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${B_L072Z_LRWAN1_VARIANT_PATH} +) + +target_link_options(B_L072Z_LRWAN1 INTERFACE + "LINKER:--default-script=${B_L072Z_LRWAN1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${B_L072Z_LRWAN1_MCU} +) +target_link_libraries(B_L072Z_LRWAN1 INTERFACE + arm_cortexM0l_math +) + +add_library(B_L072Z_LRWAN1_serial_disabled INTERFACE) +target_compile_options(B_L072Z_LRWAN1_serial_disabled INTERFACE + "SHELL:" +) +add_library(B_L072Z_LRWAN1_serial_generic INTERFACE) +target_compile_options(B_L072Z_LRWAN1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(B_L072Z_LRWAN1_serial_none INTERFACE) +target_compile_options(B_L072Z_LRWAN1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(B_L072Z_LRWAN1_usb_CDC INTERFACE) +target_compile_options(B_L072Z_LRWAN1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(B_L072Z_LRWAN1_usb_CDCgen INTERFACE) +target_compile_options(B_L072Z_LRWAN1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(B_L072Z_LRWAN1_usb_HID INTERFACE) +target_compile_options(B_L072Z_LRWAN1_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(B_L072Z_LRWAN1_usb_none INTERFACE) +target_compile_options(B_L072Z_LRWAN1_usb_none INTERFACE + "SHELL:" +) +add_library(B_L072Z_LRWAN1_xusb_FS INTERFACE) +target_compile_options(B_L072Z_LRWAN1_xusb_FS INTERFACE + "SHELL:" +) +add_library(B_L072Z_LRWAN1_xusb_HS INTERFACE) +target_compile_options(B_L072Z_LRWAN1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(B_L072Z_LRWAN1_xusb_HSFS INTERFACE) +target_compile_options(B_L072Z_LRWAN1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# B_L475E_IOT01A +# ----------------------------------------------------------------------------- + +set(B_L475E_IOT01A_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(B_L475E_IOT01A_MAXSIZE 1048576) +set(B_L475E_IOT01A_MAXDATASIZE 98304) +set(B_L475E_IOT01A_MCU cortex-m4) +set(B_L475E_IOT01A_FPCONF "fpv4-sp-d16-hard") +add_library(B_L475E_IOT01A INTERFACE) +target_compile_options(B_L475E_IOT01A INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_L475E_IOT01A_MCU} +) +target_compile_definitions(B_L475E_IOT01A INTERFACE + "STM32L4xx" + "ARDUINO_B_L475E_IOT01A" + "BOARD_NAME=\"B_L475E_IOT01A\"" + "BOARD_ID=B_L475E_IOT01A" + "VARIANT_H=\"variant_B_L475E_IOT01A.h\"" +) +target_include_directories(B_L475E_IOT01A INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${B_L475E_IOT01A_VARIANT_PATH} +) + +target_link_options(B_L475E_IOT01A INTERFACE + "LINKER:--default-script=${B_L475E_IOT01A_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_L475E_IOT01A_MCU} +) +target_link_libraries(B_L475E_IOT01A INTERFACE + arm_cortexM4lf_math +) + +add_library(B_L475E_IOT01A_serial_disabled INTERFACE) +target_compile_options(B_L475E_IOT01A_serial_disabled INTERFACE + "SHELL:" +) +add_library(B_L475E_IOT01A_serial_generic INTERFACE) +target_compile_options(B_L475E_IOT01A_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(B_L475E_IOT01A_serial_none INTERFACE) +target_compile_options(B_L475E_IOT01A_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(B_L475E_IOT01A_usb_CDC INTERFACE) +target_compile_options(B_L475E_IOT01A_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(B_L475E_IOT01A_usb_CDCgen INTERFACE) +target_compile_options(B_L475E_IOT01A_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(B_L475E_IOT01A_usb_HID INTERFACE) +target_compile_options(B_L475E_IOT01A_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(B_L475E_IOT01A_usb_none INTERFACE) +target_compile_options(B_L475E_IOT01A_usb_none INTERFACE + "SHELL:" +) +add_library(B_L475E_IOT01A_xusb_FS INTERFACE) +target_compile_options(B_L475E_IOT01A_xusb_FS INTERFACE + "SHELL:" +) +add_library(B_L475E_IOT01A_xusb_HS INTERFACE) +target_compile_options(B_L475E_IOT01A_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(B_L475E_IOT01A_xusb_HSFS INTERFACE) +target_compile_options(B_L475E_IOT01A_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# B_L4S5I_IOT01A +# ----------------------------------------------------------------------------- + +set(B_L4S5I_IOT01A_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT") +set(B_L4S5I_IOT01A_MAXSIZE 2097152) +set(B_L4S5I_IOT01A_MAXDATASIZE 655360) +set(B_L4S5I_IOT01A_MCU cortex-m4) +set(B_L4S5I_IOT01A_FPCONF "fpv4-sp-d16-hard") +add_library(B_L4S5I_IOT01A INTERFACE) +target_compile_options(B_L4S5I_IOT01A INTERFACE + "SHELL:-DSTM32L4S5xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_L4S5I_IOT01A_MCU} +) +target_compile_definitions(B_L4S5I_IOT01A INTERFACE + "STM32L4xx" + "ARDUINO_B_L4S5I_IOT01A" + "BOARD_NAME=\"B_L4S5I_IOT01A\"" + "BOARD_ID=B_L4S5I_IOT01A" + "VARIANT_H=\"variant_B_L4S5I_IOT01A.h\"" +) +target_include_directories(B_L4S5I_IOT01A INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${B_L4S5I_IOT01A_VARIANT_PATH} +) + +target_link_options(B_L4S5I_IOT01A INTERFACE + "LINKER:--default-script=${B_L4S5I_IOT01A_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_L4S5I_IOT01A_MCU} +) +target_link_libraries(B_L4S5I_IOT01A INTERFACE + arm_cortexM4lf_math +) + +add_library(B_L4S5I_IOT01A_serial_disabled INTERFACE) +target_compile_options(B_L4S5I_IOT01A_serial_disabled INTERFACE + "SHELL:" +) +add_library(B_L4S5I_IOT01A_serial_generic INTERFACE) +target_compile_options(B_L4S5I_IOT01A_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(B_L4S5I_IOT01A_serial_none INTERFACE) +target_compile_options(B_L4S5I_IOT01A_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(B_L4S5I_IOT01A_usb_CDC INTERFACE) +target_compile_options(B_L4S5I_IOT01A_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(B_L4S5I_IOT01A_usb_CDCgen INTERFACE) +target_compile_options(B_L4S5I_IOT01A_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(B_L4S5I_IOT01A_usb_HID INTERFACE) +target_compile_options(B_L4S5I_IOT01A_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(B_L4S5I_IOT01A_usb_none INTERFACE) +target_compile_options(B_L4S5I_IOT01A_usb_none INTERFACE + "SHELL:" +) +add_library(B_L4S5I_IOT01A_xusb_FS INTERFACE) +target_compile_options(B_L4S5I_IOT01A_xusb_FS INTERFACE + "SHELL:" +) +add_library(B_L4S5I_IOT01A_xusb_HS INTERFACE) +target_compile_options(B_L4S5I_IOT01A_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(B_L4S5I_IOT01A_xusb_HSFS INTERFACE) +target_compile_options(B_L4S5I_IOT01A_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# B_U585I_IOT02A +# ----------------------------------------------------------------------------- + +set(B_U585I_IOT02A_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ") +set(B_U585I_IOT02A_MAXSIZE 2097152) +set(B_U585I_IOT02A_MAXDATASIZE 262144) +set(B_U585I_IOT02A_MCU cortex-m33) +set(B_U585I_IOT02A_FPCONF "fpv4-sp-d16-hard") +add_library(B_U585I_IOT02A INTERFACE) +target_compile_options(B_U585I_IOT02A INTERFACE + "SHELL:-DSTM32U585xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_U585I_IOT02A_MCU} +) +target_compile_definitions(B_U585I_IOT02A INTERFACE + "STM32U5xx" + "ARDUINO_B_U585I_IOT02A" + "BOARD_NAME=\"B_U585I_IOT02A\"" + "BOARD_ID=B_U585I_IOT02A" + "VARIANT_H=\"variant_B_U585I_IOT02A.h\"" +) +target_include_directories(B_U585I_IOT02A INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${B_U585I_IOT02A_VARIANT_PATH} +) + +target_link_options(B_U585I_IOT02A INTERFACE + "LINKER:--default-script=${B_U585I_IOT02A_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${B_U585I_IOT02A_MCU} +) +target_link_libraries(B_U585I_IOT02A INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(B_U585I_IOT02A_serial_disabled INTERFACE) +target_compile_options(B_U585I_IOT02A_serial_disabled INTERFACE + "SHELL:" +) +add_library(B_U585I_IOT02A_serial_generic INTERFACE) +target_compile_options(B_U585I_IOT02A_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(B_U585I_IOT02A_serial_none INTERFACE) +target_compile_options(B_U585I_IOT02A_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(B_U585I_IOT02A_usb_CDC INTERFACE) +target_compile_options(B_U585I_IOT02A_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(B_U585I_IOT02A_usb_CDCgen INTERFACE) +target_compile_options(B_U585I_IOT02A_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(B_U585I_IOT02A_usb_HID INTERFACE) +target_compile_options(B_U585I_IOT02A_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(B_U585I_IOT02A_usb_none INTERFACE) +target_compile_options(B_U585I_IOT02A_usb_none INTERFACE + "SHELL:" +) +add_library(B_U585I_IOT02A_xusb_FS INTERFACE) +target_compile_options(B_U585I_IOT02A_xusb_FS INTERFACE + "SHELL:" +) +add_library(B_U585I_IOT02A_xusb_HS INTERFACE) +target_compile_options(B_U585I_IOT02A_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(B_U585I_IOT02A_xusb_HSFS INTERFACE) +target_compile_options(B_U585I_IOT02A_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACK_F407VE +# ----------------------------------------------------------------------------- + +set(BLACK_F407VE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(BLACK_F407VE_MAXSIZE 524288) +set(BLACK_F407VE_MAXDATASIZE 131072) +set(BLACK_F407VE_MCU cortex-m4) +set(BLACK_F407VE_FPCONF "-") +add_library(BLACK_F407VE INTERFACE) +target_compile_options(BLACK_F407VE INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VE_MCU} +) +target_compile_definitions(BLACK_F407VE INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407VE" + "BOARD_NAME=\"BLACK_F407VE\"" + "BOARD_ID=BLACK_F407VE" + "VARIANT_H=\"variant_BLACK_F407VX.h\"" +) +target_include_directories(BLACK_F407VE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407VE_VARIANT_PATH} +) + +target_link_options(BLACK_F407VE INTERFACE + "LINKER:--default-script=${BLACK_F407VE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VE_MCU} +) +target_link_libraries(BLACK_F407VE INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACK_F407VE_serial_disabled INTERFACE) +target_compile_options(BLACK_F407VE_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACK_F407VE_serial_generic INTERFACE) +target_compile_options(BLACK_F407VE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACK_F407VE_serial_none INTERFACE) +target_compile_options(BLACK_F407VE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACK_F407VE_usb_CDC INTERFACE) +target_compile_options(BLACK_F407VE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACK_F407VE_usb_CDCgen INTERFACE) +target_compile_options(BLACK_F407VE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACK_F407VE_usb_HID INTERFACE) +target_compile_options(BLACK_F407VE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACK_F407VE_usb_none INTERFACE) +target_compile_options(BLACK_F407VE_usb_none INTERFACE + "SHELL:" +) +add_library(BLACK_F407VE_xusb_FS INTERFACE) +target_compile_options(BLACK_F407VE_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACK_F407VE_xusb_HS INTERFACE) +target_compile_options(BLACK_F407VE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACK_F407VE_xusb_HSFS INTERFACE) +target_compile_options(BLACK_F407VE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACK_F407VE_hid +# ----------------------------------------------------------------------------- + +set(BLACK_F407VE_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(BLACK_F407VE_hid_MAXSIZE 524288) +set(BLACK_F407VE_hid_MAXDATASIZE 131072) +set(BLACK_F407VE_hid_MCU cortex-m4) +set(BLACK_F407VE_hid_FPCONF "-") +add_library(BLACK_F407VE_hid INTERFACE) +target_compile_options(BLACK_F407VE_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VE_hid_MCU} +) +target_compile_definitions(BLACK_F407VE_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407VE" + "BOARD_NAME=\"BLACK_F407VE\"" + "BOARD_ID=BLACK_F407VE" + "VARIANT_H=\"variant_BLACK_F407VX.h\"" +) +target_include_directories(BLACK_F407VE_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407VE_hid_VARIANT_PATH} +) + +target_link_options(BLACK_F407VE_hid INTERFACE + "LINKER:--default-script=${BLACK_F407VE_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VE_hid_MCU} +) +target_link_libraries(BLACK_F407VE_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLACK_F407VG +# ----------------------------------------------------------------------------- + +set(BLACK_F407VG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(BLACK_F407VG_MAXSIZE 1048576) +set(BLACK_F407VG_MAXDATASIZE 131072) +set(BLACK_F407VG_MCU cortex-m4) +set(BLACK_F407VG_FPCONF "-") +add_library(BLACK_F407VG INTERFACE) +target_compile_options(BLACK_F407VG INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VG_MCU} +) +target_compile_definitions(BLACK_F407VG INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407VG" + "BOARD_NAME=\"BLACK_F407VG\"" + "BOARD_ID=BLACK_F407VG" + "VARIANT_H=\"variant_BLACK_F407VX.h\"" +) +target_include_directories(BLACK_F407VG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407VG_VARIANT_PATH} +) + +target_link_options(BLACK_F407VG INTERFACE + "LINKER:--default-script=${BLACK_F407VG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VG_MCU} +) +target_link_libraries(BLACK_F407VG INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACK_F407VG_serial_disabled INTERFACE) +target_compile_options(BLACK_F407VG_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACK_F407VG_serial_generic INTERFACE) +target_compile_options(BLACK_F407VG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACK_F407VG_serial_none INTERFACE) +target_compile_options(BLACK_F407VG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACK_F407VG_usb_CDC INTERFACE) +target_compile_options(BLACK_F407VG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACK_F407VG_usb_CDCgen INTERFACE) +target_compile_options(BLACK_F407VG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACK_F407VG_usb_HID INTERFACE) +target_compile_options(BLACK_F407VG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACK_F407VG_usb_none INTERFACE) +target_compile_options(BLACK_F407VG_usb_none INTERFACE + "SHELL:" +) +add_library(BLACK_F407VG_xusb_FS INTERFACE) +target_compile_options(BLACK_F407VG_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACK_F407VG_xusb_HS INTERFACE) +target_compile_options(BLACK_F407VG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACK_F407VG_xusb_HSFS INTERFACE) +target_compile_options(BLACK_F407VG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACK_F407VG_hid +# ----------------------------------------------------------------------------- + +set(BLACK_F407VG_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(BLACK_F407VG_hid_MAXSIZE 1048576) +set(BLACK_F407VG_hid_MAXDATASIZE 131072) +set(BLACK_F407VG_hid_MCU cortex-m4) +set(BLACK_F407VG_hid_FPCONF "-") +add_library(BLACK_F407VG_hid INTERFACE) +target_compile_options(BLACK_F407VG_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VG_hid_MCU} +) +target_compile_definitions(BLACK_F407VG_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407VG" + "BOARD_NAME=\"BLACK_F407VG\"" + "BOARD_ID=BLACK_F407VG" + "VARIANT_H=\"variant_BLACK_F407VX.h\"" +) +target_include_directories(BLACK_F407VG_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407VG_hid_VARIANT_PATH} +) + +target_link_options(BLACK_F407VG_hid INTERFACE + "LINKER:--default-script=${BLACK_F407VG_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407VG_hid_MCU} +) +target_link_libraries(BLACK_F407VG_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLACK_F407ZE +# ----------------------------------------------------------------------------- + +set(BLACK_F407ZE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(BLACK_F407ZE_MAXSIZE 524288) +set(BLACK_F407ZE_MAXDATASIZE 131072) +set(BLACK_F407ZE_MCU cortex-m4) +set(BLACK_F407ZE_FPCONF "-") +add_library(BLACK_F407ZE INTERFACE) +target_compile_options(BLACK_F407ZE INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZE_MCU} +) +target_compile_definitions(BLACK_F407ZE INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407ZE" + "BOARD_NAME=\"BLACK_F407ZE\"" + "BOARD_ID=BLACK_F407ZE" + "VARIANT_H=\"variant_BLACK_F407ZX.h\"" +) +target_include_directories(BLACK_F407ZE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407ZE_VARIANT_PATH} +) + +target_link_options(BLACK_F407ZE INTERFACE + "LINKER:--default-script=${BLACK_F407ZE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZE_MCU} +) +target_link_libraries(BLACK_F407ZE INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACK_F407ZE_serial_disabled INTERFACE) +target_compile_options(BLACK_F407ZE_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACK_F407ZE_serial_generic INTERFACE) +target_compile_options(BLACK_F407ZE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACK_F407ZE_serial_none INTERFACE) +target_compile_options(BLACK_F407ZE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACK_F407ZE_usb_CDC INTERFACE) +target_compile_options(BLACK_F407ZE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACK_F407ZE_usb_CDCgen INTERFACE) +target_compile_options(BLACK_F407ZE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACK_F407ZE_usb_HID INTERFACE) +target_compile_options(BLACK_F407ZE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACK_F407ZE_usb_none INTERFACE) +target_compile_options(BLACK_F407ZE_usb_none INTERFACE + "SHELL:" +) +add_library(BLACK_F407ZE_xusb_FS INTERFACE) +target_compile_options(BLACK_F407ZE_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACK_F407ZE_xusb_HS INTERFACE) +target_compile_options(BLACK_F407ZE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACK_F407ZE_xusb_HSFS INTERFACE) +target_compile_options(BLACK_F407ZE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACK_F407ZE_hid +# ----------------------------------------------------------------------------- + +set(BLACK_F407ZE_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(BLACK_F407ZE_hid_MAXSIZE 524288) +set(BLACK_F407ZE_hid_MAXDATASIZE 131072) +set(BLACK_F407ZE_hid_MCU cortex-m4) +set(BLACK_F407ZE_hid_FPCONF "-") +add_library(BLACK_F407ZE_hid INTERFACE) +target_compile_options(BLACK_F407ZE_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZE_hid_MCU} +) +target_compile_definitions(BLACK_F407ZE_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407ZE" + "BOARD_NAME=\"BLACK_F407ZE\"" + "BOARD_ID=BLACK_F407ZE" + "VARIANT_H=\"variant_BLACK_F407ZX.h\"" +) +target_include_directories(BLACK_F407ZE_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407ZE_hid_VARIANT_PATH} +) + +target_link_options(BLACK_F407ZE_hid INTERFACE + "LINKER:--default-script=${BLACK_F407ZE_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZE_hid_MCU} +) +target_link_libraries(BLACK_F407ZE_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLACK_F407ZG +# ----------------------------------------------------------------------------- + +set(BLACK_F407ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(BLACK_F407ZG_MAXSIZE 1048576) +set(BLACK_F407ZG_MAXDATASIZE 131072) +set(BLACK_F407ZG_MCU cortex-m4) +set(BLACK_F407ZG_FPCONF "-") +add_library(BLACK_F407ZG INTERFACE) +target_compile_options(BLACK_F407ZG INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZG_MCU} +) +target_compile_definitions(BLACK_F407ZG INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407ZG" + "BOARD_NAME=\"BLACK_F407ZG\"" + "BOARD_ID=BLACK_F407ZG" + "VARIANT_H=\"variant_BLACK_F407ZX.h\"" +) +target_include_directories(BLACK_F407ZG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407ZG_VARIANT_PATH} +) + +target_link_options(BLACK_F407ZG INTERFACE + "LINKER:--default-script=${BLACK_F407ZG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZG_MCU} +) +target_link_libraries(BLACK_F407ZG INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACK_F407ZG_serial_disabled INTERFACE) +target_compile_options(BLACK_F407ZG_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACK_F407ZG_serial_generic INTERFACE) +target_compile_options(BLACK_F407ZG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACK_F407ZG_serial_none INTERFACE) +target_compile_options(BLACK_F407ZG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACK_F407ZG_usb_CDC INTERFACE) +target_compile_options(BLACK_F407ZG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACK_F407ZG_usb_CDCgen INTERFACE) +target_compile_options(BLACK_F407ZG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACK_F407ZG_usb_HID INTERFACE) +target_compile_options(BLACK_F407ZG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACK_F407ZG_usb_none INTERFACE) +target_compile_options(BLACK_F407ZG_usb_none INTERFACE + "SHELL:" +) +add_library(BLACK_F407ZG_xusb_FS INTERFACE) +target_compile_options(BLACK_F407ZG_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACK_F407ZG_xusb_HS INTERFACE) +target_compile_options(BLACK_F407ZG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACK_F407ZG_xusb_HSFS INTERFACE) +target_compile_options(BLACK_F407ZG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACK_F407ZG_hid +# ----------------------------------------------------------------------------- + +set(BLACK_F407ZG_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(BLACK_F407ZG_hid_MAXSIZE 1048576) +set(BLACK_F407ZG_hid_MAXDATASIZE 131072) +set(BLACK_F407ZG_hid_MCU cortex-m4) +set(BLACK_F407ZG_hid_FPCONF "-") +add_library(BLACK_F407ZG_hid INTERFACE) +target_compile_options(BLACK_F407ZG_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZG_hid_MCU} +) +target_compile_definitions(BLACK_F407ZG_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACK_F407ZG" + "BOARD_NAME=\"BLACK_F407ZG\"" + "BOARD_ID=BLACK_F407ZG" + "VARIANT_H=\"variant_BLACK_F407ZX.h\"" +) +target_include_directories(BLACK_F407ZG_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACK_F407ZG_hid_VARIANT_PATH} +) + +target_link_options(BLACK_F407ZG_hid INTERFACE + "LINKER:--default-script=${BLACK_F407ZG_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACK_F407ZG_hid_MCU} +) +target_link_libraries(BLACK_F407ZG_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLACKPILL_F103C8 +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103C8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103C8_MAXSIZE 65536) +set(BLACKPILL_F103C8_MAXDATASIZE 20480) +set(BLACKPILL_F103C8_MCU cortex-m3) +set(BLACKPILL_F103C8_FPCONF "-") +add_library(BLACKPILL_F103C8 INTERFACE) +target_compile_options(BLACKPILL_F103C8 INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_MCU} +) +target_compile_definitions(BLACKPILL_F103C8 INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103C8" + "BOARD_NAME=\"BLACKPILL_F103C8\"" + "BOARD_ID=BLACKPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103C8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103C8_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103C8 INTERFACE + "LINKER:--default-script=${BLACKPILL_F103C8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_MCU} +) +target_link_libraries(BLACKPILL_F103C8 INTERFACE + arm_cortexM3l_math +) + +add_library(BLACKPILL_F103C8_serial_disabled INTERFACE) +target_compile_options(BLACKPILL_F103C8_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F103C8_serial_generic INTERFACE) +target_compile_options(BLACKPILL_F103C8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACKPILL_F103C8_serial_none INTERFACE) +target_compile_options(BLACKPILL_F103C8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACKPILL_F103C8_usb_CDC INTERFACE) +target_compile_options(BLACKPILL_F103C8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACKPILL_F103C8_usb_CDCgen INTERFACE) +target_compile_options(BLACKPILL_F103C8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACKPILL_F103C8_usb_HID INTERFACE) +target_compile_options(BLACKPILL_F103C8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACKPILL_F103C8_usb_none INTERFACE) +target_compile_options(BLACKPILL_F103C8_usb_none INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F103C8_xusb_FS INTERFACE) +target_compile_options(BLACKPILL_F103C8_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F103C8_xusb_HS INTERFACE) +target_compile_options(BLACKPILL_F103C8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACKPILL_F103C8_xusb_HSFS INTERFACE) +target_compile_options(BLACKPILL_F103C8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACKPILL_F103C8_dfu2 +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103C8_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103C8_dfu2_MAXSIZE 65536) +set(BLACKPILL_F103C8_dfu2_MAXDATASIZE 20480) +set(BLACKPILL_F103C8_dfu2_MCU cortex-m3) +set(BLACKPILL_F103C8_dfu2_FPCONF "-") +add_library(BLACKPILL_F103C8_dfu2 INTERFACE) +target_compile_options(BLACKPILL_F103C8_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_dfu2_MCU} +) +target_compile_definitions(BLACKPILL_F103C8_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103C8" + "BOARD_NAME=\"BLACKPILL_F103C8\"" + "BOARD_ID=BLACKPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103C8_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103C8_dfu2_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103C8_dfu2 INTERFACE + "LINKER:--default-script=${BLACKPILL_F103C8_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_dfu2_MCU} +) +target_link_libraries(BLACKPILL_F103C8_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLACKPILL_F103C8_dfuo +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103C8_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103C8_dfuo_MAXSIZE 65536) +set(BLACKPILL_F103C8_dfuo_MAXDATASIZE 20480) +set(BLACKPILL_F103C8_dfuo_MCU cortex-m3) +set(BLACKPILL_F103C8_dfuo_FPCONF "-") +add_library(BLACKPILL_F103C8_dfuo INTERFACE) +target_compile_options(BLACKPILL_F103C8_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_dfuo_MCU} +) +target_compile_definitions(BLACKPILL_F103C8_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103C8" + "BOARD_NAME=\"BLACKPILL_F103C8\"" + "BOARD_ID=BLACKPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103C8_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103C8_dfuo_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103C8_dfuo INTERFACE + "LINKER:--default-script=${BLACKPILL_F103C8_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_dfuo_MCU} +) +target_link_libraries(BLACKPILL_F103C8_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLACKPILL_F103C8_hid +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103C8_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103C8_hid_MAXSIZE 65536) +set(BLACKPILL_F103C8_hid_MAXDATASIZE 20480) +set(BLACKPILL_F103C8_hid_MCU cortex-m3) +set(BLACKPILL_F103C8_hid_FPCONF "-") +add_library(BLACKPILL_F103C8_hid INTERFACE) +target_compile_options(BLACKPILL_F103C8_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_hid_MCU} +) +target_compile_definitions(BLACKPILL_F103C8_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103C8" + "BOARD_NAME=\"BLACKPILL_F103C8\"" + "BOARD_ID=BLACKPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103C8_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103C8_hid_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103C8_hid INTERFACE + "LINKER:--default-script=${BLACKPILL_F103C8_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103C8_hid_MCU} +) +target_link_libraries(BLACKPILL_F103C8_hid INTERFACE + arm_cortexM3l_math +) + + +# BLACKPILL_F103CB +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103CB_MAXSIZE 131072) +set(BLACKPILL_F103CB_MAXDATASIZE 20480) +set(BLACKPILL_F103CB_MCU cortex-m3) +set(BLACKPILL_F103CB_FPCONF "-") +add_library(BLACKPILL_F103CB INTERFACE) +target_compile_options(BLACKPILL_F103CB INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_MCU} +) +target_compile_definitions(BLACKPILL_F103CB INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103CB" + "BOARD_NAME=\"BLACKPILL_F103CB\"" + "BOARD_ID=BLACKPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103CB_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103CB INTERFACE + "LINKER:--default-script=${BLACKPILL_F103CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_MCU} +) +target_link_libraries(BLACKPILL_F103CB INTERFACE + arm_cortexM3l_math +) + +add_library(BLACKPILL_F103CB_serial_disabled INTERFACE) +target_compile_options(BLACKPILL_F103CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F103CB_serial_generic INTERFACE) +target_compile_options(BLACKPILL_F103CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACKPILL_F103CB_serial_none INTERFACE) +target_compile_options(BLACKPILL_F103CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACKPILL_F103CB_usb_CDC INTERFACE) +target_compile_options(BLACKPILL_F103CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACKPILL_F103CB_usb_CDCgen INTERFACE) +target_compile_options(BLACKPILL_F103CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACKPILL_F103CB_usb_HID INTERFACE) +target_compile_options(BLACKPILL_F103CB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACKPILL_F103CB_usb_none INTERFACE) +target_compile_options(BLACKPILL_F103CB_usb_none INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F103CB_xusb_FS INTERFACE) +target_compile_options(BLACKPILL_F103CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F103CB_xusb_HS INTERFACE) +target_compile_options(BLACKPILL_F103CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACKPILL_F103CB_xusb_HSFS INTERFACE) +target_compile_options(BLACKPILL_F103CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACKPILL_F103CB_dfu2 +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103CB_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103CB_dfu2_MAXSIZE 131072) +set(BLACKPILL_F103CB_dfu2_MAXDATASIZE 20480) +set(BLACKPILL_F103CB_dfu2_MCU cortex-m3) +set(BLACKPILL_F103CB_dfu2_FPCONF "-") +add_library(BLACKPILL_F103CB_dfu2 INTERFACE) +target_compile_options(BLACKPILL_F103CB_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_dfu2_MCU} +) +target_compile_definitions(BLACKPILL_F103CB_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103CB" + "BOARD_NAME=\"BLACKPILL_F103CB\"" + "BOARD_ID=BLACKPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103CB_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103CB_dfu2_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103CB_dfu2 INTERFACE + "LINKER:--default-script=${BLACKPILL_F103CB_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_dfu2_MCU} +) +target_link_libraries(BLACKPILL_F103CB_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLACKPILL_F103CB_dfuo +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103CB_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103CB_dfuo_MAXSIZE 131072) +set(BLACKPILL_F103CB_dfuo_MAXDATASIZE 20480) +set(BLACKPILL_F103CB_dfuo_MCU cortex-m3) +set(BLACKPILL_F103CB_dfuo_FPCONF "-") +add_library(BLACKPILL_F103CB_dfuo INTERFACE) +target_compile_options(BLACKPILL_F103CB_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_dfuo_MCU} +) +target_compile_definitions(BLACKPILL_F103CB_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103CB" + "BOARD_NAME=\"BLACKPILL_F103CB\"" + "BOARD_ID=BLACKPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103CB_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103CB_dfuo_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103CB_dfuo INTERFACE + "LINKER:--default-script=${BLACKPILL_F103CB_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_dfuo_MCU} +) +target_link_libraries(BLACKPILL_F103CB_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLACKPILL_F103CB_hid +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F103CB_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLACKPILL_F103CB_hid_MAXSIZE 131072) +set(BLACKPILL_F103CB_hid_MAXDATASIZE 20480) +set(BLACKPILL_F103CB_hid_MCU cortex-m3) +set(BLACKPILL_F103CB_hid_FPCONF "-") +add_library(BLACKPILL_F103CB_hid INTERFACE) +target_compile_options(BLACKPILL_F103CB_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_hid_MCU} +) +target_compile_definitions(BLACKPILL_F103CB_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLACKPILL_F103CB" + "BOARD_NAME=\"BLACKPILL_F103CB\"" + "BOARD_ID=BLACKPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLACKPILL_F103CB_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLACKPILL_F103CB_hid_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F103CB_hid INTERFACE + "LINKER:--default-script=${BLACKPILL_F103CB_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLACKPILL_F103CB_hid_MCU} +) +target_link_libraries(BLACKPILL_F103CB_hid INTERFACE + arm_cortexM3l_math +) + + +# BLACKPILL_F303CC +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F303CC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(BLACKPILL_F303CC_MAXSIZE 262144) +set(BLACKPILL_F303CC_MAXDATASIZE 40960) +set(BLACKPILL_F303CC_MCU cortex-m4) +set(BLACKPILL_F303CC_FPCONF "-") +add_library(BLACKPILL_F303CC INTERFACE) +target_compile_options(BLACKPILL_F303CC INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F303CC_MCU} +) +target_compile_definitions(BLACKPILL_F303CC INTERFACE + "STM32F3xx" + "ARDUINO_BLACKPILL_F303CC" + "BOARD_NAME=\"BLACKPILL_F303CC\"" + "BOARD_ID=BLACKPILL_F303CC" + "VARIANT_H=\"variant_BLACKPILL_F303CC.h\"" +) +target_include_directories(BLACKPILL_F303CC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${BLACKPILL_F303CC_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F303CC INTERFACE + "LINKER:--default-script=${BLACKPILL_F303CC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F303CC_MCU} +) +target_link_libraries(BLACKPILL_F303CC INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACKPILL_F303CC_serial_disabled INTERFACE) +target_compile_options(BLACKPILL_F303CC_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F303CC_serial_generic INTERFACE) +target_compile_options(BLACKPILL_F303CC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACKPILL_F303CC_serial_none INTERFACE) +target_compile_options(BLACKPILL_F303CC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACKPILL_F303CC_usb_CDC INTERFACE) +target_compile_options(BLACKPILL_F303CC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACKPILL_F303CC_usb_CDCgen INTERFACE) +target_compile_options(BLACKPILL_F303CC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACKPILL_F303CC_usb_HID INTERFACE) +target_compile_options(BLACKPILL_F303CC_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACKPILL_F303CC_usb_none INTERFACE) +target_compile_options(BLACKPILL_F303CC_usb_none INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F303CC_xusb_FS INTERFACE) +target_compile_options(BLACKPILL_F303CC_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F303CC_xusb_HS INTERFACE) +target_compile_options(BLACKPILL_F303CC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACKPILL_F303CC_xusb_HSFS INTERFACE) +target_compile_options(BLACKPILL_F303CC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACKPILL_F401CC +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F401CC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(BLACKPILL_F401CC_MAXSIZE 262144) +set(BLACKPILL_F401CC_MAXDATASIZE 65536) +set(BLACKPILL_F401CC_MCU cortex-m4) +set(BLACKPILL_F401CC_FPCONF "-") +add_library(BLACKPILL_F401CC INTERFACE) +target_compile_options(BLACKPILL_F401CC INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CC_MCU} +) +target_compile_definitions(BLACKPILL_F401CC INTERFACE + "STM32F4xx" + "ARDUINO_BLACKPILL_F401CC" + "BOARD_NAME=\"BLACKPILL_F401CC\"" + "BOARD_ID=BLACKPILL_F401CC" + "VARIANT_H=\"variant_BLACKPILL_F401Cx.h\"" +) +target_include_directories(BLACKPILL_F401CC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACKPILL_F401CC_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F401CC INTERFACE + "LINKER:--default-script=${BLACKPILL_F401CC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CC_MCU} +) +target_link_libraries(BLACKPILL_F401CC INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACKPILL_F401CC_serial_disabled INTERFACE) +target_compile_options(BLACKPILL_F401CC_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F401CC_serial_generic INTERFACE) +target_compile_options(BLACKPILL_F401CC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACKPILL_F401CC_serial_none INTERFACE) +target_compile_options(BLACKPILL_F401CC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACKPILL_F401CC_usb_CDC INTERFACE) +target_compile_options(BLACKPILL_F401CC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACKPILL_F401CC_usb_CDCgen INTERFACE) +target_compile_options(BLACKPILL_F401CC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACKPILL_F401CC_usb_HID INTERFACE) +target_compile_options(BLACKPILL_F401CC_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACKPILL_F401CC_usb_none INTERFACE) +target_compile_options(BLACKPILL_F401CC_usb_none INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F401CC_xusb_FS INTERFACE) +target_compile_options(BLACKPILL_F401CC_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F401CC_xusb_HS INTERFACE) +target_compile_options(BLACKPILL_F401CC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACKPILL_F401CC_xusb_HSFS INTERFACE) +target_compile_options(BLACKPILL_F401CC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACKPILL_F401CC_hid +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F401CC_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(BLACKPILL_F401CC_hid_MAXSIZE 262144) +set(BLACKPILL_F401CC_hid_MAXDATASIZE 65536) +set(BLACKPILL_F401CC_hid_MCU cortex-m4) +set(BLACKPILL_F401CC_hid_FPCONF "-") +add_library(BLACKPILL_F401CC_hid INTERFACE) +target_compile_options(BLACKPILL_F401CC_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CC_hid_MCU} +) +target_compile_definitions(BLACKPILL_F401CC_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACKPILL_F401CC" + "BOARD_NAME=\"BLACKPILL_F401CC\"" + "BOARD_ID=BLACKPILL_F401CC" + "VARIANT_H=\"variant_BLACKPILL_F401Cx.h\"" +) +target_include_directories(BLACKPILL_F401CC_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACKPILL_F401CC_hid_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F401CC_hid INTERFACE + "LINKER:--default-script=${BLACKPILL_F401CC_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CC_hid_MCU} +) +target_link_libraries(BLACKPILL_F401CC_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLACKPILL_F401CE +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F401CE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(BLACKPILL_F401CE_MAXSIZE 524288) +set(BLACKPILL_F401CE_MAXDATASIZE 98304) +set(BLACKPILL_F401CE_MCU cortex-m4) +set(BLACKPILL_F401CE_FPCONF "-") +add_library(BLACKPILL_F401CE INTERFACE) +target_compile_options(BLACKPILL_F401CE INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CE_MCU} +) +target_compile_definitions(BLACKPILL_F401CE INTERFACE + "STM32F4xx" + "ARDUINO_BLACKPILL_F401CE" + "BOARD_NAME=\"BLACKPILL_F401CE\"" + "BOARD_ID=BLACKPILL_F401CE" + "VARIANT_H=\"variant_BLACKPILL_F401Cx.h\"" +) +target_include_directories(BLACKPILL_F401CE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACKPILL_F401CE_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F401CE INTERFACE + "LINKER:--default-script=${BLACKPILL_F401CE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CE_MCU} +) +target_link_libraries(BLACKPILL_F401CE INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACKPILL_F401CE_serial_disabled INTERFACE) +target_compile_options(BLACKPILL_F401CE_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F401CE_serial_generic INTERFACE) +target_compile_options(BLACKPILL_F401CE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACKPILL_F401CE_serial_none INTERFACE) +target_compile_options(BLACKPILL_F401CE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACKPILL_F401CE_usb_CDC INTERFACE) +target_compile_options(BLACKPILL_F401CE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACKPILL_F401CE_usb_CDCgen INTERFACE) +target_compile_options(BLACKPILL_F401CE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACKPILL_F401CE_usb_HID INTERFACE) +target_compile_options(BLACKPILL_F401CE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACKPILL_F401CE_usb_none INTERFACE) +target_compile_options(BLACKPILL_F401CE_usb_none INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F401CE_xusb_FS INTERFACE) +target_compile_options(BLACKPILL_F401CE_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F401CE_xusb_HS INTERFACE) +target_compile_options(BLACKPILL_F401CE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACKPILL_F401CE_xusb_HSFS INTERFACE) +target_compile_options(BLACKPILL_F401CE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACKPILL_F401CE_hid +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F401CE_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(BLACKPILL_F401CE_hid_MAXSIZE 524288) +set(BLACKPILL_F401CE_hid_MAXDATASIZE 98304) +set(BLACKPILL_F401CE_hid_MCU cortex-m4) +set(BLACKPILL_F401CE_hid_FPCONF "-") +add_library(BLACKPILL_F401CE_hid INTERFACE) +target_compile_options(BLACKPILL_F401CE_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CE_hid_MCU} +) +target_compile_definitions(BLACKPILL_F401CE_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACKPILL_F401CE" + "BOARD_NAME=\"BLACKPILL_F401CE\"" + "BOARD_ID=BLACKPILL_F401CE" + "VARIANT_H=\"variant_BLACKPILL_F401Cx.h\"" +) +target_include_directories(BLACKPILL_F401CE_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACKPILL_F401CE_hid_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F401CE_hid INTERFACE + "LINKER:--default-script=${BLACKPILL_F401CE_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F401CE_hid_MCU} +) +target_link_libraries(BLACKPILL_F401CE_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLACKPILL_F411CE +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F411CE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(BLACKPILL_F411CE_MAXSIZE 524288) +set(BLACKPILL_F411CE_MAXDATASIZE 131072) +set(BLACKPILL_F411CE_MCU cortex-m4) +set(BLACKPILL_F411CE_FPCONF "-") +add_library(BLACKPILL_F411CE INTERFACE) +target_compile_options(BLACKPILL_F411CE INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F411CE_MCU} +) +target_compile_definitions(BLACKPILL_F411CE INTERFACE + "STM32F4xx" + "ARDUINO_BLACKPILL_F411CE" + "BOARD_NAME=\"BLACKPILL_F411CE\"" + "BOARD_ID=BLACKPILL_F411CE" + "VARIANT_H=\"variant_BLACKPILL_F411CE.h\"" +) +target_include_directories(BLACKPILL_F411CE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACKPILL_F411CE_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F411CE INTERFACE + "LINKER:--default-script=${BLACKPILL_F411CE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F411CE_MCU} +) +target_link_libraries(BLACKPILL_F411CE INTERFACE + arm_cortexM4lf_math +) + +add_library(BLACKPILL_F411CE_serial_disabled INTERFACE) +target_compile_options(BLACKPILL_F411CE_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F411CE_serial_generic INTERFACE) +target_compile_options(BLACKPILL_F411CE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLACKPILL_F411CE_serial_none INTERFACE) +target_compile_options(BLACKPILL_F411CE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLACKPILL_F411CE_usb_CDC INTERFACE) +target_compile_options(BLACKPILL_F411CE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLACKPILL_F411CE_usb_CDCgen INTERFACE) +target_compile_options(BLACKPILL_F411CE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLACKPILL_F411CE_usb_HID INTERFACE) +target_compile_options(BLACKPILL_F411CE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLACKPILL_F411CE_usb_none INTERFACE) +target_compile_options(BLACKPILL_F411CE_usb_none INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F411CE_xusb_FS INTERFACE) +target_compile_options(BLACKPILL_F411CE_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLACKPILL_F411CE_xusb_HS INTERFACE) +target_compile_options(BLACKPILL_F411CE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLACKPILL_F411CE_xusb_HSFS INTERFACE) +target_compile_options(BLACKPILL_F411CE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLACKPILL_F411CE_hid +# ----------------------------------------------------------------------------- + +set(BLACKPILL_F411CE_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(BLACKPILL_F411CE_hid_MAXSIZE 524288) +set(BLACKPILL_F411CE_hid_MAXDATASIZE 131072) +set(BLACKPILL_F411CE_hid_MCU cortex-m4) +set(BLACKPILL_F411CE_hid_FPCONF "-") +add_library(BLACKPILL_F411CE_hid INTERFACE) +target_compile_options(BLACKPILL_F411CE_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F411CE_hid_MCU} +) +target_compile_definitions(BLACKPILL_F411CE_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLACKPILL_F411CE" + "BOARD_NAME=\"BLACKPILL_F411CE\"" + "BOARD_ID=BLACKPILL_F411CE" + "VARIANT_H=\"variant_BLACKPILL_F411CE.h\"" +) +target_include_directories(BLACKPILL_F411CE_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLACKPILL_F411CE_hid_VARIANT_PATH} +) + +target_link_options(BLACKPILL_F411CE_hid INTERFACE + "LINKER:--default-script=${BLACKPILL_F411CE_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLACKPILL_F411CE_hid_MCU} +) +target_link_libraries(BLACKPILL_F411CE_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLUE_F407VE_MINI +# ----------------------------------------------------------------------------- + +set(BLUE_F407VE_MINI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(BLUE_F407VE_MINI_MAXSIZE 524288) +set(BLUE_F407VE_MINI_MAXDATASIZE 131072) +set(BLUE_F407VE_MINI_MCU cortex-m4) +set(BLUE_F407VE_MINI_FPCONF "-") +add_library(BLUE_F407VE_MINI INTERFACE) +target_compile_options(BLUE_F407VE_MINI INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLUE_F407VE_MINI_MCU} +) +target_compile_definitions(BLUE_F407VE_MINI INTERFACE + "STM32F4xx" + "ARDUINO_BLUE_F407VE_MINI" + "BOARD_NAME=\"BLUE_F407VE_MINI\"" + "BOARD_ID=BLUE_F407VE_MINI" + "VARIANT_H=\"variant_BLUE_F407VE_MINI.h\"" +) +target_include_directories(BLUE_F407VE_MINI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLUE_F407VE_MINI_VARIANT_PATH} +) + +target_link_options(BLUE_F407VE_MINI INTERFACE + "LINKER:--default-script=${BLUE_F407VE_MINI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLUE_F407VE_MINI_MCU} +) +target_link_libraries(BLUE_F407VE_MINI INTERFACE + arm_cortexM4lf_math +) + +add_library(BLUE_F407VE_MINI_serial_disabled INTERFACE) +target_compile_options(BLUE_F407VE_MINI_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUE_F407VE_MINI_serial_generic INTERFACE) +target_compile_options(BLUE_F407VE_MINI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUE_F407VE_MINI_serial_none INTERFACE) +target_compile_options(BLUE_F407VE_MINI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUE_F407VE_MINI_usb_CDC INTERFACE) +target_compile_options(BLUE_F407VE_MINI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUE_F407VE_MINI_usb_CDCgen INTERFACE) +target_compile_options(BLUE_F407VE_MINI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUE_F407VE_MINI_usb_HID INTERFACE) +target_compile_options(BLUE_F407VE_MINI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUE_F407VE_MINI_usb_none INTERFACE) +target_compile_options(BLUE_F407VE_MINI_usb_none INTERFACE + "SHELL:" +) +add_library(BLUE_F407VE_MINI_xusb_FS INTERFACE) +target_compile_options(BLUE_F407VE_MINI_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUE_F407VE_MINI_xusb_HS INTERFACE) +target_compile_options(BLUE_F407VE_MINI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUE_F407VE_MINI_xusb_HSFS INTERFACE) +target_compile_options(BLUE_F407VE_MINI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUE_F407VE_MINI_hid +# ----------------------------------------------------------------------------- + +set(BLUE_F407VE_MINI_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(BLUE_F407VE_MINI_hid_MAXSIZE 524288) +set(BLUE_F407VE_MINI_hid_MAXDATASIZE 131072) +set(BLUE_F407VE_MINI_hid_MCU cortex-m4) +set(BLUE_F407VE_MINI_hid_FPCONF "-") +add_library(BLUE_F407VE_MINI_hid INTERFACE) +target_compile_options(BLUE_F407VE_MINI_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLUE_F407VE_MINI_hid_MCU} +) +target_compile_definitions(BLUE_F407VE_MINI_hid INTERFACE + "STM32F4xx" + "ARDUINO_BLUE_F407VE_MINI" + "BOARD_NAME=\"BLUE_F407VE_MINI\"" + "BOARD_ID=BLUE_F407VE_MINI" + "VARIANT_H=\"variant_BLUE_F407VE_MINI.h\"" +) +target_include_directories(BLUE_F407VE_MINI_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${BLUE_F407VE_MINI_hid_VARIANT_PATH} +) + +target_link_options(BLUE_F407VE_MINI_hid INTERFACE + "LINKER:--default-script=${BLUE_F407VE_MINI_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${BLUE_F407VE_MINI_hid_MCU} +) +target_link_libraries(BLUE_F407VE_MINI_hid INTERFACE + arm_cortexM4lf_math +) + + +# BLUEBUTTON_F103R8T +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103R8T_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103R8T_MAXSIZE 65536) +set(BLUEBUTTON_F103R8T_MAXDATASIZE 20480) +set(BLUEBUTTON_F103R8T_MCU cortex-m3) +set(BLUEBUTTON_F103R8T_FPCONF "-") +add_library(BLUEBUTTON_F103R8T INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_MCU} +) +target_compile_definitions(BLUEBUTTON_F103R8T INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103R8T" + "BOARD_NAME=\"BLUEBUTTON_F103R8T\"" + "BOARD_ID=BLUEBUTTON_F103R8T" + "VARIANT_H=\"variant_BLUEBUTTON_F103R8T.h\"" +) +target_include_directories(BLUEBUTTON_F103R8T INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103R8T_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103R8T INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103R8T_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_MCU} +) +target_link_libraries(BLUEBUTTON_F103R8T INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEBUTTON_F103R8T_serial_disabled INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103R8T_serial_generic INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEBUTTON_F103R8T_serial_none INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEBUTTON_F103R8T_usb_CDC INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEBUTTON_F103R8T_usb_CDCgen INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEBUTTON_F103R8T_usb_HID INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEBUTTON_F103R8T_usb_none INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103R8T_xusb_FS INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103R8T_xusb_HS INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEBUTTON_F103R8T_xusb_HSFS INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEBUTTON_F103R8T_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103R8T_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103R8T_dfu2_MAXSIZE 65536) +set(BLUEBUTTON_F103R8T_dfu2_MAXDATASIZE 20480) +set(BLUEBUTTON_F103R8T_dfu2_MCU cortex-m3) +set(BLUEBUTTON_F103R8T_dfu2_FPCONF "-") +add_library(BLUEBUTTON_F103R8T_dfu2 INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_dfu2_MCU} +) +target_compile_definitions(BLUEBUTTON_F103R8T_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103R8T" + "BOARD_NAME=\"BLUEBUTTON_F103R8T\"" + "BOARD_ID=BLUEBUTTON_F103R8T" + "VARIANT_H=\"variant_BLUEBUTTON_F103R8T.h\"" +) +target_include_directories(BLUEBUTTON_F103R8T_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103R8T_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103R8T_dfu2 INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103R8T_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_dfu2_MCU} +) +target_link_libraries(BLUEBUTTON_F103R8T_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103R8T_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103R8T_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103R8T_dfuo_MAXSIZE 65536) +set(BLUEBUTTON_F103R8T_dfuo_MAXDATASIZE 20480) +set(BLUEBUTTON_F103R8T_dfuo_MCU cortex-m3) +set(BLUEBUTTON_F103R8T_dfuo_FPCONF "-") +add_library(BLUEBUTTON_F103R8T_dfuo INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_dfuo_MCU} +) +target_compile_definitions(BLUEBUTTON_F103R8T_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103R8T" + "BOARD_NAME=\"BLUEBUTTON_F103R8T\"" + "BOARD_ID=BLUEBUTTON_F103R8T" + "VARIANT_H=\"variant_BLUEBUTTON_F103R8T.h\"" +) +target_include_directories(BLUEBUTTON_F103R8T_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103R8T_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103R8T_dfuo INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103R8T_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_dfuo_MCU} +) +target_link_libraries(BLUEBUTTON_F103R8T_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103R8T_hid +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103R8T_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103R8T_hid_MAXSIZE 65536) +set(BLUEBUTTON_F103R8T_hid_MAXDATASIZE 20480) +set(BLUEBUTTON_F103R8T_hid_MCU cortex-m3) +set(BLUEBUTTON_F103R8T_hid_FPCONF "-") +add_library(BLUEBUTTON_F103R8T_hid INTERFACE) +target_compile_options(BLUEBUTTON_F103R8T_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_hid_MCU} +) +target_compile_definitions(BLUEBUTTON_F103R8T_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103R8T" + "BOARD_NAME=\"BLUEBUTTON_F103R8T\"" + "BOARD_ID=BLUEBUTTON_F103R8T" + "VARIANT_H=\"variant_BLUEBUTTON_F103R8T.h\"" +) +target_include_directories(BLUEBUTTON_F103R8T_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103R8T_hid_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103R8T_hid INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103R8T_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103R8T_hid_MCU} +) +target_link_libraries(BLUEBUTTON_F103R8T_hid INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RBT +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RBT_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103RBT_MAXSIZE 131072) +set(BLUEBUTTON_F103RBT_MAXDATASIZE 20480) +set(BLUEBUTTON_F103RBT_MCU cortex-m3) +set(BLUEBUTTON_F103RBT_FPCONF "-") +add_library(BLUEBUTTON_F103RBT INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RBT INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RBT" + "BOARD_NAME=\"BLUEBUTTON_F103RBT\"" + "BOARD_ID=BLUEBUTTON_F103RBT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RBT.h\"" +) +target_include_directories(BLUEBUTTON_F103RBT INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RBT_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RBT INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RBT_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_MCU} +) +target_link_libraries(BLUEBUTTON_F103RBT INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEBUTTON_F103RBT_serial_disabled INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RBT_serial_generic INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEBUTTON_F103RBT_serial_none INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEBUTTON_F103RBT_usb_CDC INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEBUTTON_F103RBT_usb_CDCgen INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEBUTTON_F103RBT_usb_HID INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEBUTTON_F103RBT_usb_none INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RBT_xusb_FS INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RBT_xusb_HS INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEBUTTON_F103RBT_xusb_HSFS INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEBUTTON_F103RBT_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RBT_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103RBT_dfu2_MAXSIZE 131072) +set(BLUEBUTTON_F103RBT_dfu2_MAXDATASIZE 20480) +set(BLUEBUTTON_F103RBT_dfu2_MCU cortex-m3) +set(BLUEBUTTON_F103RBT_dfu2_FPCONF "-") +add_library(BLUEBUTTON_F103RBT_dfu2 INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_dfu2_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RBT_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RBT" + "BOARD_NAME=\"BLUEBUTTON_F103RBT\"" + "BOARD_ID=BLUEBUTTON_F103RBT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RBT.h\"" +) +target_include_directories(BLUEBUTTON_F103RBT_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RBT_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RBT_dfu2 INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RBT_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_dfu2_MCU} +) +target_link_libraries(BLUEBUTTON_F103RBT_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RBT_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RBT_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103RBT_dfuo_MAXSIZE 131072) +set(BLUEBUTTON_F103RBT_dfuo_MAXDATASIZE 20480) +set(BLUEBUTTON_F103RBT_dfuo_MCU cortex-m3) +set(BLUEBUTTON_F103RBT_dfuo_FPCONF "-") +add_library(BLUEBUTTON_F103RBT_dfuo INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_dfuo_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RBT_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RBT" + "BOARD_NAME=\"BLUEBUTTON_F103RBT\"" + "BOARD_ID=BLUEBUTTON_F103RBT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RBT.h\"" +) +target_include_directories(BLUEBUTTON_F103RBT_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RBT_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RBT_dfuo INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RBT_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_dfuo_MCU} +) +target_link_libraries(BLUEBUTTON_F103RBT_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RBT_hid +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RBT_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(BLUEBUTTON_F103RBT_hid_MAXSIZE 131072) +set(BLUEBUTTON_F103RBT_hid_MAXDATASIZE 20480) +set(BLUEBUTTON_F103RBT_hid_MCU cortex-m3) +set(BLUEBUTTON_F103RBT_hid_FPCONF "-") +add_library(BLUEBUTTON_F103RBT_hid INTERFACE) +target_compile_options(BLUEBUTTON_F103RBT_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_hid_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RBT_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RBT" + "BOARD_NAME=\"BLUEBUTTON_F103RBT\"" + "BOARD_ID=BLUEBUTTON_F103RBT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RBT.h\"" +) +target_include_directories(BLUEBUTTON_F103RBT_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RBT_hid_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RBT_hid INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RBT_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RBT_hid_MCU} +) +target_link_libraries(BLUEBUTTON_F103RBT_hid INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RCT +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RCT_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RCT_MAXSIZE 262144) +set(BLUEBUTTON_F103RCT_MAXDATASIZE 49152) +set(BLUEBUTTON_F103RCT_MCU cortex-m3) +set(BLUEBUTTON_F103RCT_FPCONF "-") +add_library(BLUEBUTTON_F103RCT INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RCT INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RCT" + "BOARD_NAME=\"BLUEBUTTON_F103RCT\"" + "BOARD_ID=BLUEBUTTON_F103RCT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RCT.h\"" +) +target_include_directories(BLUEBUTTON_F103RCT INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RCT_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RCT INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RCT_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_MCU} +) +target_link_libraries(BLUEBUTTON_F103RCT INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEBUTTON_F103RCT_serial_disabled INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RCT_serial_generic INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEBUTTON_F103RCT_serial_none INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEBUTTON_F103RCT_usb_CDC INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEBUTTON_F103RCT_usb_CDCgen INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEBUTTON_F103RCT_usb_HID INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEBUTTON_F103RCT_usb_none INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RCT_xusb_FS INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RCT_xusb_HS INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEBUTTON_F103RCT_xusb_HSFS INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEBUTTON_F103RCT_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RCT_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RCT_dfu2_MAXSIZE 262144) +set(BLUEBUTTON_F103RCT_dfu2_MAXDATASIZE 49152) +set(BLUEBUTTON_F103RCT_dfu2_MCU cortex-m3) +set(BLUEBUTTON_F103RCT_dfu2_FPCONF "-") +add_library(BLUEBUTTON_F103RCT_dfu2 INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_dfu2_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RCT_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RCT" + "BOARD_NAME=\"BLUEBUTTON_F103RCT\"" + "BOARD_ID=BLUEBUTTON_F103RCT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RCT.h\"" +) +target_include_directories(BLUEBUTTON_F103RCT_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RCT_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RCT_dfu2 INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RCT_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_dfu2_MCU} +) +target_link_libraries(BLUEBUTTON_F103RCT_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RCT_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RCT_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RCT_dfuo_MAXSIZE 262144) +set(BLUEBUTTON_F103RCT_dfuo_MAXDATASIZE 49152) +set(BLUEBUTTON_F103RCT_dfuo_MCU cortex-m3) +set(BLUEBUTTON_F103RCT_dfuo_FPCONF "-") +add_library(BLUEBUTTON_F103RCT_dfuo INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_dfuo_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RCT_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RCT" + "BOARD_NAME=\"BLUEBUTTON_F103RCT\"" + "BOARD_ID=BLUEBUTTON_F103RCT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RCT.h\"" +) +target_include_directories(BLUEBUTTON_F103RCT_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RCT_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RCT_dfuo INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RCT_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_dfuo_MCU} +) +target_link_libraries(BLUEBUTTON_F103RCT_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RCT_hid +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RCT_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RCT_hid_MAXSIZE 262144) +set(BLUEBUTTON_F103RCT_hid_MAXDATASIZE 49152) +set(BLUEBUTTON_F103RCT_hid_MCU cortex-m3) +set(BLUEBUTTON_F103RCT_hid_FPCONF "-") +add_library(BLUEBUTTON_F103RCT_hid INTERFACE) +target_compile_options(BLUEBUTTON_F103RCT_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_hid_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RCT_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RCT" + "BOARD_NAME=\"BLUEBUTTON_F103RCT\"" + "BOARD_ID=BLUEBUTTON_F103RCT" + "VARIANT_H=\"variant_BLUEBUTTON_F103RCT.h\"" +) +target_include_directories(BLUEBUTTON_F103RCT_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RCT_hid_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RCT_hid INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RCT_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RCT_hid_MCU} +) +target_link_libraries(BLUEBUTTON_F103RCT_hid INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RET +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RET_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RET_MAXSIZE 524288) +set(BLUEBUTTON_F103RET_MAXDATASIZE 65536) +set(BLUEBUTTON_F103RET_MCU cortex-m3) +set(BLUEBUTTON_F103RET_FPCONF "-") +add_library(BLUEBUTTON_F103RET INTERFACE) +target_compile_options(BLUEBUTTON_F103RET INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RET INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RET" + "BOARD_NAME=\"BLUEBUTTON_F103RET\"" + "BOARD_ID=BLUEBUTTON_F103RET" + "VARIANT_H=\"variant_BLUEBUTTON_F103RET.h\"" +) +target_include_directories(BLUEBUTTON_F103RET INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RET_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RET INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RET_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_MCU} +) +target_link_libraries(BLUEBUTTON_F103RET INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEBUTTON_F103RET_serial_disabled INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RET_serial_generic INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEBUTTON_F103RET_serial_none INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEBUTTON_F103RET_usb_CDC INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEBUTTON_F103RET_usb_CDCgen INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEBUTTON_F103RET_usb_HID INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEBUTTON_F103RET_usb_none INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RET_xusb_FS INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEBUTTON_F103RET_xusb_HS INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEBUTTON_F103RET_xusb_HSFS INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEBUTTON_F103RET_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RET_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RET_dfu2_MAXSIZE 524288) +set(BLUEBUTTON_F103RET_dfu2_MAXDATASIZE 65536) +set(BLUEBUTTON_F103RET_dfu2_MCU cortex-m3) +set(BLUEBUTTON_F103RET_dfu2_FPCONF "-") +add_library(BLUEBUTTON_F103RET_dfu2 INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_dfu2_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RET_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RET" + "BOARD_NAME=\"BLUEBUTTON_F103RET\"" + "BOARD_ID=BLUEBUTTON_F103RET" + "VARIANT_H=\"variant_BLUEBUTTON_F103RET.h\"" +) +target_include_directories(BLUEBUTTON_F103RET_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RET_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RET_dfu2 INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RET_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_dfu2_MCU} +) +target_link_libraries(BLUEBUTTON_F103RET_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RET_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RET_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RET_dfuo_MAXSIZE 524288) +set(BLUEBUTTON_F103RET_dfuo_MAXDATASIZE 65536) +set(BLUEBUTTON_F103RET_dfuo_MCU cortex-m3) +set(BLUEBUTTON_F103RET_dfuo_FPCONF "-") +add_library(BLUEBUTTON_F103RET_dfuo INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_dfuo_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RET_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RET" + "BOARD_NAME=\"BLUEBUTTON_F103RET\"" + "BOARD_ID=BLUEBUTTON_F103RET" + "VARIANT_H=\"variant_BLUEBUTTON_F103RET.h\"" +) +target_include_directories(BLUEBUTTON_F103RET_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RET_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RET_dfuo INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RET_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_dfuo_MCU} +) +target_link_libraries(BLUEBUTTON_F103RET_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEBUTTON_F103RET_hid +# ----------------------------------------------------------------------------- + +set(BLUEBUTTON_F103RET_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(BLUEBUTTON_F103RET_hid_MAXSIZE 524288) +set(BLUEBUTTON_F103RET_hid_MAXDATASIZE 65536) +set(BLUEBUTTON_F103RET_hid_MCU cortex-m3) +set(BLUEBUTTON_F103RET_hid_FPCONF "-") +add_library(BLUEBUTTON_F103RET_hid INTERFACE) +target_compile_options(BLUEBUTTON_F103RET_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_hid_MCU} +) +target_compile_definitions(BLUEBUTTON_F103RET_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEBUTTON_F103RET" + "BOARD_NAME=\"BLUEBUTTON_F103RET\"" + "BOARD_ID=BLUEBUTTON_F103RET" + "VARIANT_H=\"variant_BLUEBUTTON_F103RET.h\"" +) +target_include_directories(BLUEBUTTON_F103RET_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEBUTTON_F103RET_hid_VARIANT_PATH} +) + +target_link_options(BLUEBUTTON_F103RET_hid INTERFACE + "LINKER:--default-script=${BLUEBUTTON_F103RET_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${BLUEBUTTON_F103RET_hid_MCU} +) +target_link_libraries(BLUEBUTTON_F103RET_hid INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103C6 +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C6_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(BLUEPILL_F103C6_MAXSIZE 32768) +set(BLUEPILL_F103C6_MAXDATASIZE 10240) +set(BLUEPILL_F103C6_MCU cortex-m3) +set(BLUEPILL_F103C6_FPCONF "-") +add_library(BLUEPILL_F103C6 INTERFACE) +target_compile_options(BLUEPILL_F103C6 INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_MCU} +) +target_compile_definitions(BLUEPILL_F103C6 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C6" + "BOARD_NAME=\"BLUEPILL_F103C6\"" + "BOARD_ID=BLUEPILL_F103C6" + "VARIANT_H=\"variant_BLUEPILL_F103C6.h\"" +) +target_include_directories(BLUEPILL_F103C6 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C6_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C6 INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C6_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_MCU} +) +target_link_libraries(BLUEPILL_F103C6 INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEPILL_F103C6_serial_disabled INTERFACE) +target_compile_options(BLUEPILL_F103C6_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103C6_serial_generic INTERFACE) +target_compile_options(BLUEPILL_F103C6_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEPILL_F103C6_serial_none INTERFACE) +target_compile_options(BLUEPILL_F103C6_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEPILL_F103C6_usb_CDC INTERFACE) +target_compile_options(BLUEPILL_F103C6_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEPILL_F103C6_usb_CDCgen INTERFACE) +target_compile_options(BLUEPILL_F103C6_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEPILL_F103C6_usb_HID INTERFACE) +target_compile_options(BLUEPILL_F103C6_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEPILL_F103C6_usb_none INTERFACE) +target_compile_options(BLUEPILL_F103C6_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103C6_xusb_FS INTERFACE) +target_compile_options(BLUEPILL_F103C6_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103C6_xusb_HS INTERFACE) +target_compile_options(BLUEPILL_F103C6_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEPILL_F103C6_xusb_HSFS INTERFACE) +target_compile_options(BLUEPILL_F103C6_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEPILL_F103C6_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C6_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(BLUEPILL_F103C6_dfu2_MAXSIZE 32768) +set(BLUEPILL_F103C6_dfu2_MAXDATASIZE 10240) +set(BLUEPILL_F103C6_dfu2_MCU cortex-m3) +set(BLUEPILL_F103C6_dfu2_FPCONF "-") +add_library(BLUEPILL_F103C6_dfu2 INTERFACE) +target_compile_options(BLUEPILL_F103C6_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_dfu2_MCU} +) +target_compile_definitions(BLUEPILL_F103C6_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C6" + "BOARD_NAME=\"BLUEPILL_F103C6\"" + "BOARD_ID=BLUEPILL_F103C6" + "VARIANT_H=\"variant_BLUEPILL_F103C6.h\"" +) +target_include_directories(BLUEPILL_F103C6_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C6_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C6_dfu2 INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C6_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_dfu2_MCU} +) +target_link_libraries(BLUEPILL_F103C6_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103C6_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C6_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(BLUEPILL_F103C6_dfuo_MAXSIZE 32768) +set(BLUEPILL_F103C6_dfuo_MAXDATASIZE 10240) +set(BLUEPILL_F103C6_dfuo_MCU cortex-m3) +set(BLUEPILL_F103C6_dfuo_FPCONF "-") +add_library(BLUEPILL_F103C6_dfuo INTERFACE) +target_compile_options(BLUEPILL_F103C6_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_dfuo_MCU} +) +target_compile_definitions(BLUEPILL_F103C6_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C6" + "BOARD_NAME=\"BLUEPILL_F103C6\"" + "BOARD_ID=BLUEPILL_F103C6" + "VARIANT_H=\"variant_BLUEPILL_F103C6.h\"" +) +target_include_directories(BLUEPILL_F103C6_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C6_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C6_dfuo INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C6_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_dfuo_MCU} +) +target_link_libraries(BLUEPILL_F103C6_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103C6_hid +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C6_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(BLUEPILL_F103C6_hid_MAXSIZE 32768) +set(BLUEPILL_F103C6_hid_MAXDATASIZE 10240) +set(BLUEPILL_F103C6_hid_MCU cortex-m3) +set(BLUEPILL_F103C6_hid_FPCONF "-") +add_library(BLUEPILL_F103C6_hid INTERFACE) +target_compile_options(BLUEPILL_F103C6_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_hid_MCU} +) +target_compile_definitions(BLUEPILL_F103C6_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C6" + "BOARD_NAME=\"BLUEPILL_F103C6\"" + "BOARD_ID=BLUEPILL_F103C6" + "VARIANT_H=\"variant_BLUEPILL_F103C6.h\"" +) +target_include_directories(BLUEPILL_F103C6_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C6_hid_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C6_hid INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C6_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${BLUEPILL_F103C6_hid_MCU} +) +target_link_libraries(BLUEPILL_F103C6_hid INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103C8 +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103C8_MAXSIZE 65536) +set(BLUEPILL_F103C8_MAXDATASIZE 20480) +set(BLUEPILL_F103C8_MCU cortex-m3) +set(BLUEPILL_F103C8_FPCONF "-") +add_library(BLUEPILL_F103C8 INTERFACE) +target_compile_options(BLUEPILL_F103C8 INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_MCU} +) +target_compile_definitions(BLUEPILL_F103C8 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C8" + "BOARD_NAME=\"BLUEPILL_F103C8\"" + "BOARD_ID=BLUEPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103C8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C8_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C8 INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_MCU} +) +target_link_libraries(BLUEPILL_F103C8 INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEPILL_F103C8_serial_disabled INTERFACE) +target_compile_options(BLUEPILL_F103C8_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103C8_serial_generic INTERFACE) +target_compile_options(BLUEPILL_F103C8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEPILL_F103C8_serial_none INTERFACE) +target_compile_options(BLUEPILL_F103C8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEPILL_F103C8_usb_CDC INTERFACE) +target_compile_options(BLUEPILL_F103C8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEPILL_F103C8_usb_CDCgen INTERFACE) +target_compile_options(BLUEPILL_F103C8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEPILL_F103C8_usb_HID INTERFACE) +target_compile_options(BLUEPILL_F103C8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEPILL_F103C8_usb_none INTERFACE) +target_compile_options(BLUEPILL_F103C8_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103C8_xusb_FS INTERFACE) +target_compile_options(BLUEPILL_F103C8_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103C8_xusb_HS INTERFACE) +target_compile_options(BLUEPILL_F103C8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEPILL_F103C8_xusb_HSFS INTERFACE) +target_compile_options(BLUEPILL_F103C8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEPILL_F103C8_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C8_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103C8_dfu2_MAXSIZE 65536) +set(BLUEPILL_F103C8_dfu2_MAXDATASIZE 20480) +set(BLUEPILL_F103C8_dfu2_MCU cortex-m3) +set(BLUEPILL_F103C8_dfu2_FPCONF "-") +add_library(BLUEPILL_F103C8_dfu2 INTERFACE) +target_compile_options(BLUEPILL_F103C8_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_dfu2_MCU} +) +target_compile_definitions(BLUEPILL_F103C8_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C8" + "BOARD_NAME=\"BLUEPILL_F103C8\"" + "BOARD_ID=BLUEPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103C8_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C8_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C8_dfu2 INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C8_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_dfu2_MCU} +) +target_link_libraries(BLUEPILL_F103C8_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103C8_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C8_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103C8_dfuo_MAXSIZE 65536) +set(BLUEPILL_F103C8_dfuo_MAXDATASIZE 20480) +set(BLUEPILL_F103C8_dfuo_MCU cortex-m3) +set(BLUEPILL_F103C8_dfuo_FPCONF "-") +add_library(BLUEPILL_F103C8_dfuo INTERFACE) +target_compile_options(BLUEPILL_F103C8_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_dfuo_MCU} +) +target_compile_definitions(BLUEPILL_F103C8_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C8" + "BOARD_NAME=\"BLUEPILL_F103C8\"" + "BOARD_ID=BLUEPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103C8_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C8_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C8_dfuo INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C8_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_dfuo_MCU} +) +target_link_libraries(BLUEPILL_F103C8_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103C8_hid +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103C8_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103C8_hid_MAXSIZE 65536) +set(BLUEPILL_F103C8_hid_MAXDATASIZE 20480) +set(BLUEPILL_F103C8_hid_MCU cortex-m3) +set(BLUEPILL_F103C8_hid_FPCONF "-") +add_library(BLUEPILL_F103C8_hid INTERFACE) +target_compile_options(BLUEPILL_F103C8_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_hid_MCU} +) +target_compile_definitions(BLUEPILL_F103C8_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103C8" + "BOARD_NAME=\"BLUEPILL_F103C8\"" + "BOARD_ID=BLUEPILL_F103C8" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103C8_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103C8_hid_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103C8_hid INTERFACE + "LINKER:--default-script=${BLUEPILL_F103C8_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103C8_hid_MCU} +) +target_link_libraries(BLUEPILL_F103C8_hid INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103CB +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103CB_MAXSIZE 131072) +set(BLUEPILL_F103CB_MAXDATASIZE 20480) +set(BLUEPILL_F103CB_MCU cortex-m3) +set(BLUEPILL_F103CB_FPCONF "-") +add_library(BLUEPILL_F103CB INTERFACE) +target_compile_options(BLUEPILL_F103CB INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_MCU} +) +target_compile_definitions(BLUEPILL_F103CB INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103CB" + "BOARD_NAME=\"BLUEPILL_F103CB\"" + "BOARD_ID=BLUEPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103CB_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103CB INTERFACE + "LINKER:--default-script=${BLUEPILL_F103CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_MCU} +) +target_link_libraries(BLUEPILL_F103CB INTERFACE + arm_cortexM3l_math +) + +add_library(BLUEPILL_F103CB_serial_disabled INTERFACE) +target_compile_options(BLUEPILL_F103CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103CB_serial_generic INTERFACE) +target_compile_options(BLUEPILL_F103CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(BLUEPILL_F103CB_serial_none INTERFACE) +target_compile_options(BLUEPILL_F103CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(BLUEPILL_F103CB_usb_CDC INTERFACE) +target_compile_options(BLUEPILL_F103CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(BLUEPILL_F103CB_usb_CDCgen INTERFACE) +target_compile_options(BLUEPILL_F103CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(BLUEPILL_F103CB_usb_HID INTERFACE) +target_compile_options(BLUEPILL_F103CB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(BLUEPILL_F103CB_usb_none INTERFACE) +target_compile_options(BLUEPILL_F103CB_usb_none INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103CB_xusb_FS INTERFACE) +target_compile_options(BLUEPILL_F103CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(BLUEPILL_F103CB_xusb_HS INTERFACE) +target_compile_options(BLUEPILL_F103CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(BLUEPILL_F103CB_xusb_HSFS INTERFACE) +target_compile_options(BLUEPILL_F103CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# BLUEPILL_F103CB_dfu2 +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103CB_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103CB_dfu2_MAXSIZE 131072) +set(BLUEPILL_F103CB_dfu2_MAXDATASIZE 20480) +set(BLUEPILL_F103CB_dfu2_MCU cortex-m3) +set(BLUEPILL_F103CB_dfu2_FPCONF "-") +add_library(BLUEPILL_F103CB_dfu2 INTERFACE) +target_compile_options(BLUEPILL_F103CB_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_dfu2_MCU} +) +target_compile_definitions(BLUEPILL_F103CB_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103CB" + "BOARD_NAME=\"BLUEPILL_F103CB\"" + "BOARD_ID=BLUEPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103CB_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103CB_dfu2_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103CB_dfu2 INTERFACE + "LINKER:--default-script=${BLUEPILL_F103CB_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_dfu2_MCU} +) +target_link_libraries(BLUEPILL_F103CB_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103CB_dfuo +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103CB_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103CB_dfuo_MAXSIZE 131072) +set(BLUEPILL_F103CB_dfuo_MAXDATASIZE 20480) +set(BLUEPILL_F103CB_dfuo_MCU cortex-m3) +set(BLUEPILL_F103CB_dfuo_FPCONF "-") +add_library(BLUEPILL_F103CB_dfuo INTERFACE) +target_compile_options(BLUEPILL_F103CB_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_dfuo_MCU} +) +target_compile_definitions(BLUEPILL_F103CB_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103CB" + "BOARD_NAME=\"BLUEPILL_F103CB\"" + "BOARD_ID=BLUEPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103CB_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103CB_dfuo_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103CB_dfuo INTERFACE + "LINKER:--default-script=${BLUEPILL_F103CB_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_dfuo_MCU} +) +target_link_libraries(BLUEPILL_F103CB_dfuo INTERFACE + arm_cortexM3l_math +) + + +# BLUEPILL_F103CB_hid +# ----------------------------------------------------------------------------- + +set(BLUEPILL_F103CB_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(BLUEPILL_F103CB_hid_MAXSIZE 131072) +set(BLUEPILL_F103CB_hid_MAXDATASIZE 20480) +set(BLUEPILL_F103CB_hid_MCU cortex-m3) +set(BLUEPILL_F103CB_hid_FPCONF "-") +add_library(BLUEPILL_F103CB_hid INTERFACE) +target_compile_options(BLUEPILL_F103CB_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_hid_MCU} +) +target_compile_definitions(BLUEPILL_F103CB_hid INTERFACE + "STM32F1xx" + "ARDUINO_BLUEPILL_F103CB" + "BOARD_NAME=\"BLUEPILL_F103CB\"" + "BOARD_ID=BLUEPILL_F103CB" + "VARIANT_H=\"variant_PILL_F103Cx.h\"" +) +target_include_directories(BLUEPILL_F103CB_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${BLUEPILL_F103CB_hid_VARIANT_PATH} +) + +target_link_options(BLUEPILL_F103CB_hid INTERFACE + "LINKER:--default-script=${BLUEPILL_F103CB_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${BLUEPILL_F103CB_hid_MCU} +) +target_link_libraries(BLUEPILL_F103CB_hid INTERFACE + arm_cortexM3l_math +) + + +# CoreBoard_F401RC +# ----------------------------------------------------------------------------- + +set(CoreBoard_F401RC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(CoreBoard_F401RC_MAXSIZE 262144) +set(CoreBoard_F401RC_MAXDATASIZE 65536) +set(CoreBoard_F401RC_MCU cortex-m4) +set(CoreBoard_F401RC_FPCONF "-") +add_library(CoreBoard_F401RC INTERFACE) +target_compile_options(CoreBoard_F401RC INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${CoreBoard_F401RC_MCU} +) +target_compile_definitions(CoreBoard_F401RC INTERFACE + "STM32F4xx" + "ARDUINO_CoreBoard_F401RC" + "BOARD_NAME=\"CoreBoard_F401RC\"" + "BOARD_ID=CoreBoard_F401RC" + "VARIANT_H=\"variant_CoreBoard_F401RC.h\"" +) +target_include_directories(CoreBoard_F401RC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${CoreBoard_F401RC_VARIANT_PATH} +) + +target_link_options(CoreBoard_F401RC INTERFACE + "LINKER:--default-script=${CoreBoard_F401RC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${CoreBoard_F401RC_MCU} +) +target_link_libraries(CoreBoard_F401RC INTERFACE + arm_cortexM4lf_math +) + +add_library(CoreBoard_F401RC_serial_disabled INTERFACE) +target_compile_options(CoreBoard_F401RC_serial_disabled INTERFACE + "SHELL:" +) +add_library(CoreBoard_F401RC_serial_generic INTERFACE) +target_compile_options(CoreBoard_F401RC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(CoreBoard_F401RC_serial_none INTERFACE) +target_compile_options(CoreBoard_F401RC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(CoreBoard_F401RC_usb_CDC INTERFACE) +target_compile_options(CoreBoard_F401RC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(CoreBoard_F401RC_usb_CDCgen INTERFACE) +target_compile_options(CoreBoard_F401RC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(CoreBoard_F401RC_usb_HID INTERFACE) +target_compile_options(CoreBoard_F401RC_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(CoreBoard_F401RC_usb_none INTERFACE) +target_compile_options(CoreBoard_F401RC_usb_none INTERFACE + "SHELL:" +) +add_library(CoreBoard_F401RC_xusb_FS INTERFACE) +target_compile_options(CoreBoard_F401RC_xusb_FS INTERFACE + "SHELL:" +) +add_library(CoreBoard_F401RC_xusb_HS INTERFACE) +target_compile_options(CoreBoard_F401RC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(CoreBoard_F401RC_xusb_HSFS INTERFACE) +target_compile_options(CoreBoard_F401RC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# CoreBoard_F401RC_hid +# ----------------------------------------------------------------------------- + +set(CoreBoard_F401RC_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(CoreBoard_F401RC_hid_MAXSIZE 262144) +set(CoreBoard_F401RC_hid_MAXDATASIZE 65536) +set(CoreBoard_F401RC_hid_MCU cortex-m4) +set(CoreBoard_F401RC_hid_FPCONF "-") +add_library(CoreBoard_F401RC_hid INTERFACE) +target_compile_options(CoreBoard_F401RC_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${CoreBoard_F401RC_hid_MCU} +) +target_compile_definitions(CoreBoard_F401RC_hid INTERFACE + "STM32F4xx" + "ARDUINO_CoreBoard_F401RC" + "BOARD_NAME=\"CoreBoard_F401RC\"" + "BOARD_ID=CoreBoard_F401RC" + "VARIANT_H=\"variant_CoreBoard_F401RC.h\"" +) +target_include_directories(CoreBoard_F401RC_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${CoreBoard_F401RC_hid_VARIANT_PATH} +) + +target_link_options(CoreBoard_F401RC_hid INTERFACE + "LINKER:--default-script=${CoreBoard_F401RC_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${CoreBoard_F401RC_hid_MCU} +) +target_link_libraries(CoreBoard_F401RC_hid INTERFACE + arm_cortexM4lf_math +) + + +# DAISY_PATCH_SM +# ----------------------------------------------------------------------------- + +set(DAISY_PATCH_SM_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(DAISY_PATCH_SM_MAXSIZE 131072) +set(DAISY_PATCH_SM_MAXDATASIZE 524288) +set(DAISY_PATCH_SM_MCU cortex-m7) +set(DAISY_PATCH_SM_FPCONF "-") +add_library(DAISY_PATCH_SM INTERFACE) +target_compile_options(DAISY_PATCH_SM INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DAISY_PATCH_SM_MCU} +) +target_compile_definitions(DAISY_PATCH_SM INTERFACE + "STM32H7xx" + "ARDUINO_DAISY_PATCH_SM" + "BOARD_NAME=\"DAISY_PATCH_SM\"" + "BOARD_ID=DAISY_PATCH_SM" + "VARIANT_H=\"variant_DAISY_PATCH_SM.h\"" +) +target_include_directories(DAISY_PATCH_SM INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${DAISY_PATCH_SM_VARIANT_PATH} +) + +target_link_options(DAISY_PATCH_SM INTERFACE + "LINKER:--default-script=${DAISY_PATCH_SM_VARIANT_PATH}/DAISY_SEED.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DAISY_PATCH_SM_MCU} +) +target_link_libraries(DAISY_PATCH_SM INTERFACE + arm_cortexM7lfsp_math +) + +add_library(DAISY_PATCH_SM_serial_disabled INTERFACE) +target_compile_options(DAISY_PATCH_SM_serial_disabled INTERFACE + "SHELL:" +) +add_library(DAISY_PATCH_SM_serial_generic INTERFACE) +target_compile_options(DAISY_PATCH_SM_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DAISY_PATCH_SM_serial_none INTERFACE) +target_compile_options(DAISY_PATCH_SM_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DAISY_PATCH_SM_usb_CDC INTERFACE) +target_compile_options(DAISY_PATCH_SM_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DAISY_PATCH_SM_usb_CDCgen INTERFACE) +target_compile_options(DAISY_PATCH_SM_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DAISY_PATCH_SM_usb_HID INTERFACE) +target_compile_options(DAISY_PATCH_SM_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DAISY_PATCH_SM_usb_none INTERFACE) +target_compile_options(DAISY_PATCH_SM_usb_none INTERFACE + "SHELL:" +) +add_library(DAISY_PATCH_SM_xusb_FS INTERFACE) +target_compile_options(DAISY_PATCH_SM_xusb_FS INTERFACE + "SHELL:" +) +add_library(DAISY_PATCH_SM_xusb_HS INTERFACE) +target_compile_options(DAISY_PATCH_SM_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DAISY_PATCH_SM_xusb_HSFS INTERFACE) +target_compile_options(DAISY_PATCH_SM_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DAISY_PETAL_SM +# ----------------------------------------------------------------------------- + +set(DAISY_PETAL_SM_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(DAISY_PETAL_SM_MAXSIZE 131072) +set(DAISY_PETAL_SM_MAXDATASIZE 524288) +set(DAISY_PETAL_SM_MCU cortex-m7) +set(DAISY_PETAL_SM_FPCONF "-") +add_library(DAISY_PETAL_SM INTERFACE) +target_compile_options(DAISY_PETAL_SM INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DAISY_PETAL_SM_MCU} +) +target_compile_definitions(DAISY_PETAL_SM INTERFACE + "STM32H7xx" + "ARDUINO_DAISY_PETAL_SM" + "BOARD_NAME=\"DAISY_PETAL_SM\"" + "BOARD_ID=DAISY_PETAL_SM" + "VARIANT_H=\"variant_DAISY_PETAL_SM.h\"" +) +target_include_directories(DAISY_PETAL_SM INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${DAISY_PETAL_SM_VARIANT_PATH} +) + +target_link_options(DAISY_PETAL_SM INTERFACE + "LINKER:--default-script=${DAISY_PETAL_SM_VARIANT_PATH}/DAISY_SEED.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DAISY_PETAL_SM_MCU} +) +target_link_libraries(DAISY_PETAL_SM INTERFACE + arm_cortexM7lfsp_math +) + +add_library(DAISY_PETAL_SM_serial_disabled INTERFACE) +target_compile_options(DAISY_PETAL_SM_serial_disabled INTERFACE + "SHELL:" +) +add_library(DAISY_PETAL_SM_serial_generic INTERFACE) +target_compile_options(DAISY_PETAL_SM_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DAISY_PETAL_SM_serial_none INTERFACE) +target_compile_options(DAISY_PETAL_SM_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DAISY_PETAL_SM_usb_CDC INTERFACE) +target_compile_options(DAISY_PETAL_SM_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DAISY_PETAL_SM_usb_CDCgen INTERFACE) +target_compile_options(DAISY_PETAL_SM_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DAISY_PETAL_SM_usb_HID INTERFACE) +target_compile_options(DAISY_PETAL_SM_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DAISY_PETAL_SM_usb_none INTERFACE) +target_compile_options(DAISY_PETAL_SM_usb_none INTERFACE + "SHELL:" +) +add_library(DAISY_PETAL_SM_xusb_FS INTERFACE) +target_compile_options(DAISY_PETAL_SM_xusb_FS INTERFACE + "SHELL:" +) +add_library(DAISY_PETAL_SM_xusb_HS INTERFACE) +target_compile_options(DAISY_PETAL_SM_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DAISY_PETAL_SM_xusb_HSFS INTERFACE) +target_compile_options(DAISY_PETAL_SM_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DAISY_SEED +# ----------------------------------------------------------------------------- + +set(DAISY_SEED_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(DAISY_SEED_MAXSIZE 131072) +set(DAISY_SEED_MAXDATASIZE 524288) +set(DAISY_SEED_MCU cortex-m7) +set(DAISY_SEED_FPCONF "-") +add_library(DAISY_SEED INTERFACE) +target_compile_options(DAISY_SEED INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DAISY_SEED_MCU} +) +target_compile_definitions(DAISY_SEED INTERFACE + "STM32H7xx" + "ARDUINO_DAISY_SEED" + "BOARD_NAME=\"DAISY_SEED\"" + "BOARD_ID=DAISY_SEED" + "VARIANT_H=\"variant_DAISY_SEED.h\"" +) +target_include_directories(DAISY_SEED INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${DAISY_SEED_VARIANT_PATH} +) + +target_link_options(DAISY_SEED INTERFACE + "LINKER:--default-script=${DAISY_SEED_VARIANT_PATH}/DAISY_SEED.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DAISY_SEED_MCU} +) +target_link_libraries(DAISY_SEED INTERFACE + arm_cortexM7lfsp_math +) + +add_library(DAISY_SEED_serial_disabled INTERFACE) +target_compile_options(DAISY_SEED_serial_disabled INTERFACE + "SHELL:" +) +add_library(DAISY_SEED_serial_generic INTERFACE) +target_compile_options(DAISY_SEED_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DAISY_SEED_serial_none INTERFACE) +target_compile_options(DAISY_SEED_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DAISY_SEED_usb_CDC INTERFACE) +target_compile_options(DAISY_SEED_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DAISY_SEED_usb_CDCgen INTERFACE) +target_compile_options(DAISY_SEED_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DAISY_SEED_usb_HID INTERFACE) +target_compile_options(DAISY_SEED_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DAISY_SEED_usb_none INTERFACE) +target_compile_options(DAISY_SEED_usb_none INTERFACE + "SHELL:" +) +add_library(DAISY_SEED_xusb_FS INTERFACE) +target_compile_options(DAISY_SEED_xusb_FS INTERFACE + "SHELL:" +) +add_library(DAISY_SEED_xusb_HS INTERFACE) +target_compile_options(DAISY_SEED_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DAISY_SEED_xusb_HSFS INTERFACE) +target_compile_options(DAISY_SEED_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DEMO_F030F4 +# ----------------------------------------------------------------------------- + +set(DEMO_F030F4_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030F4P") +set(DEMO_F030F4_MAXSIZE 16384) +set(DEMO_F030F4_MAXDATASIZE 4096) +set(DEMO_F030F4_MCU cortex-m0) +set(DEMO_F030F4_FPCONF "-") +add_library(DEMO_F030F4 INTERFACE) +target_compile_options(DEMO_F030F4 INTERFACE + "SHELL:-DSTM32F030x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DEMO_F030F4_MCU} +) +target_compile_definitions(DEMO_F030F4 INTERFACE + "STM32F0xx" + "ARDUINO_DEMO_F030F4" + "BOARD_NAME=\"DEMO_F030F4\"" + "BOARD_ID=DEMO_F030F4" + "VARIANT_H=\"variant_DEMO_F030F4.h\"" +) +target_include_directories(DEMO_F030F4 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${DEMO_F030F4_VARIANT_PATH} +) + +target_link_options(DEMO_F030F4 INTERFACE + "LINKER:--default-script=${DEMO_F030F4_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${DEMO_F030F4_MCU} +) +target_link_libraries(DEMO_F030F4 INTERFACE + arm_cortexM0l_math +) + +add_library(DEMO_F030F4_serial_disabled INTERFACE) +target_compile_options(DEMO_F030F4_serial_disabled INTERFACE + "SHELL:" +) +add_library(DEMO_F030F4_serial_generic INTERFACE) +target_compile_options(DEMO_F030F4_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DEMO_F030F4_serial_none INTERFACE) +target_compile_options(DEMO_F030F4_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DEMO_F030F4_usb_CDC INTERFACE) +target_compile_options(DEMO_F030F4_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DEMO_F030F4_usb_CDCgen INTERFACE) +target_compile_options(DEMO_F030F4_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DEMO_F030F4_usb_HID INTERFACE) +target_compile_options(DEMO_F030F4_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DEMO_F030F4_usb_none INTERFACE) +target_compile_options(DEMO_F030F4_usb_none INTERFACE + "SHELL:" +) + +# DEMO_F030F4_16M +# ----------------------------------------------------------------------------- + +set(DEMO_F030F4_16M_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030F4P") +set(DEMO_F030F4_16M_MAXSIZE 16384) +set(DEMO_F030F4_16M_MAXDATASIZE 4096) +set(DEMO_F030F4_16M_MCU cortex-m0) +set(DEMO_F030F4_16M_FPCONF "-") +add_library(DEMO_F030F4_16M INTERFACE) +target_compile_options(DEMO_F030F4_16M INTERFACE + "SHELL:-DSTM32F030x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DEMO_F030F4_16M_MCU} +) +target_compile_definitions(DEMO_F030F4_16M INTERFACE + "STM32F0xx" + "ARDUINO_DEMO_F030F4_16M" + "BOARD_NAME=\"DEMO_F030F4_16M\"" + "BOARD_ID=DEMO_F030F4_16M" + "VARIANT_H=\"variant_DEMO_F030F4.h\"" +) +target_include_directories(DEMO_F030F4_16M INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${DEMO_F030F4_16M_VARIANT_PATH} +) + +target_link_options(DEMO_F030F4_16M INTERFACE + "LINKER:--default-script=${DEMO_F030F4_16M_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${DEMO_F030F4_16M_MCU} +) +target_link_libraries(DEMO_F030F4_16M INTERFACE + arm_cortexM0l_math +) + +add_library(DEMO_F030F4_16M_serial_disabled INTERFACE) +target_compile_options(DEMO_F030F4_16M_serial_disabled INTERFACE + "SHELL:" +) +add_library(DEMO_F030F4_16M_serial_generic INTERFACE) +target_compile_options(DEMO_F030F4_16M_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DEMO_F030F4_16M_serial_none INTERFACE) +target_compile_options(DEMO_F030F4_16M_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DEMO_F030F4_16M_usb_CDC INTERFACE) +target_compile_options(DEMO_F030F4_16M_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DEMO_F030F4_16M_usb_CDCgen INTERFACE) +target_compile_options(DEMO_F030F4_16M_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DEMO_F030F4_16M_usb_HID INTERFACE) +target_compile_options(DEMO_F030F4_16M_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DEMO_F030F4_16M_usb_none INTERFACE) +target_compile_options(DEMO_F030F4_16M_usb_none INTERFACE + "SHELL:" +) + +# DEMO_F030F4_HSI +# ----------------------------------------------------------------------------- + +set(DEMO_F030F4_HSI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030F4P") +set(DEMO_F030F4_HSI_MAXSIZE 16384) +set(DEMO_F030F4_HSI_MAXDATASIZE 4096) +set(DEMO_F030F4_HSI_MCU cortex-m0) +set(DEMO_F030F4_HSI_FPCONF "-") +add_library(DEMO_F030F4_HSI INTERFACE) +target_compile_options(DEMO_F030F4_HSI INTERFACE + "SHELL:-DSTM32F030x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DEMO_F030F4_HSI_MCU} +) +target_compile_definitions(DEMO_F030F4_HSI INTERFACE + "STM32F0xx" + "ARDUINO_DEMO_F030F4_HSI" + "BOARD_NAME=\"DEMO_F030F4_HSI\"" + "BOARD_ID=DEMO_F030F4_HSI" + "VARIANT_H=\"variant_DEMO_F030F4.h\"" +) +target_include_directories(DEMO_F030F4_HSI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${DEMO_F030F4_HSI_VARIANT_PATH} +) + +target_link_options(DEMO_F030F4_HSI INTERFACE + "LINKER:--default-script=${DEMO_F030F4_HSI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${DEMO_F030F4_HSI_MCU} +) +target_link_libraries(DEMO_F030F4_HSI INTERFACE + arm_cortexM0l_math +) + +add_library(DEMO_F030F4_HSI_serial_disabled INTERFACE) +target_compile_options(DEMO_F030F4_HSI_serial_disabled INTERFACE + "SHELL:" +) +add_library(DEMO_F030F4_HSI_serial_generic INTERFACE) +target_compile_options(DEMO_F030F4_HSI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DEMO_F030F4_HSI_serial_none INTERFACE) +target_compile_options(DEMO_F030F4_HSI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DEMO_F030F4_HSI_usb_CDC INTERFACE) +target_compile_options(DEMO_F030F4_HSI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DEMO_F030F4_HSI_usb_CDCgen INTERFACE) +target_compile_options(DEMO_F030F4_HSI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DEMO_F030F4_HSI_usb_HID INTERFACE) +target_compile_options(DEMO_F030F4_HSI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DEMO_F030F4_HSI_usb_none INTERFACE) +target_compile_options(DEMO_F030F4_HSI_usb_none INTERFACE + "SHELL:" +) + +# DevEBoxH743VITX +# ----------------------------------------------------------------------------- + +set(DevEBoxH743VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(DevEBoxH743VITX_MAXSIZE 2097152) +set(DevEBoxH743VITX_MAXDATASIZE 524288) +set(DevEBoxH743VITX_MCU cortex-m7) +set(DevEBoxH743VITX_FPCONF "-") +add_library(DevEBoxH743VITX INTERFACE) +target_compile_options(DevEBoxH743VITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DevEBoxH743VITX_MCU} +) +target_compile_definitions(DevEBoxH743VITX INTERFACE + "STM32H7xx" + "ARDUINO_DevEBoxH743VITX" + "BOARD_NAME=\"DevEBoxH743VITX\"" + "BOARD_ID=DevEBoxH743VITX" + "VARIANT_H=\"variant_DevEBoxH7xx.h\"" +) +target_include_directories(DevEBoxH743VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${DevEBoxH743VITX_VARIANT_PATH} +) + +target_link_options(DevEBoxH743VITX INTERFACE + "LINKER:--default-script=${DevEBoxH743VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DevEBoxH743VITX_MCU} +) +target_link_libraries(DevEBoxH743VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(DevEBoxH743VITX_serial_disabled INTERFACE) +target_compile_options(DevEBoxH743VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(DevEBoxH743VITX_serial_generic INTERFACE) +target_compile_options(DevEBoxH743VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DevEBoxH743VITX_serial_none INTERFACE) +target_compile_options(DevEBoxH743VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DevEBoxH743VITX_usb_CDC INTERFACE) +target_compile_options(DevEBoxH743VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DevEBoxH743VITX_usb_CDCgen INTERFACE) +target_compile_options(DevEBoxH743VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DevEBoxH743VITX_usb_HID INTERFACE) +target_compile_options(DevEBoxH743VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DevEBoxH743VITX_usb_none INTERFACE) +target_compile_options(DevEBoxH743VITX_usb_none INTERFACE + "SHELL:" +) +add_library(DevEBoxH743VITX_xusb_FS INTERFACE) +target_compile_options(DevEBoxH743VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(DevEBoxH743VITX_xusb_HS INTERFACE) +target_compile_options(DevEBoxH743VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DevEBoxH743VITX_xusb_HSFS INTERFACE) +target_compile_options(DevEBoxH743VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DevEBoxH750VBTX +# ----------------------------------------------------------------------------- + +set(DevEBoxH750VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(DevEBoxH750VBTX_MAXSIZE 131072) +set(DevEBoxH750VBTX_MAXDATASIZE 524288) +set(DevEBoxH750VBTX_MCU cortex-m7) +set(DevEBoxH750VBTX_FPCONF "-") +add_library(DevEBoxH750VBTX INTERFACE) +target_compile_options(DevEBoxH750VBTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DevEBoxH750VBTX_MCU} +) +target_compile_definitions(DevEBoxH750VBTX INTERFACE + "STM32H7xx" + "ARDUINO_DevEBoxH750VBTX" + "BOARD_NAME=\"DevEBoxH750VBTX\"" + "BOARD_ID=DevEBoxH750VBTX" + "VARIANT_H=\"variant_DevEBoxH7xx.h\"" +) +target_include_directories(DevEBoxH750VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${DevEBoxH750VBTX_VARIANT_PATH} +) + +target_link_options(DevEBoxH750VBTX INTERFACE + "LINKER:--default-script=${DevEBoxH750VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DevEBoxH750VBTX_MCU} +) +target_link_libraries(DevEBoxH750VBTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(DevEBoxH750VBTX_serial_disabled INTERFACE) +target_compile_options(DevEBoxH750VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(DevEBoxH750VBTX_serial_generic INTERFACE) +target_compile_options(DevEBoxH750VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DevEBoxH750VBTX_serial_none INTERFACE) +target_compile_options(DevEBoxH750VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DevEBoxH750VBTX_usb_CDC INTERFACE) +target_compile_options(DevEBoxH750VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DevEBoxH750VBTX_usb_CDCgen INTERFACE) +target_compile_options(DevEBoxH750VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DevEBoxH750VBTX_usb_HID INTERFACE) +target_compile_options(DevEBoxH750VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DevEBoxH750VBTX_usb_none INTERFACE) +target_compile_options(DevEBoxH750VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(DevEBoxH750VBTX_xusb_FS INTERFACE) +target_compile_options(DevEBoxH750VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(DevEBoxH750VBTX_xusb_HS INTERFACE) +target_compile_options(DevEBoxH750VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DevEBoxH750VBTX_xusb_HSFS INTERFACE) +target_compile_options(DevEBoxH750VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F030R8 +# ----------------------------------------------------------------------------- + +set(DISCO_F030R8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030R8T") +set(DISCO_F030R8_MAXSIZE 65536) +set(DISCO_F030R8_MAXDATASIZE 8192) +set(DISCO_F030R8_MCU cortex-m0) +set(DISCO_F030R8_FPCONF "-") +add_library(DISCO_F030R8 INTERFACE) +target_compile_options(DISCO_F030R8 INTERFACE + "SHELL:-DSTM32F030x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DISCO_F030R8_MCU} +) +target_compile_definitions(DISCO_F030R8 INTERFACE + "STM32F0xx" + "ARDUINO_DISCO_F030R8" + "BOARD_NAME=\"DISCO_F030R8\"" + "BOARD_ID=DISCO_F030R8" + "VARIANT_H=\"variant_DISCO_F030R8.h\"" +) +target_include_directories(DISCO_F030R8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${DISCO_F030R8_VARIANT_PATH} +) + +target_link_options(DISCO_F030R8 INTERFACE + "LINKER:--default-script=${DISCO_F030R8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${DISCO_F030R8_MCU} +) +target_link_libraries(DISCO_F030R8 INTERFACE + arm_cortexM0l_math +) + +add_library(DISCO_F030R8_serial_disabled INTERFACE) +target_compile_options(DISCO_F030R8_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F030R8_serial_generic INTERFACE) +target_compile_options(DISCO_F030R8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F030R8_serial_none INTERFACE) +target_compile_options(DISCO_F030R8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F030R8_usb_CDC INTERFACE) +target_compile_options(DISCO_F030R8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F030R8_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F030R8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F030R8_usb_HID INTERFACE) +target_compile_options(DISCO_F030R8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F030R8_usb_none INTERFACE) +target_compile_options(DISCO_F030R8_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F030R8_xusb_FS INTERFACE) +target_compile_options(DISCO_F030R8_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F030R8_xusb_HS INTERFACE) +target_compile_options(DISCO_F030R8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F030R8_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F030R8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F072RB +# ----------------------------------------------------------------------------- + +set(DISCO_F072RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(DISCO_F072RB_MAXSIZE 131072) +set(DISCO_F072RB_MAXDATASIZE 16384) +set(DISCO_F072RB_MCU cortex-m0) +set(DISCO_F072RB_FPCONF "-") +add_library(DISCO_F072RB INTERFACE) +target_compile_options(DISCO_F072RB INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DISCO_F072RB_MCU} +) +target_compile_definitions(DISCO_F072RB INTERFACE + "STM32F0xx" + "ARDUINO_DISCO_F072RB" + "BOARD_NAME=\"DISCO_F072RB\"" + "BOARD_ID=DISCO_F072RB" + "VARIANT_H=\"variant_DISCO_F072RB.h\"" +) +target_include_directories(DISCO_F072RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${DISCO_F072RB_VARIANT_PATH} +) + +target_link_options(DISCO_F072RB INTERFACE + "LINKER:--default-script=${DISCO_F072RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${DISCO_F072RB_MCU} +) +target_link_libraries(DISCO_F072RB INTERFACE + arm_cortexM0l_math +) + +add_library(DISCO_F072RB_serial_disabled INTERFACE) +target_compile_options(DISCO_F072RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F072RB_serial_generic INTERFACE) +target_compile_options(DISCO_F072RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F072RB_serial_none INTERFACE) +target_compile_options(DISCO_F072RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F072RB_usb_CDC INTERFACE) +target_compile_options(DISCO_F072RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F072RB_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F072RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F072RB_usb_HID INTERFACE) +target_compile_options(DISCO_F072RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F072RB_usb_none INTERFACE) +target_compile_options(DISCO_F072RB_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F072RB_xusb_FS INTERFACE) +target_compile_options(DISCO_F072RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F072RB_xusb_HS INTERFACE) +target_compile_options(DISCO_F072RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F072RB_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F072RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F100RB +# ----------------------------------------------------------------------------- + +set(DISCO_F100RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(DISCO_F100RB_MAXSIZE 131071) +set(DISCO_F100RB_MAXDATASIZE 8192) +set(DISCO_F100RB_MCU cortex-m3) +set(DISCO_F100RB_FPCONF "-") +add_library(DISCO_F100RB INTERFACE) +target_compile_options(DISCO_F100RB INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DISCO_F100RB_MCU} +) +target_compile_definitions(DISCO_F100RB INTERFACE + "STM32F1xx" + "ARDUINO_DISCO_F100RB" + "BOARD_NAME=\"DISCO_F100RB\"" + "BOARD_ID=DISCO_F100RB" + "VARIANT_H=\"variant_DISCO_F100RB.h\"" +) +target_include_directories(DISCO_F100RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${DISCO_F100RB_VARIANT_PATH} +) + +target_link_options(DISCO_F100RB INTERFACE + "LINKER:--default-script=${DISCO_F100RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131071" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${DISCO_F100RB_MCU} +) +target_link_libraries(DISCO_F100RB INTERFACE + arm_cortexM3l_math +) + +add_library(DISCO_F100RB_serial_disabled INTERFACE) +target_compile_options(DISCO_F100RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F100RB_serial_generic INTERFACE) +target_compile_options(DISCO_F100RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F100RB_serial_none INTERFACE) +target_compile_options(DISCO_F100RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F100RB_usb_CDC INTERFACE) +target_compile_options(DISCO_F100RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F100RB_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F100RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F100RB_usb_HID INTERFACE) +target_compile_options(DISCO_F100RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F100RB_usb_none INTERFACE) +target_compile_options(DISCO_F100RB_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F100RB_xusb_FS INTERFACE) +target_compile_options(DISCO_F100RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F100RB_xusb_HS INTERFACE) +target_compile_options(DISCO_F100RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F100RB_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F100RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F303VC +# ----------------------------------------------------------------------------- + +set(DISCO_F303VC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303V(B-C)T") +set(DISCO_F303VC_MAXSIZE 262144) +set(DISCO_F303VC_MAXDATASIZE 40960) +set(DISCO_F303VC_MCU cortex-m4) +set(DISCO_F303VC_FPCONF "fpv4-sp-d16-hard") +add_library(DISCO_F303VC INTERFACE) +target_compile_options(DISCO_F303VC INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F303VC_MCU} +) +target_compile_definitions(DISCO_F303VC INTERFACE + "STM32F3xx" + "ARDUINO_DISCO_F303VC" + "BOARD_NAME=\"DISCO_F303VC\"" + "BOARD_ID=DISCO_F303VC" + "VARIANT_H=\"variant_DISCO_F303VC.h\"" +) +target_include_directories(DISCO_F303VC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${DISCO_F303VC_VARIANT_PATH} +) + +target_link_options(DISCO_F303VC INTERFACE + "LINKER:--default-script=${DISCO_F303VC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F303VC_MCU} +) +target_link_libraries(DISCO_F303VC INTERFACE + arm_cortexM4lf_math +) + +add_library(DISCO_F303VC_serial_disabled INTERFACE) +target_compile_options(DISCO_F303VC_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F303VC_serial_generic INTERFACE) +target_compile_options(DISCO_F303VC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F303VC_serial_none INTERFACE) +target_compile_options(DISCO_F303VC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F303VC_usb_CDC INTERFACE) +target_compile_options(DISCO_F303VC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F303VC_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F303VC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F303VC_usb_HID INTERFACE) +target_compile_options(DISCO_F303VC_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F303VC_usb_none INTERFACE) +target_compile_options(DISCO_F303VC_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F303VC_xusb_FS INTERFACE) +target_compile_options(DISCO_F303VC_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F303VC_xusb_HS INTERFACE) +target_compile_options(DISCO_F303VC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F303VC_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F303VC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F407VG +# ----------------------------------------------------------------------------- + +set(DISCO_F407VG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(DISCO_F407VG_MAXSIZE 1048576) +set(DISCO_F407VG_MAXDATASIZE 131072) +set(DISCO_F407VG_MCU cortex-m4) +set(DISCO_F407VG_FPCONF "fpv4-sp-d16-hard") +add_library(DISCO_F407VG INTERFACE) +target_compile_options(DISCO_F407VG INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F407VG_MCU} +) +target_compile_definitions(DISCO_F407VG INTERFACE + "STM32F4xx" + "ARDUINO_DISCO_F407VG" + "BOARD_NAME=\"DISCO_F407VG\"" + "BOARD_ID=DISCO_F407VG" + "VARIANT_H=\"variant_DISCO_F407VG.h\"" +) +target_include_directories(DISCO_F407VG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${DISCO_F407VG_VARIANT_PATH} +) + +target_link_options(DISCO_F407VG INTERFACE + "LINKER:--default-script=${DISCO_F407VG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F407VG_MCU} +) +target_link_libraries(DISCO_F407VG INTERFACE + arm_cortexM4lf_math +) + +add_library(DISCO_F407VG_serial_disabled INTERFACE) +target_compile_options(DISCO_F407VG_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F407VG_serial_generic INTERFACE) +target_compile_options(DISCO_F407VG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F407VG_serial_none INTERFACE) +target_compile_options(DISCO_F407VG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F407VG_usb_CDC INTERFACE) +target_compile_options(DISCO_F407VG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F407VG_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F407VG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F407VG_usb_HID INTERFACE) +target_compile_options(DISCO_F407VG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F407VG_usb_none INTERFACE) +target_compile_options(DISCO_F407VG_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F407VG_xusb_FS INTERFACE) +target_compile_options(DISCO_F407VG_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F407VG_xusb_HS INTERFACE) +target_compile_options(DISCO_F407VG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F407VG_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F407VG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F413ZH +# ----------------------------------------------------------------------------- + +set(DISCO_F413ZH_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(DISCO_F413ZH_MAXSIZE 1572864) +set(DISCO_F413ZH_MAXDATASIZE 327680) +set(DISCO_F413ZH_MCU cortex-m4) +set(DISCO_F413ZH_FPCONF "fpv4-sp-d16-hard") +add_library(DISCO_F413ZH INTERFACE) +target_compile_options(DISCO_F413ZH INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F413ZH_MCU} +) +target_compile_definitions(DISCO_F413ZH INTERFACE + "STM32F4xx" + "ARDUINO_DISCO_F413ZH" + "BOARD_NAME=\"DISCO_F413ZH\"" + "BOARD_ID=DISCO_F413ZH" + "VARIANT_H=\"variant_DISCO_F413ZH.h\"" +) +target_include_directories(DISCO_F413ZH INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${DISCO_F413ZH_VARIANT_PATH} +) + +target_link_options(DISCO_F413ZH INTERFACE + "LINKER:--default-script=${DISCO_F413ZH_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F413ZH_MCU} +) +target_link_libraries(DISCO_F413ZH INTERFACE + arm_cortexM4lf_math +) + +add_library(DISCO_F413ZH_serial_disabled INTERFACE) +target_compile_options(DISCO_F413ZH_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F413ZH_serial_generic INTERFACE) +target_compile_options(DISCO_F413ZH_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F413ZH_serial_none INTERFACE) +target_compile_options(DISCO_F413ZH_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F413ZH_usb_CDC INTERFACE) +target_compile_options(DISCO_F413ZH_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F413ZH_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F413ZH_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F413ZH_usb_HID INTERFACE) +target_compile_options(DISCO_F413ZH_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F413ZH_usb_none INTERFACE) +target_compile_options(DISCO_F413ZH_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F413ZH_xusb_FS INTERFACE) +target_compile_options(DISCO_F413ZH_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F413ZH_xusb_HS INTERFACE) +target_compile_options(DISCO_F413ZH_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F413ZH_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F413ZH_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_F746NG +# ----------------------------------------------------------------------------- + +set(DISCO_F746NG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(DISCO_F746NG_MAXSIZE 1048576) +set(DISCO_F746NG_MAXDATASIZE 327680) +set(DISCO_F746NG_MCU cortex-m7) +set(DISCO_F746NG_FPCONF "fpv4-sp-d16-hard") +add_library(DISCO_F746NG INTERFACE) +target_compile_options(DISCO_F746NG INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F746NG_MCU} +) +target_compile_definitions(DISCO_F746NG INTERFACE + "STM32F7xx" + "ARDUINO_DISCO_F746NG" + "BOARD_NAME=\"DISCO_F746NG\"" + "BOARD_ID=DISCO_F746NG" + "VARIANT_H=\"variant_DISCO_F746NG.h\"" +) +target_include_directories(DISCO_F746NG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${DISCO_F746NG_VARIANT_PATH} +) + +target_link_options(DISCO_F746NG INTERFACE + "LINKER:--default-script=${DISCO_F746NG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DISCO_F746NG_MCU} +) +target_link_libraries(DISCO_F746NG INTERFACE + arm_cortexM7lfsp_math +) + +add_library(DISCO_F746NG_serial_disabled INTERFACE) +target_compile_options(DISCO_F746NG_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_F746NG_serial_generic INTERFACE) +target_compile_options(DISCO_F746NG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_F746NG_serial_none INTERFACE) +target_compile_options(DISCO_F746NG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_F746NG_usb_CDC INTERFACE) +target_compile_options(DISCO_F746NG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_F746NG_usb_CDCgen INTERFACE) +target_compile_options(DISCO_F746NG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_F746NG_usb_HID INTERFACE) +target_compile_options(DISCO_F746NG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_F746NG_usb_none INTERFACE) +target_compile_options(DISCO_F746NG_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_F746NG_xusb_FS INTERFACE) +target_compile_options(DISCO_F746NG_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_F746NG_xusb_HS INTERFACE) +target_compile_options(DISCO_F746NG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_F746NG_xusb_HSFS INTERFACE) +target_compile_options(DISCO_F746NG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DISCO_G0316 +# ----------------------------------------------------------------------------- + +set(DISCO_G0316_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031J(4-6)M_G041J6M") +set(DISCO_G0316_MAXSIZE 32768) +set(DISCO_G0316_MAXDATASIZE 8192) +set(DISCO_G0316_MCU cortex-m0plus) +set(DISCO_G0316_FPCONF "-") +add_library(DISCO_G0316 INTERFACE) +target_compile_options(DISCO_G0316 INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${DISCO_G0316_MCU} +) +target_compile_definitions(DISCO_G0316 INTERFACE + "STM32G0xx" + "ARDUINO_DISCO_G0316" + "BOARD_NAME=\"DISCO_G0316\"" + "BOARD_ID=DISCO_G0316" + "VARIANT_H=\"variant_DISCO_G0316.h\"" +) +target_include_directories(DISCO_G0316 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${DISCO_G0316_VARIANT_PATH} +) + +target_link_options(DISCO_G0316 INTERFACE + "LINKER:--default-script=${DISCO_G0316_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${DISCO_G0316_MCU} +) +target_link_libraries(DISCO_G0316 INTERFACE + arm_cortexM0l_math +) + +add_library(DISCO_G0316_serial_disabled INTERFACE) +target_compile_options(DISCO_G0316_serial_disabled INTERFACE + "SHELL:" +) +add_library(DISCO_G0316_serial_generic INTERFACE) +target_compile_options(DISCO_G0316_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DISCO_G0316_serial_none INTERFACE) +target_compile_options(DISCO_G0316_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DISCO_G0316_usb_CDC INTERFACE) +target_compile_options(DISCO_G0316_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DISCO_G0316_usb_CDCgen INTERFACE) +target_compile_options(DISCO_G0316_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DISCO_G0316_usb_HID INTERFACE) +target_compile_options(DISCO_G0316_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DISCO_G0316_usb_none INTERFACE) +target_compile_options(DISCO_G0316_usb_none INTERFACE + "SHELL:" +) +add_library(DISCO_G0316_xusb_FS INTERFACE) +target_compile_options(DISCO_G0316_xusb_FS INTERFACE + "SHELL:" +) +add_library(DISCO_G0316_xusb_HS INTERFACE) +target_compile_options(DISCO_G0316_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DISCO_G0316_xusb_HSFS INTERFACE) +target_compile_options(DISCO_G0316_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DIYMORE_F407VGT +# ----------------------------------------------------------------------------- + +set(DIYMORE_F407VGT_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(DIYMORE_F407VGT_MAXSIZE 1048576) +set(DIYMORE_F407VGT_MAXDATASIZE 131072) +set(DIYMORE_F407VGT_MCU cortex-m4) +set(DIYMORE_F407VGT_FPCONF "-") +add_library(DIYMORE_F407VGT INTERFACE) +target_compile_options(DIYMORE_F407VGT INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DIYMORE_F407VGT_MCU} +) +target_compile_definitions(DIYMORE_F407VGT INTERFACE + "STM32F4xx" + "ARDUINO_DIYMORE_F407VGT" + "BOARD_NAME=\"DIYMORE_F407VGT\"" + "BOARD_ID=DIYMORE_F407VGT" + "VARIANT_H=\"variant_DIYMORE_F407VGT.h\"" +) +target_include_directories(DIYMORE_F407VGT INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${DIYMORE_F407VGT_VARIANT_PATH} +) + +target_link_options(DIYMORE_F407VGT INTERFACE + "LINKER:--default-script=${DIYMORE_F407VGT_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DIYMORE_F407VGT_MCU} +) +target_link_libraries(DIYMORE_F407VGT INTERFACE + arm_cortexM4lf_math +) + +add_library(DIYMORE_F407VGT_serial_disabled INTERFACE) +target_compile_options(DIYMORE_F407VGT_serial_disabled INTERFACE + "SHELL:" +) +add_library(DIYMORE_F407VGT_serial_generic INTERFACE) +target_compile_options(DIYMORE_F407VGT_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(DIYMORE_F407VGT_serial_none INTERFACE) +target_compile_options(DIYMORE_F407VGT_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(DIYMORE_F407VGT_usb_CDC INTERFACE) +target_compile_options(DIYMORE_F407VGT_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(DIYMORE_F407VGT_usb_CDCgen INTERFACE) +target_compile_options(DIYMORE_F407VGT_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(DIYMORE_F407VGT_usb_HID INTERFACE) +target_compile_options(DIYMORE_F407VGT_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(DIYMORE_F407VGT_usb_none INTERFACE) +target_compile_options(DIYMORE_F407VGT_usb_none INTERFACE + "SHELL:" +) +add_library(DIYMORE_F407VGT_xusb_FS INTERFACE) +target_compile_options(DIYMORE_F407VGT_xusb_FS INTERFACE + "SHELL:" +) +add_library(DIYMORE_F407VGT_xusb_HS INTERFACE) +target_compile_options(DIYMORE_F407VGT_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(DIYMORE_F407VGT_xusb_HSFS INTERFACE) +target_compile_options(DIYMORE_F407VGT_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# DIYMORE_F407VGT_hid +# ----------------------------------------------------------------------------- + +set(DIYMORE_F407VGT_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(DIYMORE_F407VGT_hid_MAXSIZE 1048576) +set(DIYMORE_F407VGT_hid_MAXDATASIZE 131072) +set(DIYMORE_F407VGT_hid_MCU cortex-m4) +set(DIYMORE_F407VGT_hid_FPCONF "-") +add_library(DIYMORE_F407VGT_hid INTERFACE) +target_compile_options(DIYMORE_F407VGT_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DIYMORE_F407VGT_hid_MCU} +) +target_compile_definitions(DIYMORE_F407VGT_hid INTERFACE + "STM32F4xx" + "ARDUINO_DIYMORE_F407VGT" + "BOARD_NAME=\"DIYMORE_F407VGT\"" + "BOARD_ID=DIYMORE_F407VGT" + "VARIANT_H=\"variant_DIYMORE_F407VGT.h\"" +) +target_include_directories(DIYMORE_F407VGT_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${DIYMORE_F407VGT_hid_VARIANT_PATH} +) + +target_link_options(DIYMORE_F407VGT_hid INTERFACE + "LINKER:--default-script=${DIYMORE_F407VGT_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${DIYMORE_F407VGT_hid_MCU} +) +target_link_libraries(DIYMORE_F407VGT_hid INTERFACE + arm_cortexM4lf_math +) + + +# EBB42_V1_1 +# ----------------------------------------------------------------------------- + +set(EBB42_V1_1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(EBB42_V1_1_MAXSIZE 131072) +set(EBB42_V1_1_MAXDATASIZE 147456) +set(EBB42_V1_1_MCU cortex-m0plus) +set(EBB42_V1_1_FPCONF "-") +add_library(EBB42_V1_1 INTERFACE) +target_compile_options(EBB42_V1_1 INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${EBB42_V1_1_MCU} +) +target_compile_definitions(EBB42_V1_1 INTERFACE + "STM32G0xx" + "ARDUINO_EBB42_V1_1" + "BOARD_NAME=\"EBB42_V1_1\"" + "BOARD_ID=EBB42_V1_1" + "VARIANT_H=\"variant_EBB42_V1_1.h\"" +) +target_include_directories(EBB42_V1_1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${EBB42_V1_1_VARIANT_PATH} +) + +target_link_options(EBB42_V1_1 INTERFACE + "LINKER:--default-script=${EBB42_V1_1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${EBB42_V1_1_MCU} +) +target_link_libraries(EBB42_V1_1 INTERFACE + arm_cortexM0l_math +) + +add_library(EBB42_V1_1_serial_disabled INTERFACE) +target_compile_options(EBB42_V1_1_serial_disabled INTERFACE + "SHELL:" +) +add_library(EBB42_V1_1_serial_generic INTERFACE) +target_compile_options(EBB42_V1_1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(EBB42_V1_1_serial_none INTERFACE) +target_compile_options(EBB42_V1_1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(EBB42_V1_1_usb_CDC INTERFACE) +target_compile_options(EBB42_V1_1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(EBB42_V1_1_usb_CDCgen INTERFACE) +target_compile_options(EBB42_V1_1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(EBB42_V1_1_usb_none INTERFACE) +target_compile_options(EBB42_V1_1_usb_none INTERFACE + "SHELL:" +) +add_library(EBB42_V1_1_xusb_FS INTERFACE) +target_compile_options(EBB42_V1_1_xusb_FS INTERFACE + "SHELL:" +) +add_library(EBB42_V1_1_xusb_HS INTERFACE) +target_compile_options(EBB42_V1_1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(EBB42_V1_1_xusb_HSFS INTERFACE) +target_compile_options(EBB42_V1_1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# EEXTR_F030_V1 +# ----------------------------------------------------------------------------- + +set(EEXTR_F030_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030C8T") +set(EEXTR_F030_V1_MAXSIZE 65536) +set(EEXTR_F030_V1_MAXDATASIZE 8192) +set(EEXTR_F030_V1_MCU cortex-m0) +set(EEXTR_F030_V1_FPCONF "-") +add_library(EEXTR_F030_V1 INTERFACE) +target_compile_options(EEXTR_F030_V1 INTERFACE + "SHELL:-DSTM32F030x8 " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${EEXTR_F030_V1_MCU} +) +target_compile_definitions(EEXTR_F030_V1 INTERFACE + "STM32F0xx" + "ARDUINO_EEXTR_F030_V1" + "BOARD_NAME=\"EEXTR_F030_V1\"" + "BOARD_ID=EEXTR_F030_V1" + "VARIANT_H=\"variant_EEXTR_F030_V1.h\"" +) +target_include_directories(EEXTR_F030_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${EEXTR_F030_V1_VARIANT_PATH} +) + +target_link_options(EEXTR_F030_V1 INTERFACE + "LINKER:--default-script=${EEXTR_F030_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${EEXTR_F030_V1_MCU} +) +target_link_libraries(EEXTR_F030_V1 INTERFACE + arm_cortexM0l_math +) + +add_library(EEXTR_F030_V1_serial_disabled INTERFACE) +target_compile_options(EEXTR_F030_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(EEXTR_F030_V1_serial_generic INTERFACE) +target_compile_options(EEXTR_F030_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(EEXTR_F030_V1_serial_none INTERFACE) +target_compile_options(EEXTR_F030_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(EEXTR_F030_V1_usb_CDC INTERFACE) +target_compile_options(EEXTR_F030_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(EEXTR_F030_V1_usb_CDCgen INTERFACE) +target_compile_options(EEXTR_F030_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(EEXTR_F030_V1_usb_none INTERFACE) +target_compile_options(EEXTR_F030_V1_usb_none INTERFACE + "SHELL:" +) +add_library(EEXTR_F030_V1_xusb_FS INTERFACE) +target_compile_options(EEXTR_F030_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(EEXTR_F030_V1_xusb_HS INTERFACE) +target_compile_options(EEXTR_F030_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(EEXTR_F030_V1_xusb_HSFS INTERFACE) +target_compile_options(EEXTR_F030_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# ELEKTOR_F072C8 +# ----------------------------------------------------------------------------- + +set(ELEKTOR_F072C8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(ELEKTOR_F072C8_MAXSIZE 65536) +set(ELEKTOR_F072C8_MAXDATASIZE 16384) +set(ELEKTOR_F072C8_MCU cortex-m0) +set(ELEKTOR_F072C8_FPCONF "-") +add_library(ELEKTOR_F072C8 INTERFACE) +target_compile_options(ELEKTOR_F072C8 INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${ELEKTOR_F072C8_MCU} +) +target_compile_definitions(ELEKTOR_F072C8 INTERFACE + "STM32F0xx" + "ARDUINO_ELEKTOR_F072C8" + "BOARD_NAME=\"ELEKTOR_F072C8\"" + "BOARD_ID=ELEKTOR_F072C8" + "VARIANT_H=\"variant_ELEKTOR_F072Cx.h\"" +) +target_include_directories(ELEKTOR_F072C8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${ELEKTOR_F072C8_VARIANT_PATH} +) + +target_link_options(ELEKTOR_F072C8 INTERFACE + "LINKER:--default-script=${ELEKTOR_F072C8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${ELEKTOR_F072C8_MCU} +) +target_link_libraries(ELEKTOR_F072C8 INTERFACE + arm_cortexM0l_math +) + +add_library(ELEKTOR_F072C8_serial_disabled INTERFACE) +target_compile_options(ELEKTOR_F072C8_serial_disabled INTERFACE + "SHELL:" +) +add_library(ELEKTOR_F072C8_serial_generic INTERFACE) +target_compile_options(ELEKTOR_F072C8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(ELEKTOR_F072C8_serial_none INTERFACE) +target_compile_options(ELEKTOR_F072C8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# ELEKTOR_F072CB +# ----------------------------------------------------------------------------- + +set(ELEKTOR_F072CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(ELEKTOR_F072CB_MAXSIZE 131072) +set(ELEKTOR_F072CB_MAXDATASIZE 16384) +set(ELEKTOR_F072CB_MCU cortex-m0) +set(ELEKTOR_F072CB_FPCONF "-") +add_library(ELEKTOR_F072CB INTERFACE) +target_compile_options(ELEKTOR_F072CB INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${ELEKTOR_F072CB_MCU} +) +target_compile_definitions(ELEKTOR_F072CB INTERFACE + "STM32F0xx" + "ARDUINO_ELEKTOR_F072CB" + "BOARD_NAME=\"ELEKTOR_F072CB\"" + "BOARD_ID=ELEKTOR_F072CB" + "VARIANT_H=\"variant_ELEKTOR_F072Cx.h\"" +) +target_include_directories(ELEKTOR_F072CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${ELEKTOR_F072CB_VARIANT_PATH} +) + +target_link_options(ELEKTOR_F072CB INTERFACE + "LINKER:--default-script=${ELEKTOR_F072CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${ELEKTOR_F072CB_MCU} +) +target_link_libraries(ELEKTOR_F072CB INTERFACE + arm_cortexM0l_math +) + +add_library(ELEKTOR_F072CB_serial_disabled INTERFACE) +target_compile_options(ELEKTOR_F072CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(ELEKTOR_F072CB_serial_generic INTERFACE) +target_compile_options(ELEKTOR_F072CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(ELEKTOR_F072CB_serial_none INTERFACE) +target_compile_options(ELEKTOR_F072CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# ETHERCAT_DUINO +# ----------------------------------------------------------------------------- + +set(ETHERCAT_DUINO_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(ETHERCAT_DUINO_MAXSIZE 524288) +set(ETHERCAT_DUINO_MAXDATASIZE 327680) +set(ETHERCAT_DUINO_MCU cortex-m7) +set(ETHERCAT_DUINO_FPCONF "fpv4-sp-d16-hard") +add_library(ETHERCAT_DUINO INTERFACE) +target_compile_options(ETHERCAT_DUINO INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${ETHERCAT_DUINO_MCU} +) +target_compile_definitions(ETHERCAT_DUINO INTERFACE + "STM32F7xx" + "ARDUINO_ETHERCAT_DUINO" + "BOARD_NAME=\"ETHERCAT_DUINO\"" + "BOARD_ID=ETHERCAT_DUINO" + "VARIANT_H=\"variant_ETHERCAT_DUINO.h\"" +) +target_include_directories(ETHERCAT_DUINO INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${ETHERCAT_DUINO_VARIANT_PATH} +) + +target_link_options(ETHERCAT_DUINO INTERFACE + "LINKER:--default-script=${ETHERCAT_DUINO_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${ETHERCAT_DUINO_MCU} +) +target_link_libraries(ETHERCAT_DUINO INTERFACE + arm_cortexM7lfsp_math +) + +add_library(ETHERCAT_DUINO_serial_disabled INTERFACE) +target_compile_options(ETHERCAT_DUINO_serial_disabled INTERFACE + "SHELL:" +) +add_library(ETHERCAT_DUINO_serial_generic INTERFACE) +target_compile_options(ETHERCAT_DUINO_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(ETHERCAT_DUINO_serial_none INTERFACE) +target_compile_options(ETHERCAT_DUINO_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(ETHERCAT_DUINO_usb_CDC INTERFACE) +target_compile_options(ETHERCAT_DUINO_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(ETHERCAT_DUINO_usb_CDCgen INTERFACE) +target_compile_options(ETHERCAT_DUINO_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(ETHERCAT_DUINO_usb_HID INTERFACE) +target_compile_options(ETHERCAT_DUINO_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(ETHERCAT_DUINO_usb_none INTERFACE) +target_compile_options(ETHERCAT_DUINO_usb_none INTERFACE + "SHELL:" +) +add_library(ETHERCAT_DUINO_xusb_FS INTERFACE) +target_compile_options(ETHERCAT_DUINO_xusb_FS INTERFACE + "SHELL:" +) +add_library(ETHERCAT_DUINO_xusb_HS INTERFACE) +target_compile_options(ETHERCAT_DUINO_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(ETHERCAT_DUINO_xusb_HSFS INTERFACE) +target_compile_options(ETHERCAT_DUINO_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# FEATHER_F405 +# ----------------------------------------------------------------------------- + +set(FEATHER_F405_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") +set(FEATHER_F405_MAXSIZE 1048576) +set(FEATHER_F405_MAXDATASIZE 131072) +set(FEATHER_F405_MCU cortex-m4) +set(FEATHER_F405_FPCONF "-") +add_library(FEATHER_F405 INTERFACE) +target_compile_options(FEATHER_F405 INTERFACE + "SHELL:-DSTM32F405xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FEATHER_F405_MCU} +) +target_compile_definitions(FEATHER_F405 INTERFACE + "STM32F4xx" + "ARDUINO_FEATHER_F405" + "BOARD_NAME=\"FEATHER_F405\"" + "BOARD_ID=FEATHER_F405" + "VARIANT_H=\"variant_FEATHER_F405.h\"" +) +target_include_directories(FEATHER_F405 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${FEATHER_F405_VARIANT_PATH} +) + +target_link_options(FEATHER_F405 INTERFACE + "LINKER:--default-script=${FEATHER_F405_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FEATHER_F405_MCU} +) +target_link_libraries(FEATHER_F405 INTERFACE + arm_cortexM4lf_math +) + +add_library(FEATHER_F405_serial_disabled INTERFACE) +target_compile_options(FEATHER_F405_serial_disabled INTERFACE + "SHELL:" +) +add_library(FEATHER_F405_serial_generic INTERFACE) +target_compile_options(FEATHER_F405_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(FEATHER_F405_serial_none INTERFACE) +target_compile_options(FEATHER_F405_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(FEATHER_F405_usb_CDC INTERFACE) +target_compile_options(FEATHER_F405_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(FEATHER_F405_usb_CDCgen INTERFACE) +target_compile_options(FEATHER_F405_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(FEATHER_F405_usb_HID INTERFACE) +target_compile_options(FEATHER_F405_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(FEATHER_F405_usb_none INTERFACE) +target_compile_options(FEATHER_F405_usb_none INTERFACE + "SHELL:" +) +add_library(FEATHER_F405_xusb_FS INTERFACE) +target_compile_options(FEATHER_F405_xusb_FS INTERFACE + "SHELL:" +) +add_library(FEATHER_F405_xusb_HS INTERFACE) +target_compile_options(FEATHER_F405_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(FEATHER_F405_xusb_HSFS INTERFACE) +target_compile_options(FEATHER_F405_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# FEATHER_F405_hid +# ----------------------------------------------------------------------------- + +set(FEATHER_F405_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") +set(FEATHER_F405_hid_MAXSIZE 1048576) +set(FEATHER_F405_hid_MAXDATASIZE 131072) +set(FEATHER_F405_hid_MCU cortex-m4) +set(FEATHER_F405_hid_FPCONF "-") +add_library(FEATHER_F405_hid INTERFACE) +target_compile_options(FEATHER_F405_hid INTERFACE + "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FEATHER_F405_hid_MCU} +) +target_compile_definitions(FEATHER_F405_hid INTERFACE + "STM32F4xx" + "ARDUINO_FEATHER_F405" + "BOARD_NAME=\"FEATHER_F405\"" + "BOARD_ID=FEATHER_F405" + "VARIANT_H=\"variant_FEATHER_F405.h\"" +) +target_include_directories(FEATHER_F405_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${FEATHER_F405_hid_VARIANT_PATH} +) + +target_link_options(FEATHER_F405_hid INTERFACE + "LINKER:--default-script=${FEATHER_F405_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FEATHER_F405_hid_MCU} +) +target_link_libraries(FEATHER_F405_hid INTERFACE + arm_cortexM4lf_math +) + + +# FK407M1 +# ----------------------------------------------------------------------------- + +set(FK407M1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(FK407M1_MAXSIZE 524288) +set(FK407M1_MAXDATASIZE 131072) +set(FK407M1_MCU cortex-m4) +set(FK407M1_FPCONF "-") +add_library(FK407M1 INTERFACE) +target_compile_options(FK407M1 INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FK407M1_MCU} +) +target_compile_definitions(FK407M1 INTERFACE + "STM32F4xx" + "ARDUINO_FK407M1" + "BOARD_NAME=\"FK407M1\"" + "BOARD_ID=FK407M1" + "VARIANT_H=\"variant_FK407M1.h\"" +) +target_include_directories(FK407M1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${FK407M1_VARIANT_PATH} +) + +target_link_options(FK407M1 INTERFACE + "LINKER:--default-script=${FK407M1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FK407M1_MCU} +) +target_link_libraries(FK407M1 INTERFACE + arm_cortexM4lf_math +) + +add_library(FK407M1_serial_disabled INTERFACE) +target_compile_options(FK407M1_serial_disabled INTERFACE + "SHELL:" +) +add_library(FK407M1_serial_generic INTERFACE) +target_compile_options(FK407M1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(FK407M1_serial_none INTERFACE) +target_compile_options(FK407M1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(FK407M1_usb_CDC INTERFACE) +target_compile_options(FK407M1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(FK407M1_usb_CDCgen INTERFACE) +target_compile_options(FK407M1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(FK407M1_usb_HID INTERFACE) +target_compile_options(FK407M1_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(FK407M1_usb_none INTERFACE) +target_compile_options(FK407M1_usb_none INTERFACE + "SHELL:" +) +add_library(FK407M1_xusb_FS INTERFACE) +target_compile_options(FK407M1_xusb_FS INTERFACE + "SHELL:" +) +add_library(FK407M1_xusb_HS INTERFACE) +target_compile_options(FK407M1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(FK407M1_xusb_HSFS INTERFACE) +target_compile_options(FK407M1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# FK407M1_hid +# ----------------------------------------------------------------------------- + +set(FK407M1_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(FK407M1_hid_MAXSIZE 524288) +set(FK407M1_hid_MAXDATASIZE 131072) +set(FK407M1_hid_MCU cortex-m4) +set(FK407M1_hid_FPCONF "-") +add_library(FK407M1_hid INTERFACE) +target_compile_options(FK407M1_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FK407M1_hid_MCU} +) +target_compile_definitions(FK407M1_hid INTERFACE + "STM32F4xx" + "ARDUINO_FK407M1" + "BOARD_NAME=\"FK407M1\"" + "BOARD_ID=FK407M1" + "VARIANT_H=\"variant_FK407M1.h\"" +) +target_include_directories(FK407M1_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${FK407M1_hid_VARIANT_PATH} +) + +target_link_options(FK407M1_hid INTERFACE + "LINKER:--default-script=${FK407M1_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FK407M1_hid_MCU} +) +target_link_libraries(FK407M1_hid INTERFACE + arm_cortexM4lf_math +) + + +# FYSETC_S6 +# ----------------------------------------------------------------------------- + +set(FYSETC_S6_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(FYSETC_S6_MAXSIZE 458752) +set(FYSETC_S6_MAXDATASIZE 131072) +set(FYSETC_S6_MCU cortex-m4) +set(FYSETC_S6_FPCONF "fpv4-sp-d16-hard") +add_library(FYSETC_S6 INTERFACE) +target_compile_options(FYSETC_S6 INTERFACE + "SHELL:-DSTM32F446xx -DVECT_TAB_OFFSET=0x10000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FYSETC_S6_MCU} +) +target_compile_definitions(FYSETC_S6 INTERFACE + "STM32F4xx" + "ARDUINO_FYSETC_S6" + "BOARD_NAME=\"FYSETC_S6\"" + "BOARD_ID=FYSETC_S6" + "VARIANT_H=\"variant_FYSETC_S6.h\"" +) +target_include_directories(FYSETC_S6 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${FYSETC_S6_VARIANT_PATH} +) + +target_link_options(FYSETC_S6 INTERFACE + "LINKER:--default-script=${FYSETC_S6_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x10000" + "LINKER:--defsym=LD_MAX_SIZE=458752" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${FYSETC_S6_MCU} +) +target_link_libraries(FYSETC_S6 INTERFACE + arm_cortexM4lf_math +) + +add_library(FYSETC_S6_serial_disabled INTERFACE) +target_compile_options(FYSETC_S6_serial_disabled INTERFACE + "SHELL:" +) +add_library(FYSETC_S6_serial_generic INTERFACE) +target_compile_options(FYSETC_S6_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(FYSETC_S6_serial_none INTERFACE) +target_compile_options(FYSETC_S6_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(FYSETC_S6_usb_CDC INTERFACE) +target_compile_options(FYSETC_S6_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(FYSETC_S6_usb_CDCgen INTERFACE) +target_compile_options(FYSETC_S6_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(FYSETC_S6_usb_none INTERFACE) +target_compile_options(FYSETC_S6_usb_none INTERFACE + "SHELL:" +) +add_library(FYSETC_S6_xusb_FS INTERFACE) +target_compile_options(FYSETC_S6_xusb_FS INTERFACE + "SHELL:" +) +add_library(FYSETC_S6_xusb_HS INTERFACE) +target_compile_options(FYSETC_S6_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(FYSETC_S6_xusb_HSFS INTERFACE) +target_compile_options(FYSETC_S6_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F030C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F030C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030C6T") +set(GENERIC_F030C6TX_MAXSIZE 32768) +set(GENERIC_F030C6TX_MAXDATASIZE 4096) +set(GENERIC_F030C6TX_MCU cortex-m0) +set(GENERIC_F030C6TX_FPCONF "-") +add_library(GENERIC_F030C6TX INTERFACE) +target_compile_options(GENERIC_F030C6TX INTERFACE + "SHELL:-DSTM32F030x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F030C6TX_MCU} +) +target_compile_definitions(GENERIC_F030C6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F030C6TX" + "BOARD_NAME=\"GENERIC_F030C6TX\"" + "BOARD_ID=GENERIC_F030C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F030C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F030C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F030C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F030C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F030C6TX_MCU} +) +target_link_libraries(GENERIC_F030C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F030C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F030C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F030C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F030C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F030C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F030C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F030C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F030C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F030C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F030C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F030C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F030C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F030C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F030C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F030C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F030C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030C8T") +set(GENERIC_F030C8TX_MAXSIZE 65536) +set(GENERIC_F030C8TX_MAXDATASIZE 8192) +set(GENERIC_F030C8TX_MCU cortex-m0) +set(GENERIC_F030C8TX_FPCONF "-") +add_library(GENERIC_F030C8TX INTERFACE) +target_compile_options(GENERIC_F030C8TX INTERFACE + "SHELL:-DSTM32F030x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F030C8TX_MCU} +) +target_compile_definitions(GENERIC_F030C8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F030C8TX" + "BOARD_NAME=\"GENERIC_F030C8TX\"" + "BOARD_ID=GENERIC_F030C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F030C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F030C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F030C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F030C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F030C8TX_MCU} +) +target_link_libraries(GENERIC_F030C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F030C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F030C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F030C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F030C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F030C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F030C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F030C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F030C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F030C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F030C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F030C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F030C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F030C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F030C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F030F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_F030F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030F4P") +set(GENERIC_F030F4PX_MAXSIZE 16384) +set(GENERIC_F030F4PX_MAXDATASIZE 4096) +set(GENERIC_F030F4PX_MCU cortex-m0) +set(GENERIC_F030F4PX_FPCONF "-") +add_library(GENERIC_F030F4PX INTERFACE) +target_compile_options(GENERIC_F030F4PX INTERFACE + "SHELL:-DSTM32F030x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F030F4PX_MCU} +) +target_compile_definitions(GENERIC_F030F4PX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F030F4PX" + "BOARD_NAME=\"GENERIC_F030F4PX\"" + "BOARD_ID=GENERIC_F030F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F030F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F030F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_F030F4PX INTERFACE + "LINKER:--default-script=${GENERIC_F030F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F030F4PX_MCU} +) +target_link_libraries(GENERIC_F030F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F030F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F030F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F030F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_F030F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F030F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_F030F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F030F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F030F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F030F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F030F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F030F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_F030F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F030F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_F030F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F030K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F030K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030K6T") +set(GENERIC_F030K6TX_MAXSIZE 32768) +set(GENERIC_F030K6TX_MAXDATASIZE 4096) +set(GENERIC_F030K6TX_MCU cortex-m0) +set(GENERIC_F030K6TX_FPCONF "-") +add_library(GENERIC_F030K6TX INTERFACE) +target_compile_options(GENERIC_F030K6TX INTERFACE + "SHELL:-DSTM32F030x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F030K6TX_MCU} +) +target_compile_definitions(GENERIC_F030K6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F030K6TX" + "BOARD_NAME=\"GENERIC_F030K6TX\"" + "BOARD_ID=GENERIC_F030K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F030K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F030K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F030K6TX INTERFACE + "LINKER:--default-script=${GENERIC_F030K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F030K6TX_MCU} +) +target_link_libraries(GENERIC_F030K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F030K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F030K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F030K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F030K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F030K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F030K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F030K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F030K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F030K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F030K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F030K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F030K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F030K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F030K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F030R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F030R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030R8T") +set(GENERIC_F030R8TX_MAXSIZE 65536) +set(GENERIC_F030R8TX_MAXDATASIZE 8192) +set(GENERIC_F030R8TX_MCU cortex-m0) +set(GENERIC_F030R8TX_FPCONF "-") +add_library(GENERIC_F030R8TX INTERFACE) +target_compile_options(GENERIC_F030R8TX INTERFACE + "SHELL:-DSTM32F030x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F030R8TX_MCU} +) +target_compile_definitions(GENERIC_F030R8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F030R8TX" + "BOARD_NAME=\"GENERIC_F030R8TX\"" + "BOARD_ID=GENERIC_F030R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F030R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F030R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F030R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F030R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F030R8TX_MCU} +) +target_link_libraries(GENERIC_F030R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F030R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F030R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F030R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F030R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F030R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F030R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F030R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F030R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F030R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F030R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F030R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F030R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F030R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F030R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031C(4-6)T") +set(GENERIC_F031C4TX_MAXSIZE 16384) +set(GENERIC_F031C4TX_MAXDATASIZE 4096) +set(GENERIC_F031C4TX_MCU cortex-m0) +set(GENERIC_F031C4TX_FPCONF "-") +add_library(GENERIC_F031C4TX INTERFACE) +target_compile_options(GENERIC_F031C4TX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031C4TX_MCU} +) +target_compile_definitions(GENERIC_F031C4TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031C4TX" + "BOARD_NAME=\"GENERIC_F031C4TX\"" + "BOARD_ID=GENERIC_F031C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F031C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031C4TX_MCU} +) +target_link_libraries(GENERIC_F031C4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F031C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F031C4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031C(4-6)T") +set(GENERIC_F031C6TX_MAXSIZE 32768) +set(GENERIC_F031C6TX_MAXDATASIZE 4096) +set(GENERIC_F031C6TX_MCU cortex-m0) +set(GENERIC_F031C6TX_FPCONF "-") +add_library(GENERIC_F031C6TX INTERFACE) +target_compile_options(GENERIC_F031C6TX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031C6TX_MCU} +) +target_compile_definitions(GENERIC_F031C6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031C6TX" + "BOARD_NAME=\"GENERIC_F031C6TX\"" + "BOARD_ID=GENERIC_F031C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F031C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031C6TX_MCU} +) +target_link_libraries(GENERIC_F031C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F031C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F031C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031E6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031E6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031E6Y_F038E6Y") +set(GENERIC_F031E6YX_MAXSIZE 32768) +set(GENERIC_F031E6YX_MAXDATASIZE 4096) +set(GENERIC_F031E6YX_MCU cortex-m0) +set(GENERIC_F031E6YX_FPCONF "-") +add_library(GENERIC_F031E6YX INTERFACE) +target_compile_options(GENERIC_F031E6YX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031E6YX_MCU} +) +target_compile_definitions(GENERIC_F031E6YX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031E6YX" + "BOARD_NAME=\"GENERIC_F031E6YX\"" + "BOARD_ID=GENERIC_F031E6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031E6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031E6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031E6YX INTERFACE + "LINKER:--default-script=${GENERIC_F031E6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031E6YX_MCU} +) +target_link_libraries(GENERIC_F031E6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031E6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031E6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031E6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031E6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031E6YX_serial_none INTERFACE) +target_compile_options(GENERIC_F031E6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031E6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031E6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031E6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031E6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031E6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031E6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031E6YX_usb_none INTERFACE) +target_compile_options(GENERIC_F031E6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031F(4-6)P") +set(GENERIC_F031F4PX_MAXSIZE 16384) +set(GENERIC_F031F4PX_MAXDATASIZE 4096) +set(GENERIC_F031F4PX_MCU cortex-m0) +set(GENERIC_F031F4PX_FPCONF "-") +add_library(GENERIC_F031F4PX INTERFACE) +target_compile_options(GENERIC_F031F4PX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031F4PX_MCU} +) +target_compile_definitions(GENERIC_F031F4PX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031F4PX" + "BOARD_NAME=\"GENERIC_F031F4PX\"" + "BOARD_ID=GENERIC_F031F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031F4PX INTERFACE + "LINKER:--default-script=${GENERIC_F031F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031F4PX_MCU} +) +target_link_libraries(GENERIC_F031F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_F031F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_F031F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031F(4-6)P") +set(GENERIC_F031F6PX_MAXSIZE 32768) +set(GENERIC_F031F6PX_MAXDATASIZE 4096) +set(GENERIC_F031F6PX_MCU cortex-m0) +set(GENERIC_F031F6PX_FPCONF "-") +add_library(GENERIC_F031F6PX INTERFACE) +target_compile_options(GENERIC_F031F6PX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031F6PX_MCU} +) +target_compile_definitions(GENERIC_F031F6PX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031F6PX" + "BOARD_NAME=\"GENERIC_F031F6PX\"" + "BOARD_ID=GENERIC_F031F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031F6PX INTERFACE + "LINKER:--default-script=${GENERIC_F031F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031F6PX_MCU} +) +target_link_libraries(GENERIC_F031F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_F031F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_F031F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031G4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031G4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031G(4-6)U") +set(GENERIC_F031G4UX_MAXSIZE 16384) +set(GENERIC_F031G4UX_MAXDATASIZE 4096) +set(GENERIC_F031G4UX_MCU cortex-m0) +set(GENERIC_F031G4UX_FPCONF "-") +add_library(GENERIC_F031G4UX INTERFACE) +target_compile_options(GENERIC_F031G4UX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031G4UX_MCU} +) +target_compile_definitions(GENERIC_F031G4UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031G4UX" + "BOARD_NAME=\"GENERIC_F031G4UX\"" + "BOARD_ID=GENERIC_F031G4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031G4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031G4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031G4UX INTERFACE + "LINKER:--default-script=${GENERIC_F031G4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031G4UX_MCU} +) +target_link_libraries(GENERIC_F031G4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031G4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031G4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031G4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031G4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031G4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F031G4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031G4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031G4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031G4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031G4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031G4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031G4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031G4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F031G4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031G(4-6)U") +set(GENERIC_F031G6UX_MAXSIZE 32768) +set(GENERIC_F031G6UX_MAXDATASIZE 4096) +set(GENERIC_F031G6UX_MCU cortex-m0) +set(GENERIC_F031G6UX_FPCONF "-") +add_library(GENERIC_F031G6UX INTERFACE) +target_compile_options(GENERIC_F031G6UX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031G6UX_MCU} +) +target_compile_definitions(GENERIC_F031G6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031G6UX" + "BOARD_NAME=\"GENERIC_F031G6UX\"" + "BOARD_ID=GENERIC_F031G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031G6UX INTERFACE + "LINKER:--default-script=${GENERIC_F031G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031G6UX_MCU} +) +target_link_libraries(GENERIC_F031G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F031G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F031G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031K4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031K4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031K(4-6)U") +set(GENERIC_F031K4UX_MAXSIZE 16384) +set(GENERIC_F031K4UX_MAXDATASIZE 4096) +set(GENERIC_F031K4UX_MCU cortex-m0) +set(GENERIC_F031K4UX_FPCONF "-") +add_library(GENERIC_F031K4UX INTERFACE) +target_compile_options(GENERIC_F031K4UX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031K4UX_MCU} +) +target_compile_definitions(GENERIC_F031K4UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031K4UX" + "BOARD_NAME=\"GENERIC_F031K4UX\"" + "BOARD_ID=GENERIC_F031K4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031K4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031K4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031K4UX INTERFACE + "LINKER:--default-script=${GENERIC_F031K4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031K4UX_MCU} +) +target_link_libraries(GENERIC_F031K4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031K4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031K4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031K4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031K4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031K4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F031K4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031K4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031K4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031K4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031K4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031K4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031K4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031K4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F031K4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031K6T") +set(GENERIC_F031K6TX_MAXSIZE 32768) +set(GENERIC_F031K6TX_MAXDATASIZE 4096) +set(GENERIC_F031K6TX_MCU cortex-m0) +set(GENERIC_F031K6TX_FPCONF "-") +add_library(GENERIC_F031K6TX INTERFACE) +target_compile_options(GENERIC_F031K6TX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031K6TX_MCU} +) +target_compile_definitions(GENERIC_F031K6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031K6TX" + "BOARD_NAME=\"GENERIC_F031K6TX\"" + "BOARD_ID=GENERIC_F031K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031K6TX INTERFACE + "LINKER:--default-script=${GENERIC_F031K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031K6TX_MCU} +) +target_link_libraries(GENERIC_F031K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F031K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F031K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F031K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F031K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031K(4-6)U") +set(GENERIC_F031K6UX_MAXSIZE 32768) +set(GENERIC_F031K6UX_MAXDATASIZE 4096) +set(GENERIC_F031K6UX_MCU cortex-m0) +set(GENERIC_F031K6UX_FPCONF "-") +add_library(GENERIC_F031K6UX INTERFACE) +target_compile_options(GENERIC_F031K6UX INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F031K6UX_MCU} +) +target_compile_definitions(GENERIC_F031K6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F031K6UX" + "BOARD_NAME=\"GENERIC_F031K6UX\"" + "BOARD_ID=GENERIC_F031K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F031K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F031K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F031K6UX INTERFACE + "LINKER:--default-script=${GENERIC_F031K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F031K6UX_MCU} +) +target_link_libraries(GENERIC_F031K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F031K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F031K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F031K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F031K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F031K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F031K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F031K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F031K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F031K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F031K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F031K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F031K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F031K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F031K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F038C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F038C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F038C6T") +set(GENERIC_F038C6TX_MAXSIZE 32768) +set(GENERIC_F038C6TX_MAXDATASIZE 4096) +set(GENERIC_F038C6TX_MCU cortex-m0) +set(GENERIC_F038C6TX_FPCONF "-") +add_library(GENERIC_F038C6TX INTERFACE) +target_compile_options(GENERIC_F038C6TX INTERFACE + "SHELL:-DSTM32F038xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F038C6TX_MCU} +) +target_compile_definitions(GENERIC_F038C6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F038C6TX" + "BOARD_NAME=\"GENERIC_F038C6TX\"" + "BOARD_ID=GENERIC_F038C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F038C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F038C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F038C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F038C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F038C6TX_MCU} +) +target_link_libraries(GENERIC_F038C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F038C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F038C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F038C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F038C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F038C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F038C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F038C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F038C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F038C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F038C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F038C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F038C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F038C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F038C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F038E6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F038E6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031E6Y_F038E6Y") +set(GENERIC_F038E6YX_MAXSIZE 32768) +set(GENERIC_F038E6YX_MAXDATASIZE 4096) +set(GENERIC_F038E6YX_MCU cortex-m0) +set(GENERIC_F038E6YX_FPCONF "-") +add_library(GENERIC_F038E6YX INTERFACE) +target_compile_options(GENERIC_F038E6YX INTERFACE + "SHELL:-DSTM32F038xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F038E6YX_MCU} +) +target_compile_definitions(GENERIC_F038E6YX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F038E6YX" + "BOARD_NAME=\"GENERIC_F038E6YX\"" + "BOARD_ID=GENERIC_F038E6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F038E6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F038E6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F038E6YX INTERFACE + "LINKER:--default-script=${GENERIC_F038E6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F038E6YX_MCU} +) +target_link_libraries(GENERIC_F038E6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F038E6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F038E6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F038E6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F038E6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F038E6YX_serial_none INTERFACE) +target_compile_options(GENERIC_F038E6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F038E6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F038E6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F038E6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F038E6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F038E6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F038E6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F038E6YX_usb_none INTERFACE) +target_compile_options(GENERIC_F038E6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F038F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_F038F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F038F6P") +set(GENERIC_F038F6PX_MAXSIZE 32768) +set(GENERIC_F038F6PX_MAXDATASIZE 4096) +set(GENERIC_F038F6PX_MCU cortex-m0) +set(GENERIC_F038F6PX_FPCONF "-") +add_library(GENERIC_F038F6PX INTERFACE) +target_compile_options(GENERIC_F038F6PX INTERFACE + "SHELL:-DSTM32F038xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F038F6PX_MCU} +) +target_compile_definitions(GENERIC_F038F6PX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F038F6PX" + "BOARD_NAME=\"GENERIC_F038F6PX\"" + "BOARD_ID=GENERIC_F038F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F038F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F038F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_F038F6PX INTERFACE + "LINKER:--default-script=${GENERIC_F038F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F038F6PX_MCU} +) +target_link_libraries(GENERIC_F038F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F038F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F038F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F038F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_F038F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F038F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_F038F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F038F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F038F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F038F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F038F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F038F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_F038F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F038F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_F038F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F038G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F038G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F038G6U") +set(GENERIC_F038G6UX_MAXSIZE 32768) +set(GENERIC_F038G6UX_MAXDATASIZE 4096) +set(GENERIC_F038G6UX_MCU cortex-m0) +set(GENERIC_F038G6UX_FPCONF "-") +add_library(GENERIC_F038G6UX INTERFACE) +target_compile_options(GENERIC_F038G6UX INTERFACE + "SHELL:-DSTM32F038xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F038G6UX_MCU} +) +target_compile_definitions(GENERIC_F038G6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F038G6UX" + "BOARD_NAME=\"GENERIC_F038G6UX\"" + "BOARD_ID=GENERIC_F038G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F038G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F038G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F038G6UX INTERFACE + "LINKER:--default-script=${GENERIC_F038G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F038G6UX_MCU} +) +target_link_libraries(GENERIC_F038G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F038G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F038G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F038G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F038G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F038G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F038G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F038G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F038G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F038G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F038G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F038G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F038G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F038G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F038G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F038K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F038K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F038K6U") +set(GENERIC_F038K6UX_MAXSIZE 32768) +set(GENERIC_F038K6UX_MAXDATASIZE 4096) +set(GENERIC_F038K6UX_MCU cortex-m0) +set(GENERIC_F038K6UX_FPCONF "-") +add_library(GENERIC_F038K6UX INTERFACE) +target_compile_options(GENERIC_F038K6UX INTERFACE + "SHELL:-DSTM32F038xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F038K6UX_MCU} +) +target_compile_definitions(GENERIC_F038K6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F038K6UX" + "BOARD_NAME=\"GENERIC_F038K6UX\"" + "BOARD_ID=GENERIC_F038K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F038K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F038K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F038K6UX INTERFACE + "LINKER:--default-script=${GENERIC_F038K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F038K6UX_MCU} +) +target_link_libraries(GENERIC_F038K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F038K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F038K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F038K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F038K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F038K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F038K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F038K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F038K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F038K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F038K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F038K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F038K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F038K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F038K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042C(4-6)(T-U)") +set(GENERIC_F042C4TX_MAXSIZE 16384) +set(GENERIC_F042C4TX_MAXDATASIZE 6144) +set(GENERIC_F042C4TX_MCU cortex-m0) +set(GENERIC_F042C4TX_FPCONF "-") +add_library(GENERIC_F042C4TX INTERFACE) +target_compile_options(GENERIC_F042C4TX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042C4TX_MCU} +) +target_compile_definitions(GENERIC_F042C4TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042C4TX" + "BOARD_NAME=\"GENERIC_F042C4TX\"" + "BOARD_ID=GENERIC_F042C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F042C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042C4TX_MCU} +) +target_link_libraries(GENERIC_F042C4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F042C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F042C4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042C4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042C4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042C(4-6)(T-U)") +set(GENERIC_F042C4UX_MAXSIZE 16384) +set(GENERIC_F042C4UX_MAXDATASIZE 6144) +set(GENERIC_F042C4UX_MCU cortex-m0) +set(GENERIC_F042C4UX_FPCONF "-") +add_library(GENERIC_F042C4UX INTERFACE) +target_compile_options(GENERIC_F042C4UX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042C4UX_MCU} +) +target_compile_definitions(GENERIC_F042C4UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042C4UX" + "BOARD_NAME=\"GENERIC_F042C4UX\"" + "BOARD_ID=GENERIC_F042C4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042C4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042C4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042C4UX INTERFACE + "LINKER:--default-script=${GENERIC_F042C4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042C4UX_MCU} +) +target_link_libraries(GENERIC_F042C4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042C4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042C4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042C4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042C4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042C4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F042C4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042C4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042C4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042C4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042C4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042C4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042C4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042C4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F042C4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042C(4-6)(T-U)") +set(GENERIC_F042C6TX_MAXSIZE 32768) +set(GENERIC_F042C6TX_MAXDATASIZE 6144) +set(GENERIC_F042C6TX_MCU cortex-m0) +set(GENERIC_F042C6TX_FPCONF "-") +add_library(GENERIC_F042C6TX INTERFACE) +target_compile_options(GENERIC_F042C6TX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042C6TX_MCU} +) +target_compile_definitions(GENERIC_F042C6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042C6TX" + "BOARD_NAME=\"GENERIC_F042C6TX\"" + "BOARD_ID=GENERIC_F042C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F042C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042C6TX_MCU} +) +target_link_libraries(GENERIC_F042C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F042C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F042C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042C(4-6)(T-U)") +set(GENERIC_F042C6UX_MAXSIZE 32768) +set(GENERIC_F042C6UX_MAXDATASIZE 6144) +set(GENERIC_F042C6UX_MCU cortex-m0) +set(GENERIC_F042C6UX_FPCONF "-") +add_library(GENERIC_F042C6UX INTERFACE) +target_compile_options(GENERIC_F042C6UX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042C6UX_MCU} +) +target_compile_definitions(GENERIC_F042C6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042C6UX" + "BOARD_NAME=\"GENERIC_F042C6UX\"" + "BOARD_ID=GENERIC_F042C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042C6UX INTERFACE + "LINKER:--default-script=${GENERIC_F042C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042C6UX_MCU} +) +target_link_libraries(GENERIC_F042C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F042C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F042C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042F(4-6)P") +set(GENERIC_F042F4PX_MAXSIZE 16384) +set(GENERIC_F042F4PX_MAXDATASIZE 6144) +set(GENERIC_F042F4PX_MCU cortex-m0) +set(GENERIC_F042F4PX_FPCONF "-") +add_library(GENERIC_F042F4PX INTERFACE) +target_compile_options(GENERIC_F042F4PX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042F4PX_MCU} +) +target_compile_definitions(GENERIC_F042F4PX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042F4PX" + "BOARD_NAME=\"GENERIC_F042F4PX\"" + "BOARD_ID=GENERIC_F042F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042F4PX INTERFACE + "LINKER:--default-script=${GENERIC_F042F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042F4PX_MCU} +) +target_link_libraries(GENERIC_F042F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_F042F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_F042F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042F(4-6)P") +set(GENERIC_F042F6PX_MAXSIZE 32768) +set(GENERIC_F042F6PX_MAXDATASIZE 6144) +set(GENERIC_F042F6PX_MCU cortex-m0) +set(GENERIC_F042F6PX_FPCONF "-") +add_library(GENERIC_F042F6PX INTERFACE) +target_compile_options(GENERIC_F042F6PX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042F6PX_MCU} +) +target_compile_definitions(GENERIC_F042F6PX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042F6PX" + "BOARD_NAME=\"GENERIC_F042F6PX\"" + "BOARD_ID=GENERIC_F042F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042F6PX INTERFACE + "LINKER:--default-script=${GENERIC_F042F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042F6PX_MCU} +) +target_link_libraries(GENERIC_F042F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_F042F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_F042F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042G4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042G4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042G(4-6)U") +set(GENERIC_F042G4UX_MAXSIZE 16384) +set(GENERIC_F042G4UX_MAXDATASIZE 6144) +set(GENERIC_F042G4UX_MCU cortex-m0) +set(GENERIC_F042G4UX_FPCONF "-") +add_library(GENERIC_F042G4UX INTERFACE) +target_compile_options(GENERIC_F042G4UX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042G4UX_MCU} +) +target_compile_definitions(GENERIC_F042G4UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042G4UX" + "BOARD_NAME=\"GENERIC_F042G4UX\"" + "BOARD_ID=GENERIC_F042G4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042G4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042G4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042G4UX INTERFACE + "LINKER:--default-script=${GENERIC_F042G4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042G4UX_MCU} +) +target_link_libraries(GENERIC_F042G4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042G4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042G4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042G4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042G4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042G4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F042G4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042G4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042G4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042G4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042G4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042G4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042G4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042G4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F042G4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042G(4-6)U") +set(GENERIC_F042G6UX_MAXSIZE 32768) +set(GENERIC_F042G6UX_MAXDATASIZE 6144) +set(GENERIC_F042G6UX_MCU cortex-m0) +set(GENERIC_F042G6UX_FPCONF "-") +add_library(GENERIC_F042G6UX INTERFACE) +target_compile_options(GENERIC_F042G6UX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042G6UX_MCU} +) +target_compile_definitions(GENERIC_F042G6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042G6UX" + "BOARD_NAME=\"GENERIC_F042G6UX\"" + "BOARD_ID=GENERIC_F042G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042G6UX INTERFACE + "LINKER:--default-script=${GENERIC_F042G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042G6UX_MCU} +) +target_link_libraries(GENERIC_F042G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F042G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F042G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042K(4-6)T") +set(GENERIC_F042K4TX_MAXSIZE 16384) +set(GENERIC_F042K4TX_MAXDATASIZE 6144) +set(GENERIC_F042K4TX_MCU cortex-m0) +set(GENERIC_F042K4TX_FPCONF "-") +add_library(GENERIC_F042K4TX INTERFACE) +target_compile_options(GENERIC_F042K4TX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042K4TX_MCU} +) +target_compile_definitions(GENERIC_F042K4TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042K4TX" + "BOARD_NAME=\"GENERIC_F042K4TX\"" + "BOARD_ID=GENERIC_F042K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042K4TX INTERFACE + "LINKER:--default-script=${GENERIC_F042K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042K4TX_MCU} +) +target_link_libraries(GENERIC_F042K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F042K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F042K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042K(4-6)T") +set(GENERIC_F042K6TX_MAXSIZE 32768) +set(GENERIC_F042K6TX_MAXDATASIZE 6144) +set(GENERIC_F042K6TX_MCU cortex-m0) +set(GENERIC_F042K6TX_FPCONF "-") +add_library(GENERIC_F042K6TX INTERFACE) +target_compile_options(GENERIC_F042K6TX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042K6TX_MCU} +) +target_compile_definitions(GENERIC_F042K6TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042K6TX" + "BOARD_NAME=\"GENERIC_F042K6TX\"" + "BOARD_ID=GENERIC_F042K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042K6TX INTERFACE + "LINKER:--default-script=${GENERIC_F042K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042K6TX_MCU} +) +target_link_libraries(GENERIC_F042K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F042K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F042K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F042T6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F042T6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042T6Y") +set(GENERIC_F042T6YX_MAXSIZE 32768) +set(GENERIC_F042T6YX_MAXDATASIZE 6144) +set(GENERIC_F042T6YX_MCU cortex-m0) +set(GENERIC_F042T6YX_FPCONF "-") +add_library(GENERIC_F042T6YX INTERFACE) +target_compile_options(GENERIC_F042T6YX INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F042T6YX_MCU} +) +target_compile_definitions(GENERIC_F042T6YX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F042T6YX" + "BOARD_NAME=\"GENERIC_F042T6YX\"" + "BOARD_ID=GENERIC_F042T6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F042T6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F042T6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F042T6YX INTERFACE + "LINKER:--default-script=${GENERIC_F042T6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F042T6YX_MCU} +) +target_link_libraries(GENERIC_F042T6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F042T6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F042T6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F042T6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F042T6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F042T6YX_serial_none INTERFACE) +target_compile_options(GENERIC_F042T6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F042T6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F042T6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F042T6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F042T6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F042T6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F042T6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F042T6YX_usb_none INTERFACE) +target_compile_options(GENERIC_F042T6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F048G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F048G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F048G6U") +set(GENERIC_F048G6UX_MAXSIZE 32768) +set(GENERIC_F048G6UX_MAXDATASIZE 6144) +set(GENERIC_F048G6UX_MCU cortex-m0) +set(GENERIC_F048G6UX_FPCONF "-") +add_library(GENERIC_F048G6UX INTERFACE) +target_compile_options(GENERIC_F048G6UX INTERFACE + "SHELL:-DSTM32F048xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F048G6UX_MCU} +) +target_compile_definitions(GENERIC_F048G6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F048G6UX" + "BOARD_NAME=\"GENERIC_F048G6UX\"" + "BOARD_ID=GENERIC_F048G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F048G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F048G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F048G6UX INTERFACE + "LINKER:--default-script=${GENERIC_F048G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F048G6UX_MCU} +) +target_link_libraries(GENERIC_F048G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F048G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F048G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F048G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F048G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F048G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F048G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F048G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F048G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F048G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F048G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F048G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F048G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F048G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F048G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F048T6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F048T6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F048T6Y") +set(GENERIC_F048T6YX_MAXSIZE 32768) +set(GENERIC_F048T6YX_MAXDATASIZE 6144) +set(GENERIC_F048T6YX_MCU cortex-m0) +set(GENERIC_F048T6YX_FPCONF "-") +add_library(GENERIC_F048T6YX INTERFACE) +target_compile_options(GENERIC_F048T6YX INTERFACE + "SHELL:-DSTM32F048xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F048T6YX_MCU} +) +target_compile_definitions(GENERIC_F048T6YX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F048T6YX" + "BOARD_NAME=\"GENERIC_F048T6YX\"" + "BOARD_ID=GENERIC_F048T6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F048T6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F048T6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F048T6YX INTERFACE + "LINKER:--default-script=${GENERIC_F048T6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F048T6YX_MCU} +) +target_link_libraries(GENERIC_F048T6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F048T6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F048T6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F048T6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F048T6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F048T6YX_serial_none INTERFACE) +target_compile_options(GENERIC_F048T6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F048T6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F048T6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F048T6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F048T6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F048T6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F048T6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F048T6YX_usb_none INTERFACE) +target_compile_options(GENERIC_F048T6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051C4(T-U)") +set(GENERIC_F051C4TX_MAXSIZE 16384) +set(GENERIC_F051C4TX_MAXDATASIZE 8192) +set(GENERIC_F051C4TX_MCU cortex-m0) +set(GENERIC_F051C4TX_FPCONF "-") +add_library(GENERIC_F051C4TX INTERFACE) +target_compile_options(GENERIC_F051C4TX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051C4TX_MCU} +) +target_compile_definitions(GENERIC_F051C4TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051C4TX" + "BOARD_NAME=\"GENERIC_F051C4TX\"" + "BOARD_ID=GENERIC_F051C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F051C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051C4TX_MCU} +) +target_link_libraries(GENERIC_F051C4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F051C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F051C4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051C4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051C4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051C4(T-U)") +set(GENERIC_F051C4UX_MAXSIZE 16384) +set(GENERIC_F051C4UX_MAXDATASIZE 8192) +set(GENERIC_F051C4UX_MCU cortex-m0) +set(GENERIC_F051C4UX_FPCONF "-") +add_library(GENERIC_F051C4UX INTERFACE) +target_compile_options(GENERIC_F051C4UX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051C4UX_MCU} +) +target_compile_definitions(GENERIC_F051C4UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051C4UX" + "BOARD_NAME=\"GENERIC_F051C4UX\"" + "BOARD_ID=GENERIC_F051C4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051C4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051C4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051C4UX INTERFACE + "LINKER:--default-script=${GENERIC_F051C4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051C4UX_MCU} +) +target_link_libraries(GENERIC_F051C4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051C4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051C4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051C4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051C4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051C4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F051C4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051C4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051C4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051C4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051C4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051C4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051C4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051C4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F051C4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051K4T") +set(GENERIC_F051K4TX_MAXSIZE 16384) +set(GENERIC_F051K4TX_MAXDATASIZE 8192) +set(GENERIC_F051K4TX_MCU cortex-m0) +set(GENERIC_F051K4TX_FPCONF "-") +add_library(GENERIC_F051K4TX INTERFACE) +target_compile_options(GENERIC_F051K4TX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051K4TX_MCU} +) +target_compile_definitions(GENERIC_F051K4TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051K4TX" + "BOARD_NAME=\"GENERIC_F051K4TX\"" + "BOARD_ID=GENERIC_F051K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051K4TX INTERFACE + "LINKER:--default-script=${GENERIC_F051K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051K4TX_MCU} +) +target_link_libraries(GENERIC_F051K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F051K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F051K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051K(6-8)U") +set(GENERIC_F051K6UX_MAXSIZE 32768) +set(GENERIC_F051K6UX_MAXDATASIZE 8192) +set(GENERIC_F051K6UX_MCU cortex-m0) +set(GENERIC_F051K6UX_FPCONF "-") +add_library(GENERIC_F051K6UX INTERFACE) +target_compile_options(GENERIC_F051K6UX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051K6UX_MCU} +) +target_compile_definitions(GENERIC_F051K6UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051K6UX" + "BOARD_NAME=\"GENERIC_F051K6UX\"" + "BOARD_ID=GENERIC_F051K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051K6UX INTERFACE + "LINKER:--default-script=${GENERIC_F051K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051K6UX_MCU} +) +target_link_libraries(GENERIC_F051K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F051K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F051K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051K(6-8)U") +set(GENERIC_F051K8UX_MAXSIZE 65536) +set(GENERIC_F051K8UX_MAXDATASIZE 8192) +set(GENERIC_F051K8UX_MCU cortex-m0) +set(GENERIC_F051K8UX_FPCONF "-") +add_library(GENERIC_F051K8UX INTERFACE) +target_compile_options(GENERIC_F051K8UX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051K8UX_MCU} +) +target_compile_definitions(GENERIC_F051K8UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051K8UX" + "BOARD_NAME=\"GENERIC_F051K8UX\"" + "BOARD_ID=GENERIC_F051K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051K8UX INTERFACE + "LINKER:--default-script=${GENERIC_F051K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051K8UX_MCU} +) +target_link_libraries(GENERIC_F051K8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F051K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F051K8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051R4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051R4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051R4T") +set(GENERIC_F051R4TX_MAXSIZE 16384) +set(GENERIC_F051R4TX_MAXDATASIZE 8192) +set(GENERIC_F051R4TX_MCU cortex-m0) +set(GENERIC_F051R4TX_FPCONF "-") +add_library(GENERIC_F051R4TX INTERFACE) +target_compile_options(GENERIC_F051R4TX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051R4TX_MCU} +) +target_compile_definitions(GENERIC_F051R4TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051R4TX" + "BOARD_NAME=\"GENERIC_F051R4TX\"" + "BOARD_ID=GENERIC_F051R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051R4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051R4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051R4TX INTERFACE + "LINKER:--default-script=${GENERIC_F051R4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051R4TX_MCU} +) +target_link_libraries(GENERIC_F051R4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051R4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051R4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051R4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051R4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051R4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F051R4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051R4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051R4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051R4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051R4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051R4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051R4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051R4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F051R4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F051T8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F051T8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051T8Y") +set(GENERIC_F051T8YX_MAXSIZE 65536) +set(GENERIC_F051T8YX_MAXDATASIZE 8192) +set(GENERIC_F051T8YX_MCU cortex-m0) +set(GENERIC_F051T8YX_FPCONF "-") +add_library(GENERIC_F051T8YX INTERFACE) +target_compile_options(GENERIC_F051T8YX INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F051T8YX_MCU} +) +target_compile_definitions(GENERIC_F051T8YX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F051T8YX" + "BOARD_NAME=\"GENERIC_F051T8YX\"" + "BOARD_ID=GENERIC_F051T8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F051T8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F051T8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F051T8YX INTERFACE + "LINKER:--default-script=${GENERIC_F051T8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F051T8YX_MCU} +) +target_link_libraries(GENERIC_F051T8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F051T8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F051T8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F051T8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F051T8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F051T8YX_serial_none INTERFACE) +target_compile_options(GENERIC_F051T8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F051T8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F051T8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F051T8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F051T8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F051T8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F051T8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F051T8YX_usb_none INTERFACE) +target_compile_options(GENERIC_F051T8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F058C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F058C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F058C8U") +set(GENERIC_F058C8UX_MAXSIZE 65536) +set(GENERIC_F058C8UX_MAXDATASIZE 8192) +set(GENERIC_F058C8UX_MCU cortex-m0) +set(GENERIC_F058C8UX_FPCONF "-") +add_library(GENERIC_F058C8UX INTERFACE) +target_compile_options(GENERIC_F058C8UX INTERFACE + "SHELL:-DSTM32F058xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F058C8UX_MCU} +) +target_compile_definitions(GENERIC_F058C8UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F058C8UX" + "BOARD_NAME=\"GENERIC_F058C8UX\"" + "BOARD_ID=GENERIC_F058C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F058C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F058C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F058C8UX INTERFACE + "LINKER:--default-script=${GENERIC_F058C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F058C8UX_MCU} +) +target_link_libraries(GENERIC_F058C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F058C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F058C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F058C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F058C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F058C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F058C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F058C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F058C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F058C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F058C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F058C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F058C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F058C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F058C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F058R8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F058R8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F058R8(H-T)") +set(GENERIC_F058R8HX_MAXSIZE 65536) +set(GENERIC_F058R8HX_MAXDATASIZE 8192) +set(GENERIC_F058R8HX_MCU cortex-m0) +set(GENERIC_F058R8HX_FPCONF "-") +add_library(GENERIC_F058R8HX INTERFACE) +target_compile_options(GENERIC_F058R8HX INTERFACE + "SHELL:-DSTM32F058xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F058R8HX_MCU} +) +target_compile_definitions(GENERIC_F058R8HX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F058R8HX" + "BOARD_NAME=\"GENERIC_F058R8HX\"" + "BOARD_ID=GENERIC_F058R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F058R8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F058R8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F058R8HX INTERFACE + "LINKER:--default-script=${GENERIC_F058R8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F058R8HX_MCU} +) +target_link_libraries(GENERIC_F058R8HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F058R8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F058R8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F058R8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F058R8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F058R8HX_serial_none INTERFACE) +target_compile_options(GENERIC_F058R8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F058R8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F058R8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F058R8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F058R8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F058R8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F058R8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F058R8HX_usb_none INTERFACE) +target_compile_options(GENERIC_F058R8HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F058R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F058R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F058R8(H-T)") +set(GENERIC_F058R8TX_MAXSIZE 65536) +set(GENERIC_F058R8TX_MAXDATASIZE 8192) +set(GENERIC_F058R8TX_MCU cortex-m0) +set(GENERIC_F058R8TX_FPCONF "-") +add_library(GENERIC_F058R8TX INTERFACE) +target_compile_options(GENERIC_F058R8TX INTERFACE + "SHELL:-DSTM32F058xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F058R8TX_MCU} +) +target_compile_definitions(GENERIC_F058R8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F058R8TX" + "BOARD_NAME=\"GENERIC_F058R8TX\"" + "BOARD_ID=GENERIC_F058R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F058R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F058R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F058R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F058R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F058R8TX_MCU} +) +target_link_libraries(GENERIC_F058R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F058R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F058R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F058R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F058R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F058R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F058R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F058R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F058R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F058R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F058R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F058R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F058R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F058R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F058R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F058T8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F058T8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F058T8Y") +set(GENERIC_F058T8YX_MAXSIZE 65536) +set(GENERIC_F058T8YX_MAXDATASIZE 8192) +set(GENERIC_F058T8YX_MCU cortex-m0) +set(GENERIC_F058T8YX_FPCONF "-") +add_library(GENERIC_F058T8YX INTERFACE) +target_compile_options(GENERIC_F058T8YX INTERFACE + "SHELL:-DSTM32F058xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F058T8YX_MCU} +) +target_compile_definitions(GENERIC_F058T8YX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F058T8YX" + "BOARD_NAME=\"GENERIC_F058T8YX\"" + "BOARD_ID=GENERIC_F058T8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F058T8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F058T8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F058T8YX INTERFACE + "LINKER:--default-script=${GENERIC_F058T8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F058T8YX_MCU} +) +target_link_libraries(GENERIC_F058T8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F058T8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F058T8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F058T8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F058T8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F058T8YX_serial_none INTERFACE) +target_compile_options(GENERIC_F058T8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F058T8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F058T8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F058T8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F058T8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F058T8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F058T8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F058T8YX_usb_none INTERFACE) +target_compile_options(GENERIC_F058T8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F070CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F070CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F070CBT") +set(GENERIC_F070CBTX_MAXSIZE 131072) +set(GENERIC_F070CBTX_MAXDATASIZE 16384) +set(GENERIC_F070CBTX_MCU cortex-m0) +set(GENERIC_F070CBTX_FPCONF "-") +add_library(GENERIC_F070CBTX INTERFACE) +target_compile_options(GENERIC_F070CBTX INTERFACE + "SHELL:-DSTM32F070xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F070CBTX_MCU} +) +target_compile_definitions(GENERIC_F070CBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F070CBTX" + "BOARD_NAME=\"GENERIC_F070CBTX\"" + "BOARD_ID=GENERIC_F070CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F070CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F070CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F070CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F070CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F070CBTX_MCU} +) +target_link_libraries(GENERIC_F070CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F070CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F070CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F070CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F070CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F070CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F070CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F070CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F070CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F070CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F070CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F070CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F070CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F070CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F070CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F070RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F070RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F070RBT") +set(GENERIC_F070RBTX_MAXSIZE 131072) +set(GENERIC_F070RBTX_MAXDATASIZE 16384) +set(GENERIC_F070RBTX_MCU cortex-m0) +set(GENERIC_F070RBTX_FPCONF "-") +add_library(GENERIC_F070RBTX INTERFACE) +target_compile_options(GENERIC_F070RBTX INTERFACE + "SHELL:-DSTM32F070xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F070RBTX_MCU} +) +target_compile_definitions(GENERIC_F070RBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F070RBTX" + "BOARD_NAME=\"GENERIC_F070RBTX\"" + "BOARD_ID=GENERIC_F070RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F070RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F070RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F070RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F070RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F070RBTX_MCU} +) +target_link_libraries(GENERIC_F070RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F070RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F070RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F070RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F070RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F070RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F070RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F070RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F070RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F070RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F070RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F070RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F070RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F070RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F070RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)") +set(GENERIC_F071C8TX_MAXSIZE 65536) +set(GENERIC_F071C8TX_MAXDATASIZE 16384) +set(GENERIC_F071C8TX_MCU cortex-m0) +set(GENERIC_F071C8TX_FPCONF "-") +add_library(GENERIC_F071C8TX INTERFACE) +target_compile_options(GENERIC_F071C8TX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071C8TX_MCU} +) +target_compile_definitions(GENERIC_F071C8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071C8TX" + "BOARD_NAME=\"GENERIC_F071C8TX\"" + "BOARD_ID=GENERIC_F071C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F071C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071C8TX_MCU} +) +target_link_libraries(GENERIC_F071C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F071C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F071C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)") +set(GENERIC_F071C8UX_MAXSIZE 65536) +set(GENERIC_F071C8UX_MAXDATASIZE 16384) +set(GENERIC_F071C8UX_MCU cortex-m0) +set(GENERIC_F071C8UX_FPCONF "-") +add_library(GENERIC_F071C8UX INTERFACE) +target_compile_options(GENERIC_F071C8UX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071C8UX_MCU} +) +target_compile_definitions(GENERIC_F071C8UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071C8UX" + "BOARD_NAME=\"GENERIC_F071C8UX\"" + "BOARD_ID=GENERIC_F071C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071C8UX INTERFACE + "LINKER:--default-script=${GENERIC_F071C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071C8UX_MCU} +) +target_link_libraries(GENERIC_F071C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F071C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F071C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)") +set(GENERIC_F071CBTX_MAXSIZE 131072) +set(GENERIC_F071CBTX_MAXDATASIZE 16384) +set(GENERIC_F071CBTX_MCU cortex-m0) +set(GENERIC_F071CBTX_FPCONF "-") +add_library(GENERIC_F071CBTX INTERFACE) +target_compile_options(GENERIC_F071CBTX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071CBTX_MCU} +) +target_compile_definitions(GENERIC_F071CBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071CBTX" + "BOARD_NAME=\"GENERIC_F071CBTX\"" + "BOARD_ID=GENERIC_F071CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F071CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071CBTX_MCU} +) +target_link_libraries(GENERIC_F071CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F071CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F071CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)") +set(GENERIC_F071CBUX_MAXSIZE 131072) +set(GENERIC_F071CBUX_MAXDATASIZE 16384) +set(GENERIC_F071CBUX_MCU cortex-m0) +set(GENERIC_F071CBUX_FPCONF "-") +add_library(GENERIC_F071CBUX INTERFACE) +target_compile_options(GENERIC_F071CBUX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071CBUX_MCU} +) +target_compile_definitions(GENERIC_F071CBUX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071CBUX" + "BOARD_NAME=\"GENERIC_F071CBUX\"" + "BOARD_ID=GENERIC_F071CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F071CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071CBUX_MCU} +) +target_link_libraries(GENERIC_F071CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F071CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F071CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071CBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071CBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)") +set(GENERIC_F071CBYX_MAXSIZE 131072) +set(GENERIC_F071CBYX_MAXDATASIZE 16384) +set(GENERIC_F071CBYX_MCU cortex-m0) +set(GENERIC_F071CBYX_FPCONF "-") +add_library(GENERIC_F071CBYX INTERFACE) +target_compile_options(GENERIC_F071CBYX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071CBYX_MCU} +) +target_compile_definitions(GENERIC_F071CBYX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071CBYX" + "BOARD_NAME=\"GENERIC_F071CBYX\"" + "BOARD_ID=GENERIC_F071CBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071CBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071CBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071CBYX INTERFACE + "LINKER:--default-script=${GENERIC_F071CBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071CBYX_MCU} +) +target_link_libraries(GENERIC_F071CBYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071CBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071CBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071CBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071CBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071CBYX_serial_none INTERFACE) +target_compile_options(GENERIC_F071CBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071CBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071CBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071CBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071CBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071CBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071CBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071CBYX_usb_none INTERFACE) +target_compile_options(GENERIC_F071CBYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071RBT") +set(GENERIC_F071RBTX_MAXSIZE 131072) +set(GENERIC_F071RBTX_MAXDATASIZE 16384) +set(GENERIC_F071RBTX_MCU cortex-m0) +set(GENERIC_F071RBTX_FPCONF "-") +add_library(GENERIC_F071RBTX INTERFACE) +target_compile_options(GENERIC_F071RBTX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071RBTX_MCU} +) +target_compile_definitions(GENERIC_F071RBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071RBTX" + "BOARD_NAME=\"GENERIC_F071RBTX\"" + "BOARD_ID=GENERIC_F071RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F071RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071RBTX_MCU} +) +target_link_libraries(GENERIC_F071RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F071RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F071RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071V8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071V8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071V(8-B)(H-T)") +set(GENERIC_F071V8HX_MAXSIZE 65536) +set(GENERIC_F071V8HX_MAXDATASIZE 16384) +set(GENERIC_F071V8HX_MCU cortex-m0) +set(GENERIC_F071V8HX_FPCONF "-") +add_library(GENERIC_F071V8HX INTERFACE) +target_compile_options(GENERIC_F071V8HX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071V8HX_MCU} +) +target_compile_definitions(GENERIC_F071V8HX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071V8HX" + "BOARD_NAME=\"GENERIC_F071V8HX\"" + "BOARD_ID=GENERIC_F071V8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071V8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071V8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071V8HX INTERFACE + "LINKER:--default-script=${GENERIC_F071V8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071V8HX_MCU} +) +target_link_libraries(GENERIC_F071V8HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071V8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071V8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071V8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071V8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071V8HX_serial_none INTERFACE) +target_compile_options(GENERIC_F071V8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071V8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071V8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071V8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071V8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071V8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071V8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071V8HX_usb_none INTERFACE) +target_compile_options(GENERIC_F071V8HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071V(8-B)(H-T)") +set(GENERIC_F071V8TX_MAXSIZE 65536) +set(GENERIC_F071V8TX_MAXDATASIZE 16384) +set(GENERIC_F071V8TX_MCU cortex-m0) +set(GENERIC_F071V8TX_FPCONF "-") +add_library(GENERIC_F071V8TX INTERFACE) +target_compile_options(GENERIC_F071V8TX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071V8TX_MCU} +) +target_compile_definitions(GENERIC_F071V8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071V8TX" + "BOARD_NAME=\"GENERIC_F071V8TX\"" + "BOARD_ID=GENERIC_F071V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071V8TX INTERFACE + "LINKER:--default-script=${GENERIC_F071V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071V8TX_MCU} +) +target_link_libraries(GENERIC_F071V8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F071V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F071V8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071VBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071V(8-B)(H-T)") +set(GENERIC_F071VBHX_MAXSIZE 131072) +set(GENERIC_F071VBHX_MAXDATASIZE 16384) +set(GENERIC_F071VBHX_MCU cortex-m0) +set(GENERIC_F071VBHX_FPCONF "-") +add_library(GENERIC_F071VBHX INTERFACE) +target_compile_options(GENERIC_F071VBHX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071VBHX_MCU} +) +target_compile_definitions(GENERIC_F071VBHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071VBHX" + "BOARD_NAME=\"GENERIC_F071VBHX\"" + "BOARD_ID=GENERIC_F071VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071VBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071VBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071VBHX INTERFACE + "LINKER:--default-script=${GENERIC_F071VBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071VBHX_MCU} +) +target_link_libraries(GENERIC_F071VBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071VBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071VBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071VBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071VBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071VBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F071VBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071VBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071VBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071VBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071VBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071VBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071VBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071VBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F071VBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F071VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F071VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F071V(8-B)(H-T)") +set(GENERIC_F071VBTX_MAXSIZE 131072) +set(GENERIC_F071VBTX_MAXDATASIZE 16384) +set(GENERIC_F071VBTX_MCU cortex-m0) +set(GENERIC_F071VBTX_FPCONF "-") +add_library(GENERIC_F071VBTX INTERFACE) +target_compile_options(GENERIC_F071VBTX INTERFACE + "SHELL:-DSTM32F071xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F071VBTX_MCU} +) +target_compile_definitions(GENERIC_F071VBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F071VBTX" + "BOARD_NAME=\"GENERIC_F071VBTX\"" + "BOARD_ID=GENERIC_F071VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F071VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F071VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F071VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F071VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F071VBTX_MCU} +) +target_link_libraries(GENERIC_F071VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F071VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F071VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F071VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F071VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F071VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F071VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F071VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F071VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F071VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F071VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F071VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F071VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F071VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F071VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(GENERIC_F072C8TX_MAXSIZE 65536) +set(GENERIC_F072C8TX_MAXDATASIZE 16384) +set(GENERIC_F072C8TX_MCU cortex-m0) +set(GENERIC_F072C8TX_FPCONF "-") +add_library(GENERIC_F072C8TX INTERFACE) +target_compile_options(GENERIC_F072C8TX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072C8TX_MCU} +) +target_compile_definitions(GENERIC_F072C8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072C8TX" + "BOARD_NAME=\"GENERIC_F072C8TX\"" + "BOARD_ID=GENERIC_F072C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F072C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072C8TX_MCU} +) +target_link_libraries(GENERIC_F072C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F072C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F072C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(GENERIC_F072C8UX_MAXSIZE 65536) +set(GENERIC_F072C8UX_MAXDATASIZE 16384) +set(GENERIC_F072C8UX_MCU cortex-m0) +set(GENERIC_F072C8UX_FPCONF "-") +add_library(GENERIC_F072C8UX INTERFACE) +target_compile_options(GENERIC_F072C8UX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072C8UX_MCU} +) +target_compile_definitions(GENERIC_F072C8UX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072C8UX" + "BOARD_NAME=\"GENERIC_F072C8UX\"" + "BOARD_ID=GENERIC_F072C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072C8UX INTERFACE + "LINKER:--default-script=${GENERIC_F072C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072C8UX_MCU} +) +target_link_libraries(GENERIC_F072C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F072C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F072C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(GENERIC_F072CBTX_MAXSIZE 131072) +set(GENERIC_F072CBTX_MAXDATASIZE 16384) +set(GENERIC_F072CBTX_MCU cortex-m0) +set(GENERIC_F072CBTX_FPCONF "-") +add_library(GENERIC_F072CBTX INTERFACE) +target_compile_options(GENERIC_F072CBTX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072CBTX_MCU} +) +target_compile_definitions(GENERIC_F072CBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072CBTX" + "BOARD_NAME=\"GENERIC_F072CBTX\"" + "BOARD_ID=GENERIC_F072CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F072CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072CBTX_MCU} +) +target_link_libraries(GENERIC_F072CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F072CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F072CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(GENERIC_F072CBUX_MAXSIZE 131072) +set(GENERIC_F072CBUX_MAXDATASIZE 16384) +set(GENERIC_F072CBUX_MCU cortex-m0) +set(GENERIC_F072CBUX_FPCONF "-") +add_library(GENERIC_F072CBUX INTERFACE) +target_compile_options(GENERIC_F072CBUX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072CBUX_MCU} +) +target_compile_definitions(GENERIC_F072CBUX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072CBUX" + "BOARD_NAME=\"GENERIC_F072CBUX\"" + "BOARD_ID=GENERIC_F072CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F072CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072CBUX_MCU} +) +target_link_libraries(GENERIC_F072CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F072CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F072CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072CBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072CBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)") +set(GENERIC_F072CBYX_MAXSIZE 131072) +set(GENERIC_F072CBYX_MAXDATASIZE 16384) +set(GENERIC_F072CBYX_MCU cortex-m0) +set(GENERIC_F072CBYX_FPCONF "-") +add_library(GENERIC_F072CBYX INTERFACE) +target_compile_options(GENERIC_F072CBYX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072CBYX_MCU} +) +target_compile_definitions(GENERIC_F072CBYX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072CBYX" + "BOARD_NAME=\"GENERIC_F072CBYX\"" + "BOARD_ID=GENERIC_F072CBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072CBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072CBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072CBYX INTERFACE + "LINKER:--default-script=${GENERIC_F072CBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072CBYX_MCU} +) +target_link_libraries(GENERIC_F072CBYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072CBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072CBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072CBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072CBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072CBYX_serial_none INTERFACE) +target_compile_options(GENERIC_F072CBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072CBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072CBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072CBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072CBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072CBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072CBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072CBYX_usb_none INTERFACE) +target_compile_options(GENERIC_F072CBYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(GENERIC_F072R8TX_MAXSIZE 65536) +set(GENERIC_F072R8TX_MAXDATASIZE 16384) +set(GENERIC_F072R8TX_MCU cortex-m0) +set(GENERIC_F072R8TX_FPCONF "-") +add_library(GENERIC_F072R8TX INTERFACE) +target_compile_options(GENERIC_F072R8TX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072R8TX_MCU} +) +target_compile_definitions(GENERIC_F072R8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072R8TX" + "BOARD_NAME=\"GENERIC_F072R8TX\"" + "BOARD_ID=GENERIC_F072R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F072R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072R8TX_MCU} +) +target_link_libraries(GENERIC_F072R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F072R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F072R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072RBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072RBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(GENERIC_F072RBHX_MAXSIZE 131072) +set(GENERIC_F072RBHX_MAXDATASIZE 16384) +set(GENERIC_F072RBHX_MCU cortex-m0) +set(GENERIC_F072RBHX_FPCONF "-") +add_library(GENERIC_F072RBHX INTERFACE) +target_compile_options(GENERIC_F072RBHX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072RBHX_MCU} +) +target_compile_definitions(GENERIC_F072RBHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072RBHX" + "BOARD_NAME=\"GENERIC_F072RBHX\"" + "BOARD_ID=GENERIC_F072RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072RBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072RBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072RBHX INTERFACE + "LINKER:--default-script=${GENERIC_F072RBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072RBHX_MCU} +) +target_link_libraries(GENERIC_F072RBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072RBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072RBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072RBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072RBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072RBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F072RBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072RBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072RBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072RBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072RBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072RBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072RBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072RBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F072RBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(GENERIC_F072RBIX_MAXSIZE 131072) +set(GENERIC_F072RBIX_MAXDATASIZE 16384) +set(GENERIC_F072RBIX_MCU cortex-m0) +set(GENERIC_F072RBIX_FPCONF "-") +add_library(GENERIC_F072RBIX INTERFACE) +target_compile_options(GENERIC_F072RBIX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072RBIX_MCU} +) +target_compile_definitions(GENERIC_F072RBIX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072RBIX" + "BOARD_NAME=\"GENERIC_F072RBIX\"" + "BOARD_ID=GENERIC_F072RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072RBIX INTERFACE + "LINKER:--default-script=${GENERIC_F072RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072RBIX_MCU} +) +target_link_libraries(GENERIC_F072RBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_F072RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_F072RBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(GENERIC_F072RBTX_MAXSIZE 131072) +set(GENERIC_F072RBTX_MAXDATASIZE 16384) +set(GENERIC_F072RBTX_MCU cortex-m0) +set(GENERIC_F072RBTX_FPCONF "-") +add_library(GENERIC_F072RBTX INTERFACE) +target_compile_options(GENERIC_F072RBTX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072RBTX_MCU} +) +target_compile_definitions(GENERIC_F072RBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072RBTX" + "BOARD_NAME=\"GENERIC_F072RBTX\"" + "BOARD_ID=GENERIC_F072RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F072RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072RBTX_MCU} +) +target_link_libraries(GENERIC_F072RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F072RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F072RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072V8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072V8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072V(8-B)(H-T)") +set(GENERIC_F072V8HX_MAXSIZE 65536) +set(GENERIC_F072V8HX_MAXDATASIZE 16384) +set(GENERIC_F072V8HX_MCU cortex-m0) +set(GENERIC_F072V8HX_FPCONF "-") +add_library(GENERIC_F072V8HX INTERFACE) +target_compile_options(GENERIC_F072V8HX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072V8HX_MCU} +) +target_compile_definitions(GENERIC_F072V8HX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072V8HX" + "BOARD_NAME=\"GENERIC_F072V8HX\"" + "BOARD_ID=GENERIC_F072V8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072V8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072V8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072V8HX INTERFACE + "LINKER:--default-script=${GENERIC_F072V8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072V8HX_MCU} +) +target_link_libraries(GENERIC_F072V8HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072V8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072V8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072V8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072V8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072V8HX_serial_none INTERFACE) +target_compile_options(GENERIC_F072V8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072V8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072V8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072V8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072V8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072V8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072V8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072V8HX_usb_none INTERFACE) +target_compile_options(GENERIC_F072V8HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072V(8-B)(H-T)") +set(GENERIC_F072V8TX_MAXSIZE 65536) +set(GENERIC_F072V8TX_MAXDATASIZE 16384) +set(GENERIC_F072V8TX_MCU cortex-m0) +set(GENERIC_F072V8TX_FPCONF "-") +add_library(GENERIC_F072V8TX INTERFACE) +target_compile_options(GENERIC_F072V8TX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072V8TX_MCU} +) +target_compile_definitions(GENERIC_F072V8TX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072V8TX" + "BOARD_NAME=\"GENERIC_F072V8TX\"" + "BOARD_ID=GENERIC_F072V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072V8TX INTERFACE + "LINKER:--default-script=${GENERIC_F072V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072V8TX_MCU} +) +target_link_libraries(GENERIC_F072V8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F072V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F072V8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072VBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072V(8-B)(H-T)") +set(GENERIC_F072VBHX_MAXSIZE 131072) +set(GENERIC_F072VBHX_MAXDATASIZE 16384) +set(GENERIC_F072VBHX_MCU cortex-m0) +set(GENERIC_F072VBHX_FPCONF "-") +add_library(GENERIC_F072VBHX INTERFACE) +target_compile_options(GENERIC_F072VBHX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072VBHX_MCU} +) +target_compile_definitions(GENERIC_F072VBHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072VBHX" + "BOARD_NAME=\"GENERIC_F072VBHX\"" + "BOARD_ID=GENERIC_F072VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072VBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072VBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072VBHX INTERFACE + "LINKER:--default-script=${GENERIC_F072VBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072VBHX_MCU} +) +target_link_libraries(GENERIC_F072VBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072VBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072VBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072VBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072VBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072VBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F072VBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072VBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072VBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072VBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072VBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072VBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072VBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072VBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F072VBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F072VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F072VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072V(8-B)(H-T)") +set(GENERIC_F072VBTX_MAXSIZE 131072) +set(GENERIC_F072VBTX_MAXDATASIZE 16384) +set(GENERIC_F072VBTX_MCU cortex-m0) +set(GENERIC_F072VBTX_FPCONF "-") +add_library(GENERIC_F072VBTX INTERFACE) +target_compile_options(GENERIC_F072VBTX INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F072VBTX_MCU} +) +target_compile_definitions(GENERIC_F072VBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F072VBTX" + "BOARD_NAME=\"GENERIC_F072VBTX\"" + "BOARD_ID=GENERIC_F072VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F072VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F072VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F072VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F072VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F072VBTX_MCU} +) +target_link_libraries(GENERIC_F072VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F072VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F072VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F072VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F072VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F072VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F072VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F072VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F072VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F072VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F072VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F072VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F072VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F072VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F072VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078CB(T-U-Y)") +set(GENERIC_F078CBTX_MAXSIZE 131072) +set(GENERIC_F078CBTX_MAXDATASIZE 16384) +set(GENERIC_F078CBTX_MCU cortex-m0) +set(GENERIC_F078CBTX_FPCONF "-") +add_library(GENERIC_F078CBTX INTERFACE) +target_compile_options(GENERIC_F078CBTX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078CBTX_MCU} +) +target_compile_definitions(GENERIC_F078CBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078CBTX" + "BOARD_NAME=\"GENERIC_F078CBTX\"" + "BOARD_ID=GENERIC_F078CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F078CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078CBTX_MCU} +) +target_link_libraries(GENERIC_F078CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F078CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F078CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078CB(T-U-Y)") +set(GENERIC_F078CBUX_MAXSIZE 131072) +set(GENERIC_F078CBUX_MAXDATASIZE 16384) +set(GENERIC_F078CBUX_MCU cortex-m0) +set(GENERIC_F078CBUX_FPCONF "-") +add_library(GENERIC_F078CBUX INTERFACE) +target_compile_options(GENERIC_F078CBUX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078CBUX_MCU} +) +target_compile_definitions(GENERIC_F078CBUX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078CBUX" + "BOARD_NAME=\"GENERIC_F078CBUX\"" + "BOARD_ID=GENERIC_F078CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F078CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078CBUX_MCU} +) +target_link_libraries(GENERIC_F078CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F078CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F078CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078CBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078CBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078CB(T-U-Y)") +set(GENERIC_F078CBYX_MAXSIZE 131072) +set(GENERIC_F078CBYX_MAXDATASIZE 16384) +set(GENERIC_F078CBYX_MCU cortex-m0) +set(GENERIC_F078CBYX_FPCONF "-") +add_library(GENERIC_F078CBYX INTERFACE) +target_compile_options(GENERIC_F078CBYX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078CBYX_MCU} +) +target_compile_definitions(GENERIC_F078CBYX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078CBYX" + "BOARD_NAME=\"GENERIC_F078CBYX\"" + "BOARD_ID=GENERIC_F078CBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078CBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078CBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078CBYX INTERFACE + "LINKER:--default-script=${GENERIC_F078CBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078CBYX_MCU} +) +target_link_libraries(GENERIC_F078CBYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078CBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078CBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078CBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078CBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078CBYX_serial_none INTERFACE) +target_compile_options(GENERIC_F078CBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078CBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078CBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078CBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078CBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078CBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078CBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078CBYX_usb_none INTERFACE) +target_compile_options(GENERIC_F078CBYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078RBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078RBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078RB(H-T)") +set(GENERIC_F078RBHX_MAXSIZE 131072) +set(GENERIC_F078RBHX_MAXDATASIZE 16384) +set(GENERIC_F078RBHX_MCU cortex-m0) +set(GENERIC_F078RBHX_FPCONF "-") +add_library(GENERIC_F078RBHX INTERFACE) +target_compile_options(GENERIC_F078RBHX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078RBHX_MCU} +) +target_compile_definitions(GENERIC_F078RBHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078RBHX" + "BOARD_NAME=\"GENERIC_F078RBHX\"" + "BOARD_ID=GENERIC_F078RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078RBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078RBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078RBHX INTERFACE + "LINKER:--default-script=${GENERIC_F078RBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078RBHX_MCU} +) +target_link_libraries(GENERIC_F078RBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078RBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078RBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078RBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078RBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078RBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F078RBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078RBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078RBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078RBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078RBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078RBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078RBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078RBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F078RBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078RB(H-T)") +set(GENERIC_F078RBTX_MAXSIZE 131072) +set(GENERIC_F078RBTX_MAXDATASIZE 16384) +set(GENERIC_F078RBTX_MCU cortex-m0) +set(GENERIC_F078RBTX_FPCONF "-") +add_library(GENERIC_F078RBTX INTERFACE) +target_compile_options(GENERIC_F078RBTX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078RBTX_MCU} +) +target_compile_definitions(GENERIC_F078RBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078RBTX" + "BOARD_NAME=\"GENERIC_F078RBTX\"" + "BOARD_ID=GENERIC_F078RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F078RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078RBTX_MCU} +) +target_link_libraries(GENERIC_F078RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F078RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F078RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078VBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078VB(H-T)") +set(GENERIC_F078VBHX_MAXSIZE 131072) +set(GENERIC_F078VBHX_MAXDATASIZE 16384) +set(GENERIC_F078VBHX_MCU cortex-m0) +set(GENERIC_F078VBHX_FPCONF "-") +add_library(GENERIC_F078VBHX INTERFACE) +target_compile_options(GENERIC_F078VBHX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078VBHX_MCU} +) +target_compile_definitions(GENERIC_F078VBHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078VBHX" + "BOARD_NAME=\"GENERIC_F078VBHX\"" + "BOARD_ID=GENERIC_F078VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078VBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078VBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078VBHX INTERFACE + "LINKER:--default-script=${GENERIC_F078VBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078VBHX_MCU} +) +target_link_libraries(GENERIC_F078VBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078VBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078VBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078VBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078VBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078VBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F078VBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078VBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078VBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078VBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078VBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078VBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078VBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078VBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F078VBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F078VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F078VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F078VB(H-T)") +set(GENERIC_F078VBTX_MAXSIZE 131072) +set(GENERIC_F078VBTX_MAXDATASIZE 16384) +set(GENERIC_F078VBTX_MCU cortex-m0) +set(GENERIC_F078VBTX_FPCONF "-") +add_library(GENERIC_F078VBTX INTERFACE) +target_compile_options(GENERIC_F078VBTX INTERFACE + "SHELL:-DSTM32F078xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F078VBTX_MCU} +) +target_compile_definitions(GENERIC_F078VBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F078VBTX" + "BOARD_NAME=\"GENERIC_F078VBTX\"" + "BOARD_ID=GENERIC_F078VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F078VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F078VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F078VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F078VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F078VBTX_MCU} +) +target_link_libraries(GENERIC_F078VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F078VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F078VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F078VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F078VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F078VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F078VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F078VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F078VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F078VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F078VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F078VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F078VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F078VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F078VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091C(B-C)(T-U)") +set(GENERIC_F091CBTX_MAXSIZE 131072) +set(GENERIC_F091CBTX_MAXDATASIZE 32768) +set(GENERIC_F091CBTX_MCU cortex-m0) +set(GENERIC_F091CBTX_FPCONF "-") +add_library(GENERIC_F091CBTX INTERFACE) +target_compile_options(GENERIC_F091CBTX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091CBTX_MCU} +) +target_compile_definitions(GENERIC_F091CBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091CBTX" + "BOARD_NAME=\"GENERIC_F091CBTX\"" + "BOARD_ID=GENERIC_F091CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F091CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091CBTX_MCU} +) +target_link_libraries(GENERIC_F091CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F091CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F091CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091C(B-C)(T-U)") +set(GENERIC_F091CBUX_MAXSIZE 131072) +set(GENERIC_F091CBUX_MAXDATASIZE 32768) +set(GENERIC_F091CBUX_MCU cortex-m0) +set(GENERIC_F091CBUX_FPCONF "-") +add_library(GENERIC_F091CBUX INTERFACE) +target_compile_options(GENERIC_F091CBUX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091CBUX_MCU} +) +target_compile_definitions(GENERIC_F091CBUX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091CBUX" + "BOARD_NAME=\"GENERIC_F091CBUX\"" + "BOARD_ID=GENERIC_F091CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F091CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091CBUX_MCU} +) +target_link_libraries(GENERIC_F091CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F091CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F091CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091C(B-C)(T-U)") +set(GENERIC_F091CCTX_MAXSIZE 262144) +set(GENERIC_F091CCTX_MAXDATASIZE 32768) +set(GENERIC_F091CCTX_MCU cortex-m0) +set(GENERIC_F091CCTX_FPCONF "-") +add_library(GENERIC_F091CCTX INTERFACE) +target_compile_options(GENERIC_F091CCTX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091CCTX_MCU} +) +target_compile_definitions(GENERIC_F091CCTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091CCTX" + "BOARD_NAME=\"GENERIC_F091CCTX\"" + "BOARD_ID=GENERIC_F091CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091CCTX INTERFACE + "LINKER:--default-script=${GENERIC_F091CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091CCTX_MCU} +) +target_link_libraries(GENERIC_F091CCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F091CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F091CCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091C(B-C)(T-U)") +set(GENERIC_F091CCUX_MAXSIZE 262144) +set(GENERIC_F091CCUX_MAXDATASIZE 32768) +set(GENERIC_F091CCUX_MCU cortex-m0) +set(GENERIC_F091CCUX_FPCONF "-") +add_library(GENERIC_F091CCUX INTERFACE) +target_compile_options(GENERIC_F091CCUX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091CCUX_MCU} +) +target_compile_definitions(GENERIC_F091CCUX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091CCUX" + "BOARD_NAME=\"GENERIC_F091CCUX\"" + "BOARD_ID=GENERIC_F091CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091CCUX INTERFACE + "LINKER:--default-script=${GENERIC_F091CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091CCUX_MCU} +) +target_link_libraries(GENERIC_F091CCUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_F091CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_F091CCUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091RBT_F091RC(H-T-Y)") +set(GENERIC_F091RBTX_MAXSIZE 131072) +set(GENERIC_F091RBTX_MAXDATASIZE 32768) +set(GENERIC_F091RBTX_MCU cortex-m0) +set(GENERIC_F091RBTX_FPCONF "-") +add_library(GENERIC_F091RBTX INTERFACE) +target_compile_options(GENERIC_F091RBTX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091RBTX_MCU} +) +target_compile_definitions(GENERIC_F091RBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091RBTX" + "BOARD_NAME=\"GENERIC_F091RBTX\"" + "BOARD_ID=GENERIC_F091RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F091RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091RBTX_MCU} +) +target_link_libraries(GENERIC_F091RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F091RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F091RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091RCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091RCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091RBT_F091RC(H-T-Y)") +set(GENERIC_F091RCHX_MAXSIZE 262144) +set(GENERIC_F091RCHX_MAXDATASIZE 32768) +set(GENERIC_F091RCHX_MCU cortex-m0) +set(GENERIC_F091RCHX_FPCONF "-") +add_library(GENERIC_F091RCHX INTERFACE) +target_compile_options(GENERIC_F091RCHX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091RCHX_MCU} +) +target_compile_definitions(GENERIC_F091RCHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091RCHX" + "BOARD_NAME=\"GENERIC_F091RCHX\"" + "BOARD_ID=GENERIC_F091RCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091RCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091RCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091RCHX INTERFACE + "LINKER:--default-script=${GENERIC_F091RCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091RCHX_MCU} +) +target_link_libraries(GENERIC_F091RCHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091RCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091RCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091RCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091RCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091RCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F091RCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091RCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091RCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091RCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091RCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091RCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091RCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091RCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F091RCHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091RBT_F091RC(H-T-Y)") +set(GENERIC_F091RCTX_MAXSIZE 262144) +set(GENERIC_F091RCTX_MAXDATASIZE 32768) +set(GENERIC_F091RCTX_MCU cortex-m0) +set(GENERIC_F091RCTX_FPCONF "-") +add_library(GENERIC_F091RCTX INTERFACE) +target_compile_options(GENERIC_F091RCTX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091RCTX_MCU} +) +target_compile_definitions(GENERIC_F091RCTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091RCTX" + "BOARD_NAME=\"GENERIC_F091RCTX\"" + "BOARD_ID=GENERIC_F091RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F091RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091RCTX_MCU} +) +target_link_libraries(GENERIC_F091RCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F091RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F091RCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091RCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091RCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091RBT_F091RC(H-T-Y)") +set(GENERIC_F091RCYX_MAXSIZE 262144) +set(GENERIC_F091RCYX_MAXDATASIZE 32768) +set(GENERIC_F091RCYX_MCU cortex-m0) +set(GENERIC_F091RCYX_FPCONF "-") +add_library(GENERIC_F091RCYX INTERFACE) +target_compile_options(GENERIC_F091RCYX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091RCYX_MCU} +) +target_compile_definitions(GENERIC_F091RCYX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091RCYX" + "BOARD_NAME=\"GENERIC_F091RCYX\"" + "BOARD_ID=GENERIC_F091RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091RCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091RCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091RCYX INTERFACE + "LINKER:--default-script=${GENERIC_F091RCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091RCYX_MCU} +) +target_link_libraries(GENERIC_F091RCYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091RCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091RCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091RCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091RCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091RCYX_serial_none INTERFACE) +target_compile_options(GENERIC_F091RCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091RCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091RCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091RCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091RCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091RCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091RCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091RCYX_usb_none INTERFACE) +target_compile_options(GENERIC_F091RCYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091VBT_F091VC(H-T)") +set(GENERIC_F091VBTX_MAXSIZE 131072) +set(GENERIC_F091VBTX_MAXDATASIZE 32768) +set(GENERIC_F091VBTX_MCU cortex-m0) +set(GENERIC_F091VBTX_FPCONF "-") +add_library(GENERIC_F091VBTX INTERFACE) +target_compile_options(GENERIC_F091VBTX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091VBTX_MCU} +) +target_compile_definitions(GENERIC_F091VBTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091VBTX" + "BOARD_NAME=\"GENERIC_F091VBTX\"" + "BOARD_ID=GENERIC_F091VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F091VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091VBTX_MCU} +) +target_link_libraries(GENERIC_F091VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F091VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F091VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091VBT_F091VC(H-T)") +set(GENERIC_F091VCHX_MAXSIZE 262144) +set(GENERIC_F091VCHX_MAXDATASIZE 32768) +set(GENERIC_F091VCHX_MCU cortex-m0) +set(GENERIC_F091VCHX_FPCONF "-") +add_library(GENERIC_F091VCHX INTERFACE) +target_compile_options(GENERIC_F091VCHX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091VCHX_MCU} +) +target_compile_definitions(GENERIC_F091VCHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091VCHX" + "BOARD_NAME=\"GENERIC_F091VCHX\"" + "BOARD_ID=GENERIC_F091VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091VCHX INTERFACE + "LINKER:--default-script=${GENERIC_F091VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091VCHX_MCU} +) +target_link_libraries(GENERIC_F091VCHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F091VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F091VCHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F091VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F091VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091VBT_F091VC(H-T)") +set(GENERIC_F091VCTX_MAXSIZE 262144) +set(GENERIC_F091VCTX_MAXDATASIZE 32768) +set(GENERIC_F091VCTX_MCU cortex-m0) +set(GENERIC_F091VCTX_FPCONF "-") +add_library(GENERIC_F091VCTX INTERFACE) +target_compile_options(GENERIC_F091VCTX INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F091VCTX_MCU} +) +target_compile_definitions(GENERIC_F091VCTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F091VCTX" + "BOARD_NAME=\"GENERIC_F091VCTX\"" + "BOARD_ID=GENERIC_F091VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F091VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F091VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F091VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F091VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F091VCTX_MCU} +) +target_link_libraries(GENERIC_F091VCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F091VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F091VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F091VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F091VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F091VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F091VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F091VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F091VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F091VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F091VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F091VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F091VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F091VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F091VCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098CC(T-U)") +set(GENERIC_F098CCTX_MAXSIZE 262144) +set(GENERIC_F098CCTX_MAXDATASIZE 32768) +set(GENERIC_F098CCTX_MCU cortex-m0) +set(GENERIC_F098CCTX_FPCONF "-") +add_library(GENERIC_F098CCTX INTERFACE) +target_compile_options(GENERIC_F098CCTX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098CCTX_MCU} +) +target_compile_definitions(GENERIC_F098CCTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098CCTX" + "BOARD_NAME=\"GENERIC_F098CCTX\"" + "BOARD_ID=GENERIC_F098CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098CCTX INTERFACE + "LINKER:--default-script=${GENERIC_F098CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098CCTX_MCU} +) +target_link_libraries(GENERIC_F098CCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F098CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F098CCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098CC(T-U)") +set(GENERIC_F098CCUX_MAXSIZE 262144) +set(GENERIC_F098CCUX_MAXDATASIZE 32768) +set(GENERIC_F098CCUX_MCU cortex-m0) +set(GENERIC_F098CCUX_FPCONF "-") +add_library(GENERIC_F098CCUX INTERFACE) +target_compile_options(GENERIC_F098CCUX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098CCUX_MCU} +) +target_compile_definitions(GENERIC_F098CCUX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098CCUX" + "BOARD_NAME=\"GENERIC_F098CCUX\"" + "BOARD_ID=GENERIC_F098CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098CCUX INTERFACE + "LINKER:--default-script=${GENERIC_F098CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098CCUX_MCU} +) +target_link_libraries(GENERIC_F098CCUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_F098CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_F098CCUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098RCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098RCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098RC(H-T-Y)") +set(GENERIC_F098RCHX_MAXSIZE 262144) +set(GENERIC_F098RCHX_MAXDATASIZE 32768) +set(GENERIC_F098RCHX_MCU cortex-m0) +set(GENERIC_F098RCHX_FPCONF "-") +add_library(GENERIC_F098RCHX INTERFACE) +target_compile_options(GENERIC_F098RCHX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098RCHX_MCU} +) +target_compile_definitions(GENERIC_F098RCHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098RCHX" + "BOARD_NAME=\"GENERIC_F098RCHX\"" + "BOARD_ID=GENERIC_F098RCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098RCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098RCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098RCHX INTERFACE + "LINKER:--default-script=${GENERIC_F098RCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098RCHX_MCU} +) +target_link_libraries(GENERIC_F098RCHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098RCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098RCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098RCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098RCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098RCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F098RCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098RCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098RCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098RCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098RCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098RCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098RCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098RCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F098RCHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098RC(H-T-Y)") +set(GENERIC_F098RCTX_MAXSIZE 262144) +set(GENERIC_F098RCTX_MAXDATASIZE 32768) +set(GENERIC_F098RCTX_MCU cortex-m0) +set(GENERIC_F098RCTX_FPCONF "-") +add_library(GENERIC_F098RCTX INTERFACE) +target_compile_options(GENERIC_F098RCTX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098RCTX_MCU} +) +target_compile_definitions(GENERIC_F098RCTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098RCTX" + "BOARD_NAME=\"GENERIC_F098RCTX\"" + "BOARD_ID=GENERIC_F098RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F098RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098RCTX_MCU} +) +target_link_libraries(GENERIC_F098RCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F098RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F098RCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098RCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098RCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098RC(H-T-Y)") +set(GENERIC_F098RCYX_MAXSIZE 262144) +set(GENERIC_F098RCYX_MAXDATASIZE 32768) +set(GENERIC_F098RCYX_MCU cortex-m0) +set(GENERIC_F098RCYX_FPCONF "-") +add_library(GENERIC_F098RCYX INTERFACE) +target_compile_options(GENERIC_F098RCYX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098RCYX_MCU} +) +target_compile_definitions(GENERIC_F098RCYX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098RCYX" + "BOARD_NAME=\"GENERIC_F098RCYX\"" + "BOARD_ID=GENERIC_F098RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098RCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098RCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098RCYX INTERFACE + "LINKER:--default-script=${GENERIC_F098RCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098RCYX_MCU} +) +target_link_libraries(GENERIC_F098RCYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098RCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098RCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098RCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098RCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098RCYX_serial_none INTERFACE) +target_compile_options(GENERIC_F098RCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098RCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098RCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098RCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098RCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098RCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098RCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098RCYX_usb_none INTERFACE) +target_compile_options(GENERIC_F098RCYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098VC(H-T)") +set(GENERIC_F098VCHX_MAXSIZE 262144) +set(GENERIC_F098VCHX_MAXDATASIZE 32768) +set(GENERIC_F098VCHX_MCU cortex-m0) +set(GENERIC_F098VCHX_FPCONF "-") +add_library(GENERIC_F098VCHX INTERFACE) +target_compile_options(GENERIC_F098VCHX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098VCHX_MCU} +) +target_compile_definitions(GENERIC_F098VCHX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098VCHX" + "BOARD_NAME=\"GENERIC_F098VCHX\"" + "BOARD_ID=GENERIC_F098VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098VCHX INTERFACE + "LINKER:--default-script=${GENERIC_F098VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098VCHX_MCU} +) +target_link_libraries(GENERIC_F098VCHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F098VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F098VCHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F098VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F098VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F098VC(H-T)") +set(GENERIC_F098VCTX_MAXSIZE 262144) +set(GENERIC_F098VCTX_MAXDATASIZE 32768) +set(GENERIC_F098VCTX_MCU cortex-m0) +set(GENERIC_F098VCTX_FPCONF "-") +add_library(GENERIC_F098VCTX INTERFACE) +target_compile_options(GENERIC_F098VCTX INTERFACE + "SHELL:-DSTM32F098xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F098VCTX_MCU} +) +target_compile_definitions(GENERIC_F098VCTX INTERFACE + "STM32F0xx" + "ARDUINO_GENERIC_F098VCTX" + "BOARD_NAME=\"GENERIC_F098VCTX\"" + "BOARD_ID=GENERIC_F098VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F098VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${GENERIC_F098VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F098VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F098VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F098VCTX_MCU} +) +target_link_libraries(GENERIC_F098VCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_F098VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F098VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F098VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F098VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F098VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F098VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F098VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F098VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F098VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F098VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F098VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F098VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F098VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F098VCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_F100C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C4TX_MAXSIZE 16384) +set(GENERIC_F100C4TX_MAXDATASIZE 4096) +set(GENERIC_F100C4TX_MCU cortex-m3) +set(GENERIC_F100C4TX_FPCONF "-") +add_library(GENERIC_F100C4TX INTERFACE) +target_compile_options(GENERIC_F100C4TX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_MCU} +) +target_compile_definitions(GENERIC_F100C4TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C4TX" + "BOARD_NAME=\"GENERIC_F100C4TX\"" + "BOARD_ID=GENERIC_F100C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F100C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_MCU} +) +target_link_libraries(GENERIC_F100C4TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F100C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F100C4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100C4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100C4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100C4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100C4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100C4TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C4TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C4TX_dfu2_MAXSIZE 16384) +set(GENERIC_F100C4TX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F100C4TX_dfu2_MCU cortex-m3) +set(GENERIC_F100C4TX_dfu2_FPCONF "-") +add_library(GENERIC_F100C4TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100C4TX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100C4TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C4TX" + "BOARD_NAME=\"GENERIC_F100C4TX\"" + "BOARD_ID=GENERIC_F100C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C4TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C4TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C4TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100C4TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100C4TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C4TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C4TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C4TX_dfuo_MAXSIZE 16384) +set(GENERIC_F100C4TX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F100C4TX_dfuo_MCU cortex-m3) +set(GENERIC_F100C4TX_dfuo_FPCONF "-") +add_library(GENERIC_F100C4TX_dfuo INTERFACE) +target_compile_options(GENERIC_F100C4TX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100C4TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C4TX" + "BOARD_NAME=\"GENERIC_F100C4TX\"" + "BOARD_ID=GENERIC_F100C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C4TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C4TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C4TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100C4TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100C4TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C4TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C4TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C4TX_hid_MAXSIZE 16384) +set(GENERIC_F100C4TX_hid_MAXDATASIZE 4096) +set(GENERIC_F100C4TX_hid_MCU cortex-m3) +set(GENERIC_F100C4TX_hid_FPCONF "-") +add_library(GENERIC_F100C4TX_hid INTERFACE) +target_compile_options(GENERIC_F100C4TX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_hid_MCU} +) +target_compile_definitions(GENERIC_F100C4TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C4TX" + "BOARD_NAME=\"GENERIC_F100C4TX\"" + "BOARD_ID=GENERIC_F100C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C4TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C4TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C4TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100C4TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C4TX_hid_MCU} +) +target_link_libraries(GENERIC_F100C4TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C6TX_MAXSIZE 32768) +set(GENERIC_F100C6TX_MAXDATASIZE 4096) +set(GENERIC_F100C6TX_MCU cortex-m3) +set(GENERIC_F100C6TX_FPCONF "-") +add_library(GENERIC_F100C6TX INTERFACE) +target_compile_options(GENERIC_F100C6TX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_MCU} +) +target_compile_definitions(GENERIC_F100C6TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C6TX" + "BOARD_NAME=\"GENERIC_F100C6TX\"" + "BOARD_ID=GENERIC_F100C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F100C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_MCU} +) +target_link_libraries(GENERIC_F100C6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F100C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F100C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100C6TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C6TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C6TX_dfu2_MAXSIZE 32768) +set(GENERIC_F100C6TX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F100C6TX_dfu2_MCU cortex-m3) +set(GENERIC_F100C6TX_dfu2_FPCONF "-") +add_library(GENERIC_F100C6TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100C6TX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100C6TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C6TX" + "BOARD_NAME=\"GENERIC_F100C6TX\"" + "BOARD_ID=GENERIC_F100C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C6TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C6TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C6TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100C6TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100C6TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C6TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C6TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C6TX_dfuo_MAXSIZE 32768) +set(GENERIC_F100C6TX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F100C6TX_dfuo_MCU cortex-m3) +set(GENERIC_F100C6TX_dfuo_FPCONF "-") +add_library(GENERIC_F100C6TX_dfuo INTERFACE) +target_compile_options(GENERIC_F100C6TX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100C6TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C6TX" + "BOARD_NAME=\"GENERIC_F100C6TX\"" + "BOARD_ID=GENERIC_F100C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C6TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C6TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C6TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100C6TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100C6TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C6TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C6TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(4-6)T") +set(GENERIC_F100C6TX_hid_MAXSIZE 32768) +set(GENERIC_F100C6TX_hid_MAXDATASIZE 4096) +set(GENERIC_F100C6TX_hid_MCU cortex-m3) +set(GENERIC_F100C6TX_hid_FPCONF "-") +add_library(GENERIC_F100C6TX_hid INTERFACE) +target_compile_options(GENERIC_F100C6TX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_hid_MCU} +) +target_compile_definitions(GENERIC_F100C6TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C6TX" + "BOARD_NAME=\"GENERIC_F100C6TX\"" + "BOARD_ID=GENERIC_F100C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C6TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C6TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C6TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100C6TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100C6TX_hid_MCU} +) +target_link_libraries(GENERIC_F100C6TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100C8TX_MAXSIZE 65536) +set(GENERIC_F100C8TX_MAXDATASIZE 8192) +set(GENERIC_F100C8TX_MCU cortex-m3) +set(GENERIC_F100C8TX_FPCONF "-") +add_library(GENERIC_F100C8TX INTERFACE) +target_compile_options(GENERIC_F100C8TX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_MCU} +) +target_compile_definitions(GENERIC_F100C8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C8TX" + "BOARD_NAME=\"GENERIC_F100C8TX\"" + "BOARD_ID=GENERIC_F100C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F100C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_MCU} +) +target_link_libraries(GENERIC_F100C8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F100C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F100C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100C8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100C8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F100C8TX_dfu2_MAXDATASIZE 8192) +set(GENERIC_F100C8TX_dfu2_MCU cortex-m3) +set(GENERIC_F100C8TX_dfu2_FPCONF "-") +add_library(GENERIC_F100C8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100C8TX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100C8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C8TX" + "BOARD_NAME=\"GENERIC_F100C8TX\"" + "BOARD_ID=GENERIC_F100C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100C8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100C8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100C8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F100C8TX_dfuo_MAXDATASIZE 8192) +set(GENERIC_F100C8TX_dfuo_MCU cortex-m3) +set(GENERIC_F100C8TX_dfuo_FPCONF "-") +add_library(GENERIC_F100C8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F100C8TX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100C8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C8TX" + "BOARD_NAME=\"GENERIC_F100C8TX\"" + "BOARD_ID=GENERIC_F100C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100C8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100C8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100C8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100C8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100C8TX_hid_MAXSIZE 65536) +set(GENERIC_F100C8TX_hid_MAXDATASIZE 8192) +set(GENERIC_F100C8TX_hid_MCU cortex-m3) +set(GENERIC_F100C8TX_hid_FPCONF "-") +add_library(GENERIC_F100C8TX_hid INTERFACE) +target_compile_options(GENERIC_F100C8TX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F100C8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100C8TX" + "BOARD_NAME=\"GENERIC_F100C8TX\"" + "BOARD_ID=GENERIC_F100C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100C8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100C8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100C8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100C8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100C8TX_hid_MCU} +) +target_link_libraries(GENERIC_F100C8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100CBTX_MAXSIZE 131072) +set(GENERIC_F100CBTX_MAXDATASIZE 8192) +set(GENERIC_F100CBTX_MCU cortex-m3) +set(GENERIC_F100CBTX_FPCONF "-") +add_library(GENERIC_F100CBTX INTERFACE) +target_compile_options(GENERIC_F100CBTX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_MCU} +) +target_compile_definitions(GENERIC_F100CBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100CBTX" + "BOARD_NAME=\"GENERIC_F100CBTX\"" + "BOARD_ID=GENERIC_F100CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F100CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_MCU} +) +target_link_libraries(GENERIC_F100CBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F100CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F100CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100CBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100CBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100CBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F100CBTX_dfu2_MAXDATASIZE 8192) +set(GENERIC_F100CBTX_dfu2_MCU cortex-m3) +set(GENERIC_F100CBTX_dfu2_FPCONF "-") +add_library(GENERIC_F100CBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100CBTX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100CBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100CBTX" + "BOARD_NAME=\"GENERIC_F100CBTX\"" + "BOARD_ID=GENERIC_F100CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100CBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100CBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100CBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100CBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100CBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100CBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100CBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100CBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F100CBTX_dfuo_MAXDATASIZE 8192) +set(GENERIC_F100CBTX_dfuo_MCU cortex-m3) +set(GENERIC_F100CBTX_dfuo_FPCONF "-") +add_library(GENERIC_F100CBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F100CBTX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100CBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100CBTX" + "BOARD_NAME=\"GENERIC_F100CBTX\"" + "BOARD_ID=GENERIC_F100CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100CBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100CBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100CBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100CBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100CBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100CBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100CBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100C(8-B)T") +set(GENERIC_F100CBTX_hid_MAXSIZE 131072) +set(GENERIC_F100CBTX_hid_MAXDATASIZE 8192) +set(GENERIC_F100CBTX_hid_MCU cortex-m3) +set(GENERIC_F100CBTX_hid_FPCONF "-") +add_library(GENERIC_F100CBTX_hid INTERFACE) +target_compile_options(GENERIC_F100CBTX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F100CBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100CBTX" + "BOARD_NAME=\"GENERIC_F100CBTX\"" + "BOARD_ID=GENERIC_F100CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100CBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100CBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100CBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100CBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100CBTX_hid_MCU} +) +target_link_libraries(GENERIC_F100CBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R4HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R4HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R4HX_MAXSIZE 16384) +set(GENERIC_F100R4HX_MAXDATASIZE 4096) +set(GENERIC_F100R4HX_MCU cortex-m3) +set(GENERIC_F100R4HX_FPCONF "-") +add_library(GENERIC_F100R4HX INTERFACE) +target_compile_options(GENERIC_F100R4HX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_MCU} +) +target_compile_definitions(GENERIC_F100R4HX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R4HX" + "BOARD_NAME=\"GENERIC_F100R4HX\"" + "BOARD_ID=GENERIC_F100R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R4HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R4HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R4HX INTERFACE + "LINKER:--default-script=${GENERIC_F100R4HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_MCU} +) +target_link_libraries(GENERIC_F100R4HX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100R4HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100R4HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R4HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100R4HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100R4HX_serial_none INTERFACE) +target_compile_options(GENERIC_F100R4HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100R4HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100R4HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100R4HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100R4HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100R4HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100R4HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100R4HX_usb_none INTERFACE) +target_compile_options(GENERIC_F100R4HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R4HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100R4HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R4HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100R4HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100R4HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100R4HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100R4HX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R4HX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R4HX_dfu2_MAXSIZE 16384) +set(GENERIC_F100R4HX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F100R4HX_dfu2_MCU cortex-m3) +set(GENERIC_F100R4HX_dfu2_FPCONF "-") +add_library(GENERIC_F100R4HX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100R4HX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100R4HX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R4HX" + "BOARD_NAME=\"GENERIC_F100R4HX\"" + "BOARD_ID=GENERIC_F100R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R4HX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R4HX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R4HX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100R4HX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100R4HX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R4HX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R4HX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R4HX_dfuo_MAXSIZE 16384) +set(GENERIC_F100R4HX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F100R4HX_dfuo_MCU cortex-m3) +set(GENERIC_F100R4HX_dfuo_FPCONF "-") +add_library(GENERIC_F100R4HX_dfuo INTERFACE) +target_compile_options(GENERIC_F100R4HX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100R4HX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R4HX" + "BOARD_NAME=\"GENERIC_F100R4HX\"" + "BOARD_ID=GENERIC_F100R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R4HX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R4HX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R4HX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100R4HX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100R4HX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R4HX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R4HX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R4HX_hid_MAXSIZE 16384) +set(GENERIC_F100R4HX_hid_MAXDATASIZE 4096) +set(GENERIC_F100R4HX_hid_MCU cortex-m3) +set(GENERIC_F100R4HX_hid_FPCONF "-") +add_library(GENERIC_F100R4HX_hid INTERFACE) +target_compile_options(GENERIC_F100R4HX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_hid_MCU} +) +target_compile_definitions(GENERIC_F100R4HX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R4HX" + "BOARD_NAME=\"GENERIC_F100R4HX\"" + "BOARD_ID=GENERIC_F100R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R4HX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R4HX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R4HX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100R4HX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R4HX_hid_MCU} +) +target_link_libraries(GENERIC_F100R4HX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R6HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R6HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R6HX_MAXSIZE 32768) +set(GENERIC_F100R6HX_MAXDATASIZE 4096) +set(GENERIC_F100R6HX_MCU cortex-m3) +set(GENERIC_F100R6HX_FPCONF "-") +add_library(GENERIC_F100R6HX INTERFACE) +target_compile_options(GENERIC_F100R6HX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_MCU} +) +target_compile_definitions(GENERIC_F100R6HX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R6HX" + "BOARD_NAME=\"GENERIC_F100R6HX\"" + "BOARD_ID=GENERIC_F100R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R6HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R6HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R6HX INTERFACE + "LINKER:--default-script=${GENERIC_F100R6HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_MCU} +) +target_link_libraries(GENERIC_F100R6HX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100R6HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100R6HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R6HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100R6HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100R6HX_serial_none INTERFACE) +target_compile_options(GENERIC_F100R6HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100R6HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100R6HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100R6HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100R6HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100R6HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100R6HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100R6HX_usb_none INTERFACE) +target_compile_options(GENERIC_F100R6HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R6HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100R6HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R6HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100R6HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100R6HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100R6HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100R6HX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R6HX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R6HX_dfu2_MAXSIZE 32768) +set(GENERIC_F100R6HX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F100R6HX_dfu2_MCU cortex-m3) +set(GENERIC_F100R6HX_dfu2_FPCONF "-") +add_library(GENERIC_F100R6HX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100R6HX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100R6HX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R6HX" + "BOARD_NAME=\"GENERIC_F100R6HX\"" + "BOARD_ID=GENERIC_F100R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R6HX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R6HX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R6HX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100R6HX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100R6HX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R6HX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R6HX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R6HX_dfuo_MAXSIZE 32768) +set(GENERIC_F100R6HX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F100R6HX_dfuo_MCU cortex-m3) +set(GENERIC_F100R6HX_dfuo_FPCONF "-") +add_library(GENERIC_F100R6HX_dfuo INTERFACE) +target_compile_options(GENERIC_F100R6HX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100R6HX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R6HX" + "BOARD_NAME=\"GENERIC_F100R6HX\"" + "BOARD_ID=GENERIC_F100R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R6HX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R6HX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R6HX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100R6HX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100R6HX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R6HX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R6HX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(4-6)H") +set(GENERIC_F100R6HX_hid_MAXSIZE 32768) +set(GENERIC_F100R6HX_hid_MAXDATASIZE 4096) +set(GENERIC_F100R6HX_hid_MCU cortex-m3) +set(GENERIC_F100R6HX_hid_FPCONF "-") +add_library(GENERIC_F100R6HX_hid INTERFACE) +target_compile_options(GENERIC_F100R6HX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_hid_MCU} +) +target_compile_definitions(GENERIC_F100R6HX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R6HX" + "BOARD_NAME=\"GENERIC_F100R6HX\"" + "BOARD_ID=GENERIC_F100R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R6HX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R6HX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R6HX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100R6HX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F100R6HX_hid_MCU} +) +target_link_libraries(GENERIC_F100R6HX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100R8TX_MAXSIZE 65536) +set(GENERIC_F100R8TX_MAXDATASIZE 8192) +set(GENERIC_F100R8TX_MCU cortex-m3) +set(GENERIC_F100R8TX_FPCONF "-") +add_library(GENERIC_F100R8TX INTERFACE) +target_compile_options(GENERIC_F100R8TX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_MCU} +) +target_compile_definitions(GENERIC_F100R8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R8TX" + "BOARD_NAME=\"GENERIC_F100R8TX\"" + "BOARD_ID=GENERIC_F100R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F100R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_MCU} +) +target_link_libraries(GENERIC_F100R8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F100R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F100R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100R8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100R8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F100R8TX_dfu2_MAXDATASIZE 8192) +set(GENERIC_F100R8TX_dfu2_MCU cortex-m3) +set(GENERIC_F100R8TX_dfu2_FPCONF "-") +add_library(GENERIC_F100R8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100R8TX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100R8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R8TX" + "BOARD_NAME=\"GENERIC_F100R8TX\"" + "BOARD_ID=GENERIC_F100R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100R8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100R8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100R8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F100R8TX_dfuo_MAXDATASIZE 8192) +set(GENERIC_F100R8TX_dfuo_MCU cortex-m3) +set(GENERIC_F100R8TX_dfuo_FPCONF "-") +add_library(GENERIC_F100R8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F100R8TX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100R8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R8TX" + "BOARD_NAME=\"GENERIC_F100R8TX\"" + "BOARD_ID=GENERIC_F100R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100R8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100R8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100R8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100R8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100R8TX_hid_MAXSIZE 65536) +set(GENERIC_F100R8TX_hid_MAXDATASIZE 8192) +set(GENERIC_F100R8TX_hid_MCU cortex-m3) +set(GENERIC_F100R8TX_hid_FPCONF "-") +add_library(GENERIC_F100R8TX_hid INTERFACE) +target_compile_options(GENERIC_F100R8TX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F100R8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100R8TX" + "BOARD_NAME=\"GENERIC_F100R8TX\"" + "BOARD_ID=GENERIC_F100R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100R8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100R8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100R8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100R8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100R8TX_hid_MCU} +) +target_link_libraries(GENERIC_F100R8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100RBTX_MAXSIZE 131072) +set(GENERIC_F100RBTX_MAXDATASIZE 8192) +set(GENERIC_F100RBTX_MCU cortex-m3) +set(GENERIC_F100RBTX_FPCONF "-") +add_library(GENERIC_F100RBTX INTERFACE) +target_compile_options(GENERIC_F100RBTX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_MCU} +) +target_compile_definitions(GENERIC_F100RBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100RBTX" + "BOARD_NAME=\"GENERIC_F100RBTX\"" + "BOARD_ID=GENERIC_F100RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F100RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_MCU} +) +target_link_libraries(GENERIC_F100RBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F100RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F100RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100RBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100RBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100RBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F100RBTX_dfu2_MAXDATASIZE 8192) +set(GENERIC_F100RBTX_dfu2_MCU cortex-m3) +set(GENERIC_F100RBTX_dfu2_FPCONF "-") +add_library(GENERIC_F100RBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100RBTX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100RBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100RBTX" + "BOARD_NAME=\"GENERIC_F100RBTX\"" + "BOARD_ID=GENERIC_F100RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100RBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100RBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100RBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100RBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100RBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100RBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100RBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100RBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F100RBTX_dfuo_MAXDATASIZE 8192) +set(GENERIC_F100RBTX_dfuo_MCU cortex-m3) +set(GENERIC_F100RBTX_dfuo_FPCONF "-") +add_library(GENERIC_F100RBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F100RBTX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100RBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100RBTX" + "BOARD_NAME=\"GENERIC_F100RBTX\"" + "BOARD_ID=GENERIC_F100RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100RBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100RBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100RBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100RBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100RBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100RBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100RBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100R(8-B)T") +set(GENERIC_F100RBTX_hid_MAXSIZE 131072) +set(GENERIC_F100RBTX_hid_MAXDATASIZE 8192) +set(GENERIC_F100RBTX_hid_MCU cortex-m3) +set(GENERIC_F100RBTX_hid_FPCONF "-") +add_library(GENERIC_F100RBTX_hid INTERFACE) +target_compile_options(GENERIC_F100RBTX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F100RBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100RBTX" + "BOARD_NAME=\"GENERIC_F100RBTX\"" + "BOARD_ID=GENERIC_F100RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100RBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100RBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100RBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100RBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100RBTX_hid_MCU} +) +target_link_libraries(GENERIC_F100RBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100V8TX_MAXSIZE 65536) +set(GENERIC_F100V8TX_MAXDATASIZE 8192) +set(GENERIC_F100V8TX_MCU cortex-m3) +set(GENERIC_F100V8TX_FPCONF "-") +add_library(GENERIC_F100V8TX INTERFACE) +target_compile_options(GENERIC_F100V8TX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_MCU} +) +target_compile_definitions(GENERIC_F100V8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100V8TX" + "BOARD_NAME=\"GENERIC_F100V8TX\"" + "BOARD_ID=GENERIC_F100V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100V8TX INTERFACE + "LINKER:--default-script=${GENERIC_F100V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_MCU} +) +target_link_libraries(GENERIC_F100V8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F100V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F100V8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100V8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100V8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100V8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100V8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100V8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100V8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100V8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100V8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100V8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F100V8TX_dfu2_MAXDATASIZE 8192) +set(GENERIC_F100V8TX_dfu2_MCU cortex-m3) +set(GENERIC_F100V8TX_dfu2_FPCONF "-") +add_library(GENERIC_F100V8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100V8TX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100V8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100V8TX" + "BOARD_NAME=\"GENERIC_F100V8TX\"" + "BOARD_ID=GENERIC_F100V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100V8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100V8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100V8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100V8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100V8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100V8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100V8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100V8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F100V8TX_dfuo_MAXDATASIZE 8192) +set(GENERIC_F100V8TX_dfuo_MCU cortex-m3) +set(GENERIC_F100V8TX_dfuo_FPCONF "-") +add_library(GENERIC_F100V8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F100V8TX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100V8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100V8TX" + "BOARD_NAME=\"GENERIC_F100V8TX\"" + "BOARD_ID=GENERIC_F100V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100V8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100V8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100V8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100V8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100V8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100V8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100V8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100V8TX_hid_MAXSIZE 65536) +set(GENERIC_F100V8TX_hid_MAXDATASIZE 8192) +set(GENERIC_F100V8TX_hid_MCU cortex-m3) +set(GENERIC_F100V8TX_hid_FPCONF "-") +add_library(GENERIC_F100V8TX_hid INTERFACE) +target_compile_options(GENERIC_F100V8TX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F100V8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100V8TX" + "BOARD_NAME=\"GENERIC_F100V8TX\"" + "BOARD_ID=GENERIC_F100V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100V8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100V8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100V8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100V8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100V8TX_hid_MCU} +) +target_link_libraries(GENERIC_F100V8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100VBTX_MAXSIZE 131072) +set(GENERIC_F100VBTX_MAXDATASIZE 8192) +set(GENERIC_F100VBTX_MCU cortex-m3) +set(GENERIC_F100VBTX_FPCONF "-") +add_library(GENERIC_F100VBTX INTERFACE) +target_compile_options(GENERIC_F100VBTX INTERFACE + "SHELL:-DSTM32F100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_MCU} +) +target_compile_definitions(GENERIC_F100VBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100VBTX" + "BOARD_NAME=\"GENERIC_F100VBTX\"" + "BOARD_ID=GENERIC_F100VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F100VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_MCU} +) +target_link_libraries(GENERIC_F100VBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F100VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F100VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100VBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100VBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100VBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F100VBTX_dfu2_MAXDATASIZE 8192) +set(GENERIC_F100VBTX_dfu2_MCU cortex-m3) +set(GENERIC_F100VBTX_dfu2_FPCONF "-") +add_library(GENERIC_F100VBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100VBTX_dfu2 INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100VBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100VBTX" + "BOARD_NAME=\"GENERIC_F100VBTX\"" + "BOARD_ID=GENERIC_F100VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100VBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100VBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100VBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100VBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100VBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100VBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100VBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100VBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F100VBTX_dfuo_MAXDATASIZE 8192) +set(GENERIC_F100VBTX_dfuo_MCU cortex-m3) +set(GENERIC_F100VBTX_dfuo_FPCONF "-") +add_library(GENERIC_F100VBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F100VBTX_dfuo INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100VBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100VBTX" + "BOARD_NAME=\"GENERIC_F100VBTX\"" + "BOARD_ID=GENERIC_F100VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100VBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100VBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100VBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100VBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100VBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100VBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100VBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100V(8-B)T") +set(GENERIC_F100VBTX_hid_MAXSIZE 131072) +set(GENERIC_F100VBTX_hid_MAXDATASIZE 8192) +set(GENERIC_F100VBTX_hid_MCU cortex-m3) +set(GENERIC_F100VBTX_hid_FPCONF "-") +add_library(GENERIC_F100VBTX_hid INTERFACE) +target_compile_options(GENERIC_F100VBTX_hid INTERFACE + "SHELL:-DSTM32F100xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F100VBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100VBTX" + "BOARD_NAME=\"GENERIC_F100VBTX\"" + "BOARD_ID=GENERIC_F100VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100VBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100VBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100VBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100VBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_F100VBTX_hid_MCU} +) +target_link_libraries(GENERIC_F100VBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZCTX_MAXSIZE 262144) +set(GENERIC_F100ZCTX_MAXDATASIZE 24576) +set(GENERIC_F100ZCTX_MCU cortex-m3) +set(GENERIC_F100ZCTX_FPCONF "-") +add_library(GENERIC_F100ZCTX INTERFACE) +target_compile_options(GENERIC_F100ZCTX INTERFACE + "SHELL:-DSTM32F100xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_MCU} +) +target_compile_definitions(GENERIC_F100ZCTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZCTX" + "BOARD_NAME=\"GENERIC_F100ZCTX\"" + "BOARD_ID=GENERIC_F100ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZCTX INTERFACE + "LINKER:--default-script=${GENERIC_F100ZCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=24576" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_MCU} +) +target_link_libraries(GENERIC_F100ZCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100ZCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100ZCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100ZCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100ZCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F100ZCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100ZCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100ZCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100ZCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100ZCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100ZCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100ZCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100ZCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F100ZCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100ZCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100ZCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100ZCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100ZCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100ZCTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZCTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZCTX_dfu2_MAXSIZE 262144) +set(GENERIC_F100ZCTX_dfu2_MAXDATASIZE 24576) +set(GENERIC_F100ZCTX_dfu2_MCU cortex-m3) +set(GENERIC_F100ZCTX_dfu2_FPCONF "-") +add_library(GENERIC_F100ZCTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100ZCTX_dfu2 INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100ZCTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZCTX" + "BOARD_NAME=\"GENERIC_F100ZCTX\"" + "BOARD_ID=GENERIC_F100ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZCTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZCTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZCTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100ZCTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=24576" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100ZCTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZCTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZCTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZCTX_dfuo_MAXSIZE 262144) +set(GENERIC_F100ZCTX_dfuo_MAXDATASIZE 24576) +set(GENERIC_F100ZCTX_dfuo_MCU cortex-m3) +set(GENERIC_F100ZCTX_dfuo_FPCONF "-") +add_library(GENERIC_F100ZCTX_dfuo INTERFACE) +target_compile_options(GENERIC_F100ZCTX_dfuo INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100ZCTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZCTX" + "BOARD_NAME=\"GENERIC_F100ZCTX\"" + "BOARD_ID=GENERIC_F100ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZCTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZCTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZCTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100ZCTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=24576" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100ZCTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZCTX_hid_MAXSIZE 262144) +set(GENERIC_F100ZCTX_hid_MAXDATASIZE 24576) +set(GENERIC_F100ZCTX_hid_MCU cortex-m3) +set(GENERIC_F100ZCTX_hid_FPCONF "-") +add_library(GENERIC_F100ZCTX_hid INTERFACE) +target_compile_options(GENERIC_F100ZCTX_hid INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F100ZCTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZCTX" + "BOARD_NAME=\"GENERIC_F100ZCTX\"" + "BOARD_ID=GENERIC_F100ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100ZCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=24576" + "SHELL: " + -mcpu=${GENERIC_F100ZCTX_hid_MCU} +) +target_link_libraries(GENERIC_F100ZCTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZDTX_MAXSIZE 393216) +set(GENERIC_F100ZDTX_MAXDATASIZE 32768) +set(GENERIC_F100ZDTX_MCU cortex-m3) +set(GENERIC_F100ZDTX_FPCONF "-") +add_library(GENERIC_F100ZDTX INTERFACE) +target_compile_options(GENERIC_F100ZDTX INTERFACE + "SHELL:-DSTM32F100xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_MCU} +) +target_compile_definitions(GENERIC_F100ZDTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZDTX" + "BOARD_NAME=\"GENERIC_F100ZDTX\"" + "BOARD_ID=GENERIC_F100ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZDTX INTERFACE + "LINKER:--default-script=${GENERIC_F100ZDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_MCU} +) +target_link_libraries(GENERIC_F100ZDTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100ZDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100ZDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100ZDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100ZDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F100ZDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100ZDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100ZDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100ZDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100ZDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100ZDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100ZDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100ZDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F100ZDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100ZDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100ZDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100ZDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100ZDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100ZDTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZDTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZDTX_dfu2_MAXSIZE 393216) +set(GENERIC_F100ZDTX_dfu2_MAXDATASIZE 32768) +set(GENERIC_F100ZDTX_dfu2_MCU cortex-m3) +set(GENERIC_F100ZDTX_dfu2_FPCONF "-") +add_library(GENERIC_F100ZDTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100ZDTX_dfu2 INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100ZDTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZDTX" + "BOARD_NAME=\"GENERIC_F100ZDTX\"" + "BOARD_ID=GENERIC_F100ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZDTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZDTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZDTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100ZDTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100ZDTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZDTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZDTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZDTX_dfuo_MAXSIZE 393216) +set(GENERIC_F100ZDTX_dfuo_MAXDATASIZE 32768) +set(GENERIC_F100ZDTX_dfuo_MCU cortex-m3) +set(GENERIC_F100ZDTX_dfuo_FPCONF "-") +add_library(GENERIC_F100ZDTX_dfuo INTERFACE) +target_compile_options(GENERIC_F100ZDTX_dfuo INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100ZDTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZDTX" + "BOARD_NAME=\"GENERIC_F100ZDTX\"" + "BOARD_ID=GENERIC_F100ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZDTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZDTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZDTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100ZDTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100ZDTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZDTX_hid_MAXSIZE 393216) +set(GENERIC_F100ZDTX_hid_MAXDATASIZE 32768) +set(GENERIC_F100ZDTX_hid_MCU cortex-m3) +set(GENERIC_F100ZDTX_hid_FPCONF "-") +add_library(GENERIC_F100ZDTX_hid INTERFACE) +target_compile_options(GENERIC_F100ZDTX_hid INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F100ZDTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZDTX" + "BOARD_NAME=\"GENERIC_F100ZDTX\"" + "BOARD_ID=GENERIC_F100ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100ZDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZDTX_hid_MCU} +) +target_link_libraries(GENERIC_F100ZDTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZETX_MAXSIZE 524288) +set(GENERIC_F100ZETX_MAXDATASIZE 32768) +set(GENERIC_F100ZETX_MCU cortex-m3) +set(GENERIC_F100ZETX_FPCONF "-") +add_library(GENERIC_F100ZETX INTERFACE) +target_compile_options(GENERIC_F100ZETX INTERFACE + "SHELL:-DSTM32F100xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_MCU} +) +target_compile_definitions(GENERIC_F100ZETX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZETX" + "BOARD_NAME=\"GENERIC_F100ZETX\"" + "BOARD_ID=GENERIC_F100ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F100ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_MCU} +) +target_link_libraries(GENERIC_F100ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F100ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F100ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F100ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F100ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F100ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F100ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F100ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F100ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F100ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F100ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F100ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F100ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F100ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F100ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F100ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F100ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F100ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F100ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F100ZETX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZETX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZETX_dfu2_MAXSIZE 524288) +set(GENERIC_F100ZETX_dfu2_MAXDATASIZE 32768) +set(GENERIC_F100ZETX_dfu2_MCU cortex-m3) +set(GENERIC_F100ZETX_dfu2_FPCONF "-") +add_library(GENERIC_F100ZETX_dfu2 INTERFACE) +target_compile_options(GENERIC_F100ZETX_dfu2 INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F100ZETX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZETX" + "BOARD_NAME=\"GENERIC_F100ZETX\"" + "BOARD_ID=GENERIC_F100ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZETX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZETX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZETX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F100ZETX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_dfu2_MCU} +) +target_link_libraries(GENERIC_F100ZETX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZETX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZETX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZETX_dfuo_MAXSIZE 524288) +set(GENERIC_F100ZETX_dfuo_MAXDATASIZE 32768) +set(GENERIC_F100ZETX_dfuo_MCU cortex-m3) +set(GENERIC_F100ZETX_dfuo_FPCONF "-") +add_library(GENERIC_F100ZETX_dfuo INTERFACE) +target_compile_options(GENERIC_F100ZETX_dfuo INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F100ZETX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZETX" + "BOARD_NAME=\"GENERIC_F100ZETX\"" + "BOARD_ID=GENERIC_F100ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZETX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZETX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZETX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F100ZETX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_dfuo_MCU} +) +target_link_libraries(GENERIC_F100ZETX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F100ZETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F100ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F100Z(C-D-E)T") +set(GENERIC_F100ZETX_hid_MAXSIZE 524288) +set(GENERIC_F100ZETX_hid_MAXDATASIZE 32768) +set(GENERIC_F100ZETX_hid_MCU cortex-m3) +set(GENERIC_F100ZETX_hid_FPCONF "-") +add_library(GENERIC_F100ZETX_hid INTERFACE) +target_compile_options(GENERIC_F100ZETX_hid INTERFACE + "SHELL:-DSTM32F100xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_hid_MCU} +) +target_compile_definitions(GENERIC_F100ZETX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F100ZETX" + "BOARD_NAME=\"GENERIC_F100ZETX\"" + "BOARD_ID=GENERIC_F100ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F100ZETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F100ZETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F100ZETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F100ZETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F100ZETX_hid_MCU} +) +target_link_libraries(GENERIC_F100ZETX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C4TX_MAXSIZE 16384) +set(GENERIC_F101C4TX_MAXDATASIZE 4096) +set(GENERIC_F101C4TX_MCU cortex-m3) +set(GENERIC_F101C4TX_FPCONF "-") +add_library(GENERIC_F101C4TX INTERFACE) +target_compile_options(GENERIC_F101C4TX INTERFACE + "SHELL:-DSTM32F101x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_MCU} +) +target_compile_definitions(GENERIC_F101C4TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C4TX" + "BOARD_NAME=\"GENERIC_F101C4TX\"" + "BOARD_ID=GENERIC_F101C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F101C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_MCU} +) +target_link_libraries(GENERIC_F101C4TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F101C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F101C4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101C4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101C4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101C4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101C4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101C4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101C4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101C4TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C4TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C4TX_dfu2_MAXSIZE 16384) +set(GENERIC_F101C4TX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F101C4TX_dfu2_MCU cortex-m3) +set(GENERIC_F101C4TX_dfu2_FPCONF "-") +add_library(GENERIC_F101C4TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101C4TX_dfu2 INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101C4TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C4TX" + "BOARD_NAME=\"GENERIC_F101C4TX\"" + "BOARD_ID=GENERIC_F101C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C4TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C4TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C4TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101C4TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101C4TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101C4TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C4TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C4TX_dfuo_MAXSIZE 16384) +set(GENERIC_F101C4TX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F101C4TX_dfuo_MCU cortex-m3) +set(GENERIC_F101C4TX_dfuo_FPCONF "-") +add_library(GENERIC_F101C4TX_dfuo INTERFACE) +target_compile_options(GENERIC_F101C4TX_dfuo INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101C4TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C4TX" + "BOARD_NAME=\"GENERIC_F101C4TX\"" + "BOARD_ID=GENERIC_F101C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C4TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C4TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C4TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101C4TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101C4TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101C4TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C4TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C4TX_hid_MAXSIZE 16384) +set(GENERIC_F101C4TX_hid_MAXDATASIZE 4096) +set(GENERIC_F101C4TX_hid_MCU cortex-m3) +set(GENERIC_F101C4TX_hid_FPCONF "-") +add_library(GENERIC_F101C4TX_hid INTERFACE) +target_compile_options(GENERIC_F101C4TX_hid INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_hid_MCU} +) +target_compile_definitions(GENERIC_F101C4TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C4TX" + "BOARD_NAME=\"GENERIC_F101C4TX\"" + "BOARD_ID=GENERIC_F101C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C4TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C4TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C4TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101C4TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101C4TX_hid_MCU} +) +target_link_libraries(GENERIC_F101C4TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C6TX_MAXSIZE 32768) +set(GENERIC_F101C6TX_MAXDATASIZE 6144) +set(GENERIC_F101C6TX_MCU cortex-m3) +set(GENERIC_F101C6TX_FPCONF "-") +add_library(GENERIC_F101C6TX INTERFACE) +target_compile_options(GENERIC_F101C6TX INTERFACE + "SHELL:-DSTM32F101x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_MCU} +) +target_compile_definitions(GENERIC_F101C6TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C6TX" + "BOARD_NAME=\"GENERIC_F101C6TX\"" + "BOARD_ID=GENERIC_F101C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F101C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_MCU} +) +target_link_libraries(GENERIC_F101C6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F101C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F101C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101C6TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C6TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C6TX_dfu2_MAXSIZE 32768) +set(GENERIC_F101C6TX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F101C6TX_dfu2_MCU cortex-m3) +set(GENERIC_F101C6TX_dfu2_FPCONF "-") +add_library(GENERIC_F101C6TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101C6TX_dfu2 INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101C6TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C6TX" + "BOARD_NAME=\"GENERIC_F101C6TX\"" + "BOARD_ID=GENERIC_F101C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C6TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C6TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C6TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101C6TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101C6TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101C6TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C6TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C6TX_dfuo_MAXSIZE 32768) +set(GENERIC_F101C6TX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F101C6TX_dfuo_MCU cortex-m3) +set(GENERIC_F101C6TX_dfuo_FPCONF "-") +add_library(GENERIC_F101C6TX_dfuo INTERFACE) +target_compile_options(GENERIC_F101C6TX_dfuo INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101C6TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C6TX" + "BOARD_NAME=\"GENERIC_F101C6TX\"" + "BOARD_ID=GENERIC_F101C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C6TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C6TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C6TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101C6TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101C6TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101C6TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101C6TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101C(4-6)T") +set(GENERIC_F101C6TX_hid_MAXSIZE 32768) +set(GENERIC_F101C6TX_hid_MAXDATASIZE 6144) +set(GENERIC_F101C6TX_hid_MCU cortex-m3) +set(GENERIC_F101C6TX_hid_FPCONF "-") +add_library(GENERIC_F101C6TX_hid INTERFACE) +target_compile_options(GENERIC_F101C6TX_hid INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_hid_MCU} +) +target_compile_definitions(GENERIC_F101C6TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101C6TX" + "BOARD_NAME=\"GENERIC_F101C6TX\"" + "BOARD_ID=GENERIC_F101C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101C6TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101C6TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101C6TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101C6TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101C6TX_hid_MCU} +) +target_link_libraries(GENERIC_F101C6TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101R4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R4TX_MAXSIZE 16384) +set(GENERIC_F101R4TX_MAXDATASIZE 4096) +set(GENERIC_F101R4TX_MCU cortex-m3) +set(GENERIC_F101R4TX_FPCONF "-") +add_library(GENERIC_F101R4TX INTERFACE) +target_compile_options(GENERIC_F101R4TX INTERFACE + "SHELL:-DSTM32F101x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_MCU} +) +target_compile_definitions(GENERIC_F101R4TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R4TX" + "BOARD_NAME=\"GENERIC_F101R4TX\"" + "BOARD_ID=GENERIC_F101R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R4TX INTERFACE + "LINKER:--default-script=${GENERIC_F101R4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_MCU} +) +target_link_libraries(GENERIC_F101R4TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101R4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101R4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101R4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101R4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101R4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F101R4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101R4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101R4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101R4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101R4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101R4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101R4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101R4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F101R4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101R4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101R4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101R4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101R4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101R4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101R4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101R4TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R4TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R4TX_dfu2_MAXSIZE 16384) +set(GENERIC_F101R4TX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F101R4TX_dfu2_MCU cortex-m3) +set(GENERIC_F101R4TX_dfu2_FPCONF "-") +add_library(GENERIC_F101R4TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101R4TX_dfu2 INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101R4TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R4TX" + "BOARD_NAME=\"GENERIC_F101R4TX\"" + "BOARD_ID=GENERIC_F101R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R4TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R4TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R4TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101R4TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101R4TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101R4TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R4TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R4TX_dfuo_MAXSIZE 16384) +set(GENERIC_F101R4TX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F101R4TX_dfuo_MCU cortex-m3) +set(GENERIC_F101R4TX_dfuo_FPCONF "-") +add_library(GENERIC_F101R4TX_dfuo INTERFACE) +target_compile_options(GENERIC_F101R4TX_dfuo INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101R4TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R4TX" + "BOARD_NAME=\"GENERIC_F101R4TX\"" + "BOARD_ID=GENERIC_F101R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R4TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R4TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R4TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101R4TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101R4TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101R4TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R4TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R4TX_hid_MAXSIZE 16384) +set(GENERIC_F101R4TX_hid_MAXDATASIZE 4096) +set(GENERIC_F101R4TX_hid_MCU cortex-m3) +set(GENERIC_F101R4TX_hid_FPCONF "-") +add_library(GENERIC_F101R4TX_hid INTERFACE) +target_compile_options(GENERIC_F101R4TX_hid INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_hid_MCU} +) +target_compile_definitions(GENERIC_F101R4TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R4TX" + "BOARD_NAME=\"GENERIC_F101R4TX\"" + "BOARD_ID=GENERIC_F101R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R4TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R4TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R4TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101R4TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101R4TX_hid_MCU} +) +target_link_libraries(GENERIC_F101R4TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R6TX_MAXSIZE 32768) +set(GENERIC_F101R6TX_MAXDATASIZE 6144) +set(GENERIC_F101R6TX_MCU cortex-m3) +set(GENERIC_F101R6TX_FPCONF "-") +add_library(GENERIC_F101R6TX INTERFACE) +target_compile_options(GENERIC_F101R6TX INTERFACE + "SHELL:-DSTM32F101x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_MCU} +) +target_compile_definitions(GENERIC_F101R6TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R6TX" + "BOARD_NAME=\"GENERIC_F101R6TX\"" + "BOARD_ID=GENERIC_F101R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R6TX INTERFACE + "LINKER:--default-script=${GENERIC_F101R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_MCU} +) +target_link_libraries(GENERIC_F101R6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F101R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F101R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101R6TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R6TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R6TX_dfu2_MAXSIZE 32768) +set(GENERIC_F101R6TX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F101R6TX_dfu2_MCU cortex-m3) +set(GENERIC_F101R6TX_dfu2_FPCONF "-") +add_library(GENERIC_F101R6TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101R6TX_dfu2 INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101R6TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R6TX" + "BOARD_NAME=\"GENERIC_F101R6TX\"" + "BOARD_ID=GENERIC_F101R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R6TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R6TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R6TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101R6TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101R6TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101R6TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R6TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R6TX_dfuo_MAXSIZE 32768) +set(GENERIC_F101R6TX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F101R6TX_dfuo_MCU cortex-m3) +set(GENERIC_F101R6TX_dfuo_FPCONF "-") +add_library(GENERIC_F101R6TX_dfuo INTERFACE) +target_compile_options(GENERIC_F101R6TX_dfuo INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101R6TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R6TX" + "BOARD_NAME=\"GENERIC_F101R6TX\"" + "BOARD_ID=GENERIC_F101R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R6TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R6TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R6TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101R6TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101R6TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101R6TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101R6TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101R(4-6)T") +set(GENERIC_F101R6TX_hid_MAXSIZE 32768) +set(GENERIC_F101R6TX_hid_MAXDATASIZE 6144) +set(GENERIC_F101R6TX_hid_MCU cortex-m3) +set(GENERIC_F101R6TX_hid_FPCONF "-") +add_library(GENERIC_F101R6TX_hid INTERFACE) +target_compile_options(GENERIC_F101R6TX_hid INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_hid_MCU} +) +target_compile_definitions(GENERIC_F101R6TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101R6TX" + "BOARD_NAME=\"GENERIC_F101R6TX\"" + "BOARD_ID=GENERIC_F101R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101R6TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101R6TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101R6TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101R6TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101R6TX_hid_MCU} +) +target_link_libraries(GENERIC_F101R6TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101T4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T4UX_MAXSIZE 16384) +set(GENERIC_F101T4UX_MAXDATASIZE 4096) +set(GENERIC_F101T4UX_MCU cortex-m3) +set(GENERIC_F101T4UX_FPCONF "-") +add_library(GENERIC_F101T4UX INTERFACE) +target_compile_options(GENERIC_F101T4UX INTERFACE + "SHELL:-DSTM32F101x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_MCU} +) +target_compile_definitions(GENERIC_F101T4UX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T4UX" + "BOARD_NAME=\"GENERIC_F101T4UX\"" + "BOARD_ID=GENERIC_F101T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T4UX INTERFACE + "LINKER:--default-script=${GENERIC_F101T4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_MCU} +) +target_link_libraries(GENERIC_F101T4UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101T4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101T4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101T4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101T4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101T4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F101T4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101T4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101T4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101T4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101T4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101T4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101T4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101T4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F101T4UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101T4UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101T4UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101T4UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101T4UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101T4UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101T4UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101T4UX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T4UX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T4UX_dfu2_MAXSIZE 16384) +set(GENERIC_F101T4UX_dfu2_MAXDATASIZE 4096) +set(GENERIC_F101T4UX_dfu2_MCU cortex-m3) +set(GENERIC_F101T4UX_dfu2_FPCONF "-") +add_library(GENERIC_F101T4UX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101T4UX_dfu2 INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101T4UX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T4UX" + "BOARD_NAME=\"GENERIC_F101T4UX\"" + "BOARD_ID=GENERIC_F101T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T4UX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T4UX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T4UX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101T4UX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101T4UX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101T4UX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T4UX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T4UX_dfuo_MAXSIZE 16384) +set(GENERIC_F101T4UX_dfuo_MAXDATASIZE 4096) +set(GENERIC_F101T4UX_dfuo_MCU cortex-m3) +set(GENERIC_F101T4UX_dfuo_FPCONF "-") +add_library(GENERIC_F101T4UX_dfuo INTERFACE) +target_compile_options(GENERIC_F101T4UX_dfuo INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101T4UX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T4UX" + "BOARD_NAME=\"GENERIC_F101T4UX\"" + "BOARD_ID=GENERIC_F101T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T4UX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T4UX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T4UX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101T4UX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101T4UX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101T4UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T4UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T4UX_hid_MAXSIZE 16384) +set(GENERIC_F101T4UX_hid_MAXDATASIZE 4096) +set(GENERIC_F101T4UX_hid_MCU cortex-m3) +set(GENERIC_F101T4UX_hid_FPCONF "-") +add_library(GENERIC_F101T4UX_hid INTERFACE) +target_compile_options(GENERIC_F101T4UX_hid INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_hid_MCU} +) +target_compile_definitions(GENERIC_F101T4UX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T4UX" + "BOARD_NAME=\"GENERIC_F101T4UX\"" + "BOARD_ID=GENERIC_F101T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T4UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T4UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T4UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101T4UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_F101T4UX_hid_MCU} +) +target_link_libraries(GENERIC_F101T4UX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101T6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T6UX_MAXSIZE 32768) +set(GENERIC_F101T6UX_MAXDATASIZE 6144) +set(GENERIC_F101T6UX_MCU cortex-m3) +set(GENERIC_F101T6UX_FPCONF "-") +add_library(GENERIC_F101T6UX INTERFACE) +target_compile_options(GENERIC_F101T6UX INTERFACE + "SHELL:-DSTM32F101x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_MCU} +) +target_compile_definitions(GENERIC_F101T6UX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T6UX" + "BOARD_NAME=\"GENERIC_F101T6UX\"" + "BOARD_ID=GENERIC_F101T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T6UX INTERFACE + "LINKER:--default-script=${GENERIC_F101T6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_MCU} +) +target_link_libraries(GENERIC_F101T6UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101T6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101T6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101T6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101T6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101T6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F101T6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101T6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101T6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101T6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101T6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101T6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101T6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101T6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F101T6UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101T6UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101T6UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101T6UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101T6UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101T6UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101T6UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101T6UX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T6UX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T6UX_dfu2_MAXSIZE 32768) +set(GENERIC_F101T6UX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F101T6UX_dfu2_MCU cortex-m3) +set(GENERIC_F101T6UX_dfu2_FPCONF "-") +add_library(GENERIC_F101T6UX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101T6UX_dfu2 INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101T6UX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T6UX" + "BOARD_NAME=\"GENERIC_F101T6UX\"" + "BOARD_ID=GENERIC_F101T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T6UX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T6UX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T6UX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101T6UX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101T6UX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101T6UX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T6UX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T6UX_dfuo_MAXSIZE 32768) +set(GENERIC_F101T6UX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F101T6UX_dfuo_MCU cortex-m3) +set(GENERIC_F101T6UX_dfuo_FPCONF "-") +add_library(GENERIC_F101T6UX_dfuo INTERFACE) +target_compile_options(GENERIC_F101T6UX_dfuo INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101T6UX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T6UX" + "BOARD_NAME=\"GENERIC_F101T6UX\"" + "BOARD_ID=GENERIC_F101T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T6UX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T6UX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T6UX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101T6UX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101T6UX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101T6UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101T6UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101T(4-6)U") +set(GENERIC_F101T6UX_hid_MAXSIZE 32768) +set(GENERIC_F101T6UX_hid_MAXDATASIZE 6144) +set(GENERIC_F101T6UX_hid_MCU cortex-m3) +set(GENERIC_F101T6UX_hid_FPCONF "-") +add_library(GENERIC_F101T6UX_hid INTERFACE) +target_compile_options(GENERIC_F101T6UX_hid INTERFACE + "SHELL:-DSTM32F101x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_hid_MCU} +) +target_compile_definitions(GENERIC_F101T6UX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101T6UX" + "BOARD_NAME=\"GENERIC_F101T6UX\"" + "BOARD_ID=GENERIC_F101T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101T6UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101T6UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101T6UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101T6UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F101T6UX_hid_MCU} +) +target_link_libraries(GENERIC_F101T6UX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101V8TX_MAXSIZE 65536) +set(GENERIC_F101V8TX_MAXDATASIZE 10240) +set(GENERIC_F101V8TX_MCU cortex-m3) +set(GENERIC_F101V8TX_FPCONF "-") +add_library(GENERIC_F101V8TX INTERFACE) +target_compile_options(GENERIC_F101V8TX INTERFACE + "SHELL:-DSTM32F101xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_MCU} +) +target_compile_definitions(GENERIC_F101V8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101V8TX" + "BOARD_NAME=\"GENERIC_F101V8TX\"" + "BOARD_ID=GENERIC_F101V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101V8TX INTERFACE + "LINKER:--default-script=${GENERIC_F101V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_MCU} +) +target_link_libraries(GENERIC_F101V8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F101V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F101V8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101V8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101V8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101V8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101V8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101V8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101V8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101V8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101V8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101V8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F101V8TX_dfu2_MAXDATASIZE 10240) +set(GENERIC_F101V8TX_dfu2_MCU cortex-m3) +set(GENERIC_F101V8TX_dfu2_FPCONF "-") +add_library(GENERIC_F101V8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101V8TX_dfu2 INTERFACE + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101V8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101V8TX" + "BOARD_NAME=\"GENERIC_F101V8TX\"" + "BOARD_ID=GENERIC_F101V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101V8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101V8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101V8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101V8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101V8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101V8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101V8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101V8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F101V8TX_dfuo_MAXDATASIZE 10240) +set(GENERIC_F101V8TX_dfuo_MCU cortex-m3) +set(GENERIC_F101V8TX_dfuo_FPCONF "-") +add_library(GENERIC_F101V8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F101V8TX_dfuo INTERFACE + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101V8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101V8TX" + "BOARD_NAME=\"GENERIC_F101V8TX\"" + "BOARD_ID=GENERIC_F101V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101V8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101V8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101V8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101V8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101V8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101V8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101V8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101V8TX_hid_MAXSIZE 65536) +set(GENERIC_F101V8TX_hid_MAXDATASIZE 10240) +set(GENERIC_F101V8TX_hid_MCU cortex-m3) +set(GENERIC_F101V8TX_hid_FPCONF "-") +add_library(GENERIC_F101V8TX_hid INTERFACE) +target_compile_options(GENERIC_F101V8TX_hid INTERFACE + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F101V8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101V8TX" + "BOARD_NAME=\"GENERIC_F101V8TX\"" + "BOARD_ID=GENERIC_F101V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101V8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101V8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101V8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101V8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F101V8TX_hid_MCU} +) +target_link_libraries(GENERIC_F101V8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101VBTX_MAXSIZE 131072) +set(GENERIC_F101VBTX_MAXDATASIZE 16384) +set(GENERIC_F101VBTX_MCU cortex-m3) +set(GENERIC_F101VBTX_FPCONF "-") +add_library(GENERIC_F101VBTX INTERFACE) +target_compile_options(GENERIC_F101VBTX INTERFACE + "SHELL:-DSTM32F101xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_MCU} +) +target_compile_definitions(GENERIC_F101VBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101VBTX" + "BOARD_NAME=\"GENERIC_F101VBTX\"" + "BOARD_ID=GENERIC_F101VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F101VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_MCU} +) +target_link_libraries(GENERIC_F101VBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F101VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F101VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101VBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101VBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101VBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F101VBTX_dfu2_MAXDATASIZE 16384) +set(GENERIC_F101VBTX_dfu2_MCU cortex-m3) +set(GENERIC_F101VBTX_dfu2_FPCONF "-") +add_library(GENERIC_F101VBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101VBTX_dfu2 INTERFACE + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101VBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101VBTX" + "BOARD_NAME=\"GENERIC_F101VBTX\"" + "BOARD_ID=GENERIC_F101VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101VBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101VBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101VBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101VBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101VBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101VBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101VBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101VBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F101VBTX_dfuo_MAXDATASIZE 16384) +set(GENERIC_F101VBTX_dfuo_MCU cortex-m3) +set(GENERIC_F101VBTX_dfuo_FPCONF "-") +add_library(GENERIC_F101VBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F101VBTX_dfuo INTERFACE + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101VBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101VBTX" + "BOARD_NAME=\"GENERIC_F101VBTX\"" + "BOARD_ID=GENERIC_F101VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101VBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101VBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101VBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101VBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101VBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101VBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101VBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101V(8-B)T") +set(GENERIC_F101VBTX_hid_MAXSIZE 131072) +set(GENERIC_F101VBTX_hid_MAXDATASIZE 16384) +set(GENERIC_F101VBTX_hid_MCU cortex-m3) +set(GENERIC_F101VBTX_hid_FPCONF "-") +add_library(GENERIC_F101VBTX_hid INTERFACE) +target_compile_options(GENERIC_F101VBTX_hid INTERFACE + "SHELL:-DSTM32F101xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F101VBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101VBTX" + "BOARD_NAME=\"GENERIC_F101VBTX\"" + "BOARD_ID=GENERIC_F101VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101VBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101VBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101VBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101VBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_F101VBTX_hid_MCU} +) +target_link_libraries(GENERIC_F101VBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZCTX_MAXSIZE 262144) +set(GENERIC_F101ZCTX_MAXDATASIZE 32768) +set(GENERIC_F101ZCTX_MCU cortex-m3) +set(GENERIC_F101ZCTX_FPCONF "-") +add_library(GENERIC_F101ZCTX INTERFACE) +target_compile_options(GENERIC_F101ZCTX INTERFACE + "SHELL:-DSTM32F101xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_MCU} +) +target_compile_definitions(GENERIC_F101ZCTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZCTX" + "BOARD_NAME=\"GENERIC_F101ZCTX\"" + "BOARD_ID=GENERIC_F101ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZCTX INTERFACE + "LINKER:--default-script=${GENERIC_F101ZCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_MCU} +) +target_link_libraries(GENERIC_F101ZCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101ZCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101ZCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101ZCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101ZCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F101ZCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101ZCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101ZCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101ZCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101ZCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101ZCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101ZCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101ZCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F101ZCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101ZCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101ZCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101ZCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101ZCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101ZCTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZCTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZCTX_dfu2_MAXSIZE 262144) +set(GENERIC_F101ZCTX_dfu2_MAXDATASIZE 32768) +set(GENERIC_F101ZCTX_dfu2_MCU cortex-m3) +set(GENERIC_F101ZCTX_dfu2_FPCONF "-") +add_library(GENERIC_F101ZCTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101ZCTX_dfu2 INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101ZCTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZCTX" + "BOARD_NAME=\"GENERIC_F101ZCTX\"" + "BOARD_ID=GENERIC_F101ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZCTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZCTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZCTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101ZCTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101ZCTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZCTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZCTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZCTX_dfuo_MAXSIZE 262144) +set(GENERIC_F101ZCTX_dfuo_MAXDATASIZE 32768) +set(GENERIC_F101ZCTX_dfuo_MCU cortex-m3) +set(GENERIC_F101ZCTX_dfuo_FPCONF "-") +add_library(GENERIC_F101ZCTX_dfuo INTERFACE) +target_compile_options(GENERIC_F101ZCTX_dfuo INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101ZCTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZCTX" + "BOARD_NAME=\"GENERIC_F101ZCTX\"" + "BOARD_ID=GENERIC_F101ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZCTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZCTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZCTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101ZCTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101ZCTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZCTX_hid_MAXSIZE 262144) +set(GENERIC_F101ZCTX_hid_MAXDATASIZE 32768) +set(GENERIC_F101ZCTX_hid_MCU cortex-m3) +set(GENERIC_F101ZCTX_hid_FPCONF "-") +add_library(GENERIC_F101ZCTX_hid INTERFACE) +target_compile_options(GENERIC_F101ZCTX_hid INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F101ZCTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZCTX" + "BOARD_NAME=\"GENERIC_F101ZCTX\"" + "BOARD_ID=GENERIC_F101ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101ZCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_F101ZCTX_hid_MCU} +) +target_link_libraries(GENERIC_F101ZCTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZDTX_MAXSIZE 393216) +set(GENERIC_F101ZDTX_MAXDATASIZE 49152) +set(GENERIC_F101ZDTX_MCU cortex-m3) +set(GENERIC_F101ZDTX_FPCONF "-") +add_library(GENERIC_F101ZDTX INTERFACE) +target_compile_options(GENERIC_F101ZDTX INTERFACE + "SHELL:-DSTM32F101xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_MCU} +) +target_compile_definitions(GENERIC_F101ZDTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZDTX" + "BOARD_NAME=\"GENERIC_F101ZDTX\"" + "BOARD_ID=GENERIC_F101ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZDTX INTERFACE + "LINKER:--default-script=${GENERIC_F101ZDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_MCU} +) +target_link_libraries(GENERIC_F101ZDTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101ZDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101ZDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101ZDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101ZDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F101ZDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101ZDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101ZDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101ZDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101ZDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101ZDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101ZDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101ZDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F101ZDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101ZDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101ZDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101ZDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101ZDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101ZDTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZDTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZDTX_dfu2_MAXSIZE 393216) +set(GENERIC_F101ZDTX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F101ZDTX_dfu2_MCU cortex-m3) +set(GENERIC_F101ZDTX_dfu2_FPCONF "-") +add_library(GENERIC_F101ZDTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101ZDTX_dfu2 INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101ZDTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZDTX" + "BOARD_NAME=\"GENERIC_F101ZDTX\"" + "BOARD_ID=GENERIC_F101ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZDTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZDTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZDTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101ZDTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101ZDTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZDTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZDTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZDTX_dfuo_MAXSIZE 393216) +set(GENERIC_F101ZDTX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F101ZDTX_dfuo_MCU cortex-m3) +set(GENERIC_F101ZDTX_dfuo_FPCONF "-") +add_library(GENERIC_F101ZDTX_dfuo INTERFACE) +target_compile_options(GENERIC_F101ZDTX_dfuo INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101ZDTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZDTX" + "BOARD_NAME=\"GENERIC_F101ZDTX\"" + "BOARD_ID=GENERIC_F101ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZDTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZDTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZDTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101ZDTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101ZDTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZDTX_hid_MAXSIZE 393216) +set(GENERIC_F101ZDTX_hid_MAXDATASIZE 49152) +set(GENERIC_F101ZDTX_hid_MCU cortex-m3) +set(GENERIC_F101ZDTX_hid_FPCONF "-") +add_library(GENERIC_F101ZDTX_hid INTERFACE) +target_compile_options(GENERIC_F101ZDTX_hid INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F101ZDTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZDTX" + "BOARD_NAME=\"GENERIC_F101ZDTX\"" + "BOARD_ID=GENERIC_F101ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101ZDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZDTX_hid_MCU} +) +target_link_libraries(GENERIC_F101ZDTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZETX_MAXSIZE 524288) +set(GENERIC_F101ZETX_MAXDATASIZE 49152) +set(GENERIC_F101ZETX_MCU cortex-m3) +set(GENERIC_F101ZETX_FPCONF "-") +add_library(GENERIC_F101ZETX INTERFACE) +target_compile_options(GENERIC_F101ZETX INTERFACE + "SHELL:-DSTM32F101xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_MCU} +) +target_compile_definitions(GENERIC_F101ZETX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZETX" + "BOARD_NAME=\"GENERIC_F101ZETX\"" + "BOARD_ID=GENERIC_F101ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F101ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_MCU} +) +target_link_libraries(GENERIC_F101ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F101ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F101ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F101ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F101ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F101ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F101ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F101ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F101ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F101ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F101ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F101ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F101ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F101ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F101ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F101ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F101ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F101ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F101ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F101ZETX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZETX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZETX_dfu2_MAXSIZE 524288) +set(GENERIC_F101ZETX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F101ZETX_dfu2_MCU cortex-m3) +set(GENERIC_F101ZETX_dfu2_FPCONF "-") +add_library(GENERIC_F101ZETX_dfu2 INTERFACE) +target_compile_options(GENERIC_F101ZETX_dfu2 INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F101ZETX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZETX" + "BOARD_NAME=\"GENERIC_F101ZETX\"" + "BOARD_ID=GENERIC_F101ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZETX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZETX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZETX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F101ZETX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_dfu2_MCU} +) +target_link_libraries(GENERIC_F101ZETX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZETX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZETX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZETX_dfuo_MAXSIZE 524288) +set(GENERIC_F101ZETX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F101ZETX_dfuo_MCU cortex-m3) +set(GENERIC_F101ZETX_dfuo_FPCONF "-") +add_library(GENERIC_F101ZETX_dfuo INTERFACE) +target_compile_options(GENERIC_F101ZETX_dfuo INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F101ZETX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZETX" + "BOARD_NAME=\"GENERIC_F101ZETX\"" + "BOARD_ID=GENERIC_F101ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZETX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZETX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZETX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F101ZETX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_dfuo_MCU} +) +target_link_libraries(GENERIC_F101ZETX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F101ZETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F101ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F101Z(C-D-E)T") +set(GENERIC_F101ZETX_hid_MAXSIZE 524288) +set(GENERIC_F101ZETX_hid_MAXDATASIZE 49152) +set(GENERIC_F101ZETX_hid_MCU cortex-m3) +set(GENERIC_F101ZETX_hid_FPCONF "-") +add_library(GENERIC_F101ZETX_hid INTERFACE) +target_compile_options(GENERIC_F101ZETX_hid INTERFACE + "SHELL:-DSTM32F101xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_hid_MCU} +) +target_compile_definitions(GENERIC_F101ZETX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F101ZETX" + "BOARD_NAME=\"GENERIC_F101ZETX\"" + "BOARD_ID=GENERIC_F101ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F101ZETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F101ZETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F101ZETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F101ZETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F101ZETX_hid_MCU} +) +target_link_libraries(GENERIC_F101ZETX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C4TX_MAXSIZE 16384) +set(GENERIC_F103C4TX_MAXDATASIZE 6144) +set(GENERIC_F103C4TX_MCU cortex-m3) +set(GENERIC_F103C4TX_FPCONF "-") +add_library(GENERIC_F103C4TX INTERFACE) +target_compile_options(GENERIC_F103C4TX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_MCU} +) +target_compile_definitions(GENERIC_F103C4TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C4TX" + "BOARD_NAME=\"GENERIC_F103C4TX\"" + "BOARD_ID=GENERIC_F103C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F103C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_MCU} +) +target_link_libraries(GENERIC_F103C4TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103C4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103C4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103C4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103C4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103C4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103C4TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C4TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C4TX_dfu2_MAXSIZE 16384) +set(GENERIC_F103C4TX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F103C4TX_dfu2_MCU cortex-m3) +set(GENERIC_F103C4TX_dfu2_FPCONF "-") +add_library(GENERIC_F103C4TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103C4TX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103C4TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C4TX" + "BOARD_NAME=\"GENERIC_F103C4TX\"" + "BOARD_ID=GENERIC_F103C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C4TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C4TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C4TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103C4TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103C4TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C4TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C4TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C4TX_dfuo_MAXSIZE 16384) +set(GENERIC_F103C4TX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F103C4TX_dfuo_MCU cortex-m3) +set(GENERIC_F103C4TX_dfuo_FPCONF "-") +add_library(GENERIC_F103C4TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103C4TX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103C4TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C4TX" + "BOARD_NAME=\"GENERIC_F103C4TX\"" + "BOARD_ID=GENERIC_F103C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C4TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C4TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C4TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103C4TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103C4TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C4TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C4TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C4TX_hid_MAXSIZE 16384) +set(GENERIC_F103C4TX_hid_MAXDATASIZE 6144) +set(GENERIC_F103C4TX_hid_MCU cortex-m3) +set(GENERIC_F103C4TX_hid_FPCONF "-") +add_library(GENERIC_F103C4TX_hid INTERFACE) +target_compile_options(GENERIC_F103C4TX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103C4TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C4TX" + "BOARD_NAME=\"GENERIC_F103C4TX\"" + "BOARD_ID=GENERIC_F103C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C4TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C4TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C4TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103C4TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103C4TX_hid_MCU} +) +target_link_libraries(GENERIC_F103C4TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6TX_MAXSIZE 32768) +set(GENERIC_F103C6TX_MAXDATASIZE 10240) +set(GENERIC_F103C6TX_MCU cortex-m3) +set(GENERIC_F103C6TX_FPCONF "-") +add_library(GENERIC_F103C6TX INTERFACE) +target_compile_options(GENERIC_F103C6TX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_MCU} +) +target_compile_definitions(GENERIC_F103C6TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6TX" + "BOARD_NAME=\"GENERIC_F103C6TX\"" + "BOARD_ID=GENERIC_F103C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F103C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_MCU} +) +target_link_libraries(GENERIC_F103C6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103C6TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6TX_dfu2_MAXSIZE 32768) +set(GENERIC_F103C6TX_dfu2_MAXDATASIZE 10240) +set(GENERIC_F103C6TX_dfu2_MCU cortex-m3) +set(GENERIC_F103C6TX_dfu2_FPCONF "-") +add_library(GENERIC_F103C6TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103C6TX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103C6TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6TX" + "BOARD_NAME=\"GENERIC_F103C6TX\"" + "BOARD_ID=GENERIC_F103C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103C6TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103C6TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C6TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6TX_dfuo_MAXSIZE 32768) +set(GENERIC_F103C6TX_dfuo_MAXDATASIZE 10240) +set(GENERIC_F103C6TX_dfuo_MCU cortex-m3) +set(GENERIC_F103C6TX_dfuo_FPCONF "-") +add_library(GENERIC_F103C6TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103C6TX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103C6TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6TX" + "BOARD_NAME=\"GENERIC_F103C6TX\"" + "BOARD_ID=GENERIC_F103C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103C6TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103C6TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C6TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6TX_hid_MAXSIZE 32768) +set(GENERIC_F103C6TX_hid_MAXDATASIZE 10240) +set(GENERIC_F103C6TX_hid_MCU cortex-m3) +set(GENERIC_F103C6TX_hid_FPCONF "-") +add_library(GENERIC_F103C6TX_hid INTERFACE) +target_compile_options(GENERIC_F103C6TX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103C6TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6TX" + "BOARD_NAME=\"GENERIC_F103C6TX\"" + "BOARD_ID=GENERIC_F103C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103C6TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6TX_hid_MCU} +) +target_link_libraries(GENERIC_F103C6TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6UX_MAXSIZE 32768) +set(GENERIC_F103C6UX_MAXDATASIZE 10240) +set(GENERIC_F103C6UX_MCU cortex-m3) +set(GENERIC_F103C6UX_FPCONF "-") +add_library(GENERIC_F103C6UX INTERFACE) +target_compile_options(GENERIC_F103C6UX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_MCU} +) +target_compile_definitions(GENERIC_F103C6UX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6UX" + "BOARD_NAME=\"GENERIC_F103C6UX\"" + "BOARD_ID=GENERIC_F103C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6UX INTERFACE + "LINKER:--default-script=${GENERIC_F103C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_MCU} +) +target_link_libraries(GENERIC_F103C6UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F103C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F103C6UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C6UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103C6UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C6UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103C6UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103C6UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103C6UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103C6UX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6UX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6UX_dfu2_MAXSIZE 32768) +set(GENERIC_F103C6UX_dfu2_MAXDATASIZE 10240) +set(GENERIC_F103C6UX_dfu2_MCU cortex-m3) +set(GENERIC_F103C6UX_dfu2_FPCONF "-") +add_library(GENERIC_F103C6UX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103C6UX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103C6UX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6UX" + "BOARD_NAME=\"GENERIC_F103C6UX\"" + "BOARD_ID=GENERIC_F103C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6UX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6UX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6UX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103C6UX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103C6UX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C6UX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6UX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6UX_dfuo_MAXSIZE 32768) +set(GENERIC_F103C6UX_dfuo_MAXDATASIZE 10240) +set(GENERIC_F103C6UX_dfuo_MCU cortex-m3) +set(GENERIC_F103C6UX_dfuo_FPCONF "-") +add_library(GENERIC_F103C6UX_dfuo INTERFACE) +target_compile_options(GENERIC_F103C6UX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103C6UX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6UX" + "BOARD_NAME=\"GENERIC_F103C6UX\"" + "BOARD_ID=GENERIC_F103C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6UX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6UX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6UX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103C6UX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103C6UX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C6UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C6UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C4T_F103C6(T-U)") +set(GENERIC_F103C6UX_hid_MAXSIZE 32768) +set(GENERIC_F103C6UX_hid_MAXDATASIZE 10240) +set(GENERIC_F103C6UX_hid_MCU cortex-m3) +set(GENERIC_F103C6UX_hid_FPCONF "-") +add_library(GENERIC_F103C6UX_hid INTERFACE) +target_compile_options(GENERIC_F103C6UX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_hid_MCU} +) +target_compile_definitions(GENERIC_F103C6UX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C6UX" + "BOARD_NAME=\"GENERIC_F103C6UX\"" + "BOARD_ID=GENERIC_F103C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C6UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C6UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C6UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103C6UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103C6UX_hid_MCU} +) +target_link_libraries(GENERIC_F103C6UX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103C8TX_MAXSIZE 65536) +set(GENERIC_F103C8TX_MAXDATASIZE 20480) +set(GENERIC_F103C8TX_MCU cortex-m3) +set(GENERIC_F103C8TX_FPCONF "-") +add_library(GENERIC_F103C8TX INTERFACE) +target_compile_options(GENERIC_F103C8TX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_MCU} +) +target_compile_definitions(GENERIC_F103C8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C8TX" + "BOARD_NAME=\"GENERIC_F103C8TX\"" + "BOARD_ID=GENERIC_F103C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F103C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_MCU} +) +target_link_libraries(GENERIC_F103C8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103C8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103C8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F103C8TX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103C8TX_dfu2_MCU cortex-m3) +set(GENERIC_F103C8TX_dfu2_FPCONF "-") +add_library(GENERIC_F103C8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103C8TX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103C8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C8TX" + "BOARD_NAME=\"GENERIC_F103C8TX\"" + "BOARD_ID=GENERIC_F103C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103C8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103C8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103C8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F103C8TX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103C8TX_dfuo_MCU cortex-m3) +set(GENERIC_F103C8TX_dfuo_FPCONF "-") +add_library(GENERIC_F103C8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103C8TX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103C8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C8TX" + "BOARD_NAME=\"GENERIC_F103C8TX\"" + "BOARD_ID=GENERIC_F103C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103C8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103C8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103C8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103C8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103C8TX_hid_MAXSIZE 65536) +set(GENERIC_F103C8TX_hid_MAXDATASIZE 20480) +set(GENERIC_F103C8TX_hid_MCU cortex-m3) +set(GENERIC_F103C8TX_hid_FPCONF "-") +add_library(GENERIC_F103C8TX_hid INTERFACE) +target_compile_options(GENERIC_F103C8TX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103C8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103C8TX" + "BOARD_NAME=\"GENERIC_F103C8TX\"" + "BOARD_ID=GENERIC_F103C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103C8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103C8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103C8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103C8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103C8TX_hid_MCU} +) +target_link_libraries(GENERIC_F103C8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBTX_MAXSIZE 131072) +set(GENERIC_F103CBTX_MAXDATASIZE 20480) +set(GENERIC_F103CBTX_MCU cortex-m3) +set(GENERIC_F103CBTX_FPCONF "-") +add_library(GENERIC_F103CBTX INTERFACE) +target_compile_options(GENERIC_F103CBTX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_MCU} +) +target_compile_definitions(GENERIC_F103CBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBTX" + "BOARD_NAME=\"GENERIC_F103CBTX\"" + "BOARD_ID=GENERIC_F103CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F103CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_MCU} +) +target_link_libraries(GENERIC_F103CBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103CBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F103CBTX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103CBTX_dfu2_MCU cortex-m3) +set(GENERIC_F103CBTX_dfu2_FPCONF "-") +add_library(GENERIC_F103CBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103CBTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103CBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBTX" + "BOARD_NAME=\"GENERIC_F103CBTX\"" + "BOARD_ID=GENERIC_F103CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103CBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103CBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103CBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F103CBTX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103CBTX_dfuo_MCU cortex-m3) +set(GENERIC_F103CBTX_dfuo_FPCONF "-") +add_library(GENERIC_F103CBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103CBTX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103CBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBTX" + "BOARD_NAME=\"GENERIC_F103CBTX\"" + "BOARD_ID=GENERIC_F103CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103CBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103CBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103CBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBTX_hid_MAXSIZE 131072) +set(GENERIC_F103CBTX_hid_MAXDATASIZE 20480) +set(GENERIC_F103CBTX_hid_MCU cortex-m3) +set(GENERIC_F103CBTX_hid_FPCONF "-") +add_library(GENERIC_F103CBTX_hid INTERFACE) +target_compile_options(GENERIC_F103CBTX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103CBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBTX" + "BOARD_NAME=\"GENERIC_F103CBTX\"" + "BOARD_ID=GENERIC_F103CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103CBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBTX_hid_MCU} +) +target_link_libraries(GENERIC_F103CBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBUX_MAXSIZE 131072) +set(GENERIC_F103CBUX_MAXDATASIZE 20480) +set(GENERIC_F103CBUX_MCU cortex-m3) +set(GENERIC_F103CBUX_FPCONF "-") +add_library(GENERIC_F103CBUX INTERFACE) +target_compile_options(GENERIC_F103CBUX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_MCU} +) +target_compile_definitions(GENERIC_F103CBUX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBUX" + "BOARD_NAME=\"GENERIC_F103CBUX\"" + "BOARD_ID=GENERIC_F103CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F103CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_MCU} +) +target_link_libraries(GENERIC_F103CBUX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F103CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F103CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103CBUX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBUX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBUX_dfu2_MAXSIZE 131072) +set(GENERIC_F103CBUX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103CBUX_dfu2_MCU cortex-m3) +set(GENERIC_F103CBUX_dfu2_FPCONF "-") +add_library(GENERIC_F103CBUX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103CBUX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103CBUX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBUX" + "BOARD_NAME=\"GENERIC_F103CBUX\"" + "BOARD_ID=GENERIC_F103CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBUX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBUX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBUX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103CBUX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103CBUX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103CBUX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBUX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBUX_dfuo_MAXSIZE 131072) +set(GENERIC_F103CBUX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103CBUX_dfuo_MCU cortex-m3) +set(GENERIC_F103CBUX_dfuo_FPCONF "-") +add_library(GENERIC_F103CBUX_dfuo INTERFACE) +target_compile_options(GENERIC_F103CBUX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103CBUX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBUX" + "BOARD_NAME=\"GENERIC_F103CBUX\"" + "BOARD_ID=GENERIC_F103CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBUX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBUX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBUX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103CBUX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103CBUX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103CBUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103CBUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(GENERIC_F103CBUX_hid_MAXSIZE 131072) +set(GENERIC_F103CBUX_hid_MAXDATASIZE 20480) +set(GENERIC_F103CBUX_hid_MCU cortex-m3) +set(GENERIC_F103CBUX_hid_FPCONF "-") +add_library(GENERIC_F103CBUX_hid INTERFACE) +target_compile_options(GENERIC_F103CBUX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_hid_MCU} +) +target_compile_definitions(GENERIC_F103CBUX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103CBUX" + "BOARD_NAME=\"GENERIC_F103CBUX\"" + "BOARD_ID=GENERIC_F103CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103CBUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103CBUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103CBUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103CBUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103CBUX_hid_MCU} +) +target_link_libraries(GENERIC_F103CBUX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R4HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R4HX_MAXSIZE 16384) +set(GENERIC_F103R4HX_MAXDATASIZE 6144) +set(GENERIC_F103R4HX_MCU cortex-m3) +set(GENERIC_F103R4HX_FPCONF "-") +add_library(GENERIC_F103R4HX INTERFACE) +target_compile_options(GENERIC_F103R4HX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_MCU} +) +target_compile_definitions(GENERIC_F103R4HX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4HX" + "BOARD_NAME=\"GENERIC_F103R4HX\"" + "BOARD_ID=GENERIC_F103R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4HX INTERFACE + "LINKER:--default-script=${GENERIC_F103R4HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_MCU} +) +target_link_libraries(GENERIC_F103R4HX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103R4HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103R4HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R4HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103R4HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103R4HX_serial_none INTERFACE) +target_compile_options(GENERIC_F103R4HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103R4HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103R4HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103R4HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103R4HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103R4HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103R4HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103R4HX_usb_none INTERFACE) +target_compile_options(GENERIC_F103R4HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R4HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103R4HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R4HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103R4HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103R4HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103R4HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103R4HX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4HX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R4HX_dfu2_MAXSIZE 16384) +set(GENERIC_F103R4HX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F103R4HX_dfu2_MCU cortex-m3) +set(GENERIC_F103R4HX_dfu2_FPCONF "-") +add_library(GENERIC_F103R4HX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103R4HX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103R4HX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4HX" + "BOARD_NAME=\"GENERIC_F103R4HX\"" + "BOARD_ID=GENERIC_F103R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4HX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4HX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4HX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103R4HX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103R4HX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R4HX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4HX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R4HX_dfuo_MAXSIZE 16384) +set(GENERIC_F103R4HX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F103R4HX_dfuo_MCU cortex-m3) +set(GENERIC_F103R4HX_dfuo_FPCONF "-") +add_library(GENERIC_F103R4HX_dfuo INTERFACE) +target_compile_options(GENERIC_F103R4HX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103R4HX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4HX" + "BOARD_NAME=\"GENERIC_F103R4HX\"" + "BOARD_ID=GENERIC_F103R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4HX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4HX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4HX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103R4HX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103R4HX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R4HX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4HX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R4HX_hid_MAXSIZE 16384) +set(GENERIC_F103R4HX_hid_MAXDATASIZE 6144) +set(GENERIC_F103R4HX_hid_MCU cortex-m3) +set(GENERIC_F103R4HX_hid_FPCONF "-") +add_library(GENERIC_F103R4HX_hid INTERFACE) +target_compile_options(GENERIC_F103R4HX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_hid_MCU} +) +target_compile_definitions(GENERIC_F103R4HX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4HX" + "BOARD_NAME=\"GENERIC_F103R4HX\"" + "BOARD_ID=GENERIC_F103R4HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4HX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4HX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4HX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103R4HX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4HX_hid_MCU} +) +target_link_libraries(GENERIC_F103R4HX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R4TX_MAXSIZE 16384) +set(GENERIC_F103R4TX_MAXDATASIZE 6144) +set(GENERIC_F103R4TX_MCU cortex-m3) +set(GENERIC_F103R4TX_FPCONF "-") +add_library(GENERIC_F103R4TX INTERFACE) +target_compile_options(GENERIC_F103R4TX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_MCU} +) +target_compile_definitions(GENERIC_F103R4TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4TX" + "BOARD_NAME=\"GENERIC_F103R4TX\"" + "BOARD_ID=GENERIC_F103R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4TX INTERFACE + "LINKER:--default-script=${GENERIC_F103R4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_MCU} +) +target_link_libraries(GENERIC_F103R4TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103R4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103R4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103R4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103R4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103R4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103R4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103R4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103R4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103R4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103R4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103R4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103R4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103R4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103R4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103R4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103R4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103R4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103R4TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R4TX_dfu2_MAXSIZE 16384) +set(GENERIC_F103R4TX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F103R4TX_dfu2_MCU cortex-m3) +set(GENERIC_F103R4TX_dfu2_FPCONF "-") +add_library(GENERIC_F103R4TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103R4TX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103R4TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4TX" + "BOARD_NAME=\"GENERIC_F103R4TX\"" + "BOARD_ID=GENERIC_F103R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103R4TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103R4TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R4TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R4TX_dfuo_MAXSIZE 16384) +set(GENERIC_F103R4TX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F103R4TX_dfuo_MCU cortex-m3) +set(GENERIC_F103R4TX_dfuo_FPCONF "-") +add_library(GENERIC_F103R4TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103R4TX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103R4TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4TX" + "BOARD_NAME=\"GENERIC_F103R4TX\"" + "BOARD_ID=GENERIC_F103R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103R4TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103R4TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R4TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R4TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R4TX_hid_MAXSIZE 16384) +set(GENERIC_F103R4TX_hid_MAXDATASIZE 6144) +set(GENERIC_F103R4TX_hid_MCU cortex-m3) +set(GENERIC_F103R4TX_hid_FPCONF "-") +add_library(GENERIC_F103R4TX_hid INTERFACE) +target_compile_options(GENERIC_F103R4TX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103R4TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R4TX" + "BOARD_NAME=\"GENERIC_F103R4TX\"" + "BOARD_ID=GENERIC_F103R4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R4TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R4TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R4TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103R4TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103R4TX_hid_MCU} +) +target_link_libraries(GENERIC_F103R4TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R6HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R6HX_MAXSIZE 32768) +set(GENERIC_F103R6HX_MAXDATASIZE 10240) +set(GENERIC_F103R6HX_MCU cortex-m3) +set(GENERIC_F103R6HX_FPCONF "-") +add_library(GENERIC_F103R6HX INTERFACE) +target_compile_options(GENERIC_F103R6HX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_MCU} +) +target_compile_definitions(GENERIC_F103R6HX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6HX" + "BOARD_NAME=\"GENERIC_F103R6HX\"" + "BOARD_ID=GENERIC_F103R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6HX INTERFACE + "LINKER:--default-script=${GENERIC_F103R6HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_MCU} +) +target_link_libraries(GENERIC_F103R6HX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103R6HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103R6HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R6HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103R6HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103R6HX_serial_none INTERFACE) +target_compile_options(GENERIC_F103R6HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103R6HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103R6HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103R6HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103R6HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103R6HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103R6HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103R6HX_usb_none INTERFACE) +target_compile_options(GENERIC_F103R6HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R6HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103R6HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R6HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103R6HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103R6HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103R6HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103R6HX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6HX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R6HX_dfu2_MAXSIZE 32768) +set(GENERIC_F103R6HX_dfu2_MAXDATASIZE 10240) +set(GENERIC_F103R6HX_dfu2_MCU cortex-m3) +set(GENERIC_F103R6HX_dfu2_FPCONF "-") +add_library(GENERIC_F103R6HX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103R6HX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103R6HX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6HX" + "BOARD_NAME=\"GENERIC_F103R6HX\"" + "BOARD_ID=GENERIC_F103R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6HX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6HX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6HX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103R6HX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103R6HX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R6HX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6HX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R6HX_dfuo_MAXSIZE 32768) +set(GENERIC_F103R6HX_dfuo_MAXDATASIZE 10240) +set(GENERIC_F103R6HX_dfuo_MCU cortex-m3) +set(GENERIC_F103R6HX_dfuo_FPCONF "-") +add_library(GENERIC_F103R6HX_dfuo INTERFACE) +target_compile_options(GENERIC_F103R6HX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103R6HX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6HX" + "BOARD_NAME=\"GENERIC_F103R6HX\"" + "BOARD_ID=GENERIC_F103R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6HX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6HX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6HX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103R6HX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103R6HX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R6HX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6HX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)H") +set(GENERIC_F103R6HX_hid_MAXSIZE 32768) +set(GENERIC_F103R6HX_hid_MAXDATASIZE 10240) +set(GENERIC_F103R6HX_hid_MCU cortex-m3) +set(GENERIC_F103R6HX_hid_FPCONF "-") +add_library(GENERIC_F103R6HX_hid INTERFACE) +target_compile_options(GENERIC_F103R6HX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_hid_MCU} +) +target_compile_definitions(GENERIC_F103R6HX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6HX" + "BOARD_NAME=\"GENERIC_F103R6HX\"" + "BOARD_ID=GENERIC_F103R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6HX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6HX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6HX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103R6HX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6HX_hid_MCU} +) +target_link_libraries(GENERIC_F103R6HX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R6TX_MAXSIZE 32768) +set(GENERIC_F103R6TX_MAXDATASIZE 10240) +set(GENERIC_F103R6TX_MCU cortex-m3) +set(GENERIC_F103R6TX_FPCONF "-") +add_library(GENERIC_F103R6TX INTERFACE) +target_compile_options(GENERIC_F103R6TX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_MCU} +) +target_compile_definitions(GENERIC_F103R6TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6TX" + "BOARD_NAME=\"GENERIC_F103R6TX\"" + "BOARD_ID=GENERIC_F103R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6TX INTERFACE + "LINKER:--default-script=${GENERIC_F103R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_MCU} +) +target_link_libraries(GENERIC_F103R6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103R6TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R6TX_dfu2_MAXSIZE 32768) +set(GENERIC_F103R6TX_dfu2_MAXDATASIZE 10240) +set(GENERIC_F103R6TX_dfu2_MCU cortex-m3) +set(GENERIC_F103R6TX_dfu2_FPCONF "-") +add_library(GENERIC_F103R6TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103R6TX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103R6TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6TX" + "BOARD_NAME=\"GENERIC_F103R6TX\"" + "BOARD_ID=GENERIC_F103R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103R6TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103R6TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R6TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R6TX_dfuo_MAXSIZE 32768) +set(GENERIC_F103R6TX_dfuo_MAXDATASIZE 10240) +set(GENERIC_F103R6TX_dfuo_MCU cortex-m3) +set(GENERIC_F103R6TX_dfuo_FPCONF "-") +add_library(GENERIC_F103R6TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103R6TX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103R6TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6TX" + "BOARD_NAME=\"GENERIC_F103R6TX\"" + "BOARD_ID=GENERIC_F103R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103R6TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103R6TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R6TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R6TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(4-6)T") +set(GENERIC_F103R6TX_hid_MAXSIZE 32768) +set(GENERIC_F103R6TX_hid_MAXDATASIZE 10240) +set(GENERIC_F103R6TX_hid_MCU cortex-m3) +set(GENERIC_F103R6TX_hid_FPCONF "-") +add_library(GENERIC_F103R6TX_hid INTERFACE) +target_compile_options(GENERIC_F103R6TX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103R6TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R6TX" + "BOARD_NAME=\"GENERIC_F103R6TX\"" + "BOARD_ID=GENERIC_F103R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R6TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R6TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R6TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103R6TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103R6TX_hid_MCU} +) +target_link_libraries(GENERIC_F103R6TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103R8HX_MAXSIZE 65536) +set(GENERIC_F103R8HX_MAXDATASIZE 20480) +set(GENERIC_F103R8HX_MCU cortex-m3) +set(GENERIC_F103R8HX_FPCONF "-") +add_library(GENERIC_F103R8HX INTERFACE) +target_compile_options(GENERIC_F103R8HX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_MCU} +) +target_compile_definitions(GENERIC_F103R8HX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8HX" + "BOARD_NAME=\"GENERIC_F103R8HX\"" + "BOARD_ID=GENERIC_F103R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8HX INTERFACE + "LINKER:--default-script=${GENERIC_F103R8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_MCU} +) +target_link_libraries(GENERIC_F103R8HX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103R8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103R8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103R8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103R8HX_serial_none INTERFACE) +target_compile_options(GENERIC_F103R8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103R8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103R8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103R8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103R8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103R8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103R8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103R8HX_usb_none INTERFACE) +target_compile_options(GENERIC_F103R8HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R8HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103R8HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R8HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103R8HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103R8HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103R8HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103R8HX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8HX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103R8HX_dfu2_MAXSIZE 65536) +set(GENERIC_F103R8HX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103R8HX_dfu2_MCU cortex-m3) +set(GENERIC_F103R8HX_dfu2_FPCONF "-") +add_library(GENERIC_F103R8HX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103R8HX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103R8HX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8HX" + "BOARD_NAME=\"GENERIC_F103R8HX\"" + "BOARD_ID=GENERIC_F103R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8HX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8HX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8HX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103R8HX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103R8HX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R8HX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8HX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103R8HX_dfuo_MAXSIZE 65536) +set(GENERIC_F103R8HX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103R8HX_dfuo_MCU cortex-m3) +set(GENERIC_F103R8HX_dfuo_FPCONF "-") +add_library(GENERIC_F103R8HX_dfuo INTERFACE) +target_compile_options(GENERIC_F103R8HX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103R8HX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8HX" + "BOARD_NAME=\"GENERIC_F103R8HX\"" + "BOARD_ID=GENERIC_F103R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8HX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8HX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8HX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103R8HX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103R8HX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R8HX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8HX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103R8HX_hid_MAXSIZE 65536) +set(GENERIC_F103R8HX_hid_MAXDATASIZE 20480) +set(GENERIC_F103R8HX_hid_MCU cortex-m3) +set(GENERIC_F103R8HX_hid_FPCONF "-") +add_library(GENERIC_F103R8HX_hid INTERFACE) +target_compile_options(GENERIC_F103R8HX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_hid_MCU} +) +target_compile_definitions(GENERIC_F103R8HX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8HX" + "BOARD_NAME=\"GENERIC_F103R8HX\"" + "BOARD_ID=GENERIC_F103R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8HX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8HX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8HX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103R8HX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8HX_hid_MCU} +) +target_link_libraries(GENERIC_F103R8HX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103R8TX_MAXSIZE 65536) +set(GENERIC_F103R8TX_MAXDATASIZE 20480) +set(GENERIC_F103R8TX_MCU cortex-m3) +set(GENERIC_F103R8TX_FPCONF "-") +add_library(GENERIC_F103R8TX INTERFACE) +target_compile_options(GENERIC_F103R8TX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_MCU} +) +target_compile_definitions(GENERIC_F103R8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8TX" + "BOARD_NAME=\"GENERIC_F103R8TX\"" + "BOARD_ID=GENERIC_F103R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F103R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_MCU} +) +target_link_libraries(GENERIC_F103R8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103R8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103R8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F103R8TX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103R8TX_dfu2_MCU cortex-m3) +set(GENERIC_F103R8TX_dfu2_FPCONF "-") +add_library(GENERIC_F103R8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103R8TX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103R8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8TX" + "BOARD_NAME=\"GENERIC_F103R8TX\"" + "BOARD_ID=GENERIC_F103R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103R8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103R8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103R8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F103R8TX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103R8TX_dfuo_MCU cortex-m3) +set(GENERIC_F103R8TX_dfuo_FPCONF "-") +add_library(GENERIC_F103R8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103R8TX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103R8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8TX" + "BOARD_NAME=\"GENERIC_F103R8TX\"" + "BOARD_ID=GENERIC_F103R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103R8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103R8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103R8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103R8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103R8TX_hid_MAXSIZE 65536) +set(GENERIC_F103R8TX_hid_MAXDATASIZE 20480) +set(GENERIC_F103R8TX_hid_MCU cortex-m3) +set(GENERIC_F103R8TX_hid_FPCONF "-") +add_library(GENERIC_F103R8TX_hid INTERFACE) +target_compile_options(GENERIC_F103R8TX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103R8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103R8TX" + "BOARD_NAME=\"GENERIC_F103R8TX\"" + "BOARD_ID=GENERIC_F103R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103R8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103R8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103R8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103R8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103R8TX_hid_MCU} +) +target_link_libraries(GENERIC_F103R8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103RBHX_MAXSIZE 131072) +set(GENERIC_F103RBHX_MAXDATASIZE 20480) +set(GENERIC_F103RBHX_MCU cortex-m3) +set(GENERIC_F103RBHX_FPCONF "-") +add_library(GENERIC_F103RBHX INTERFACE) +target_compile_options(GENERIC_F103RBHX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_MCU} +) +target_compile_definitions(GENERIC_F103RBHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBHX" + "BOARD_NAME=\"GENERIC_F103RBHX\"" + "BOARD_ID=GENERIC_F103RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBHX INTERFACE + "LINKER:--default-script=${GENERIC_F103RBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_MCU} +) +target_link_libraries(GENERIC_F103RBHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RBHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RBHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RBHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RBHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RBHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RBHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RBHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RBHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103RBHX_dfu2_MAXSIZE 131072) +set(GENERIC_F103RBHX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103RBHX_dfu2_MCU cortex-m3) +set(GENERIC_F103RBHX_dfu2_FPCONF "-") +add_library(GENERIC_F103RBHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RBHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RBHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBHX" + "BOARD_NAME=\"GENERIC_F103RBHX\"" + "BOARD_ID=GENERIC_F103RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RBHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RBHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RBHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103RBHX_dfuo_MAXSIZE 131072) +set(GENERIC_F103RBHX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103RBHX_dfuo_MCU cortex-m3) +set(GENERIC_F103RBHX_dfuo_FPCONF "-") +add_library(GENERIC_F103RBHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RBHX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RBHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBHX" + "BOARD_NAME=\"GENERIC_F103RBHX\"" + "BOARD_ID=GENERIC_F103RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RBHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RBHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RBHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)H") +set(GENERIC_F103RBHX_hid_MAXSIZE 131072) +set(GENERIC_F103RBHX_hid_MAXDATASIZE 20480) +set(GENERIC_F103RBHX_hid_MCU cortex-m3) +set(GENERIC_F103RBHX_hid_FPCONF "-") +add_library(GENERIC_F103RBHX_hid INTERFACE) +target_compile_options(GENERIC_F103RBHX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RBHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBHX" + "BOARD_NAME=\"GENERIC_F103RBHX\"" + "BOARD_ID=GENERIC_F103RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RBHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBHX_hid_MCU} +) +target_link_libraries(GENERIC_F103RBHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103RBTX_MAXSIZE 131072) +set(GENERIC_F103RBTX_MAXDATASIZE 20480) +set(GENERIC_F103RBTX_MCU cortex-m3) +set(GENERIC_F103RBTX_FPCONF "-") +add_library(GENERIC_F103RBTX INTERFACE) +target_compile_options(GENERIC_F103RBTX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_MCU} +) +target_compile_definitions(GENERIC_F103RBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBTX" + "BOARD_NAME=\"GENERIC_F103RBTX\"" + "BOARD_ID=GENERIC_F103RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F103RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_MCU} +) +target_link_libraries(GENERIC_F103RBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103RBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F103RBTX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103RBTX_dfu2_MCU cortex-m3) +set(GENERIC_F103RBTX_dfu2_FPCONF "-") +add_library(GENERIC_F103RBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RBTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBTX" + "BOARD_NAME=\"GENERIC_F103RBTX\"" + "BOARD_ID=GENERIC_F103RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103RBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F103RBTX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103RBTX_dfuo_MCU cortex-m3) +set(GENERIC_F103RBTX_dfuo_FPCONF "-") +add_library(GENERIC_F103RBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RBTX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBTX" + "BOARD_NAME=\"GENERIC_F103RBTX\"" + "BOARD_ID=GENERIC_F103RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(GENERIC_F103RBTX_hid_MAXSIZE 131072) +set(GENERIC_F103RBTX_hid_MAXDATASIZE 20480) +set(GENERIC_F103RBTX_hid_MCU cortex-m3) +set(GENERIC_F103RBTX_hid_FPCONF "-") +add_library(GENERIC_F103RBTX_hid INTERFACE) +target_compile_options(GENERIC_F103RBTX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RBTX" + "BOARD_NAME=\"GENERIC_F103RBTX\"" + "BOARD_ID=GENERIC_F103RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103RBTX_hid_MCU} +) +target_link_libraries(GENERIC_F103RBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RCTX_MAXSIZE 262144) +set(GENERIC_F103RCTX_MAXDATASIZE 49152) +set(GENERIC_F103RCTX_MCU cortex-m3) +set(GENERIC_F103RCTX_FPCONF "-") +add_library(GENERIC_F103RCTX INTERFACE) +target_compile_options(GENERIC_F103RCTX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_MCU} +) +target_compile_definitions(GENERIC_F103RCTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCTX" + "BOARD_NAME=\"GENERIC_F103RCTX\"" + "BOARD_ID=GENERIC_F103RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F103RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_MCU} +) +target_link_libraries(GENERIC_F103RCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RCTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RCTX_dfu2_MAXSIZE 262144) +set(GENERIC_F103RCTX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F103RCTX_dfu2_MCU cortex-m3) +set(GENERIC_F103RCTX_dfu2_FPCONF "-") +add_library(GENERIC_F103RCTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RCTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RCTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCTX" + "BOARD_NAME=\"GENERIC_F103RCTX\"" + "BOARD_ID=GENERIC_F103RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RCTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RCTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RCTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RCTX_dfuo_MAXSIZE 262144) +set(GENERIC_F103RCTX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F103RCTX_dfuo_MCU cortex-m3) +set(GENERIC_F103RCTX_dfuo_FPCONF "-") +add_library(GENERIC_F103RCTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RCTX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RCTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCTX" + "BOARD_NAME=\"GENERIC_F103RCTX\"" + "BOARD_ID=GENERIC_F103RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RCTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RCTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RCTX_hid_MAXSIZE 262144) +set(GENERIC_F103RCTX_hid_MAXDATASIZE 49152) +set(GENERIC_F103RCTX_hid_MCU cortex-m3) +set(GENERIC_F103RCTX_hid_FPCONF "-") +add_library(GENERIC_F103RCTX_hid INTERFACE) +target_compile_options(GENERIC_F103RCTX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RCTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCTX" + "BOARD_NAME=\"GENERIC_F103RCTX\"" + "BOARD_ID=GENERIC_F103RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCTX_hid_MCU} +) +target_link_libraries(GENERIC_F103RCTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RCYX_MAXSIZE 262144) +set(GENERIC_F103RCYX_MAXDATASIZE 49152) +set(GENERIC_F103RCYX_MCU cortex-m3) +set(GENERIC_F103RCYX_FPCONF "-") +add_library(GENERIC_F103RCYX INTERFACE) +target_compile_options(GENERIC_F103RCYX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_MCU} +) +target_compile_definitions(GENERIC_F103RCYX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCYX" + "BOARD_NAME=\"GENERIC_F103RCYX\"" + "BOARD_ID=GENERIC_F103RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCYX INTERFACE + "LINKER:--default-script=${GENERIC_F103RCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_MCU} +) +target_link_libraries(GENERIC_F103RCYX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RCYX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RCYX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RCYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RCYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RCYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RCYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RCYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RCYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RCYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RCYX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCYX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RCYX_dfu2_MAXSIZE 262144) +set(GENERIC_F103RCYX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F103RCYX_dfu2_MCU cortex-m3) +set(GENERIC_F103RCYX_dfu2_FPCONF "-") +add_library(GENERIC_F103RCYX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RCYX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RCYX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCYX" + "BOARD_NAME=\"GENERIC_F103RCYX\"" + "BOARD_ID=GENERIC_F103RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCYX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCYX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCYX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RCYX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RCYX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RCYX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCYX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RCYX_dfuo_MAXSIZE 262144) +set(GENERIC_F103RCYX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F103RCYX_dfuo_MCU cortex-m3) +set(GENERIC_F103RCYX_dfuo_FPCONF "-") +add_library(GENERIC_F103RCYX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RCYX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RCYX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCYX" + "BOARD_NAME=\"GENERIC_F103RCYX\"" + "BOARD_ID=GENERIC_F103RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCYX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCYX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCYX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RCYX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RCYX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RCYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RCYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RCYX_hid_MAXSIZE 262144) +set(GENERIC_F103RCYX_hid_MAXDATASIZE 49152) +set(GENERIC_F103RCYX_hid_MCU cortex-m3) +set(GENERIC_F103RCYX_hid_FPCONF "-") +add_library(GENERIC_F103RCYX_hid INTERFACE) +target_compile_options(GENERIC_F103RCYX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RCYX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RCYX" + "BOARD_NAME=\"GENERIC_F103RCYX\"" + "BOARD_ID=GENERIC_F103RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RCYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RCYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RCYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RCYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103RCYX_hid_MCU} +) +target_link_libraries(GENERIC_F103RCYX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RDTX_MAXSIZE 393216) +set(GENERIC_F103RDTX_MAXDATASIZE 65536) +set(GENERIC_F103RDTX_MCU cortex-m3) +set(GENERIC_F103RDTX_FPCONF "-") +add_library(GENERIC_F103RDTX INTERFACE) +target_compile_options(GENERIC_F103RDTX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_MCU} +) +target_compile_definitions(GENERIC_F103RDTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDTX" + "BOARD_NAME=\"GENERIC_F103RDTX\"" + "BOARD_ID=GENERIC_F103RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDTX INTERFACE + "LINKER:--default-script=${GENERIC_F103RDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_MCU} +) +target_link_libraries(GENERIC_F103RDTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RDTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RDTX_dfu2_MAXSIZE 393216) +set(GENERIC_F103RDTX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103RDTX_dfu2_MCU cortex-m3) +set(GENERIC_F103RDTX_dfu2_FPCONF "-") +add_library(GENERIC_F103RDTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RDTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RDTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDTX" + "BOARD_NAME=\"GENERIC_F103RDTX\"" + "BOARD_ID=GENERIC_F103RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RDTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RDTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RDTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RDTX_dfuo_MAXSIZE 393216) +set(GENERIC_F103RDTX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103RDTX_dfuo_MCU cortex-m3) +set(GENERIC_F103RDTX_dfuo_FPCONF "-") +add_library(GENERIC_F103RDTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RDTX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RDTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDTX" + "BOARD_NAME=\"GENERIC_F103RDTX\"" + "BOARD_ID=GENERIC_F103RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RDTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RDTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RDTX_hid_MAXSIZE 393216) +set(GENERIC_F103RDTX_hid_MAXDATASIZE 65536) +set(GENERIC_F103RDTX_hid_MCU cortex-m3) +set(GENERIC_F103RDTX_hid_FPCONF "-") +add_library(GENERIC_F103RDTX_hid INTERFACE) +target_compile_options(GENERIC_F103RDTX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RDTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDTX" + "BOARD_NAME=\"GENERIC_F103RDTX\"" + "BOARD_ID=GENERIC_F103RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDTX_hid_MCU} +) +target_link_libraries(GENERIC_F103RDTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RDYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RDYX_MAXSIZE 393216) +set(GENERIC_F103RDYX_MAXDATASIZE 65536) +set(GENERIC_F103RDYX_MCU cortex-m3) +set(GENERIC_F103RDYX_FPCONF "-") +add_library(GENERIC_F103RDYX INTERFACE) +target_compile_options(GENERIC_F103RDYX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_MCU} +) +target_compile_definitions(GENERIC_F103RDYX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDYX" + "BOARD_NAME=\"GENERIC_F103RDYX\"" + "BOARD_ID=GENERIC_F103RDYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDYX INTERFACE + "LINKER:--default-script=${GENERIC_F103RDYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_MCU} +) +target_link_libraries(GENERIC_F103RDYX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RDYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RDYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RDYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RDYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RDYX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RDYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RDYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RDYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RDYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RDYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RDYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RDYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RDYX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RDYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RDYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RDYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RDYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RDYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RDYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RDYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RDYX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDYX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RDYX_dfu2_MAXSIZE 393216) +set(GENERIC_F103RDYX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103RDYX_dfu2_MCU cortex-m3) +set(GENERIC_F103RDYX_dfu2_FPCONF "-") +add_library(GENERIC_F103RDYX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RDYX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RDYX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDYX" + "BOARD_NAME=\"GENERIC_F103RDYX\"" + "BOARD_ID=GENERIC_F103RDYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDYX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDYX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDYX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RDYX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RDYX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RDYX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDYX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RDYX_dfuo_MAXSIZE 393216) +set(GENERIC_F103RDYX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103RDYX_dfuo_MCU cortex-m3) +set(GENERIC_F103RDYX_dfuo_FPCONF "-") +add_library(GENERIC_F103RDYX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RDYX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RDYX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDYX" + "BOARD_NAME=\"GENERIC_F103RDYX\"" + "BOARD_ID=GENERIC_F103RDYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDYX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDYX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDYX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RDYX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RDYX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RDYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RDYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103RDYX_hid_MAXSIZE 393216) +set(GENERIC_F103RDYX_hid_MAXDATASIZE 65536) +set(GENERIC_F103RDYX_hid_MCU cortex-m3) +set(GENERIC_F103RDYX_hid_FPCONF "-") +add_library(GENERIC_F103RDYX_hid INTERFACE) +target_compile_options(GENERIC_F103RDYX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RDYX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RDYX" + "BOARD_NAME=\"GENERIC_F103RDYX\"" + "BOARD_ID=GENERIC_F103RDYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RDYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RDYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RDYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RDYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RDYX_hid_MCU} +) +target_link_libraries(GENERIC_F103RDYX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RETX_MAXSIZE 524288) +set(GENERIC_F103RETX_MAXDATASIZE 65536) +set(GENERIC_F103RETX_MCU cortex-m3) +set(GENERIC_F103RETX_FPCONF "-") +add_library(GENERIC_F103RETX INTERFACE) +target_compile_options(GENERIC_F103RETX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RETX_MCU} +) +target_compile_definitions(GENERIC_F103RETX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RETX" + "BOARD_NAME=\"GENERIC_F103RETX\"" + "BOARD_ID=GENERIC_F103RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RETX INTERFACE + "LINKER:--default-script=${GENERIC_F103RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RETX_MCU} +) +target_link_libraries(GENERIC_F103RETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RETX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RETX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RETX_dfu2_MAXSIZE 524288) +set(GENERIC_F103RETX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103RETX_dfu2_MCU cortex-m3) +set(GENERIC_F103RETX_dfu2_FPCONF "-") +add_library(GENERIC_F103RETX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RETX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RETX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RETX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RETX" + "BOARD_NAME=\"GENERIC_F103RETX\"" + "BOARD_ID=GENERIC_F103RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RETX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RETX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RETX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RETX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RETX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RETX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RETX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RETX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RETX_dfuo_MAXSIZE 524288) +set(GENERIC_F103RETX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103RETX_dfuo_MCU cortex-m3) +set(GENERIC_F103RETX_dfuo_FPCONF "-") +add_library(GENERIC_F103RETX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RETX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RETX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RETX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RETX" + "BOARD_NAME=\"GENERIC_F103RETX\"" + "BOARD_ID=GENERIC_F103RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RETX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RETX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RETX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RETX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RETX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RETX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(GENERIC_F103RETX_hid_MAXSIZE 524288) +set(GENERIC_F103RETX_hid_MAXDATASIZE 65536) +set(GENERIC_F103RETX_hid_MCU cortex-m3) +set(GENERIC_F103RETX_hid_FPCONF "-") +add_library(GENERIC_F103RETX_hid INTERFACE) +target_compile_options(GENERIC_F103RETX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RETX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RETX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RETX" + "BOARD_NAME=\"GENERIC_F103RETX\"" + "BOARD_ID=GENERIC_F103RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103RETX_hid_MCU} +) +target_link_libraries(GENERIC_F103RETX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103REYX_MAXSIZE 524288) +set(GENERIC_F103REYX_MAXDATASIZE 65536) +set(GENERIC_F103REYX_MCU cortex-m3) +set(GENERIC_F103REYX_FPCONF "-") +add_library(GENERIC_F103REYX INTERFACE) +target_compile_options(GENERIC_F103REYX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103REYX_MCU} +) +target_compile_definitions(GENERIC_F103REYX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103REYX" + "BOARD_NAME=\"GENERIC_F103REYX\"" + "BOARD_ID=GENERIC_F103REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103REYX INTERFACE + "LINKER:--default-script=${GENERIC_F103REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103REYX_MCU} +) +target_link_libraries(GENERIC_F103REYX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103REYX_serial_none INTERFACE) +target_compile_options(GENERIC_F103REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103REYX_usb_none INTERFACE) +target_compile_options(GENERIC_F103REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103REYX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103REYX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103REYX_dfu2_MAXSIZE 524288) +set(GENERIC_F103REYX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103REYX_dfu2_MCU cortex-m3) +set(GENERIC_F103REYX_dfu2_FPCONF "-") +add_library(GENERIC_F103REYX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103REYX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103REYX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103REYX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103REYX" + "BOARD_NAME=\"GENERIC_F103REYX\"" + "BOARD_ID=GENERIC_F103REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103REYX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103REYX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103REYX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103REYX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103REYX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103REYX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103REYX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103REYX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103REYX_dfuo_MAXSIZE 524288) +set(GENERIC_F103REYX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103REYX_dfuo_MCU cortex-m3) +set(GENERIC_F103REYX_dfuo_FPCONF "-") +add_library(GENERIC_F103REYX_dfuo INTERFACE) +target_compile_options(GENERIC_F103REYX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103REYX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103REYX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103REYX" + "BOARD_NAME=\"GENERIC_F103REYX\"" + "BOARD_ID=GENERIC_F103REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103REYX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103REYX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103REYX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103REYX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103REYX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103REYX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103REYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103REYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)Y") +set(GENERIC_F103REYX_hid_MAXSIZE 524288) +set(GENERIC_F103REYX_hid_MAXDATASIZE 65536) +set(GENERIC_F103REYX_hid_MCU cortex-m3) +set(GENERIC_F103REYX_hid_FPCONF "-") +add_library(GENERIC_F103REYX_hid INTERFACE) +target_compile_options(GENERIC_F103REYX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103REYX_hid_MCU} +) +target_compile_definitions(GENERIC_F103REYX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103REYX" + "BOARD_NAME=\"GENERIC_F103REYX\"" + "BOARD_ID=GENERIC_F103REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103REYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103REYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103REYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103REYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103REYX_hid_MCU} +) +target_link_libraries(GENERIC_F103REYX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RFTX_MAXSIZE 786432) +set(GENERIC_F103RFTX_MAXDATASIZE 98304) +set(GENERIC_F103RFTX_MCU cortex-m3) +set(GENERIC_F103RFTX_FPCONF "-") +add_library(GENERIC_F103RFTX INTERFACE) +target_compile_options(GENERIC_F103RFTX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_MCU} +) +target_compile_definitions(GENERIC_F103RFTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RFTX" + "BOARD_NAME=\"GENERIC_F103RFTX\"" + "BOARD_ID=GENERIC_F103RFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RFTX INTERFACE + "LINKER:--default-script=${GENERIC_F103RFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_MCU} +) +target_link_libraries(GENERIC_F103RFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RFTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RFTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RFTX_dfu2_MAXSIZE 786432) +set(GENERIC_F103RFTX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103RFTX_dfu2_MCU cortex-m3) +set(GENERIC_F103RFTX_dfu2_FPCONF "-") +add_library(GENERIC_F103RFTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RFTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RFTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RFTX" + "BOARD_NAME=\"GENERIC_F103RFTX\"" + "BOARD_ID=GENERIC_F103RFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RFTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RFTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RFTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RFTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RFTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RFTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RFTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RFTX_dfuo_MAXSIZE 786432) +set(GENERIC_F103RFTX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103RFTX_dfuo_MCU cortex-m3) +set(GENERIC_F103RFTX_dfuo_FPCONF "-") +add_library(GENERIC_F103RFTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RFTX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RFTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RFTX" + "BOARD_NAME=\"GENERIC_F103RFTX\"" + "BOARD_ID=GENERIC_F103RFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RFTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RFTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RFTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RFTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RFTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RFTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RFTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RFTX_hid_MAXSIZE 786432) +set(GENERIC_F103RFTX_hid_MAXDATASIZE 98304) +set(GENERIC_F103RFTX_hid_MCU cortex-m3) +set(GENERIC_F103RFTX_hid_FPCONF "-") +add_library(GENERIC_F103RFTX_hid INTERFACE) +target_compile_options(GENERIC_F103RFTX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RFTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RFTX" + "BOARD_NAME=\"GENERIC_F103RFTX\"" + "BOARD_ID=GENERIC_F103RFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RFTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RFTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RFTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RFTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RFTX_hid_MCU} +) +target_link_libraries(GENERIC_F103RFTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RGTX_MAXSIZE 1048576) +set(GENERIC_F103RGTX_MAXDATASIZE 98304) +set(GENERIC_F103RGTX_MCU cortex-m3) +set(GENERIC_F103RGTX_FPCONF "-") +add_library(GENERIC_F103RGTX INTERFACE) +target_compile_options(GENERIC_F103RGTX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_MCU} +) +target_compile_definitions(GENERIC_F103RGTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RGTX" + "BOARD_NAME=\"GENERIC_F103RGTX\"" + "BOARD_ID=GENERIC_F103RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F103RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_MCU} +) +target_link_libraries(GENERIC_F103RGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103RGTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RGTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RGTX_dfu2_MAXSIZE 1048576) +set(GENERIC_F103RGTX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103RGTX_dfu2_MCU cortex-m3) +set(GENERIC_F103RGTX_dfu2_FPCONF "-") +add_library(GENERIC_F103RGTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103RGTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103RGTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RGTX" + "BOARD_NAME=\"GENERIC_F103RGTX\"" + "BOARD_ID=GENERIC_F103RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RGTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RGTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RGTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103RGTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103RGTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RGTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RGTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RGTX_dfuo_MAXSIZE 1048576) +set(GENERIC_F103RGTX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103RGTX_dfuo_MCU cortex-m3) +set(GENERIC_F103RGTX_dfuo_FPCONF "-") +add_library(GENERIC_F103RGTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103RGTX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103RGTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RGTX" + "BOARD_NAME=\"GENERIC_F103RGTX\"" + "BOARD_ID=GENERIC_F103RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RGTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RGTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RGTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103RGTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103RGTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103RGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(F-G)T") +set(GENERIC_F103RGTX_hid_MAXSIZE 1048576) +set(GENERIC_F103RGTX_hid_MAXDATASIZE 98304) +set(GENERIC_F103RGTX_hid_MCU cortex-m3) +set(GENERIC_F103RGTX_hid_FPCONF "-") +add_library(GENERIC_F103RGTX_hid INTERFACE) +target_compile_options(GENERIC_F103RGTX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103RGTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103RGTX" + "BOARD_NAME=\"GENERIC_F103RGTX\"" + "BOARD_ID=GENERIC_F103RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103RGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103RGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103RGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103RGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103RGTX_hid_MCU} +) +target_link_libraries(GENERIC_F103RGTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T4UX_MAXSIZE 16384) +set(GENERIC_F103T4UX_MAXDATASIZE 6144) +set(GENERIC_F103T4UX_MCU cortex-m3) +set(GENERIC_F103T4UX_FPCONF "-") +add_library(GENERIC_F103T4UX INTERFACE) +target_compile_options(GENERIC_F103T4UX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_MCU} +) +target_compile_definitions(GENERIC_F103T4UX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T4UX" + "BOARD_NAME=\"GENERIC_F103T4UX\"" + "BOARD_ID=GENERIC_F103T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T4UX INTERFACE + "LINKER:--default-script=${GENERIC_F103T4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_MCU} +) +target_link_libraries(GENERIC_F103T4UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103T4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103T4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103T4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103T4UX_serial_none INTERFACE) +target_compile_options(GENERIC_F103T4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103T4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103T4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103T4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103T4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103T4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103T4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103T4UX_usb_none INTERFACE) +target_compile_options(GENERIC_F103T4UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T4UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103T4UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T4UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103T4UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103T4UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103T4UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103T4UX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T4UX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T4UX_dfu2_MAXSIZE 16384) +set(GENERIC_F103T4UX_dfu2_MAXDATASIZE 6144) +set(GENERIC_F103T4UX_dfu2_MCU cortex-m3) +set(GENERIC_F103T4UX_dfu2_FPCONF "-") +add_library(GENERIC_F103T4UX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103T4UX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103T4UX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T4UX" + "BOARD_NAME=\"GENERIC_F103T4UX\"" + "BOARD_ID=GENERIC_F103T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T4UX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T4UX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T4UX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103T4UX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103T4UX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T4UX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T4UX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T4UX_dfuo_MAXSIZE 16384) +set(GENERIC_F103T4UX_dfuo_MAXDATASIZE 6144) +set(GENERIC_F103T4UX_dfuo_MCU cortex-m3) +set(GENERIC_F103T4UX_dfuo_FPCONF "-") +add_library(GENERIC_F103T4UX_dfuo INTERFACE) +target_compile_options(GENERIC_F103T4UX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103T4UX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T4UX" + "BOARD_NAME=\"GENERIC_F103T4UX\"" + "BOARD_ID=GENERIC_F103T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T4UX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T4UX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T4UX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103T4UX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103T4UX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T4UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T4UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T4UX_hid_MAXSIZE 16384) +set(GENERIC_F103T4UX_hid_MAXDATASIZE 6144) +set(GENERIC_F103T4UX_hid_MCU cortex-m3) +set(GENERIC_F103T4UX_hid_FPCONF "-") +add_library(GENERIC_F103T4UX_hid INTERFACE) +target_compile_options(GENERIC_F103T4UX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_hid_MCU} +) +target_compile_definitions(GENERIC_F103T4UX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T4UX" + "BOARD_NAME=\"GENERIC_F103T4UX\"" + "BOARD_ID=GENERIC_F103T4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T4UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T4UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T4UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103T4UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${GENERIC_F103T4UX_hid_MCU} +) +target_link_libraries(GENERIC_F103T4UX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T6UX_MAXSIZE 32768) +set(GENERIC_F103T6UX_MAXDATASIZE 10240) +set(GENERIC_F103T6UX_MCU cortex-m3) +set(GENERIC_F103T6UX_FPCONF "-") +add_library(GENERIC_F103T6UX INTERFACE) +target_compile_options(GENERIC_F103T6UX INTERFACE + "SHELL:-DSTM32F103x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_MCU} +) +target_compile_definitions(GENERIC_F103T6UX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T6UX" + "BOARD_NAME=\"GENERIC_F103T6UX\"" + "BOARD_ID=GENERIC_F103T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T6UX INTERFACE + "LINKER:--default-script=${GENERIC_F103T6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_MCU} +) +target_link_libraries(GENERIC_F103T6UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103T6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103T6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103T6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103T6UX_serial_none INTERFACE) +target_compile_options(GENERIC_F103T6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103T6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103T6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103T6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103T6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103T6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103T6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103T6UX_usb_none INTERFACE) +target_compile_options(GENERIC_F103T6UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T6UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103T6UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T6UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103T6UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103T6UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103T6UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103T6UX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T6UX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T6UX_dfu2_MAXSIZE 32768) +set(GENERIC_F103T6UX_dfu2_MAXDATASIZE 10240) +set(GENERIC_F103T6UX_dfu2_MCU cortex-m3) +set(GENERIC_F103T6UX_dfu2_FPCONF "-") +add_library(GENERIC_F103T6UX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103T6UX_dfu2 INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103T6UX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T6UX" + "BOARD_NAME=\"GENERIC_F103T6UX\"" + "BOARD_ID=GENERIC_F103T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T6UX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T6UX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T6UX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103T6UX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103T6UX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T6UX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T6UX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T6UX_dfuo_MAXSIZE 32768) +set(GENERIC_F103T6UX_dfuo_MAXDATASIZE 10240) +set(GENERIC_F103T6UX_dfuo_MCU cortex-m3) +set(GENERIC_F103T6UX_dfuo_FPCONF "-") +add_library(GENERIC_F103T6UX_dfuo INTERFACE) +target_compile_options(GENERIC_F103T6UX_dfuo INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103T6UX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T6UX" + "BOARD_NAME=\"GENERIC_F103T6UX\"" + "BOARD_ID=GENERIC_F103T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T6UX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T6UX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T6UX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103T6UX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103T6UX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T6UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T6UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(4-6)U") +set(GENERIC_F103T6UX_hid_MAXSIZE 32768) +set(GENERIC_F103T6UX_hid_MAXDATASIZE 10240) +set(GENERIC_F103T6UX_hid_MCU cortex-m3) +set(GENERIC_F103T6UX_hid_FPCONF "-") +add_library(GENERIC_F103T6UX_hid INTERFACE) +target_compile_options(GENERIC_F103T6UX_hid INTERFACE + "SHELL:-DSTM32F103x6 -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_hid_MCU} +) +target_compile_definitions(GENERIC_F103T6UX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T6UX" + "BOARD_NAME=\"GENERIC_F103T6UX\"" + "BOARD_ID=GENERIC_F103T6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T6UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T6UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T6UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103T6UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_F103T6UX_hid_MCU} +) +target_link_libraries(GENERIC_F103T6UX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103T8UX_MAXSIZE 65536) +set(GENERIC_F103T8UX_MAXDATASIZE 20480) +set(GENERIC_F103T8UX_MCU cortex-m3) +set(GENERIC_F103T8UX_FPCONF "-") +add_library(GENERIC_F103T8UX INTERFACE) +target_compile_options(GENERIC_F103T8UX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_MCU} +) +target_compile_definitions(GENERIC_F103T8UX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T8UX" + "BOARD_NAME=\"GENERIC_F103T8UX\"" + "BOARD_ID=GENERIC_F103T8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T8UX INTERFACE + "LINKER:--default-script=${GENERIC_F103T8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_MCU} +) +target_link_libraries(GENERIC_F103T8UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103T8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103T8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103T8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103T8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F103T8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103T8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103T8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103T8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103T8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103T8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103T8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103T8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F103T8UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T8UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103T8UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103T8UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103T8UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103T8UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103T8UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103T8UX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T8UX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103T8UX_dfu2_MAXSIZE 65536) +set(GENERIC_F103T8UX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103T8UX_dfu2_MCU cortex-m3) +set(GENERIC_F103T8UX_dfu2_FPCONF "-") +add_library(GENERIC_F103T8UX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103T8UX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103T8UX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T8UX" + "BOARD_NAME=\"GENERIC_F103T8UX\"" + "BOARD_ID=GENERIC_F103T8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T8UX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T8UX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T8UX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103T8UX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103T8UX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T8UX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T8UX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103T8UX_dfuo_MAXSIZE 65536) +set(GENERIC_F103T8UX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103T8UX_dfuo_MCU cortex-m3) +set(GENERIC_F103T8UX_dfuo_FPCONF "-") +add_library(GENERIC_F103T8UX_dfuo INTERFACE) +target_compile_options(GENERIC_F103T8UX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103T8UX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T8UX" + "BOARD_NAME=\"GENERIC_F103T8UX\"" + "BOARD_ID=GENERIC_F103T8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T8UX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T8UX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T8UX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103T8UX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103T8UX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103T8UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103T8UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103T8UX_hid_MAXSIZE 65536) +set(GENERIC_F103T8UX_hid_MAXDATASIZE 20480) +set(GENERIC_F103T8UX_hid_MCU cortex-m3) +set(GENERIC_F103T8UX_hid_FPCONF "-") +add_library(GENERIC_F103T8UX_hid INTERFACE) +target_compile_options(GENERIC_F103T8UX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_hid_MCU} +) +target_compile_definitions(GENERIC_F103T8UX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103T8UX" + "BOARD_NAME=\"GENERIC_F103T8UX\"" + "BOARD_ID=GENERIC_F103T8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103T8UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103T8UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103T8UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103T8UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103T8UX_hid_MCU} +) +target_link_libraries(GENERIC_F103T8UX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103TBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103TBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103TBUX_MAXSIZE 131072) +set(GENERIC_F103TBUX_MAXDATASIZE 20480) +set(GENERIC_F103TBUX_MCU cortex-m3) +set(GENERIC_F103TBUX_FPCONF "-") +add_library(GENERIC_F103TBUX INTERFACE) +target_compile_options(GENERIC_F103TBUX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_MCU} +) +target_compile_definitions(GENERIC_F103TBUX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103TBUX" + "BOARD_NAME=\"GENERIC_F103TBUX\"" + "BOARD_ID=GENERIC_F103TBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103TBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103TBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103TBUX INTERFACE + "LINKER:--default-script=${GENERIC_F103TBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_MCU} +) +target_link_libraries(GENERIC_F103TBUX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103TBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103TBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103TBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103TBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103TBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F103TBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103TBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103TBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103TBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103TBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103TBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103TBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103TBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F103TBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103TBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103TBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103TBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103TBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103TBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103TBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103TBUX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103TBUX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103TBUX_dfu2_MAXSIZE 131072) +set(GENERIC_F103TBUX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103TBUX_dfu2_MCU cortex-m3) +set(GENERIC_F103TBUX_dfu2_FPCONF "-") +add_library(GENERIC_F103TBUX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103TBUX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103TBUX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103TBUX" + "BOARD_NAME=\"GENERIC_F103TBUX\"" + "BOARD_ID=GENERIC_F103TBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103TBUX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103TBUX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103TBUX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103TBUX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103TBUX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103TBUX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103TBUX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103TBUX_dfuo_MAXSIZE 131072) +set(GENERIC_F103TBUX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103TBUX_dfuo_MCU cortex-m3) +set(GENERIC_F103TBUX_dfuo_FPCONF "-") +add_library(GENERIC_F103TBUX_dfuo INTERFACE) +target_compile_options(GENERIC_F103TBUX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103TBUX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103TBUX" + "BOARD_NAME=\"GENERIC_F103TBUX\"" + "BOARD_ID=GENERIC_F103TBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103TBUX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103TBUX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103TBUX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103TBUX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103TBUX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103TBUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103TBUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(GENERIC_F103TBUX_hid_MAXSIZE 131072) +set(GENERIC_F103TBUX_hid_MAXDATASIZE 20480) +set(GENERIC_F103TBUX_hid_MCU cortex-m3) +set(GENERIC_F103TBUX_hid_FPCONF "-") +add_library(GENERIC_F103TBUX_hid INTERFACE) +target_compile_options(GENERIC_F103TBUX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_hid_MCU} +) +target_compile_definitions(GENERIC_F103TBUX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103TBUX" + "BOARD_NAME=\"GENERIC_F103TBUX\"" + "BOARD_ID=GENERIC_F103TBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103TBUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103TBUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103TBUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103TBUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103TBUX_hid_MCU} +) +target_link_libraries(GENERIC_F103TBUX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103V8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8HX_MAXSIZE 65536) +set(GENERIC_F103V8HX_MAXDATASIZE 20480) +set(GENERIC_F103V8HX_MCU cortex-m3) +set(GENERIC_F103V8HX_FPCONF "-") +add_library(GENERIC_F103V8HX INTERFACE) +target_compile_options(GENERIC_F103V8HX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_MCU} +) +target_compile_definitions(GENERIC_F103V8HX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8HX" + "BOARD_NAME=\"GENERIC_F103V8HX\"" + "BOARD_ID=GENERIC_F103V8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8HX INTERFACE + "LINKER:--default-script=${GENERIC_F103V8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_MCU} +) +target_link_libraries(GENERIC_F103V8HX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103V8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103V8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103V8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103V8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103V8HX_serial_none INTERFACE) +target_compile_options(GENERIC_F103V8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103V8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103V8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103V8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103V8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103V8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103V8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103V8HX_usb_none INTERFACE) +target_compile_options(GENERIC_F103V8HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103V8HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103V8HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103V8HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103V8HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103V8HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103V8HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103V8HX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8HX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8HX_dfu2_MAXSIZE 65536) +set(GENERIC_F103V8HX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103V8HX_dfu2_MCU cortex-m3) +set(GENERIC_F103V8HX_dfu2_FPCONF "-") +add_library(GENERIC_F103V8HX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103V8HX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103V8HX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8HX" + "BOARD_NAME=\"GENERIC_F103V8HX\"" + "BOARD_ID=GENERIC_F103V8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8HX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8HX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8HX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103V8HX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103V8HX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103V8HX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8HX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8HX_dfuo_MAXSIZE 65536) +set(GENERIC_F103V8HX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103V8HX_dfuo_MCU cortex-m3) +set(GENERIC_F103V8HX_dfuo_FPCONF "-") +add_library(GENERIC_F103V8HX_dfuo INTERFACE) +target_compile_options(GENERIC_F103V8HX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103V8HX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8HX" + "BOARD_NAME=\"GENERIC_F103V8HX\"" + "BOARD_ID=GENERIC_F103V8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8HX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8HX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8HX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103V8HX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103V8HX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103V8HX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8HX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8HX_hid_MAXSIZE 65536) +set(GENERIC_F103V8HX_hid_MAXDATASIZE 20480) +set(GENERIC_F103V8HX_hid_MCU cortex-m3) +set(GENERIC_F103V8HX_hid_FPCONF "-") +add_library(GENERIC_F103V8HX_hid INTERFACE) +target_compile_options(GENERIC_F103V8HX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_hid_MCU} +) +target_compile_definitions(GENERIC_F103V8HX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8HX" + "BOARD_NAME=\"GENERIC_F103V8HX\"" + "BOARD_ID=GENERIC_F103V8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8HX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8HX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8HX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103V8HX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8HX_hid_MCU} +) +target_link_libraries(GENERIC_F103V8HX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8TX_MAXSIZE 65536) +set(GENERIC_F103V8TX_MAXDATASIZE 20480) +set(GENERIC_F103V8TX_MCU cortex-m3) +set(GENERIC_F103V8TX_FPCONF "-") +add_library(GENERIC_F103V8TX INTERFACE) +target_compile_options(GENERIC_F103V8TX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_MCU} +) +target_compile_definitions(GENERIC_F103V8TX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8TX" + "BOARD_NAME=\"GENERIC_F103V8TX\"" + "BOARD_ID=GENERIC_F103V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8TX INTERFACE + "LINKER:--default-script=${GENERIC_F103V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_MCU} +) +target_link_libraries(GENERIC_F103V8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F103V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F103V8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103V8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103V8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103V8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103V8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103V8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103V8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103V8TX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8TX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8TX_dfu2_MAXSIZE 65536) +set(GENERIC_F103V8TX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103V8TX_dfu2_MCU cortex-m3) +set(GENERIC_F103V8TX_dfu2_FPCONF "-") +add_library(GENERIC_F103V8TX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103V8TX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103V8TX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8TX" + "BOARD_NAME=\"GENERIC_F103V8TX\"" + "BOARD_ID=GENERIC_F103V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8TX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8TX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8TX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103V8TX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103V8TX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103V8TX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8TX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8TX_dfuo_MAXSIZE 65536) +set(GENERIC_F103V8TX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103V8TX_dfuo_MCU cortex-m3) +set(GENERIC_F103V8TX_dfuo_FPCONF "-") +add_library(GENERIC_F103V8TX_dfuo INTERFACE) +target_compile_options(GENERIC_F103V8TX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103V8TX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8TX" + "BOARD_NAME=\"GENERIC_F103V8TX\"" + "BOARD_ID=GENERIC_F103V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8TX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8TX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8TX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103V8TX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103V8TX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103V8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103V8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103V8TX_hid_MAXSIZE 65536) +set(GENERIC_F103V8TX_hid_MAXDATASIZE 20480) +set(GENERIC_F103V8TX_hid_MCU cortex-m3) +set(GENERIC_F103V8TX_hid_FPCONF "-") +add_library(GENERIC_F103V8TX_hid INTERFACE) +target_compile_options(GENERIC_F103V8TX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F103V8TX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103V8TX" + "BOARD_NAME=\"GENERIC_F103V8TX\"" + "BOARD_ID=GENERIC_F103V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103V8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103V8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103V8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103V8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103V8TX_hid_MCU} +) +target_link_libraries(GENERIC_F103V8TX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBHX_MAXSIZE 131072) +set(GENERIC_F103VBHX_MAXDATASIZE 20480) +set(GENERIC_F103VBHX_MCU cortex-m3) +set(GENERIC_F103VBHX_FPCONF "-") +add_library(GENERIC_F103VBHX INTERFACE) +target_compile_options(GENERIC_F103VBHX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_MCU} +) +target_compile_definitions(GENERIC_F103VBHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBHX" + "BOARD_NAME=\"GENERIC_F103VBHX\"" + "BOARD_ID=GENERIC_F103VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBHX INTERFACE + "LINKER:--default-script=${GENERIC_F103VBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_MCU} +) +target_link_libraries(GENERIC_F103VBHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VBHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VBHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VBHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VBHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VBHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VBHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VBHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VBHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBHX_dfu2_MAXSIZE 131072) +set(GENERIC_F103VBHX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103VBHX_dfu2_MCU cortex-m3) +set(GENERIC_F103VBHX_dfu2_FPCONF "-") +add_library(GENERIC_F103VBHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VBHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VBHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBHX" + "BOARD_NAME=\"GENERIC_F103VBHX\"" + "BOARD_ID=GENERIC_F103VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VBHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VBHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBHX_dfuo_MAXSIZE 131072) +set(GENERIC_F103VBHX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103VBHX_dfuo_MCU cortex-m3) +set(GENERIC_F103VBHX_dfuo_FPCONF "-") +add_library(GENERIC_F103VBHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VBHX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VBHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBHX" + "BOARD_NAME=\"GENERIC_F103VBHX\"" + "BOARD_ID=GENERIC_F103VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VBHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VBHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBHX_hid_MAXSIZE 131072) +set(GENERIC_F103VBHX_hid_MAXDATASIZE 20480) +set(GENERIC_F103VBHX_hid_MCU cortex-m3) +set(GENERIC_F103VBHX_hid_FPCONF "-") +add_library(GENERIC_F103VBHX_hid INTERFACE) +target_compile_options(GENERIC_F103VBHX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VBHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBHX" + "BOARD_NAME=\"GENERIC_F103VBHX\"" + "BOARD_ID=GENERIC_F103VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VBHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBHX_hid_MCU} +) +target_link_libraries(GENERIC_F103VBHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBIX_MAXSIZE 131072) +set(GENERIC_F103VBIX_MAXDATASIZE 20480) +set(GENERIC_F103VBIX_MCU cortex-m3) +set(GENERIC_F103VBIX_FPCONF "-") +add_library(GENERIC_F103VBIX INTERFACE) +target_compile_options(GENERIC_F103VBIX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_MCU} +) +target_compile_definitions(GENERIC_F103VBIX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBIX" + "BOARD_NAME=\"GENERIC_F103VBIX\"" + "BOARD_ID=GENERIC_F103VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBIX INTERFACE + "LINKER:--default-script=${GENERIC_F103VBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_MCU} +) +target_link_libraries(GENERIC_F103VBIX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VBIX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VBIX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VBIX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBIX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBIX_dfu2_MAXSIZE 131072) +set(GENERIC_F103VBIX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103VBIX_dfu2_MCU cortex-m3) +set(GENERIC_F103VBIX_dfu2_FPCONF "-") +add_library(GENERIC_F103VBIX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VBIX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VBIX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBIX" + "BOARD_NAME=\"GENERIC_F103VBIX\"" + "BOARD_ID=GENERIC_F103VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBIX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBIX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBIX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VBIX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VBIX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBIX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBIX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBIX_dfuo_MAXSIZE 131072) +set(GENERIC_F103VBIX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103VBIX_dfuo_MCU cortex-m3) +set(GENERIC_F103VBIX_dfuo_FPCONF "-") +add_library(GENERIC_F103VBIX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VBIX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VBIX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBIX" + "BOARD_NAME=\"GENERIC_F103VBIX\"" + "BOARD_ID=GENERIC_F103VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBIX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBIX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBIX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VBIX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VBIX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBIX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBIX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBIX_hid_MAXSIZE 131072) +set(GENERIC_F103VBIX_hid_MAXDATASIZE 20480) +set(GENERIC_F103VBIX_hid_MCU cortex-m3) +set(GENERIC_F103VBIX_hid_FPCONF "-") +add_library(GENERIC_F103VBIX_hid INTERFACE) +target_compile_options(GENERIC_F103VBIX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VBIX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBIX" + "BOARD_NAME=\"GENERIC_F103VBIX\"" + "BOARD_ID=GENERIC_F103VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBIX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBIX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBIX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VBIX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBIX_hid_MCU} +) +target_link_libraries(GENERIC_F103VBIX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBTX_MAXSIZE 131072) +set(GENERIC_F103VBTX_MAXDATASIZE 20480) +set(GENERIC_F103VBTX_MCU cortex-m3) +set(GENERIC_F103VBTX_FPCONF "-") +add_library(GENERIC_F103VBTX INTERFACE) +target_compile_options(GENERIC_F103VBTX INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_MCU} +) +target_compile_definitions(GENERIC_F103VBTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBTX" + "BOARD_NAME=\"GENERIC_F103VBTX\"" + "BOARD_ID=GENERIC_F103VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F103VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_MCU} +) +target_link_libraries(GENERIC_F103VBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VBTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBTX_dfu2_MAXSIZE 131072) +set(GENERIC_F103VBTX_dfu2_MAXDATASIZE 20480) +set(GENERIC_F103VBTX_dfu2_MCU cortex-m3) +set(GENERIC_F103VBTX_dfu2_FPCONF "-") +add_library(GENERIC_F103VBTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VBTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VBTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBTX" + "BOARD_NAME=\"GENERIC_F103VBTX\"" + "BOARD_ID=GENERIC_F103VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VBTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VBTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBTX_dfuo_MAXSIZE 131072) +set(GENERIC_F103VBTX_dfuo_MAXDATASIZE 20480) +set(GENERIC_F103VBTX_dfuo_MCU cortex-m3) +set(GENERIC_F103VBTX_dfuo_FPCONF "-") +add_library(GENERIC_F103VBTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VBTX_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VBTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBTX" + "BOARD_NAME=\"GENERIC_F103VBTX\"" + "BOARD_ID=GENERIC_F103VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VBTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VBTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)") +set(GENERIC_F103VBTX_hid_MAXSIZE 131072) +set(GENERIC_F103VBTX_hid_MAXDATASIZE 20480) +set(GENERIC_F103VBTX_hid_MCU cortex-m3) +set(GENERIC_F103VBTX_hid_FPCONF "-") +add_library(GENERIC_F103VBTX_hid INTERFACE) +target_compile_options(GENERIC_F103VBTX_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VBTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VBTX" + "BOARD_NAME=\"GENERIC_F103VBTX\"" + "BOARD_ID=GENERIC_F103VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_F103VBTX_hid_MCU} +) +target_link_libraries(GENERIC_F103VBTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCHX_MAXSIZE 262144) +set(GENERIC_F103VCHX_MAXDATASIZE 49152) +set(GENERIC_F103VCHX_MCU cortex-m3) +set(GENERIC_F103VCHX_FPCONF "-") +add_library(GENERIC_F103VCHX INTERFACE) +target_compile_options(GENERIC_F103VCHX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_MCU} +) +target_compile_definitions(GENERIC_F103VCHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCHX" + "BOARD_NAME=\"GENERIC_F103VCHX\"" + "BOARD_ID=GENERIC_F103VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCHX INTERFACE + "LINKER:--default-script=${GENERIC_F103VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_MCU} +) +target_link_libraries(GENERIC_F103VCHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VCHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VCHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VCHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VCHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VCHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VCHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VCHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VCHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCHX_dfu2_MAXSIZE 262144) +set(GENERIC_F103VCHX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F103VCHX_dfu2_MCU cortex-m3) +set(GENERIC_F103VCHX_dfu2_FPCONF "-") +add_library(GENERIC_F103VCHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VCHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VCHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCHX" + "BOARD_NAME=\"GENERIC_F103VCHX\"" + "BOARD_ID=GENERIC_F103VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VCHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VCHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VCHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCHX_dfuo_MAXSIZE 262144) +set(GENERIC_F103VCHX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F103VCHX_dfuo_MCU cortex-m3) +set(GENERIC_F103VCHX_dfuo_FPCONF "-") +add_library(GENERIC_F103VCHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VCHX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VCHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCHX" + "BOARD_NAME=\"GENERIC_F103VCHX\"" + "BOARD_ID=GENERIC_F103VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VCHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VCHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VCHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCHX_hid_MAXSIZE 262144) +set(GENERIC_F103VCHX_hid_MAXDATASIZE 49152) +set(GENERIC_F103VCHX_hid_MCU cortex-m3) +set(GENERIC_F103VCHX_hid_FPCONF "-") +add_library(GENERIC_F103VCHX_hid INTERFACE) +target_compile_options(GENERIC_F103VCHX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VCHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCHX" + "BOARD_NAME=\"GENERIC_F103VCHX\"" + "BOARD_ID=GENERIC_F103VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VCHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCHX_hid_MCU} +) +target_link_libraries(GENERIC_F103VCHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCTX_MAXSIZE 262144) +set(GENERIC_F103VCTX_MAXDATASIZE 49152) +set(GENERIC_F103VCTX_MCU cortex-m3) +set(GENERIC_F103VCTX_FPCONF "-") +add_library(GENERIC_F103VCTX INTERFACE) +target_compile_options(GENERIC_F103VCTX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_MCU} +) +target_compile_definitions(GENERIC_F103VCTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCTX" + "BOARD_NAME=\"GENERIC_F103VCTX\"" + "BOARD_ID=GENERIC_F103VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F103VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_MCU} +) +target_link_libraries(GENERIC_F103VCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VCTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCTX_dfu2_MAXSIZE 262144) +set(GENERIC_F103VCTX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F103VCTX_dfu2_MCU cortex-m3) +set(GENERIC_F103VCTX_dfu2_FPCONF "-") +add_library(GENERIC_F103VCTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VCTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VCTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCTX" + "BOARD_NAME=\"GENERIC_F103VCTX\"" + "BOARD_ID=GENERIC_F103VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VCTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VCTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VCTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCTX_dfuo_MAXSIZE 262144) +set(GENERIC_F103VCTX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F103VCTX_dfuo_MCU cortex-m3) +set(GENERIC_F103VCTX_dfuo_FPCONF "-") +add_library(GENERIC_F103VCTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VCTX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VCTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCTX" + "BOARD_NAME=\"GENERIC_F103VCTX\"" + "BOARD_ID=GENERIC_F103VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VCTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VCTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VCTX_hid_MAXSIZE 262144) +set(GENERIC_F103VCTX_hid_MAXDATASIZE 49152) +set(GENERIC_F103VCTX_hid_MCU cortex-m3) +set(GENERIC_F103VCTX_hid_FPCONF "-") +add_library(GENERIC_F103VCTX_hid INTERFACE) +target_compile_options(GENERIC_F103VCTX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VCTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VCTX" + "BOARD_NAME=\"GENERIC_F103VCTX\"" + "BOARD_ID=GENERIC_F103VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103VCTX_hid_MCU} +) +target_link_libraries(GENERIC_F103VCTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VDHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDHX_MAXSIZE 393216) +set(GENERIC_F103VDHX_MAXDATASIZE 65536) +set(GENERIC_F103VDHX_MCU cortex-m3) +set(GENERIC_F103VDHX_FPCONF "-") +add_library(GENERIC_F103VDHX INTERFACE) +target_compile_options(GENERIC_F103VDHX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_MCU} +) +target_compile_definitions(GENERIC_F103VDHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDHX" + "BOARD_NAME=\"GENERIC_F103VDHX\"" + "BOARD_ID=GENERIC_F103VDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDHX INTERFACE + "LINKER:--default-script=${GENERIC_F103VDHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_MCU} +) +target_link_libraries(GENERIC_F103VDHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VDHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VDHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VDHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VDHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VDHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VDHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VDHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VDHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VDHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VDHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VDHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VDHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VDHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VDHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VDHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VDHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VDHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VDHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VDHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VDHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VDHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDHX_dfu2_MAXSIZE 393216) +set(GENERIC_F103VDHX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103VDHX_dfu2_MCU cortex-m3) +set(GENERIC_F103VDHX_dfu2_FPCONF "-") +add_library(GENERIC_F103VDHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VDHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VDHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDHX" + "BOARD_NAME=\"GENERIC_F103VDHX\"" + "BOARD_ID=GENERIC_F103VDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VDHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VDHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VDHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDHX_dfuo_MAXSIZE 393216) +set(GENERIC_F103VDHX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103VDHX_dfuo_MCU cortex-m3) +set(GENERIC_F103VDHX_dfuo_FPCONF "-") +add_library(GENERIC_F103VDHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VDHX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VDHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDHX" + "BOARD_NAME=\"GENERIC_F103VDHX\"" + "BOARD_ID=GENERIC_F103VDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VDHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VDHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VDHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDHX_hid_MAXSIZE 393216) +set(GENERIC_F103VDHX_hid_MAXDATASIZE 65536) +set(GENERIC_F103VDHX_hid_MCU cortex-m3) +set(GENERIC_F103VDHX_hid_FPCONF "-") +add_library(GENERIC_F103VDHX_hid INTERFACE) +target_compile_options(GENERIC_F103VDHX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VDHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDHX" + "BOARD_NAME=\"GENERIC_F103VDHX\"" + "BOARD_ID=GENERIC_F103VDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VDHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDHX_hid_MCU} +) +target_link_libraries(GENERIC_F103VDHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDTX_MAXSIZE 393216) +set(GENERIC_F103VDTX_MAXDATASIZE 65536) +set(GENERIC_F103VDTX_MCU cortex-m3) +set(GENERIC_F103VDTX_FPCONF "-") +add_library(GENERIC_F103VDTX INTERFACE) +target_compile_options(GENERIC_F103VDTX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_MCU} +) +target_compile_definitions(GENERIC_F103VDTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDTX" + "BOARD_NAME=\"GENERIC_F103VDTX\"" + "BOARD_ID=GENERIC_F103VDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDTX INTERFACE + "LINKER:--default-script=${GENERIC_F103VDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_MCU} +) +target_link_libraries(GENERIC_F103VDTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VDTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDTX_dfu2_MAXSIZE 393216) +set(GENERIC_F103VDTX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103VDTX_dfu2_MCU cortex-m3) +set(GENERIC_F103VDTX_dfu2_FPCONF "-") +add_library(GENERIC_F103VDTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VDTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VDTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDTX" + "BOARD_NAME=\"GENERIC_F103VDTX\"" + "BOARD_ID=GENERIC_F103VDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VDTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VDTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VDTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDTX_dfuo_MAXSIZE 393216) +set(GENERIC_F103VDTX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103VDTX_dfuo_MCU cortex-m3) +set(GENERIC_F103VDTX_dfuo_FPCONF "-") +add_library(GENERIC_F103VDTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VDTX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VDTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDTX" + "BOARD_NAME=\"GENERIC_F103VDTX\"" + "BOARD_ID=GENERIC_F103VDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VDTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VDTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VDTX_hid_MAXSIZE 393216) +set(GENERIC_F103VDTX_hid_MAXDATASIZE 65536) +set(GENERIC_F103VDTX_hid_MCU cortex-m3) +set(GENERIC_F103VDTX_hid_FPCONF "-") +add_library(GENERIC_F103VDTX_hid INTERFACE) +target_compile_options(GENERIC_F103VDTX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VDTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VDTX" + "BOARD_NAME=\"GENERIC_F103VDTX\"" + "BOARD_ID=GENERIC_F103VDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VDTX_hid_MCU} +) +target_link_libraries(GENERIC_F103VDTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VEHX_MAXSIZE 524288) +set(GENERIC_F103VEHX_MAXDATASIZE 65536) +set(GENERIC_F103VEHX_MCU cortex-m3) +set(GENERIC_F103VEHX_FPCONF "-") +add_library(GENERIC_F103VEHX INTERFACE) +target_compile_options(GENERIC_F103VEHX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_MCU} +) +target_compile_definitions(GENERIC_F103VEHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VEHX" + "BOARD_NAME=\"GENERIC_F103VEHX\"" + "BOARD_ID=GENERIC_F103VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VEHX INTERFACE + "LINKER:--default-script=${GENERIC_F103VEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_MCU} +) +target_link_libraries(GENERIC_F103VEHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VEHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VEHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VEHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VEHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VEHX_dfu2_MAXSIZE 524288) +set(GENERIC_F103VEHX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103VEHX_dfu2_MCU cortex-m3) +set(GENERIC_F103VEHX_dfu2_FPCONF "-") +add_library(GENERIC_F103VEHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VEHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VEHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VEHX" + "BOARD_NAME=\"GENERIC_F103VEHX\"" + "BOARD_ID=GENERIC_F103VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VEHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VEHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VEHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VEHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VEHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VEHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VEHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VEHX_dfuo_MAXSIZE 524288) +set(GENERIC_F103VEHX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103VEHX_dfuo_MCU cortex-m3) +set(GENERIC_F103VEHX_dfuo_FPCONF "-") +add_library(GENERIC_F103VEHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VEHX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VEHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VEHX" + "BOARD_NAME=\"GENERIC_F103VEHX\"" + "BOARD_ID=GENERIC_F103VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VEHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VEHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VEHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VEHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VEHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VEHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VEHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VEHX_hid_MAXSIZE 524288) +set(GENERIC_F103VEHX_hid_MAXDATASIZE 65536) +set(GENERIC_F103VEHX_hid_MCU cortex-m3) +set(GENERIC_F103VEHX_hid_FPCONF "-") +add_library(GENERIC_F103VEHX_hid INTERFACE) +target_compile_options(GENERIC_F103VEHX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VEHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VEHX" + "BOARD_NAME=\"GENERIC_F103VEHX\"" + "BOARD_ID=GENERIC_F103VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VEHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VEHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VEHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VEHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VEHX_hid_MCU} +) +target_link_libraries(GENERIC_F103VEHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VETX_MAXSIZE 524288) +set(GENERIC_F103VETX_MAXDATASIZE 65536) +set(GENERIC_F103VETX_MCU cortex-m3) +set(GENERIC_F103VETX_FPCONF "-") +add_library(GENERIC_F103VETX INTERFACE) +target_compile_options(GENERIC_F103VETX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VETX_MCU} +) +target_compile_definitions(GENERIC_F103VETX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VETX" + "BOARD_NAME=\"GENERIC_F103VETX\"" + "BOARD_ID=GENERIC_F103VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VETX INTERFACE + "LINKER:--default-script=${GENERIC_F103VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VETX_MCU} +) +target_link_libraries(GENERIC_F103VETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VETX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VETX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VETX_dfu2_MAXSIZE 524288) +set(GENERIC_F103VETX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103VETX_dfu2_MCU cortex-m3) +set(GENERIC_F103VETX_dfu2_FPCONF "-") +add_library(GENERIC_F103VETX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VETX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VETX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VETX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VETX" + "BOARD_NAME=\"GENERIC_F103VETX\"" + "BOARD_ID=GENERIC_F103VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VETX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VETX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VETX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VETX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VETX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VETX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VETX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VETX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VETX_dfuo_MAXSIZE 524288) +set(GENERIC_F103VETX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103VETX_dfuo_MCU cortex-m3) +set(GENERIC_F103VETX_dfuo_FPCONF "-") +add_library(GENERIC_F103VETX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VETX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VETX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VETX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VETX" + "BOARD_NAME=\"GENERIC_F103VETX\"" + "BOARD_ID=GENERIC_F103VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VETX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VETX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VETX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VETX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VETX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VETX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(C-D-E)(H-T)") +set(GENERIC_F103VETX_hid_MAXSIZE 524288) +set(GENERIC_F103VETX_hid_MAXDATASIZE 65536) +set(GENERIC_F103VETX_hid_MCU cortex-m3) +set(GENERIC_F103VETX_hid_FPCONF "-") +add_library(GENERIC_F103VETX_hid INTERFACE) +target_compile_options(GENERIC_F103VETX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VETX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VETX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VETX" + "BOARD_NAME=\"GENERIC_F103VETX\"" + "BOARD_ID=GENERIC_F103VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103VETX_hid_MCU} +) +target_link_libraries(GENERIC_F103VETX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VFTX_MAXSIZE 786432) +set(GENERIC_F103VFTX_MAXDATASIZE 98304) +set(GENERIC_F103VFTX_MCU cortex-m3) +set(GENERIC_F103VFTX_FPCONF "-") +add_library(GENERIC_F103VFTX INTERFACE) +target_compile_options(GENERIC_F103VFTX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_MCU} +) +target_compile_definitions(GENERIC_F103VFTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VFTX" + "BOARD_NAME=\"GENERIC_F103VFTX\"" + "BOARD_ID=GENERIC_F103VFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VFTX INTERFACE + "LINKER:--default-script=${GENERIC_F103VFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_MCU} +) +target_link_libraries(GENERIC_F103VFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VFTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VFTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VFTX_dfu2_MAXSIZE 786432) +set(GENERIC_F103VFTX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103VFTX_dfu2_MCU cortex-m3) +set(GENERIC_F103VFTX_dfu2_FPCONF "-") +add_library(GENERIC_F103VFTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VFTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VFTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VFTX" + "BOARD_NAME=\"GENERIC_F103VFTX\"" + "BOARD_ID=GENERIC_F103VFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VFTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VFTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VFTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VFTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VFTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VFTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VFTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VFTX_dfuo_MAXSIZE 786432) +set(GENERIC_F103VFTX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103VFTX_dfuo_MCU cortex-m3) +set(GENERIC_F103VFTX_dfuo_FPCONF "-") +add_library(GENERIC_F103VFTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VFTX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VFTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VFTX" + "BOARD_NAME=\"GENERIC_F103VFTX\"" + "BOARD_ID=GENERIC_F103VFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VFTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VFTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VFTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VFTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VFTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VFTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VFTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VFTX_hid_MAXSIZE 786432) +set(GENERIC_F103VFTX_hid_MAXDATASIZE 98304) +set(GENERIC_F103VFTX_hid_MCU cortex-m3) +set(GENERIC_F103VFTX_hid_FPCONF "-") +add_library(GENERIC_F103VFTX_hid INTERFACE) +target_compile_options(GENERIC_F103VFTX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VFTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VFTX" + "BOARD_NAME=\"GENERIC_F103VFTX\"" + "BOARD_ID=GENERIC_F103VFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VFTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VFTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VFTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VFTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VFTX_hid_MCU} +) +target_link_libraries(GENERIC_F103VFTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VGTX_MAXSIZE 1048576) +set(GENERIC_F103VGTX_MAXDATASIZE 98304) +set(GENERIC_F103VGTX_MCU cortex-m3) +set(GENERIC_F103VGTX_FPCONF "-") +add_library(GENERIC_F103VGTX INTERFACE) +target_compile_options(GENERIC_F103VGTX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_MCU} +) +target_compile_definitions(GENERIC_F103VGTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VGTX" + "BOARD_NAME=\"GENERIC_F103VGTX\"" + "BOARD_ID=GENERIC_F103VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F103VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_MCU} +) +target_link_libraries(GENERIC_F103VGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103VGTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VGTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VGTX_dfu2_MAXSIZE 1048576) +set(GENERIC_F103VGTX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103VGTX_dfu2_MCU cortex-m3) +set(GENERIC_F103VGTX_dfu2_FPCONF "-") +add_library(GENERIC_F103VGTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103VGTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103VGTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VGTX" + "BOARD_NAME=\"GENERIC_F103VGTX\"" + "BOARD_ID=GENERIC_F103VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VGTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VGTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VGTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103VGTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103VGTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VGTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VGTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VGTX_dfuo_MAXSIZE 1048576) +set(GENERIC_F103VGTX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103VGTX_dfuo_MCU cortex-m3) +set(GENERIC_F103VGTX_dfuo_FPCONF "-") +add_library(GENERIC_F103VGTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103VGTX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103VGTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VGTX" + "BOARD_NAME=\"GENERIC_F103VGTX\"" + "BOARD_ID=GENERIC_F103VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VGTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VGTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VGTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103VGTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103VGTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103VGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103VGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103V(F-G)T") +set(GENERIC_F103VGTX_hid_MAXSIZE 1048576) +set(GENERIC_F103VGTX_hid_MAXDATASIZE 98304) +set(GENERIC_F103VGTX_hid_MCU cortex-m3) +set(GENERIC_F103VGTX_hid_FPCONF "-") +add_library(GENERIC_F103VGTX_hid INTERFACE) +target_compile_options(GENERIC_F103VGTX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103VGTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103VGTX" + "BOARD_NAME=\"GENERIC_F103VGTX\"" + "BOARD_ID=GENERIC_F103VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103VGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103VGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103VGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103VGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103VGTX_hid_MCU} +) +target_link_libraries(GENERIC_F103VGTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCHX_MAXSIZE 262144) +set(GENERIC_F103ZCHX_MAXDATASIZE 49152) +set(GENERIC_F103ZCHX_MCU cortex-m3) +set(GENERIC_F103ZCHX_FPCONF "-") +add_library(GENERIC_F103ZCHX INTERFACE) +target_compile_options(GENERIC_F103ZCHX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_MCU} +) +target_compile_definitions(GENERIC_F103ZCHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCHX" + "BOARD_NAME=\"GENERIC_F103ZCHX\"" + "BOARD_ID=GENERIC_F103ZCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCHX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_MCU} +) +target_link_libraries(GENERIC_F103ZCHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZCHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZCHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZCHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZCHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZCHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZCHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZCHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZCHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCHX_dfu2_MAXSIZE 262144) +set(GENERIC_F103ZCHX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F103ZCHX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZCHX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZCHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZCHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZCHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCHX" + "BOARD_NAME=\"GENERIC_F103ZCHX\"" + "BOARD_ID=GENERIC_F103ZCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZCHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZCHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCHX_dfuo_MAXSIZE 262144) +set(GENERIC_F103ZCHX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F103ZCHX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZCHX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZCHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZCHX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZCHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCHX" + "BOARD_NAME=\"GENERIC_F103ZCHX\"" + "BOARD_ID=GENERIC_F103ZCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZCHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZCHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCHX_hid_MAXSIZE 262144) +set(GENERIC_F103ZCHX_hid_MAXDATASIZE 49152) +set(GENERIC_F103ZCHX_hid_MCU cortex-m3) +set(GENERIC_F103ZCHX_hid_FPCONF "-") +add_library(GENERIC_F103ZCHX_hid INTERFACE) +target_compile_options(GENERIC_F103ZCHX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZCHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCHX" + "BOARD_NAME=\"GENERIC_F103ZCHX\"" + "BOARD_ID=GENERIC_F103ZCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCHX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZCHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCTX_MAXSIZE 262144) +set(GENERIC_F103ZCTX_MAXDATASIZE 49152) +set(GENERIC_F103ZCTX_MCU cortex-m3) +set(GENERIC_F103ZCTX_FPCONF "-") +add_library(GENERIC_F103ZCTX INTERFACE) +target_compile_options(GENERIC_F103ZCTX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_MCU} +) +target_compile_definitions(GENERIC_F103ZCTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCTX" + "BOARD_NAME=\"GENERIC_F103ZCTX\"" + "BOARD_ID=GENERIC_F103ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCTX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_MCU} +) +target_link_libraries(GENERIC_F103ZCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZCTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCTX_dfu2_MAXSIZE 262144) +set(GENERIC_F103ZCTX_dfu2_MAXDATASIZE 49152) +set(GENERIC_F103ZCTX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZCTX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZCTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZCTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZCTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCTX" + "BOARD_NAME=\"GENERIC_F103ZCTX\"" + "BOARD_ID=GENERIC_F103ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZCTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZCTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCTX_dfuo_MAXSIZE 262144) +set(GENERIC_F103ZCTX_dfuo_MAXDATASIZE 49152) +set(GENERIC_F103ZCTX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZCTX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZCTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZCTX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZCTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCTX" + "BOARD_NAME=\"GENERIC_F103ZCTX\"" + "BOARD_ID=GENERIC_F103ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZCTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZCTX_hid_MAXSIZE 262144) +set(GENERIC_F103ZCTX_hid_MAXDATASIZE 49152) +set(GENERIC_F103ZCTX_hid_MCU cortex-m3) +set(GENERIC_F103ZCTX_hid_FPCONF "-") +add_library(GENERIC_F103ZCTX_hid INTERFACE) +target_compile_options(GENERIC_F103ZCTX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZCTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZCTX" + "BOARD_NAME=\"GENERIC_F103ZCTX\"" + "BOARD_ID=GENERIC_F103ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_F103ZCTX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZCTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZDHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDHX_MAXSIZE 393216) +set(GENERIC_F103ZDHX_MAXDATASIZE 65536) +set(GENERIC_F103ZDHX_MCU cortex-m3) +set(GENERIC_F103ZDHX_FPCONF "-") +add_library(GENERIC_F103ZDHX INTERFACE) +target_compile_options(GENERIC_F103ZDHX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_MCU} +) +target_compile_definitions(GENERIC_F103ZDHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDHX" + "BOARD_NAME=\"GENERIC_F103ZDHX\"" + "BOARD_ID=GENERIC_F103ZDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDHX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_MCU} +) +target_link_libraries(GENERIC_F103ZDHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZDHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZDHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZDHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZDHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZDHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZDHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZDHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZDHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZDHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZDHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZDHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZDHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZDHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZDHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZDHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZDHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZDHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZDHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZDHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZDHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZDHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDHX_dfu2_MAXSIZE 393216) +set(GENERIC_F103ZDHX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103ZDHX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZDHX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZDHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZDHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZDHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDHX" + "BOARD_NAME=\"GENERIC_F103ZDHX\"" + "BOARD_ID=GENERIC_F103ZDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZDHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZDHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDHX_dfuo_MAXSIZE 393216) +set(GENERIC_F103ZDHX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103ZDHX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZDHX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZDHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZDHX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZDHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDHX" + "BOARD_NAME=\"GENERIC_F103ZDHX\"" + "BOARD_ID=GENERIC_F103ZDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZDHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZDHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDHX_hid_MAXSIZE 393216) +set(GENERIC_F103ZDHX_hid_MAXDATASIZE 65536) +set(GENERIC_F103ZDHX_hid_MCU cortex-m3) +set(GENERIC_F103ZDHX_hid_FPCONF "-") +add_library(GENERIC_F103ZDHX_hid INTERFACE) +target_compile_options(GENERIC_F103ZDHX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZDHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDHX" + "BOARD_NAME=\"GENERIC_F103ZDHX\"" + "BOARD_ID=GENERIC_F103ZDHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDHX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZDHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDTX_MAXSIZE 393216) +set(GENERIC_F103ZDTX_MAXDATASIZE 65536) +set(GENERIC_F103ZDTX_MCU cortex-m3) +set(GENERIC_F103ZDTX_FPCONF "-") +add_library(GENERIC_F103ZDTX INTERFACE) +target_compile_options(GENERIC_F103ZDTX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_MCU} +) +target_compile_definitions(GENERIC_F103ZDTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDTX" + "BOARD_NAME=\"GENERIC_F103ZDTX\"" + "BOARD_ID=GENERIC_F103ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDTX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_MCU} +) +target_link_libraries(GENERIC_F103ZDTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZDTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDTX_dfu2_MAXSIZE 393216) +set(GENERIC_F103ZDTX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103ZDTX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZDTX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZDTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZDTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZDTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDTX" + "BOARD_NAME=\"GENERIC_F103ZDTX\"" + "BOARD_ID=GENERIC_F103ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZDTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZDTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDTX_dfuo_MAXSIZE 393216) +set(GENERIC_F103ZDTX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103ZDTX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZDTX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZDTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZDTX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZDTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDTX" + "BOARD_NAME=\"GENERIC_F103ZDTX\"" + "BOARD_ID=GENERIC_F103ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZDTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZDTX_hid_MAXSIZE 393216) +set(GENERIC_F103ZDTX_hid_MAXDATASIZE 65536) +set(GENERIC_F103ZDTX_hid_MCU cortex-m3) +set(GENERIC_F103ZDTX_hid_FPCONF "-") +add_library(GENERIC_F103ZDTX_hid INTERFACE) +target_compile_options(GENERIC_F103ZDTX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZDTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZDTX" + "BOARD_NAME=\"GENERIC_F103ZDTX\"" + "BOARD_ID=GENERIC_F103ZDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZDTX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZDTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZEHX_MAXSIZE 524288) +set(GENERIC_F103ZEHX_MAXDATASIZE 65536) +set(GENERIC_F103ZEHX_MCU cortex-m3) +set(GENERIC_F103ZEHX_FPCONF "-") +add_library(GENERIC_F103ZEHX INTERFACE) +target_compile_options(GENERIC_F103ZEHX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_MCU} +) +target_compile_definitions(GENERIC_F103ZEHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZEHX" + "BOARD_NAME=\"GENERIC_F103ZEHX\"" + "BOARD_ID=GENERIC_F103ZEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZEHX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_MCU} +) +target_link_libraries(GENERIC_F103ZEHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZEHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZEHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZEHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZEHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZEHX_dfu2_MAXSIZE 524288) +set(GENERIC_F103ZEHX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103ZEHX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZEHX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZEHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZEHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZEHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZEHX" + "BOARD_NAME=\"GENERIC_F103ZEHX\"" + "BOARD_ID=GENERIC_F103ZEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZEHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZEHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZEHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZEHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZEHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZEHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZEHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZEHX_dfuo_MAXSIZE 524288) +set(GENERIC_F103ZEHX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103ZEHX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZEHX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZEHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZEHX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZEHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZEHX" + "BOARD_NAME=\"GENERIC_F103ZEHX\"" + "BOARD_ID=GENERIC_F103ZEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZEHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZEHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZEHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZEHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZEHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZEHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZEHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZEHX_hid_MAXSIZE 524288) +set(GENERIC_F103ZEHX_hid_MAXDATASIZE 65536) +set(GENERIC_F103ZEHX_hid_MCU cortex-m3) +set(GENERIC_F103ZEHX_hid_FPCONF "-") +add_library(GENERIC_F103ZEHX_hid INTERFACE) +target_compile_options(GENERIC_F103ZEHX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZEHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZEHX" + "BOARD_NAME=\"GENERIC_F103ZEHX\"" + "BOARD_ID=GENERIC_F103ZEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZEHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZEHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZEHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZEHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZEHX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZEHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZETX_MAXSIZE 524288) +set(GENERIC_F103ZETX_MAXDATASIZE 65536) +set(GENERIC_F103ZETX_MCU cortex-m3) +set(GENERIC_F103ZETX_FPCONF "-") +add_library(GENERIC_F103ZETX INTERFACE) +target_compile_options(GENERIC_F103ZETX INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_MCU} +) +target_compile_definitions(GENERIC_F103ZETX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZETX" + "BOARD_NAME=\"GENERIC_F103ZETX\"" + "BOARD_ID=GENERIC_F103ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_MCU} +) +target_link_libraries(GENERIC_F103ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZETX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZETX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZETX_dfu2_MAXSIZE 524288) +set(GENERIC_F103ZETX_dfu2_MAXDATASIZE 65536) +set(GENERIC_F103ZETX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZETX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZETX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZETX_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZETX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZETX" + "BOARD_NAME=\"GENERIC_F103ZETX\"" + "BOARD_ID=GENERIC_F103ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZETX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZETX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZETX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZETX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZETX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZETX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZETX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZETX_dfuo_MAXSIZE 524288) +set(GENERIC_F103ZETX_dfuo_MAXDATASIZE 65536) +set(GENERIC_F103ZETX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZETX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZETX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZETX_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZETX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZETX" + "BOARD_NAME=\"GENERIC_F103ZETX\"" + "BOARD_ID=GENERIC_F103ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZETX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZETX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZETX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZETX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZETX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(GENERIC_F103ZETX_hid_MAXSIZE 524288) +set(GENERIC_F103ZETX_hid_MAXDATASIZE 65536) +set(GENERIC_F103ZETX_hid_MCU cortex-m3) +set(GENERIC_F103ZETX_hid_FPCONF "-") +add_library(GENERIC_F103ZETX_hid INTERFACE) +target_compile_options(GENERIC_F103ZETX_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZETX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZETX" + "BOARD_NAME=\"GENERIC_F103ZETX\"" + "BOARD_ID=GENERIC_F103ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F103ZETX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZETX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZFHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFHX_MAXSIZE 786432) +set(GENERIC_F103ZFHX_MAXDATASIZE 98304) +set(GENERIC_F103ZFHX_MCU cortex-m3) +set(GENERIC_F103ZFHX_FPCONF "-") +add_library(GENERIC_F103ZFHX INTERFACE) +target_compile_options(GENERIC_F103ZFHX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_MCU} +) +target_compile_definitions(GENERIC_F103ZFHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFHX" + "BOARD_NAME=\"GENERIC_F103ZFHX\"" + "BOARD_ID=GENERIC_F103ZFHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFHX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_MCU} +) +target_link_libraries(GENERIC_F103ZFHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZFHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZFHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZFHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZFHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZFHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZFHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZFHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZFHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZFHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZFHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZFHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZFHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZFHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZFHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZFHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZFHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZFHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZFHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZFHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZFHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZFHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFHX_dfu2_MAXSIZE 786432) +set(GENERIC_F103ZFHX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103ZFHX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZFHX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZFHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZFHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZFHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFHX" + "BOARD_NAME=\"GENERIC_F103ZFHX\"" + "BOARD_ID=GENERIC_F103ZFHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZFHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZFHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFHX_dfuo_MAXSIZE 786432) +set(GENERIC_F103ZFHX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103ZFHX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZFHX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZFHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZFHX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZFHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFHX" + "BOARD_NAME=\"GENERIC_F103ZFHX\"" + "BOARD_ID=GENERIC_F103ZFHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZFHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZFHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFHX_hid_MAXSIZE 786432) +set(GENERIC_F103ZFHX_hid_MAXDATASIZE 98304) +set(GENERIC_F103ZFHX_hid_MCU cortex-m3) +set(GENERIC_F103ZFHX_hid_FPCONF "-") +add_library(GENERIC_F103ZFHX_hid INTERFACE) +target_compile_options(GENERIC_F103ZFHX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZFHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFHX" + "BOARD_NAME=\"GENERIC_F103ZFHX\"" + "BOARD_ID=GENERIC_F103ZFHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFHX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZFHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFTX_MAXSIZE 786432) +set(GENERIC_F103ZFTX_MAXDATASIZE 98304) +set(GENERIC_F103ZFTX_MCU cortex-m3) +set(GENERIC_F103ZFTX_FPCONF "-") +add_library(GENERIC_F103ZFTX INTERFACE) +target_compile_options(GENERIC_F103ZFTX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_MCU} +) +target_compile_definitions(GENERIC_F103ZFTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFTX" + "BOARD_NAME=\"GENERIC_F103ZFTX\"" + "BOARD_ID=GENERIC_F103ZFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFTX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_MCU} +) +target_link_libraries(GENERIC_F103ZFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZFTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFTX_dfu2_MAXSIZE 786432) +set(GENERIC_F103ZFTX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103ZFTX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZFTX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZFTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZFTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZFTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFTX" + "BOARD_NAME=\"GENERIC_F103ZFTX\"" + "BOARD_ID=GENERIC_F103ZFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZFTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZFTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFTX_dfuo_MAXSIZE 786432) +set(GENERIC_F103ZFTX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103ZFTX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZFTX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZFTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZFTX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZFTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFTX" + "BOARD_NAME=\"GENERIC_F103ZFTX\"" + "BOARD_ID=GENERIC_F103ZFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZFTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZFTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZFTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZFTX_hid_MAXSIZE 786432) +set(GENERIC_F103ZFTX_hid_MAXDATASIZE 98304) +set(GENERIC_F103ZFTX_hid_MCU cortex-m3) +set(GENERIC_F103ZFTX_hid_FPCONF "-") +add_library(GENERIC_F103ZFTX_hid INTERFACE) +target_compile_options(GENERIC_F103ZFTX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZFTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZFTX" + "BOARD_NAME=\"GENERIC_F103ZFTX\"" + "BOARD_ID=GENERIC_F103ZFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZFTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZFTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZFTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZFTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZFTX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZFTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGHX_MAXSIZE 1048576) +set(GENERIC_F103ZGHX_MAXDATASIZE 98304) +set(GENERIC_F103ZGHX_MCU cortex-m3) +set(GENERIC_F103ZGHX_FPCONF "-") +add_library(GENERIC_F103ZGHX INTERFACE) +target_compile_options(GENERIC_F103ZGHX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_MCU} +) +target_compile_definitions(GENERIC_F103ZGHX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGHX" + "BOARD_NAME=\"GENERIC_F103ZGHX\"" + "BOARD_ID=GENERIC_F103ZGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGHX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_MCU} +) +target_link_libraries(GENERIC_F103ZGHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZGHX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGHX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGHX_dfu2_MAXSIZE 1048576) +set(GENERIC_F103ZGHX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103ZGHX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZGHX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZGHX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZGHX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZGHX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGHX" + "BOARD_NAME=\"GENERIC_F103ZGHX\"" + "BOARD_ID=GENERIC_F103ZGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGHX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGHX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGHX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGHX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZGHX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZGHX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGHX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGHX_dfuo_MAXSIZE 1048576) +set(GENERIC_F103ZGHX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103ZGHX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZGHX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZGHX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZGHX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZGHX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGHX" + "BOARD_NAME=\"GENERIC_F103ZGHX\"" + "BOARD_ID=GENERIC_F103ZGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGHX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGHX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGHX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGHX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZGHX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZGHX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGHX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGHX_hid_MAXSIZE 1048576) +set(GENERIC_F103ZGHX_hid_MAXDATASIZE 98304) +set(GENERIC_F103ZGHX_hid_MCU cortex-m3) +set(GENERIC_F103ZGHX_hid_FPCONF "-") +add_library(GENERIC_F103ZGHX_hid INTERFACE) +target_compile_options(GENERIC_F103ZGHX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZGHX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGHX" + "BOARD_NAME=\"GENERIC_F103ZGHX\"" + "BOARD_ID=GENERIC_F103ZGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGHX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGHX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGHX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGHX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGHX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZGHX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGTX_MAXSIZE 1048576) +set(GENERIC_F103ZGTX_MAXDATASIZE 98304) +set(GENERIC_F103ZGTX_MCU cortex-m3) +set(GENERIC_F103ZGTX_FPCONF "-") +add_library(GENERIC_F103ZGTX INTERFACE) +target_compile_options(GENERIC_F103ZGTX INTERFACE + "SHELL:-DSTM32F103xG " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_MCU} +) +target_compile_definitions(GENERIC_F103ZGTX INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGTX" + "BOARD_NAME=\"GENERIC_F103ZGTX\"" + "BOARD_ID=GENERIC_F103ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_MCU} +) +target_link_libraries(GENERIC_F103ZGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F103ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F103ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F103ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F103ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F103ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F103ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F103ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F103ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F103ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F103ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F103ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F103ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F103ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F103ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F103ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F103ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F103ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F103ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F103ZGTX_dfu2 +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGTX_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGTX_dfu2_MAXSIZE 1048576) +set(GENERIC_F103ZGTX_dfu2_MAXDATASIZE 98304) +set(GENERIC_F103ZGTX_dfu2_MCU cortex-m3) +set(GENERIC_F103ZGTX_dfu2_FPCONF "-") +add_library(GENERIC_F103ZGTX_dfu2 INTERFACE) +target_compile_options(GENERIC_F103ZGTX_dfu2 INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_dfu2_MCU} +) +target_compile_definitions(GENERIC_F103ZGTX_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGTX" + "BOARD_NAME=\"GENERIC_F103ZGTX\"" + "BOARD_ID=GENERIC_F103ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGTX_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGTX_dfu2_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGTX_dfu2 INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGTX_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_dfu2_MCU} +) +target_link_libraries(GENERIC_F103ZGTX_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZGTX_dfuo +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGTX_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGTX_dfuo_MAXSIZE 1048576) +set(GENERIC_F103ZGTX_dfuo_MAXDATASIZE 98304) +set(GENERIC_F103ZGTX_dfuo_MCU cortex-m3) +set(GENERIC_F103ZGTX_dfuo_FPCONF "-") +add_library(GENERIC_F103ZGTX_dfuo INTERFACE) +target_compile_options(GENERIC_F103ZGTX_dfuo INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_dfuo_MCU} +) +target_compile_definitions(GENERIC_F103ZGTX_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGTX" + "BOARD_NAME=\"GENERIC_F103ZGTX\"" + "BOARD_ID=GENERIC_F103ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGTX_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGTX_dfuo_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGTX_dfuo INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGTX_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_dfuo_MCU} +) +target_link_libraries(GENERIC_F103ZGTX_dfuo INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F103ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F103ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(F-G)(H-T)") +set(GENERIC_F103ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F103ZGTX_hid_MAXDATASIZE 98304) +set(GENERIC_F103ZGTX_hid_MCU cortex-m3) +set(GENERIC_F103ZGTX_hid_FPCONF "-") +add_library(GENERIC_F103ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F103ZGTX_hid INTERFACE + "SHELL:-DSTM32F103xG -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F103ZGTX_hid INTERFACE + "STM32F1xx" + "ARDUINO_GENERIC_F103ZGTX" + "BOARD_NAME=\"GENERIC_F103ZGTX\"" + "BOARD_ID=GENERIC_F103ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F103ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${GENERIC_F103ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F103ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F103ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F103ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F103ZGTX_hid INTERFACE + arm_cortexM3l_math +) + + +# GENERIC_F205RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RBTX_MAXSIZE 131072) +set(GENERIC_F205RBTX_MAXDATASIZE 65536) +set(GENERIC_F205RBTX_MCU cortex-m3) +set(GENERIC_F205RBTX_FPCONF "-") +add_library(GENERIC_F205RBTX INTERFACE) +target_compile_options(GENERIC_F205RBTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RBTX_MCU} +) +target_compile_definitions(GENERIC_F205RBTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RBTX" + "BOARD_NAME=\"GENERIC_F205RBTX\"" + "BOARD_ID=GENERIC_F205RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F205RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F205RBTX_MCU} +) +target_link_libraries(GENERIC_F205RBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RCTX_MAXSIZE 262144) +set(GENERIC_F205RCTX_MAXDATASIZE 98304) +set(GENERIC_F205RCTX_MCU cortex-m3) +set(GENERIC_F205RCTX_FPCONF "-") +add_library(GENERIC_F205RCTX INTERFACE) +target_compile_options(GENERIC_F205RCTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RCTX_MCU} +) +target_compile_definitions(GENERIC_F205RCTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RCTX" + "BOARD_NAME=\"GENERIC_F205RCTX\"" + "BOARD_ID=GENERIC_F205RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F205RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F205RCTX_MCU} +) +target_link_libraries(GENERIC_F205RCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RETX_MAXSIZE 524288) +set(GENERIC_F205RETX_MAXDATASIZE 131072) +set(GENERIC_F205RETX_MCU cortex-m3) +set(GENERIC_F205RETX_FPCONF "-") +add_library(GENERIC_F205RETX INTERFACE) +target_compile_options(GENERIC_F205RETX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RETX_MCU} +) +target_compile_definitions(GENERIC_F205RETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RETX" + "BOARD_NAME=\"GENERIC_F205RETX\"" + "BOARD_ID=GENERIC_F205RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RETX INTERFACE + "LINKER:--default-script=${GENERIC_F205RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205RETX_MCU} +) +target_link_libraries(GENERIC_F205RETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205REYX_MAXSIZE 524288) +set(GENERIC_F205REYX_MAXDATASIZE 131072) +set(GENERIC_F205REYX_MCU cortex-m3) +set(GENERIC_F205REYX_FPCONF "-") +add_library(GENERIC_F205REYX INTERFACE) +target_compile_options(GENERIC_F205REYX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205REYX_MCU} +) +target_compile_definitions(GENERIC_F205REYX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205REYX" + "BOARD_NAME=\"GENERIC_F205REYX\"" + "BOARD_ID=GENERIC_F205REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205REYX INTERFACE + "LINKER:--default-script=${GENERIC_F205REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205REYX_MCU} +) +target_link_libraries(GENERIC_F205REYX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205REYX_serial_none INTERFACE) +target_compile_options(GENERIC_F205REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205REYX_usb_none INTERFACE) +target_compile_options(GENERIC_F205REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205RFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RFTX_MAXSIZE 786432) +set(GENERIC_F205RFTX_MAXDATASIZE 131072) +set(GENERIC_F205RFTX_MCU cortex-m3) +set(GENERIC_F205RFTX_FPCONF "-") +add_library(GENERIC_F205RFTX INTERFACE) +target_compile_options(GENERIC_F205RFTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RFTX_MCU} +) +target_compile_definitions(GENERIC_F205RFTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RFTX" + "BOARD_NAME=\"GENERIC_F205RFTX\"" + "BOARD_ID=GENERIC_F205RFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RFTX INTERFACE + "LINKER:--default-script=${GENERIC_F205RFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205RFTX_MCU} +) +target_link_libraries(GENERIC_F205RFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205RGEX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RGEX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RGEX_MAXSIZE 1048576) +set(GENERIC_F205RGEX_MAXDATASIZE 131072) +set(GENERIC_F205RGEX_MCU cortex-m3) +set(GENERIC_F205RGEX_FPCONF "-") +add_library(GENERIC_F205RGEX INTERFACE) +target_compile_options(GENERIC_F205RGEX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RGEX_MCU} +) +target_compile_definitions(GENERIC_F205RGEX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RGEX" + "BOARD_NAME=\"GENERIC_F205RGEX\"" + "BOARD_ID=GENERIC_F205RGEX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RGEX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RGEX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RGEX INTERFACE + "LINKER:--default-script=${GENERIC_F205RGEX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205RGEX_MCU} +) +target_link_libraries(GENERIC_F205RGEX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RGEX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RGEX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGEX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RGEX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RGEX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RGEX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RGEX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RGEX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RGEX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RGEX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RGEX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RGEX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RGEX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RGEX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGEX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RGEX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGEX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RGEX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RGEX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RGEX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RGTX_MAXSIZE 1048576) +set(GENERIC_F205RGTX_MAXDATASIZE 131072) +set(GENERIC_F205RGTX_MCU cortex-m3) +set(GENERIC_F205RGTX_FPCONF "-") +add_library(GENERIC_F205RGTX INTERFACE) +target_compile_options(GENERIC_F205RGTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RGTX_MCU} +) +target_compile_definitions(GENERIC_F205RGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RGTX" + "BOARD_NAME=\"GENERIC_F205RGTX\"" + "BOARD_ID=GENERIC_F205RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F205RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205RGTX_MCU} +) +target_link_libraries(GENERIC_F205RGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205RGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205RGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F205RGYX_MAXSIZE 1048576) +set(GENERIC_F205RGYX_MAXDATASIZE 131072) +set(GENERIC_F205RGYX_MCU cortex-m3) +set(GENERIC_F205RGYX_FPCONF "-") +add_library(GENERIC_F205RGYX INTERFACE) +target_compile_options(GENERIC_F205RGYX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205RGYX_MCU} +) +target_compile_definitions(GENERIC_F205RGYX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205RGYX" + "BOARD_NAME=\"GENERIC_F205RGYX\"" + "BOARD_ID=GENERIC_F205RGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205RGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205RGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205RGYX INTERFACE + "LINKER:--default-script=${GENERIC_F205RGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205RGYX_MCU} +) +target_link_libraries(GENERIC_F205RGYX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205RGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205RGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205RGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205RGYX_serial_none INTERFACE) +target_compile_options(GENERIC_F205RGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205RGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205RGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205RGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205RGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205RGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205RGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205RGYX_usb_none INTERFACE) +target_compile_options(GENERIC_F205RGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205RGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205RGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205RGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205RGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205RGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F205VBTX_MAXSIZE 131072) +set(GENERIC_F205VBTX_MAXDATASIZE 65536) +set(GENERIC_F205VBTX_MCU cortex-m3) +set(GENERIC_F205VBTX_FPCONF "-") +add_library(GENERIC_F205VBTX INTERFACE) +target_compile_options(GENERIC_F205VBTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205VBTX_MCU} +) +target_compile_definitions(GENERIC_F205VBTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205VBTX" + "BOARD_NAME=\"GENERIC_F205VBTX\"" + "BOARD_ID=GENERIC_F205VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F205VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_F205VBTX_MCU} +) +target_link_libraries(GENERIC_F205VBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F205VCTX_MAXSIZE 262144) +set(GENERIC_F205VCTX_MAXDATASIZE 98304) +set(GENERIC_F205VCTX_MCU cortex-m3) +set(GENERIC_F205VCTX_FPCONF "-") +add_library(GENERIC_F205VCTX INTERFACE) +target_compile_options(GENERIC_F205VCTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205VCTX_MCU} +) +target_compile_definitions(GENERIC_F205VCTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205VCTX" + "BOARD_NAME=\"GENERIC_F205VCTX\"" + "BOARD_ID=GENERIC_F205VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F205VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F205VCTX_MCU} +) +target_link_libraries(GENERIC_F205VCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F205VETX_MAXSIZE 524288) +set(GENERIC_F205VETX_MAXDATASIZE 131072) +set(GENERIC_F205VETX_MCU cortex-m3) +set(GENERIC_F205VETX_FPCONF "-") +add_library(GENERIC_F205VETX INTERFACE) +target_compile_options(GENERIC_F205VETX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205VETX_MCU} +) +target_compile_definitions(GENERIC_F205VETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205VETX" + "BOARD_NAME=\"GENERIC_F205VETX\"" + "BOARD_ID=GENERIC_F205VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205VETX INTERFACE + "LINKER:--default-script=${GENERIC_F205VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205VETX_MCU} +) +target_link_libraries(GENERIC_F205VETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F205VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F205VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205VFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205VFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F205VFTX_MAXSIZE 786432) +set(GENERIC_F205VFTX_MAXDATASIZE 131072) +set(GENERIC_F205VFTX_MCU cortex-m3) +set(GENERIC_F205VFTX_FPCONF "-") +add_library(GENERIC_F205VFTX INTERFACE) +target_compile_options(GENERIC_F205VFTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205VFTX_MCU} +) +target_compile_definitions(GENERIC_F205VFTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205VFTX" + "BOARD_NAME=\"GENERIC_F205VFTX\"" + "BOARD_ID=GENERIC_F205VFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205VFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205VFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205VFTX INTERFACE + "LINKER:--default-script=${GENERIC_F205VFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205VFTX_MCU} +) +target_link_libraries(GENERIC_F205VFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205VFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205VFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205VFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205VFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205VFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205VFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205VFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205VFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205VFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205VFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205VFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205VFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205VFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205VFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205VFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205VFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205VFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F205VGTX_MAXSIZE 1048576) +set(GENERIC_F205VGTX_MAXDATASIZE 131072) +set(GENERIC_F205VGTX_MCU cortex-m3) +set(GENERIC_F205VGTX_FPCONF "-") +add_library(GENERIC_F205VGTX INTERFACE) +target_compile_options(GENERIC_F205VGTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205VGTX_MCU} +) +target_compile_definitions(GENERIC_F205VGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205VGTX" + "BOARD_NAME=\"GENERIC_F205VGTX\"" + "BOARD_ID=GENERIC_F205VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F205VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205VGTX_MCU} +) +target_link_libraries(GENERIC_F205VGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205ZCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205ZCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T") +set(GENERIC_F205ZCTX_MAXSIZE 262144) +set(GENERIC_F205ZCTX_MAXDATASIZE 98304) +set(GENERIC_F205ZCTX_MCU cortex-m3) +set(GENERIC_F205ZCTX_FPCONF "-") +add_library(GENERIC_F205ZCTX INTERFACE) +target_compile_options(GENERIC_F205ZCTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205ZCTX_MCU} +) +target_compile_definitions(GENERIC_F205ZCTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205ZCTX" + "BOARD_NAME=\"GENERIC_F205ZCTX\"" + "BOARD_ID=GENERIC_F205ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205ZCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205ZCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205ZCTX INTERFACE + "LINKER:--default-script=${GENERIC_F205ZCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL: " + -mcpu=${GENERIC_F205ZCTX_MCU} +) +target_link_libraries(GENERIC_F205ZCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205ZCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205ZCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205ZCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205ZCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205ZCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205ZCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205ZCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205ZCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205ZCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205ZCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205ZCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205ZCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205ZCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205ZCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205ZCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205ZCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205ZCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T") +set(GENERIC_F205ZETX_MAXSIZE 524288) +set(GENERIC_F205ZETX_MAXDATASIZE 131072) +set(GENERIC_F205ZETX_MCU cortex-m3) +set(GENERIC_F205ZETX_FPCONF "-") +add_library(GENERIC_F205ZETX INTERFACE) +target_compile_options(GENERIC_F205ZETX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205ZETX_MCU} +) +target_compile_definitions(GENERIC_F205ZETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205ZETX" + "BOARD_NAME=\"GENERIC_F205ZETX\"" + "BOARD_ID=GENERIC_F205ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F205ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205ZETX_MCU} +) +target_link_libraries(GENERIC_F205ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F205ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F205ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205ZFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205ZFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T") +set(GENERIC_F205ZFTX_MAXSIZE 786432) +set(GENERIC_F205ZFTX_MAXDATASIZE 131072) +set(GENERIC_F205ZFTX_MCU cortex-m3) +set(GENERIC_F205ZFTX_FPCONF "-") +add_library(GENERIC_F205ZFTX INTERFACE) +target_compile_options(GENERIC_F205ZFTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205ZFTX_MCU} +) +target_compile_definitions(GENERIC_F205ZFTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205ZFTX" + "BOARD_NAME=\"GENERIC_F205ZFTX\"" + "BOARD_ID=GENERIC_F205ZFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205ZFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205ZFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205ZFTX INTERFACE + "LINKER:--default-script=${GENERIC_F205ZFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205ZFTX_MCU} +) +target_link_libraries(GENERIC_F205ZFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205ZFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205ZFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205ZFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205ZFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205ZFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205ZFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205ZFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205ZFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205ZFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205ZFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205ZFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205ZFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205ZFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205ZFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205ZFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205ZFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205ZFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F205ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F205ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T") +set(GENERIC_F205ZGTX_MAXSIZE 1048576) +set(GENERIC_F205ZGTX_MAXDATASIZE 131072) +set(GENERIC_F205ZGTX_MCU cortex-m3) +set(GENERIC_F205ZGTX_FPCONF "-") +add_library(GENERIC_F205ZGTX INTERFACE) +target_compile_options(GENERIC_F205ZGTX INTERFACE + "SHELL:-DSTM32F205xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F205ZGTX_MCU} +) +target_compile_definitions(GENERIC_F205ZGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F205ZGTX" + "BOARD_NAME=\"GENERIC_F205ZGTX\"" + "BOARD_ID=GENERIC_F205ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F205ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F205ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F205ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F205ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F205ZGTX_MCU} +) +target_link_libraries(GENERIC_F205ZGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F205ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F205ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F205ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F205ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F205ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F205ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F205ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F205ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F205ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F205ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F205ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F205ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F205ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F205ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F205ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F205ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F205ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F205ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207ICHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207ICHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207ICHX_MAXSIZE 262144) +set(GENERIC_F207ICHX_MAXDATASIZE 131072) +set(GENERIC_F207ICHX_MCU cortex-m3) +set(GENERIC_F207ICHX_FPCONF "-") +add_library(GENERIC_F207ICHX INTERFACE) +target_compile_options(GENERIC_F207ICHX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207ICHX_MCU} +) +target_compile_definitions(GENERIC_F207ICHX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207ICHX" + "BOARD_NAME=\"GENERIC_F207ICHX\"" + "BOARD_ID=GENERIC_F207ICHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207ICHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207ICHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207ICHX INTERFACE + "LINKER:--default-script=${GENERIC_F207ICHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207ICHX_MCU} +) +target_link_libraries(GENERIC_F207ICHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207ICHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207ICHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ICHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207ICHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207ICHX_serial_none INTERFACE) +target_compile_options(GENERIC_F207ICHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207ICHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207ICHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207ICHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207ICHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207ICHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207ICHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207ICHX_usb_none INTERFACE) +target_compile_options(GENERIC_F207ICHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ICHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207ICHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ICHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207ICHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207ICHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207ICHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207ICTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207ICTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207ICTX_MAXSIZE 262144) +set(GENERIC_F207ICTX_MAXDATASIZE 131072) +set(GENERIC_F207ICTX_MCU cortex-m3) +set(GENERIC_F207ICTX_FPCONF "-") +add_library(GENERIC_F207ICTX INTERFACE) +target_compile_options(GENERIC_F207ICTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207ICTX_MCU} +) +target_compile_definitions(GENERIC_F207ICTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207ICTX" + "BOARD_NAME=\"GENERIC_F207ICTX\"" + "BOARD_ID=GENERIC_F207ICTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207ICTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207ICTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207ICTX INTERFACE + "LINKER:--default-script=${GENERIC_F207ICTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207ICTX_MCU} +) +target_link_libraries(GENERIC_F207ICTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207ICTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207ICTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ICTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207ICTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207ICTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207ICTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207ICTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207ICTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207ICTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207ICTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207ICTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207ICTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207ICTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207ICTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ICTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207ICTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ICTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207ICTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207ICTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207ICTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207IEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207IEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207IEHX_MAXSIZE 524288) +set(GENERIC_F207IEHX_MAXDATASIZE 131072) +set(GENERIC_F207IEHX_MCU cortex-m3) +set(GENERIC_F207IEHX_FPCONF "-") +add_library(GENERIC_F207IEHX INTERFACE) +target_compile_options(GENERIC_F207IEHX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207IEHX_MCU} +) +target_compile_definitions(GENERIC_F207IEHX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207IEHX" + "BOARD_NAME=\"GENERIC_F207IEHX\"" + "BOARD_ID=GENERIC_F207IEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207IEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207IEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207IEHX INTERFACE + "LINKER:--default-script=${GENERIC_F207IEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207IEHX_MCU} +) +target_link_libraries(GENERIC_F207IEHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207IEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207IEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207IEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207IEHX_serial_none INTERFACE) +target_compile_options(GENERIC_F207IEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207IEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207IEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207IEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207IEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207IEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207IEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207IEHX_usb_none INTERFACE) +target_compile_options(GENERIC_F207IEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207IEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207IEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207IEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207IEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207IETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207IETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207IETX_MAXSIZE 524288) +set(GENERIC_F207IETX_MAXDATASIZE 131072) +set(GENERIC_F207IETX_MCU cortex-m3) +set(GENERIC_F207IETX_FPCONF "-") +add_library(GENERIC_F207IETX INTERFACE) +target_compile_options(GENERIC_F207IETX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207IETX_MCU} +) +target_compile_definitions(GENERIC_F207IETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207IETX" + "BOARD_NAME=\"GENERIC_F207IETX\"" + "BOARD_ID=GENERIC_F207IETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207IETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207IETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207IETX INTERFACE + "LINKER:--default-script=${GENERIC_F207IETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207IETX_MCU} +) +target_link_libraries(GENERIC_F207IETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207IETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207IETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207IETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207IETX_serial_none INTERFACE) +target_compile_options(GENERIC_F207IETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207IETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207IETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207IETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207IETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207IETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207IETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207IETX_usb_none INTERFACE) +target_compile_options(GENERIC_F207IETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207IETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207IETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207IETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207IETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207IFHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207IFHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207IFHX_MAXSIZE 786432) +set(GENERIC_F207IFHX_MAXDATASIZE 131072) +set(GENERIC_F207IFHX_MCU cortex-m3) +set(GENERIC_F207IFHX_FPCONF "-") +add_library(GENERIC_F207IFHX INTERFACE) +target_compile_options(GENERIC_F207IFHX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207IFHX_MCU} +) +target_compile_definitions(GENERIC_F207IFHX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207IFHX" + "BOARD_NAME=\"GENERIC_F207IFHX\"" + "BOARD_ID=GENERIC_F207IFHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207IFHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207IFHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207IFHX INTERFACE + "LINKER:--default-script=${GENERIC_F207IFHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207IFHX_MCU} +) +target_link_libraries(GENERIC_F207IFHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207IFHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207IFHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IFHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207IFHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207IFHX_serial_none INTERFACE) +target_compile_options(GENERIC_F207IFHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207IFHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207IFHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207IFHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207IFHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207IFHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207IFHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207IFHX_usb_none INTERFACE) +target_compile_options(GENERIC_F207IFHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IFHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207IFHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IFHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207IFHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207IFHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207IFHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207IFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207IFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207IFTX_MAXSIZE 786432) +set(GENERIC_F207IFTX_MAXDATASIZE 131072) +set(GENERIC_F207IFTX_MCU cortex-m3) +set(GENERIC_F207IFTX_FPCONF "-") +add_library(GENERIC_F207IFTX INTERFACE) +target_compile_options(GENERIC_F207IFTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207IFTX_MCU} +) +target_compile_definitions(GENERIC_F207IFTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207IFTX" + "BOARD_NAME=\"GENERIC_F207IFTX\"" + "BOARD_ID=GENERIC_F207IFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207IFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207IFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207IFTX INTERFACE + "LINKER:--default-script=${GENERIC_F207IFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207IFTX_MCU} +) +target_link_libraries(GENERIC_F207IFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207IFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207IFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207IFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207IFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207IFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207IFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207IFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207IFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207IFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207IFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207IFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207IFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207IFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207IFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207IFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207IFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207IFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207IGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207IGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207IGHX_MAXSIZE 1048576) +set(GENERIC_F207IGHX_MAXDATASIZE 131072) +set(GENERIC_F207IGHX_MCU cortex-m3) +set(GENERIC_F207IGHX_FPCONF "-") +add_library(GENERIC_F207IGHX INTERFACE) +target_compile_options(GENERIC_F207IGHX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207IGHX_MCU} +) +target_compile_definitions(GENERIC_F207IGHX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207IGHX" + "BOARD_NAME=\"GENERIC_F207IGHX\"" + "BOARD_ID=GENERIC_F207IGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207IGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207IGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207IGHX INTERFACE + "LINKER:--default-script=${GENERIC_F207IGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207IGHX_MCU} +) +target_link_libraries(GENERIC_F207IGHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207IGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207IGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207IGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207IGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F207IGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207IGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207IGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207IGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207IGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207IGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207IGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207IGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F207IGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207IGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207IGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207IGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207IGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F207IGTX_MAXSIZE 1048576) +set(GENERIC_F207IGTX_MAXDATASIZE 131072) +set(GENERIC_F207IGTX_MCU cortex-m3) +set(GENERIC_F207IGTX_FPCONF "-") +add_library(GENERIC_F207IGTX INTERFACE) +target_compile_options(GENERIC_F207IGTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207IGTX_MCU} +) +target_compile_definitions(GENERIC_F207IGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207IGTX" + "BOARD_NAME=\"GENERIC_F207IGTX\"" + "BOARD_ID=GENERIC_F207IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207IGTX INTERFACE + "LINKER:--default-script=${GENERIC_F207IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207IGTX_MCU} +) +target_link_libraries(GENERIC_F207IGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T") +set(GENERIC_F207VCTX_MAXSIZE 262144) +set(GENERIC_F207VCTX_MAXDATASIZE 131072) +set(GENERIC_F207VCTX_MCU cortex-m3) +set(GENERIC_F207VCTX_FPCONF "-") +add_library(GENERIC_F207VCTX INTERFACE) +target_compile_options(GENERIC_F207VCTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207VCTX_MCU} +) +target_compile_definitions(GENERIC_F207VCTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207VCTX" + "BOARD_NAME=\"GENERIC_F207VCTX\"" + "BOARD_ID=GENERIC_F207VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F207VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207VCTX_MCU} +) +target_link_libraries(GENERIC_F207VCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T") +set(GENERIC_F207VETX_MAXSIZE 524288) +set(GENERIC_F207VETX_MAXDATASIZE 131072) +set(GENERIC_F207VETX_MCU cortex-m3) +set(GENERIC_F207VETX_FPCONF "-") +add_library(GENERIC_F207VETX INTERFACE) +target_compile_options(GENERIC_F207VETX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207VETX_MCU} +) +target_compile_definitions(GENERIC_F207VETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207VETX" + "BOARD_NAME=\"GENERIC_F207VETX\"" + "BOARD_ID=GENERIC_F207VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207VETX INTERFACE + "LINKER:--default-script=${GENERIC_F207VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207VETX_MCU} +) +target_link_libraries(GENERIC_F207VETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F207VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F207VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207VFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207VFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T") +set(GENERIC_F207VFTX_MAXSIZE 786432) +set(GENERIC_F207VFTX_MAXDATASIZE 131072) +set(GENERIC_F207VFTX_MCU cortex-m3) +set(GENERIC_F207VFTX_FPCONF "-") +add_library(GENERIC_F207VFTX INTERFACE) +target_compile_options(GENERIC_F207VFTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207VFTX_MCU} +) +target_compile_definitions(GENERIC_F207VFTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207VFTX" + "BOARD_NAME=\"GENERIC_F207VFTX\"" + "BOARD_ID=GENERIC_F207VFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207VFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207VFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207VFTX INTERFACE + "LINKER:--default-script=${GENERIC_F207VFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207VFTX_MCU} +) +target_link_libraries(GENERIC_F207VFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207VFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207VFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207VFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207VFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207VFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207VFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207VFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207VFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207VFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207VFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207VFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207VFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207VFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207VFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207VFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207VFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207VFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T") +set(GENERIC_F207VGTX_MAXSIZE 1048576) +set(GENERIC_F207VGTX_MAXDATASIZE 131072) +set(GENERIC_F207VGTX_MCU cortex-m3) +set(GENERIC_F207VGTX_FPCONF "-") +add_library(GENERIC_F207VGTX INTERFACE) +target_compile_options(GENERIC_F207VGTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207VGTX_MCU} +) +target_compile_definitions(GENERIC_F207VGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207VGTX" + "BOARD_NAME=\"GENERIC_F207VGTX\"" + "BOARD_ID=GENERIC_F207VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F207VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207VGTX_MCU} +) +target_link_libraries(GENERIC_F207VGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207ZCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207ZCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(GENERIC_F207ZCTX_MAXSIZE 262144) +set(GENERIC_F207ZCTX_MAXDATASIZE 131072) +set(GENERIC_F207ZCTX_MCU cortex-m3) +set(GENERIC_F207ZCTX_FPCONF "-") +add_library(GENERIC_F207ZCTX INTERFACE) +target_compile_options(GENERIC_F207ZCTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207ZCTX_MCU} +) +target_compile_definitions(GENERIC_F207ZCTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207ZCTX" + "BOARD_NAME=\"GENERIC_F207ZCTX\"" + "BOARD_ID=GENERIC_F207ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207ZCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207ZCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207ZCTX INTERFACE + "LINKER:--default-script=${GENERIC_F207ZCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207ZCTX_MCU} +) +target_link_libraries(GENERIC_F207ZCTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207ZCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207ZCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207ZCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207ZCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207ZCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207ZCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207ZCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207ZCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207ZCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207ZCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207ZCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207ZCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207ZCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207ZCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207ZCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207ZCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207ZCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(GENERIC_F207ZETX_MAXSIZE 524288) +set(GENERIC_F207ZETX_MAXDATASIZE 131072) +set(GENERIC_F207ZETX_MCU cortex-m3) +set(GENERIC_F207ZETX_FPCONF "-") +add_library(GENERIC_F207ZETX INTERFACE) +target_compile_options(GENERIC_F207ZETX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207ZETX_MCU} +) +target_compile_definitions(GENERIC_F207ZETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207ZETX" + "BOARD_NAME=\"GENERIC_F207ZETX\"" + "BOARD_ID=GENERIC_F207ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F207ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207ZETX_MCU} +) +target_link_libraries(GENERIC_F207ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F207ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F207ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207ZFTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207ZFTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(GENERIC_F207ZFTX_MAXSIZE 786432) +set(GENERIC_F207ZFTX_MAXDATASIZE 131072) +set(GENERIC_F207ZFTX_MCU cortex-m3) +set(GENERIC_F207ZFTX_FPCONF "-") +add_library(GENERIC_F207ZFTX INTERFACE) +target_compile_options(GENERIC_F207ZFTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207ZFTX_MCU} +) +target_compile_definitions(GENERIC_F207ZFTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207ZFTX" + "BOARD_NAME=\"GENERIC_F207ZFTX\"" + "BOARD_ID=GENERIC_F207ZFTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207ZFTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207ZFTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207ZFTX INTERFACE + "LINKER:--default-script=${GENERIC_F207ZFTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=786432" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207ZFTX_MCU} +) +target_link_libraries(GENERIC_F207ZFTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207ZFTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207ZFTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZFTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207ZFTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207ZFTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207ZFTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207ZFTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207ZFTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207ZFTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207ZFTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207ZFTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207ZFTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207ZFTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207ZFTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZFTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207ZFTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZFTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207ZFTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207ZFTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207ZFTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F207ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F207ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(GENERIC_F207ZGTX_MAXSIZE 1048576) +set(GENERIC_F207ZGTX_MAXDATASIZE 131072) +set(GENERIC_F207ZGTX_MCU cortex-m3) +set(GENERIC_F207ZGTX_FPCONF "-") +add_library(GENERIC_F207ZGTX INTERFACE) +target_compile_options(GENERIC_F207ZGTX INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F207ZGTX_MCU} +) +target_compile_definitions(GENERIC_F207ZGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F207ZGTX" + "BOARD_NAME=\"GENERIC_F207ZGTX\"" + "BOARD_ID=GENERIC_F207ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F207ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F207ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F207ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F207ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F207ZGTX_MCU} +) +target_link_libraries(GENERIC_F207ZGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F207ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F207ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F207ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F207ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F207ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F207ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F207ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F207ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F207ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F207ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F207ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F207ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F207ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F207ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F207ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F207ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F207ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F207ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F215RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F215RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F215RETX_MAXSIZE 524288) +set(GENERIC_F215RETX_MAXDATASIZE 131072) +set(GENERIC_F215RETX_MCU cortex-m3) +set(GENERIC_F215RETX_FPCONF "-") +add_library(GENERIC_F215RETX INTERFACE) +target_compile_options(GENERIC_F215RETX INTERFACE + "SHELL:-DSTM32F215xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F215RETX_MCU} +) +target_compile_definitions(GENERIC_F215RETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F215RETX" + "BOARD_NAME=\"GENERIC_F215RETX\"" + "BOARD_ID=GENERIC_F215RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F215RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F215RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F215RETX INTERFACE + "LINKER:--default-script=${GENERIC_F215RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F215RETX_MCU} +) +target_link_libraries(GENERIC_F215RETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F215RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F215RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F215RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F215RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F215RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F215RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F215RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F215RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F215RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F215RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F215RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F215RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F215RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F215RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F215RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F215RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F215RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F215RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F215RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F215RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F215RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F215RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T") +set(GENERIC_F215RGTX_MAXSIZE 1048576) +set(GENERIC_F215RGTX_MAXDATASIZE 131072) +set(GENERIC_F215RGTX_MCU cortex-m3) +set(GENERIC_F215RGTX_FPCONF "-") +add_library(GENERIC_F215RGTX INTERFACE) +target_compile_options(GENERIC_F215RGTX INTERFACE + "SHELL:-DSTM32F215xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F215RGTX_MCU} +) +target_compile_definitions(GENERIC_F215RGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F215RGTX" + "BOARD_NAME=\"GENERIC_F215RGTX\"" + "BOARD_ID=GENERIC_F215RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F215RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F215RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F215RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F215RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F215RGTX_MCU} +) +target_link_libraries(GENERIC_F215RGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F215RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F215RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F215RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F215RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F215RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F215RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F215RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F215RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F215RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F215RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F215RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F215RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F215RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F215RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F215RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F215RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F215RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F215RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F215RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F215RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F215VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F215VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F215VETX_MAXSIZE 524288) +set(GENERIC_F215VETX_MAXDATASIZE 131072) +set(GENERIC_F215VETX_MCU cortex-m3) +set(GENERIC_F215VETX_FPCONF "-") +add_library(GENERIC_F215VETX INTERFACE) +target_compile_options(GENERIC_F215VETX INTERFACE + "SHELL:-DSTM32F215xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F215VETX_MCU} +) +target_compile_definitions(GENERIC_F215VETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F215VETX" + "BOARD_NAME=\"GENERIC_F215VETX\"" + "BOARD_ID=GENERIC_F215VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F215VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F215VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F215VETX INTERFACE + "LINKER:--default-script=${GENERIC_F215VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F215VETX_MCU} +) +target_link_libraries(GENERIC_F215VETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F215VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F215VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F215VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F215VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F215VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F215VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F215VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F215VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F215VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F215VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F215VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F215VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F215VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F215VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F215VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F215VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F215VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F215VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F215VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F215VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F215VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F215VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T") +set(GENERIC_F215VGTX_MAXSIZE 1048576) +set(GENERIC_F215VGTX_MAXDATASIZE 131072) +set(GENERIC_F215VGTX_MCU cortex-m3) +set(GENERIC_F215VGTX_FPCONF "-") +add_library(GENERIC_F215VGTX INTERFACE) +target_compile_options(GENERIC_F215VGTX INTERFACE + "SHELL:-DSTM32F215xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F215VGTX_MCU} +) +target_compile_definitions(GENERIC_F215VGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F215VGTX" + "BOARD_NAME=\"GENERIC_F215VGTX\"" + "BOARD_ID=GENERIC_F215VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F215VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F215VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F215VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F215VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F215VGTX_MCU} +) +target_link_libraries(GENERIC_F215VGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F215VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F215VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F215VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F215VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F215VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F215VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F215VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F215VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F215VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F215VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F215VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F215VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F215VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F215VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F215VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F215VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F215VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F215VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F215VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F215VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F215ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F215ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T") +set(GENERIC_F215ZETX_MAXSIZE 524288) +set(GENERIC_F215ZETX_MAXDATASIZE 131072) +set(GENERIC_F215ZETX_MCU cortex-m3) +set(GENERIC_F215ZETX_FPCONF "-") +add_library(GENERIC_F215ZETX INTERFACE) +target_compile_options(GENERIC_F215ZETX INTERFACE + "SHELL:-DSTM32F215xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F215ZETX_MCU} +) +target_compile_definitions(GENERIC_F215ZETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F215ZETX" + "BOARD_NAME=\"GENERIC_F215ZETX\"" + "BOARD_ID=GENERIC_F215ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F215ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F215ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F215ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F215ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F215ZETX_MCU} +) +target_link_libraries(GENERIC_F215ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F215ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F215ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F215ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F215ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F215ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F215ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F215ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F215ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F215ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F215ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F215ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F215ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F215ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F215ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F215ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F215ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F215ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F215ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F215ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F215ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F215ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F215ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T") +set(GENERIC_F215ZGTX_MAXSIZE 1048576) +set(GENERIC_F215ZGTX_MAXDATASIZE 131072) +set(GENERIC_F215ZGTX_MCU cortex-m3) +set(GENERIC_F215ZGTX_FPCONF "-") +add_library(GENERIC_F215ZGTX INTERFACE) +target_compile_options(GENERIC_F215ZGTX INTERFACE + "SHELL:-DSTM32F215xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F215ZGTX_MCU} +) +target_compile_definitions(GENERIC_F215ZGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F215ZGTX" + "BOARD_NAME=\"GENERIC_F215ZGTX\"" + "BOARD_ID=GENERIC_F215ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F215ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F215ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F215ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F215ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F215ZGTX_MCU} +) +target_link_libraries(GENERIC_F215ZGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F215ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F215ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F215ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F215ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F215ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F215ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F215ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F215ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F215ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F215ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F215ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F215ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F215ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F215ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F215ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F215ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F215ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F215ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F215ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F215ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217IEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217IEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F217IEHX_MAXSIZE 524288) +set(GENERIC_F217IEHX_MAXDATASIZE 131072) +set(GENERIC_F217IEHX_MCU cortex-m3) +set(GENERIC_F217IEHX_FPCONF "-") +add_library(GENERIC_F217IEHX INTERFACE) +target_compile_options(GENERIC_F217IEHX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217IEHX_MCU} +) +target_compile_definitions(GENERIC_F217IEHX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217IEHX" + "BOARD_NAME=\"GENERIC_F217IEHX\"" + "BOARD_ID=GENERIC_F217IEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217IEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217IEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217IEHX INTERFACE + "LINKER:--default-script=${GENERIC_F217IEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217IEHX_MCU} +) +target_link_libraries(GENERIC_F217IEHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217IEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217IEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217IEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217IEHX_serial_none INTERFACE) +target_compile_options(GENERIC_F217IEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217IEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217IEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217IEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217IEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217IEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217IEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217IEHX_usb_none INTERFACE) +target_compile_options(GENERIC_F217IEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217IEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217IEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217IEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217IEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217IETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217IETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F217IETX_MAXSIZE 524288) +set(GENERIC_F217IETX_MAXDATASIZE 131072) +set(GENERIC_F217IETX_MCU cortex-m3) +set(GENERIC_F217IETX_FPCONF "-") +add_library(GENERIC_F217IETX INTERFACE) +target_compile_options(GENERIC_F217IETX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217IETX_MCU} +) +target_compile_definitions(GENERIC_F217IETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217IETX" + "BOARD_NAME=\"GENERIC_F217IETX\"" + "BOARD_ID=GENERIC_F217IETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217IETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217IETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217IETX INTERFACE + "LINKER:--default-script=${GENERIC_F217IETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217IETX_MCU} +) +target_link_libraries(GENERIC_F217IETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217IETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217IETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217IETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217IETX_serial_none INTERFACE) +target_compile_options(GENERIC_F217IETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217IETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217IETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217IETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217IETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217IETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217IETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217IETX_usb_none INTERFACE) +target_compile_options(GENERIC_F217IETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217IETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217IETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217IETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217IETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217IGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217IGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F217IGHX_MAXSIZE 1048576) +set(GENERIC_F217IGHX_MAXDATASIZE 131072) +set(GENERIC_F217IGHX_MCU cortex-m3) +set(GENERIC_F217IGHX_FPCONF "-") +add_library(GENERIC_F217IGHX INTERFACE) +target_compile_options(GENERIC_F217IGHX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217IGHX_MCU} +) +target_compile_definitions(GENERIC_F217IGHX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217IGHX" + "BOARD_NAME=\"GENERIC_F217IGHX\"" + "BOARD_ID=GENERIC_F217IGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217IGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217IGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217IGHX INTERFACE + "LINKER:--default-script=${GENERIC_F217IGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217IGHX_MCU} +) +target_link_libraries(GENERIC_F217IGHX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217IGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217IGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217IGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217IGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F217IGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217IGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217IGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217IGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217IGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217IGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217IGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217IGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F217IGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217IGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217IGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217IGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217IGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)") +set(GENERIC_F217IGTX_MAXSIZE 1048576) +set(GENERIC_F217IGTX_MAXDATASIZE 131072) +set(GENERIC_F217IGTX_MCU cortex-m3) +set(GENERIC_F217IGTX_FPCONF "-") +add_library(GENERIC_F217IGTX INTERFACE) +target_compile_options(GENERIC_F217IGTX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217IGTX_MCU} +) +target_compile_definitions(GENERIC_F217IGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217IGTX" + "BOARD_NAME=\"GENERIC_F217IGTX\"" + "BOARD_ID=GENERIC_F217IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217IGTX INTERFACE + "LINKER:--default-script=${GENERIC_F217IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217IGTX_MCU} +) +target_link_libraries(GENERIC_F217IGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F217IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F217IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T") +set(GENERIC_F217VETX_MAXSIZE 524288) +set(GENERIC_F217VETX_MAXDATASIZE 131072) +set(GENERIC_F217VETX_MCU cortex-m3) +set(GENERIC_F217VETX_FPCONF "-") +add_library(GENERIC_F217VETX INTERFACE) +target_compile_options(GENERIC_F217VETX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217VETX_MCU} +) +target_compile_definitions(GENERIC_F217VETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217VETX" + "BOARD_NAME=\"GENERIC_F217VETX\"" + "BOARD_ID=GENERIC_F217VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217VETX INTERFACE + "LINKER:--default-script=${GENERIC_F217VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217VETX_MCU} +) +target_link_libraries(GENERIC_F217VETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F217VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F217VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T") +set(GENERIC_F217VGTX_MAXSIZE 1048576) +set(GENERIC_F217VGTX_MAXDATASIZE 131072) +set(GENERIC_F217VGTX_MCU cortex-m3) +set(GENERIC_F217VGTX_FPCONF "-") +add_library(GENERIC_F217VGTX INTERFACE) +target_compile_options(GENERIC_F217VGTX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217VGTX_MCU} +) +target_compile_definitions(GENERIC_F217VGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217VGTX" + "BOARD_NAME=\"GENERIC_F217VGTX\"" + "BOARD_ID=GENERIC_F217VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F217VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217VGTX_MCU} +) +target_link_libraries(GENERIC_F217VGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F217VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F217VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(GENERIC_F217ZETX_MAXSIZE 524288) +set(GENERIC_F217ZETX_MAXDATASIZE 131072) +set(GENERIC_F217ZETX_MCU cortex-m3) +set(GENERIC_F217ZETX_FPCONF "-") +add_library(GENERIC_F217ZETX INTERFACE) +target_compile_options(GENERIC_F217ZETX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217ZETX_MCU} +) +target_compile_definitions(GENERIC_F217ZETX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217ZETX" + "BOARD_NAME=\"GENERIC_F217ZETX\"" + "BOARD_ID=GENERIC_F217ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F217ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217ZETX_MCU} +) +target_link_libraries(GENERIC_F217ZETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F217ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F217ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F217ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F217ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(GENERIC_F217ZGTX_MAXSIZE 1048576) +set(GENERIC_F217ZGTX_MAXDATASIZE 131072) +set(GENERIC_F217ZGTX_MCU cortex-m3) +set(GENERIC_F217ZGTX_FPCONF "-") +add_library(GENERIC_F217ZGTX INTERFACE) +target_compile_options(GENERIC_F217ZGTX INTERFACE + "SHELL:-DSTM32F217xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_F217ZGTX_MCU} +) +target_compile_definitions(GENERIC_F217ZGTX INTERFACE + "STM32F2xx" + "ARDUINO_GENERIC_F217ZGTX" + "BOARD_NAME=\"GENERIC_F217ZGTX\"" + "BOARD_ID=GENERIC_F217ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F217ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${GENERIC_F217ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F217ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F217ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${GENERIC_F217ZGTX_MCU} +) +target_link_libraries(GENERIC_F217ZGTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_F217ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F217ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F217ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F217ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F217ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F217ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F217ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F217ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F217ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F217ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F217ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F217ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F217ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F217ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F217ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F217ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F217ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F217ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F217ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F217ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301C6T_F301C8(T-Y)") +set(GENERIC_F301C6TX_MAXSIZE 32768) +set(GENERIC_F301C6TX_MAXDATASIZE 16384) +set(GENERIC_F301C6TX_MCU cortex-m4) +set(GENERIC_F301C6TX_FPCONF "-") +add_library(GENERIC_F301C6TX INTERFACE) +target_compile_options(GENERIC_F301C6TX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301C6TX_MCU} +) +target_compile_definitions(GENERIC_F301C6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301C6TX" + "BOARD_NAME=\"GENERIC_F301C6TX\"" + "BOARD_ID=GENERIC_F301C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F301C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301C6TX_MCU} +) +target_link_libraries(GENERIC_F301C6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F301C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F301C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301C6T_F301C8(T-Y)") +set(GENERIC_F301C8TX_MAXSIZE 65536) +set(GENERIC_F301C8TX_MAXDATASIZE 16384) +set(GENERIC_F301C8TX_MCU cortex-m4) +set(GENERIC_F301C8TX_FPCONF "-") +add_library(GENERIC_F301C8TX INTERFACE) +target_compile_options(GENERIC_F301C8TX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301C8TX_MCU} +) +target_compile_definitions(GENERIC_F301C8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301C8TX" + "BOARD_NAME=\"GENERIC_F301C8TX\"" + "BOARD_ID=GENERIC_F301C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F301C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301C8TX_MCU} +) +target_link_libraries(GENERIC_F301C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F301C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F301C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301C8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301C8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301C6T_F301C8(T-Y)") +set(GENERIC_F301C8YX_MAXSIZE 65536) +set(GENERIC_F301C8YX_MAXDATASIZE 16384) +set(GENERIC_F301C8YX_MCU cortex-m4) +set(GENERIC_F301C8YX_FPCONF "-") +add_library(GENERIC_F301C8YX INTERFACE) +target_compile_options(GENERIC_F301C8YX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301C8YX_MCU} +) +target_compile_definitions(GENERIC_F301C8YX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301C8YX" + "BOARD_NAME=\"GENERIC_F301C8YX\"" + "BOARD_ID=GENERIC_F301C8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301C8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301C8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301C8YX INTERFACE + "LINKER:--default-script=${GENERIC_F301C8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301C8YX_MCU} +) +target_link_libraries(GENERIC_F301C8YX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301C8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301C8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301C8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301C8YX_serial_none INTERFACE) +target_compile_options(GENERIC_F301C8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301C8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301C8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301C8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301C8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301C8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301C8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301C8YX_usb_none INTERFACE) +target_compile_options(GENERIC_F301C8YX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C8YX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301C8YX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301C8YX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301C8YX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301C8YX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301C8YX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301K(6-8)T") +set(GENERIC_F301K6TX_MAXSIZE 32768) +set(GENERIC_F301K6TX_MAXDATASIZE 16384) +set(GENERIC_F301K6TX_MCU cortex-m4) +set(GENERIC_F301K6TX_FPCONF "-") +add_library(GENERIC_F301K6TX INTERFACE) +target_compile_options(GENERIC_F301K6TX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301K6TX_MCU} +) +target_compile_definitions(GENERIC_F301K6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301K6TX" + "BOARD_NAME=\"GENERIC_F301K6TX\"" + "BOARD_ID=GENERIC_F301K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301K6TX INTERFACE + "LINKER:--default-script=${GENERIC_F301K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301K6TX_MCU} +) +target_link_libraries(GENERIC_F301K6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F301K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F301K6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301K6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301K6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301K6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301K6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301K6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301K6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301K(6-8)T") +set(GENERIC_F301K8TX_MAXSIZE 65536) +set(GENERIC_F301K8TX_MAXDATASIZE 16384) +set(GENERIC_F301K8TX_MCU cortex-m4) +set(GENERIC_F301K8TX_FPCONF "-") +add_library(GENERIC_F301K8TX INTERFACE) +target_compile_options(GENERIC_F301K8TX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301K8TX_MCU} +) +target_compile_definitions(GENERIC_F301K8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301K8TX" + "BOARD_NAME=\"GENERIC_F301K8TX\"" + "BOARD_ID=GENERIC_F301K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301K8TX INTERFACE + "LINKER:--default-script=${GENERIC_F301K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301K8TX_MCU} +) +target_link_libraries(GENERIC_F301K8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F301K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F301K8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301K8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301K8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301K8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301K8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301K8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301K8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301R(6-8)T") +set(GENERIC_F301R6TX_MAXSIZE 32768) +set(GENERIC_F301R6TX_MAXDATASIZE 16384) +set(GENERIC_F301R6TX_MCU cortex-m4) +set(GENERIC_F301R6TX_FPCONF "-") +add_library(GENERIC_F301R6TX INTERFACE) +target_compile_options(GENERIC_F301R6TX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301R6TX_MCU} +) +target_compile_definitions(GENERIC_F301R6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301R6TX" + "BOARD_NAME=\"GENERIC_F301R6TX\"" + "BOARD_ID=GENERIC_F301R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301R6TX INTERFACE + "LINKER:--default-script=${GENERIC_F301R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301R6TX_MCU} +) +target_link_libraries(GENERIC_F301R6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F301R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F301R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F301R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F301R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F301R(6-8)T") +set(GENERIC_F301R8TX_MAXSIZE 65536) +set(GENERIC_F301R8TX_MAXDATASIZE 16384) +set(GENERIC_F301R8TX_MCU cortex-m4) +set(GENERIC_F301R8TX_FPCONF "-") +add_library(GENERIC_F301R8TX INTERFACE) +target_compile_options(GENERIC_F301R8TX INTERFACE + "SHELL:-DSTM32F301x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301R8TX_MCU} +) +target_compile_definitions(GENERIC_F301R8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F301R8TX" + "BOARD_NAME=\"GENERIC_F301R8TX\"" + "BOARD_ID=GENERIC_F301R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F301R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F301R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F301R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F301R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F301R8TX_MCU} +) +target_link_libraries(GENERIC_F301R8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F301R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F301R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F301R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F301R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F301R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F301R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F301R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F301R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F301R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F301R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F301R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F301R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F301R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F301R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F301R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F301R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F301R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F301R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F301R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F301R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F302R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F302R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F302R(6-8)T") +set(GENERIC_F302R6TX_MAXSIZE 32768) +set(GENERIC_F302R6TX_MAXDATASIZE 16384) +set(GENERIC_F302R6TX_MCU cortex-m4) +set(GENERIC_F302R6TX_FPCONF "-") +add_library(GENERIC_F302R6TX INTERFACE) +target_compile_options(GENERIC_F302R6TX INTERFACE + "SHELL:-DSTM32F302x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F302R6TX_MCU} +) +target_compile_definitions(GENERIC_F302R6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F302R6TX" + "BOARD_NAME=\"GENERIC_F302R6TX\"" + "BOARD_ID=GENERIC_F302R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F302R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F302R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F302R6TX INTERFACE + "LINKER:--default-script=${GENERIC_F302R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F302R6TX_MCU} +) +target_link_libraries(GENERIC_F302R6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F302R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F302R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F302R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F302R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F302R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F302R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F302R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F302R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F302R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F302R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F302R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F302R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F302R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F302R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F302R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F302R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F302R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F302R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F302R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F302R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F302R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F302R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F302R(6-8)T") +set(GENERIC_F302R8TX_MAXSIZE 65536) +set(GENERIC_F302R8TX_MAXDATASIZE 16384) +set(GENERIC_F302R8TX_MCU cortex-m4) +set(GENERIC_F302R8TX_FPCONF "-") +add_library(GENERIC_F302R8TX INTERFACE) +target_compile_options(GENERIC_F302R8TX INTERFACE + "SHELL:-DSTM32F302x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F302R8TX_MCU} +) +target_compile_definitions(GENERIC_F302R8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F302R8TX" + "BOARD_NAME=\"GENERIC_F302R8TX\"" + "BOARD_ID=GENERIC_F302R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F302R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F302R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F302R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F302R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F302R8TX_MCU} +) +target_link_libraries(GENERIC_F302R8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F302R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F302R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F302R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F302R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F302R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F302R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F302R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F302R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F302R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F302R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F302R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F302R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F302R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F302R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F302R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F302R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F302R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F302R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F302R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F302R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T") +set(GENERIC_F303C6TX_MAXSIZE 32768) +set(GENERIC_F303C6TX_MAXDATASIZE 12288) +set(GENERIC_F303C6TX_MCU cortex-m4) +set(GENERIC_F303C6TX_FPCONF "-") +add_library(GENERIC_F303C6TX INTERFACE) +target_compile_options(GENERIC_F303C6TX INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303C6TX_MCU} +) +target_compile_definitions(GENERIC_F303C6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303C6TX" + "BOARD_NAME=\"GENERIC_F303C6TX\"" + "BOARD_ID=GENERIC_F303C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F303C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303C6TX_MCU} +) +target_link_libraries(GENERIC_F303C6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F303C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F303C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T") +set(GENERIC_F303C8TX_MAXSIZE 65536) +set(GENERIC_F303C8TX_MAXDATASIZE 12288) +set(GENERIC_F303C8TX_MCU cortex-m4) +set(GENERIC_F303C8TX_FPCONF "-") +add_library(GENERIC_F303C8TX INTERFACE) +target_compile_options(GENERIC_F303C8TX INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303C8TX_MCU} +) +target_compile_definitions(GENERIC_F303C8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303C8TX" + "BOARD_NAME=\"GENERIC_F303C8TX\"" + "BOARD_ID=GENERIC_F303C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F303C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303C8TX_MCU} +) +target_link_libraries(GENERIC_F303C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F303C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F303C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(GENERIC_F303CBTX_MAXSIZE 131072) +set(GENERIC_F303CBTX_MAXDATASIZE 32768) +set(GENERIC_F303CBTX_MCU cortex-m4) +set(GENERIC_F303CBTX_FPCONF "-") +add_library(GENERIC_F303CBTX INTERFACE) +target_compile_options(GENERIC_F303CBTX INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303CBTX_MCU} +) +target_compile_definitions(GENERIC_F303CBTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303CBTX" + "BOARD_NAME=\"GENERIC_F303CBTX\"" + "BOARD_ID=GENERIC_F303CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F303CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303CBTX_MCU} +) +target_link_libraries(GENERIC_F303CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(GENERIC_F303CCTX_MAXSIZE 262144) +set(GENERIC_F303CCTX_MAXDATASIZE 40960) +set(GENERIC_F303CCTX_MCU cortex-m4) +set(GENERIC_F303CCTX_FPCONF "-") +add_library(GENERIC_F303CCTX INTERFACE) +target_compile_options(GENERIC_F303CCTX INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303CCTX_MCU} +) +target_compile_definitions(GENERIC_F303CCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303CCTX" + "BOARD_NAME=\"GENERIC_F303CCTX\"" + "BOARD_ID=GENERIC_F303CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303CCTX INTERFACE + "LINKER:--default-script=${GENERIC_F303CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303CCTX_MCU} +) +target_link_libraries(GENERIC_F303CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T") +set(GENERIC_F303K6TX_MAXSIZE 32768) +set(GENERIC_F303K6TX_MAXDATASIZE 12288) +set(GENERIC_F303K6TX_MCU cortex-m4) +set(GENERIC_F303K6TX_FPCONF "-") +add_library(GENERIC_F303K6TX INTERFACE) +target_compile_options(GENERIC_F303K6TX INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303K6TX_MCU} +) +target_compile_definitions(GENERIC_F303K6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303K6TX" + "BOARD_NAME=\"GENERIC_F303K6TX\"" + "BOARD_ID=GENERIC_F303K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303K6TX INTERFACE + "LINKER:--default-script=${GENERIC_F303K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303K6TX_MCU} +) +target_link_libraries(GENERIC_F303K6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F303K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F303K6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303K6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303K6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303K6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303K6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303K6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303K6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T") +set(GENERIC_F303K8TX_MAXSIZE 65536) +set(GENERIC_F303K8TX_MAXDATASIZE 12288) +set(GENERIC_F303K8TX_MCU cortex-m4) +set(GENERIC_F303K8TX_FPCONF "-") +add_library(GENERIC_F303K8TX INTERFACE) +target_compile_options(GENERIC_F303K8TX INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303K8TX_MCU} +) +target_compile_definitions(GENERIC_F303K8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303K8TX" + "BOARD_NAME=\"GENERIC_F303K8TX\"" + "BOARD_ID=GENERIC_F303K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303K8TX INTERFACE + "LINKER:--default-script=${GENERIC_F303K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303K8TX_MCU} +) +target_link_libraries(GENERIC_F303K8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F303K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F303K8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303K8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303K8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303K8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303K8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303K8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303K8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T") +set(GENERIC_F303R6TX_MAXSIZE 32768) +set(GENERIC_F303R6TX_MAXDATASIZE 12288) +set(GENERIC_F303R6TX_MCU cortex-m4) +set(GENERIC_F303R6TX_FPCONF "-") +add_library(GENERIC_F303R6TX INTERFACE) +target_compile_options(GENERIC_F303R6TX INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303R6TX_MCU} +) +target_compile_definitions(GENERIC_F303R6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303R6TX" + "BOARD_NAME=\"GENERIC_F303R6TX\"" + "BOARD_ID=GENERIC_F303R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303R6TX INTERFACE + "LINKER:--default-script=${GENERIC_F303R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303R6TX_MCU} +) +target_link_libraries(GENERIC_F303R6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F303R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F303R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T") +set(GENERIC_F303R8TX_MAXSIZE 65536) +set(GENERIC_F303R8TX_MAXDATASIZE 12288) +set(GENERIC_F303R8TX_MCU cortex-m4) +set(GENERIC_F303R8TX_FPCONF "-") +add_library(GENERIC_F303R8TX INTERFACE) +target_compile_options(GENERIC_F303R8TX INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303R8TX_MCU} +) +target_compile_definitions(GENERIC_F303R8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303R8TX" + "BOARD_NAME=\"GENERIC_F303R8TX\"" + "BOARD_ID=GENERIC_F303R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F303R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303R8TX_MCU} +) +target_link_libraries(GENERIC_F303R8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F303R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F303R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(B-C)T") +set(GENERIC_F303RBTX_MAXSIZE 131072) +set(GENERIC_F303RBTX_MAXDATASIZE 32768) +set(GENERIC_F303RBTX_MCU cortex-m4) +set(GENERIC_F303RBTX_FPCONF "-") +add_library(GENERIC_F303RBTX INTERFACE) +target_compile_options(GENERIC_F303RBTX INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RBTX_MCU} +) +target_compile_definitions(GENERIC_F303RBTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303RBTX" + "BOARD_NAME=\"GENERIC_F303RBTX\"" + "BOARD_ID=GENERIC_F303RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F303RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RBTX_MCU} +) +target_link_libraries(GENERIC_F303RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(B-C)T") +set(GENERIC_F303RCTX_MAXSIZE 262144) +set(GENERIC_F303RCTX_MAXDATASIZE 40960) +set(GENERIC_F303RCTX_MCU cortex-m4) +set(GENERIC_F303RCTX_FPCONF "-") +add_library(GENERIC_F303RCTX INTERFACE) +target_compile_options(GENERIC_F303RCTX INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RCTX_MCU} +) +target_compile_definitions(GENERIC_F303RCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303RCTX" + "BOARD_NAME=\"GENERIC_F303RCTX\"" + "BOARD_ID=GENERIC_F303RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F303RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RCTX_MCU} +) +target_link_libraries(GENERIC_F303RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303RDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303RDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(D-E)T") +set(GENERIC_F303RDTX_MAXSIZE 393216) +set(GENERIC_F303RDTX_MAXDATASIZE 65536) +set(GENERIC_F303RDTX_MCU cortex-m4) +set(GENERIC_F303RDTX_FPCONF "-") +add_library(GENERIC_F303RDTX INTERFACE) +target_compile_options(GENERIC_F303RDTX INTERFACE + "SHELL:-DSTM32F303xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RDTX_MCU} +) +target_compile_definitions(GENERIC_F303RDTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303RDTX" + "BOARD_NAME=\"GENERIC_F303RDTX\"" + "BOARD_ID=GENERIC_F303RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303RDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303RDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303RDTX INTERFACE + "LINKER:--default-script=${GENERIC_F303RDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RDTX_MCU} +) +target_link_libraries(GENERIC_F303RDTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303RDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303RDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303RDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303RDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303RDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303RDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303RDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303RDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303RDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303RDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303RDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303RDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303RDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303RDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303RDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303RDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303RDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(D-E)T") +set(GENERIC_F303RETX_MAXSIZE 524288) +set(GENERIC_F303RETX_MAXDATASIZE 65536) +set(GENERIC_F303RETX_MCU cortex-m4) +set(GENERIC_F303RETX_FPCONF "-") +add_library(GENERIC_F303RETX INTERFACE) +target_compile_options(GENERIC_F303RETX INTERFACE + "SHELL:-DSTM32F303xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RETX_MCU} +) +target_compile_definitions(GENERIC_F303RETX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303RETX" + "BOARD_NAME=\"GENERIC_F303RETX\"" + "BOARD_ID=GENERIC_F303RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303RETX INTERFACE + "LINKER:--default-script=${GENERIC_F303RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303RETX_MCU} +) +target_link_libraries(GENERIC_F303RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F303RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F303RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303V(B-C)T") +set(GENERIC_F303VBTX_MAXSIZE 131072) +set(GENERIC_F303VBTX_MAXDATASIZE 32768) +set(GENERIC_F303VBTX_MCU cortex-m4) +set(GENERIC_F303VBTX_FPCONF "-") +add_library(GENERIC_F303VBTX INTERFACE) +target_compile_options(GENERIC_F303VBTX INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303VBTX_MCU} +) +target_compile_definitions(GENERIC_F303VBTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303VBTX" + "BOARD_NAME=\"GENERIC_F303VBTX\"" + "BOARD_ID=GENERIC_F303VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F303VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303VBTX_MCU} +) +target_link_libraries(GENERIC_F303VBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F303VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F303VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303V(B-C)T") +set(GENERIC_F303VCTX_MAXSIZE 262144) +set(GENERIC_F303VCTX_MAXDATASIZE 40960) +set(GENERIC_F303VCTX_MCU cortex-m4) +set(GENERIC_F303VCTX_FPCONF "-") +add_library(GENERIC_F303VCTX INTERFACE) +target_compile_options(GENERIC_F303VCTX INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303VCTX_MCU} +) +target_compile_definitions(GENERIC_F303VCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F303VCTX" + "BOARD_NAME=\"GENERIC_F303VCTX\"" + "BOARD_ID=GENERIC_F303VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F303VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F303VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F303VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F303VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F303VCTX_MCU} +) +target_link_libraries(GENERIC_F303VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F303VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F303VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F303VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F303VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F303VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F303VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F303VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F303VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F303VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F303VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F303VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F303VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F303VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F303VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F303VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F303VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F303VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F303VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F303VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F303VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F318C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F318C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F318C8(T-Y)") +set(GENERIC_F318C8TX_MAXSIZE 65536) +set(GENERIC_F318C8TX_MAXDATASIZE 16384) +set(GENERIC_F318C8TX_MCU cortex-m4) +set(GENERIC_F318C8TX_FPCONF "-") +add_library(GENERIC_F318C8TX INTERFACE) +target_compile_options(GENERIC_F318C8TX INTERFACE + "SHELL:-DSTM32F318xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F318C8TX_MCU} +) +target_compile_definitions(GENERIC_F318C8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F318C8TX" + "BOARD_NAME=\"GENERIC_F318C8TX\"" + "BOARD_ID=GENERIC_F318C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F318C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F318C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F318C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F318C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F318C8TX_MCU} +) +target_link_libraries(GENERIC_F318C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F318C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F318C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F318C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F318C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F318C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F318C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F318C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F318C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F318C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F318C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F318C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F318C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F318C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F318C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F318C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F318C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F318C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F318C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F318C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F318C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F318C8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F318C8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F318C8(T-Y)") +set(GENERIC_F318C8YX_MAXSIZE 65536) +set(GENERIC_F318C8YX_MAXDATASIZE 16384) +set(GENERIC_F318C8YX_MCU cortex-m4) +set(GENERIC_F318C8YX_FPCONF "-") +add_library(GENERIC_F318C8YX INTERFACE) +target_compile_options(GENERIC_F318C8YX INTERFACE + "SHELL:-DSTM32F318xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F318C8YX_MCU} +) +target_compile_definitions(GENERIC_F318C8YX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F318C8YX" + "BOARD_NAME=\"GENERIC_F318C8YX\"" + "BOARD_ID=GENERIC_F318C8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F318C8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F318C8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F318C8YX INTERFACE + "LINKER:--default-script=${GENERIC_F318C8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F318C8YX_MCU} +) +target_link_libraries(GENERIC_F318C8YX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F318C8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F318C8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F318C8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F318C8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F318C8YX_serial_none INTERFACE) +target_compile_options(GENERIC_F318C8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F318C8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F318C8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F318C8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F318C8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F318C8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F318C8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F318C8YX_usb_none INTERFACE) +target_compile_options(GENERIC_F318C8YX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F318C8YX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F318C8YX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F318C8YX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F318C8YX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F318C8YX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F318C8YX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F318K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F318K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F318K8U") +set(GENERIC_F318K8UX_MAXSIZE 65536) +set(GENERIC_F318K8UX_MAXDATASIZE 16384) +set(GENERIC_F318K8UX_MCU cortex-m4) +set(GENERIC_F318K8UX_FPCONF "-") +add_library(GENERIC_F318K8UX INTERFACE) +target_compile_options(GENERIC_F318K8UX INTERFACE + "SHELL:-DSTM32F318xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F318K8UX_MCU} +) +target_compile_definitions(GENERIC_F318K8UX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F318K8UX" + "BOARD_NAME=\"GENERIC_F318K8UX\"" + "BOARD_ID=GENERIC_F318K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F318K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F318K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F318K8UX INTERFACE + "LINKER:--default-script=${GENERIC_F318K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F318K8UX_MCU} +) +target_link_libraries(GENERIC_F318K8UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F318K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F318K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F318K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F318K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F318K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F318K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F318K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F318K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F318K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F318K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F318K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F318K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F318K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F318K8UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F318K8UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F318K8UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F318K8UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F318K8UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F318K8UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F318K8UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F328C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F328C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F328C8T") +set(GENERIC_F328C8TX_MAXSIZE 65536) +set(GENERIC_F328C8TX_MAXDATASIZE 12288) +set(GENERIC_F328C8TX_MCU cortex-m4) +set(GENERIC_F328C8TX_FPCONF "-") +add_library(GENERIC_F328C8TX INTERFACE) +target_compile_options(GENERIC_F328C8TX INTERFACE + "SHELL:-DSTM32F328xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F328C8TX_MCU} +) +target_compile_definitions(GENERIC_F328C8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F328C8TX" + "BOARD_NAME=\"GENERIC_F328C8TX\"" + "BOARD_ID=GENERIC_F328C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F328C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F328C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F328C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F328C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F328C8TX_MCU} +) +target_link_libraries(GENERIC_F328C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F328C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F328C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F328C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F328C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F328C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F328C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F328C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F328C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F328C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F328C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F328C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F328C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F328C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F328C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F328C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F328C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F328C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F328C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F328C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F328C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T") +set(GENERIC_F334C4TX_MAXSIZE 16384) +set(GENERIC_F334C4TX_MAXDATASIZE 12288) +set(GENERIC_F334C4TX_MCU cortex-m4) +set(GENERIC_F334C4TX_FPCONF "-") +add_library(GENERIC_F334C4TX INTERFACE) +target_compile_options(GENERIC_F334C4TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334C4TX_MCU} +) +target_compile_definitions(GENERIC_F334C4TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334C4TX" + "BOARD_NAME=\"GENERIC_F334C4TX\"" + "BOARD_ID=GENERIC_F334C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334C4TX INTERFACE + "LINKER:--default-script=${GENERIC_F334C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334C4TX_MCU} +) +target_link_libraries(GENERIC_F334C4TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334C4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334C4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334C4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334C4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334C4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T") +set(GENERIC_F334C6TX_MAXSIZE 32768) +set(GENERIC_F334C6TX_MAXDATASIZE 12288) +set(GENERIC_F334C6TX_MCU cortex-m4) +set(GENERIC_F334C6TX_FPCONF "-") +add_library(GENERIC_F334C6TX INTERFACE) +target_compile_options(GENERIC_F334C6TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334C6TX_MCU} +) +target_compile_definitions(GENERIC_F334C6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334C6TX" + "BOARD_NAME=\"GENERIC_F334C6TX\"" + "BOARD_ID=GENERIC_F334C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334C6TX INTERFACE + "LINKER:--default-script=${GENERIC_F334C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334C6TX_MCU} +) +target_link_libraries(GENERIC_F334C6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T") +set(GENERIC_F334C8TX_MAXSIZE 65536) +set(GENERIC_F334C8TX_MAXDATASIZE 12288) +set(GENERIC_F334C8TX_MCU cortex-m4) +set(GENERIC_F334C8TX_FPCONF "-") +add_library(GENERIC_F334C8TX INTERFACE) +target_compile_options(GENERIC_F334C8TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334C8TX_MCU} +) +target_compile_definitions(GENERIC_F334C8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334C8TX" + "BOARD_NAME=\"GENERIC_F334C8TX\"" + "BOARD_ID=GENERIC_F334C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F334C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334C8TX_MCU} +) +target_link_libraries(GENERIC_F334C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T") +set(GENERIC_F334K4TX_MAXSIZE 16384) +set(GENERIC_F334K4TX_MAXDATASIZE 12288) +set(GENERIC_F334K4TX_MCU cortex-m4) +set(GENERIC_F334K4TX_FPCONF "-") +add_library(GENERIC_F334K4TX INTERFACE) +target_compile_options(GENERIC_F334K4TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334K4TX_MCU} +) +target_compile_definitions(GENERIC_F334K4TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334K4TX" + "BOARD_NAME=\"GENERIC_F334K4TX\"" + "BOARD_ID=GENERIC_F334K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334K4TX INTERFACE + "LINKER:--default-script=${GENERIC_F334K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334K4TX_MCU} +) +target_link_libraries(GENERIC_F334K4TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334K4TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K4TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334K4TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K4TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334K4TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334K4TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334K4TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T") +set(GENERIC_F334K6TX_MAXSIZE 32768) +set(GENERIC_F334K6TX_MAXDATASIZE 12288) +set(GENERIC_F334K6TX_MCU cortex-m4) +set(GENERIC_F334K6TX_FPCONF "-") +add_library(GENERIC_F334K6TX INTERFACE) +target_compile_options(GENERIC_F334K6TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334K6TX_MCU} +) +target_compile_definitions(GENERIC_F334K6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334K6TX" + "BOARD_NAME=\"GENERIC_F334K6TX\"" + "BOARD_ID=GENERIC_F334K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334K6TX INTERFACE + "LINKER:--default-script=${GENERIC_F334K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334K6TX_MCU} +) +target_link_libraries(GENERIC_F334K6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334K6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334K6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334K6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334K6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334K6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T") +set(GENERIC_F334K8TX_MAXSIZE 65536) +set(GENERIC_F334K8TX_MAXDATASIZE 12288) +set(GENERIC_F334K8TX_MCU cortex-m4) +set(GENERIC_F334K8TX_FPCONF "-") +add_library(GENERIC_F334K8TX INTERFACE) +target_compile_options(GENERIC_F334K8TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334K8TX_MCU} +) +target_compile_definitions(GENERIC_F334K8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334K8TX" + "BOARD_NAME=\"GENERIC_F334K8TX\"" + "BOARD_ID=GENERIC_F334K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334K8TX INTERFACE + "LINKER:--default-script=${GENERIC_F334K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334K8TX_MCU} +) +target_link_libraries(GENERIC_F334K8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334K8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334K8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334K8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334K8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334K8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334K8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T") +set(GENERIC_F334R6TX_MAXSIZE 32768) +set(GENERIC_F334R6TX_MAXDATASIZE 12288) +set(GENERIC_F334R6TX_MCU cortex-m4) +set(GENERIC_F334R6TX_FPCONF "-") +add_library(GENERIC_F334R6TX INTERFACE) +target_compile_options(GENERIC_F334R6TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334R6TX_MCU} +) +target_compile_definitions(GENERIC_F334R6TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334R6TX" + "BOARD_NAME=\"GENERIC_F334R6TX\"" + "BOARD_ID=GENERIC_F334R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334R6TX INTERFACE + "LINKER:--default-script=${GENERIC_F334R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334R6TX_MCU} +) +target_link_libraries(GENERIC_F334R6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F334R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F334R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T") +set(GENERIC_F334R8TX_MAXSIZE 65536) +set(GENERIC_F334R8TX_MAXDATASIZE 12288) +set(GENERIC_F334R8TX_MCU cortex-m4) +set(GENERIC_F334R8TX_FPCONF "-") +add_library(GENERIC_F334R8TX INTERFACE) +target_compile_options(GENERIC_F334R8TX INTERFACE + "SHELL:-DSTM32F334x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334R8TX_MCU} +) +target_compile_definitions(GENERIC_F334R8TX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F334R8TX" + "BOARD_NAME=\"GENERIC_F334R8TX\"" + "BOARD_ID=GENERIC_F334R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F334R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F334R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F334R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F334R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F334R8TX_MCU} +) +target_link_libraries(GENERIC_F334R8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F334R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F334R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F334R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F334R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F334R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F334R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F334R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F334R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F334R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F334R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F334R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F334R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F334R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F334R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F334R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F334R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F334R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F334R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F334R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F334R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F358CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F358CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F358CCT") +set(GENERIC_F358CCTX_MAXSIZE 262144) +set(GENERIC_F358CCTX_MAXDATASIZE 40960) +set(GENERIC_F358CCTX_MCU cortex-m4) +set(GENERIC_F358CCTX_FPCONF "-") +add_library(GENERIC_F358CCTX INTERFACE) +target_compile_options(GENERIC_F358CCTX INTERFACE + "SHELL:-DSTM32F358xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F358CCTX_MCU} +) +target_compile_definitions(GENERIC_F358CCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F358CCTX" + "BOARD_NAME=\"GENERIC_F358CCTX\"" + "BOARD_ID=GENERIC_F358CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F358CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F358CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F358CCTX INTERFACE + "LINKER:--default-script=${GENERIC_F358CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F358CCTX_MCU} +) +target_link_libraries(GENERIC_F358CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F358CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F358CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F358CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F358CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F358CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F358CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F358CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F358CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F358CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F358CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F358CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F358CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F358CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F358CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F358CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F358CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F358CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F358CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F358CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F358CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F358RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F358RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F358RCT") +set(GENERIC_F358RCTX_MAXSIZE 262144) +set(GENERIC_F358RCTX_MAXDATASIZE 40960) +set(GENERIC_F358RCTX_MCU cortex-m4) +set(GENERIC_F358RCTX_FPCONF "-") +add_library(GENERIC_F358RCTX INTERFACE) +target_compile_options(GENERIC_F358RCTX INTERFACE + "SHELL:-DSTM32F358xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F358RCTX_MCU} +) +target_compile_definitions(GENERIC_F358RCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F358RCTX" + "BOARD_NAME=\"GENERIC_F358RCTX\"" + "BOARD_ID=GENERIC_F358RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F358RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F358RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F358RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F358RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F358RCTX_MCU} +) +target_link_libraries(GENERIC_F358RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F358RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F358RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F358RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F358RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F358RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F358RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F358RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F358RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F358RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F358RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F358RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F358RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F358RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F358RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F358RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F358RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F358RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F358RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F358RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F358RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F358VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F358VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F358VCT") +set(GENERIC_F358VCTX_MAXSIZE 262144) +set(GENERIC_F358VCTX_MAXDATASIZE 40960) +set(GENERIC_F358VCTX_MCU cortex-m4) +set(GENERIC_F358VCTX_FPCONF "-") +add_library(GENERIC_F358VCTX INTERFACE) +target_compile_options(GENERIC_F358VCTX INTERFACE + "SHELL:-DSTM32F358xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F358VCTX_MCU} +) +target_compile_definitions(GENERIC_F358VCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F358VCTX" + "BOARD_NAME=\"GENERIC_F358VCTX\"" + "BOARD_ID=GENERIC_F358VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F358VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F358VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F358VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F358VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F358VCTX_MCU} +) +target_link_libraries(GENERIC_F358VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F358VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F358VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F358VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F358VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F358VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F358VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F358VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F358VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F358VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F358VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F358VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F358VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F358VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F358VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F358VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F358VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F358VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F358VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F358VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F358VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F378CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F378CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F378CCT") +set(GENERIC_F378CCTX_MAXSIZE 262144) +set(GENERIC_F378CCTX_MAXDATASIZE 32768) +set(GENERIC_F378CCTX_MCU cortex-m4) +set(GENERIC_F378CCTX_FPCONF "-") +add_library(GENERIC_F378CCTX INTERFACE) +target_compile_options(GENERIC_F378CCTX INTERFACE + "SHELL:-DSTM32F378xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378CCTX_MCU} +) +target_compile_definitions(GENERIC_F378CCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F378CCTX" + "BOARD_NAME=\"GENERIC_F378CCTX\"" + "BOARD_ID=GENERIC_F378CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F378CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F378CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F378CCTX INTERFACE + "LINKER:--default-script=${GENERIC_F378CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378CCTX_MCU} +) +target_link_libraries(GENERIC_F378CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F378CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F378CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F378CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F378CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F378CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F378CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F378CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F378CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F378CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F378CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F378CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F378CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F378CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F378CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F378CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F378CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F378CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F378CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F378CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F378CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F378RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F378RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F378RC(T-Y)") +set(GENERIC_F378RCTX_MAXSIZE 262144) +set(GENERIC_F378RCTX_MAXDATASIZE 32768) +set(GENERIC_F378RCTX_MCU cortex-m4) +set(GENERIC_F378RCTX_FPCONF "-") +add_library(GENERIC_F378RCTX INTERFACE) +target_compile_options(GENERIC_F378RCTX INTERFACE + "SHELL:-DSTM32F378xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378RCTX_MCU} +) +target_compile_definitions(GENERIC_F378RCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F378RCTX" + "BOARD_NAME=\"GENERIC_F378RCTX\"" + "BOARD_ID=GENERIC_F378RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F378RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F378RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F378RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F378RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378RCTX_MCU} +) +target_link_libraries(GENERIC_F378RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F378RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F378RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F378RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F378RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F378RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F378RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F378RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F378RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F378RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F378RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F378RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F378RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F378RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F378RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F378RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F378RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F378RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F378RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F378RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F378RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F378RCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F378RCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F378RC(T-Y)") +set(GENERIC_F378RCYX_MAXSIZE 262144) +set(GENERIC_F378RCYX_MAXDATASIZE 32768) +set(GENERIC_F378RCYX_MCU cortex-m4) +set(GENERIC_F378RCYX_FPCONF "-") +add_library(GENERIC_F378RCYX INTERFACE) +target_compile_options(GENERIC_F378RCYX INTERFACE + "SHELL:-DSTM32F378xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378RCYX_MCU} +) +target_compile_definitions(GENERIC_F378RCYX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F378RCYX" + "BOARD_NAME=\"GENERIC_F378RCYX\"" + "BOARD_ID=GENERIC_F378RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F378RCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F378RCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F378RCYX INTERFACE + "LINKER:--default-script=${GENERIC_F378RCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378RCYX_MCU} +) +target_link_libraries(GENERIC_F378RCYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F378RCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F378RCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F378RCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F378RCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F378RCYX_serial_none INTERFACE) +target_compile_options(GENERIC_F378RCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F378RCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F378RCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F378RCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F378RCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F378RCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F378RCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F378RCYX_usb_none INTERFACE) +target_compile_options(GENERIC_F378RCYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F378RCYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F378RCYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F378RCYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F378RCYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F378RCYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F378RCYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F378VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F378VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F378VC(H-T)") +set(GENERIC_F378VCHX_MAXSIZE 262144) +set(GENERIC_F378VCHX_MAXDATASIZE 32768) +set(GENERIC_F378VCHX_MCU cortex-m4) +set(GENERIC_F378VCHX_FPCONF "-") +add_library(GENERIC_F378VCHX INTERFACE) +target_compile_options(GENERIC_F378VCHX INTERFACE + "SHELL:-DSTM32F378xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378VCHX_MCU} +) +target_compile_definitions(GENERIC_F378VCHX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F378VCHX" + "BOARD_NAME=\"GENERIC_F378VCHX\"" + "BOARD_ID=GENERIC_F378VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F378VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F378VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F378VCHX INTERFACE + "LINKER:--default-script=${GENERIC_F378VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378VCHX_MCU} +) +target_link_libraries(GENERIC_F378VCHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F378VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F378VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F378VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F378VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F378VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_F378VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F378VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F378VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F378VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F378VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F378VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F378VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F378VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_F378VCHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F378VCHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F378VCHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F378VCHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F378VCHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F378VCHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F378VCHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F378VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F378VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F378VC(H-T)") +set(GENERIC_F378VCTX_MAXSIZE 262144) +set(GENERIC_F378VCTX_MAXDATASIZE 32768) +set(GENERIC_F378VCTX_MCU cortex-m4) +set(GENERIC_F378VCTX_FPCONF "-") +add_library(GENERIC_F378VCTX INTERFACE) +target_compile_options(GENERIC_F378VCTX INTERFACE + "SHELL:-DSTM32F378xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378VCTX_MCU} +) +target_compile_definitions(GENERIC_F378VCTX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F378VCTX" + "BOARD_NAME=\"GENERIC_F378VCTX\"" + "BOARD_ID=GENERIC_F378VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F378VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F378VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F378VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F378VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F378VCTX_MCU} +) +target_link_libraries(GENERIC_F378VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F378VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F378VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F378VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F378VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F378VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F378VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F378VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F378VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F378VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F378VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F378VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F378VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F378VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F378VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F378VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F378VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F378VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F378VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F378VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F378VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F398VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F398VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F398VET") +set(GENERIC_F398VETX_MAXSIZE 524288) +set(GENERIC_F398VETX_MAXDATASIZE 65536) +set(GENERIC_F398VETX_MCU cortex-m4) +set(GENERIC_F398VETX_FPCONF "-") +add_library(GENERIC_F398VETX INTERFACE) +target_compile_options(GENERIC_F398VETX INTERFACE + "SHELL:-DSTM32F398xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F398VETX_MCU} +) +target_compile_definitions(GENERIC_F398VETX INTERFACE + "STM32F3xx" + "ARDUINO_GENERIC_F398VETX" + "BOARD_NAME=\"GENERIC_F398VETX\"" + "BOARD_ID=GENERIC_F398VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F398VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${GENERIC_F398VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F398VETX INTERFACE + "LINKER:--default-script=${GENERIC_F398VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F398VETX_MCU} +) +target_link_libraries(GENERIC_F398VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F398VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F398VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F398VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F398VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F398VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F398VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F398VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F398VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F398VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F398VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F398VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F398VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F398VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F398VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F398VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F398VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F398VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F398VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F398VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F398VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CBUX_MAXSIZE 131072) +set(GENERIC_F401CBUX_MAXDATASIZE 65536) +set(GENERIC_F401CBUX_MCU cortex-m4) +set(GENERIC_F401CBUX_FPCONF "-") +add_library(GENERIC_F401CBUX INTERFACE) +target_compile_options(GENERIC_F401CBUX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBUX_MCU} +) +target_compile_definitions(GENERIC_F401CBUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CBUX" + "BOARD_NAME=\"GENERIC_F401CBUX\"" + "BOARD_ID=GENERIC_F401CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F401CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBUX_MCU} +) +target_link_libraries(GENERIC_F401CBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CBUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CBUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CBUX_hid_MAXSIZE 131072) +set(GENERIC_F401CBUX_hid_MAXDATASIZE 65536) +set(GENERIC_F401CBUX_hid_MCU cortex-m4) +set(GENERIC_F401CBUX_hid_FPCONF "-") +add_library(GENERIC_F401CBUX_hid INTERFACE) +target_compile_options(GENERIC_F401CBUX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBUX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CBUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CBUX" + "BOARD_NAME=\"GENERIC_F401CBUX\"" + "BOARD_ID=GENERIC_F401CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CBUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CBUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CBUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CBUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBUX_hid_MCU} +) +target_link_libraries(GENERIC_F401CBUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CBYX_MAXSIZE 131072) +set(GENERIC_F401CBYX_MAXDATASIZE 65536) +set(GENERIC_F401CBYX_MCU cortex-m4) +set(GENERIC_F401CBYX_FPCONF "-") +add_library(GENERIC_F401CBYX INTERFACE) +target_compile_options(GENERIC_F401CBYX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBYX_MCU} +) +target_compile_definitions(GENERIC_F401CBYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CBYX" + "BOARD_NAME=\"GENERIC_F401CBYX\"" + "BOARD_ID=GENERIC_F401CBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CBYX INTERFACE + "LINKER:--default-script=${GENERIC_F401CBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBYX_MCU} +) +target_link_libraries(GENERIC_F401CBYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CBYX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CBYX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CBYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CBYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CBYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CBYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CBYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CBYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CBYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CBYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CBYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CBYX_hid_MAXSIZE 131072) +set(GENERIC_F401CBYX_hid_MAXDATASIZE 65536) +set(GENERIC_F401CBYX_hid_MCU cortex-m4) +set(GENERIC_F401CBYX_hid_FPCONF "-") +add_library(GENERIC_F401CBYX_hid INTERFACE) +target_compile_options(GENERIC_F401CBYX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBYX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CBYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CBYX" + "BOARD_NAME=\"GENERIC_F401CBYX\"" + "BOARD_ID=GENERIC_F401CBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CBYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CBYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CBYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CBYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CBYX_hid_MCU} +) +target_link_libraries(GENERIC_F401CBYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CCFX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CCFX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CCFX_MAXSIZE 262144) +set(GENERIC_F401CCFX_MAXDATASIZE 65536) +set(GENERIC_F401CCFX_MCU cortex-m4) +set(GENERIC_F401CCFX_FPCONF "-") +add_library(GENERIC_F401CCFX INTERFACE) +target_compile_options(GENERIC_F401CCFX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCFX_MCU} +) +target_compile_definitions(GENERIC_F401CCFX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CCFX" + "BOARD_NAME=\"GENERIC_F401CCFX\"" + "BOARD_ID=GENERIC_F401CCFX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CCFX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CCFX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CCFX INTERFACE + "LINKER:--default-script=${GENERIC_F401CCFX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCFX_MCU} +) +target_link_libraries(GENERIC_F401CCFX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CCFX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CCFX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCFX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CCFX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CCFX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CCFX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CCFX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CCFX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CCFX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CCFX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CCFX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CCFX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CCFX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CCFX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCFX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CCFX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCFX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CCFX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CCFX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CCFX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CCFX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CCFX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CCFX_hid_MAXSIZE 262144) +set(GENERIC_F401CCFX_hid_MAXDATASIZE 65536) +set(GENERIC_F401CCFX_hid_MCU cortex-m4) +set(GENERIC_F401CCFX_hid_FPCONF "-") +add_library(GENERIC_F401CCFX_hid INTERFACE) +target_compile_options(GENERIC_F401CCFX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCFX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CCFX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CCFX" + "BOARD_NAME=\"GENERIC_F401CCFX\"" + "BOARD_ID=GENERIC_F401CCFX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CCFX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CCFX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CCFX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CCFX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCFX_hid_MCU} +) +target_link_libraries(GENERIC_F401CCFX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CCUX_MAXSIZE 262144) +set(GENERIC_F401CCUX_MAXDATASIZE 65536) +set(GENERIC_F401CCUX_MCU cortex-m4) +set(GENERIC_F401CCUX_FPCONF "-") +add_library(GENERIC_F401CCUX INTERFACE) +target_compile_options(GENERIC_F401CCUX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCUX_MCU} +) +target_compile_definitions(GENERIC_F401CCUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CCUX" + "BOARD_NAME=\"GENERIC_F401CCUX\"" + "BOARD_ID=GENERIC_F401CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CCUX INTERFACE + "LINKER:--default-script=${GENERIC_F401CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCUX_MCU} +) +target_link_libraries(GENERIC_F401CCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CCUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CCUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CCUX_hid_MAXSIZE 262144) +set(GENERIC_F401CCUX_hid_MAXDATASIZE 65536) +set(GENERIC_F401CCUX_hid_MCU cortex-m4) +set(GENERIC_F401CCUX_hid_FPCONF "-") +add_library(GENERIC_F401CCUX_hid INTERFACE) +target_compile_options(GENERIC_F401CCUX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCUX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CCUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CCUX" + "BOARD_NAME=\"GENERIC_F401CCUX\"" + "BOARD_ID=GENERIC_F401CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CCUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CCUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CCUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CCUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCUX_hid_MCU} +) +target_link_libraries(GENERIC_F401CCUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CCYX_MAXSIZE 262144) +set(GENERIC_F401CCYX_MAXDATASIZE 65536) +set(GENERIC_F401CCYX_MCU cortex-m4) +set(GENERIC_F401CCYX_FPCONF "-") +add_library(GENERIC_F401CCYX INTERFACE) +target_compile_options(GENERIC_F401CCYX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCYX_MCU} +) +target_compile_definitions(GENERIC_F401CCYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CCYX" + "BOARD_NAME=\"GENERIC_F401CCYX\"" + "BOARD_ID=GENERIC_F401CCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CCYX INTERFACE + "LINKER:--default-script=${GENERIC_F401CCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCYX_MCU} +) +target_link_libraries(GENERIC_F401CCYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CCYX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CCYX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CCYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CCYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CCYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CCYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CCYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CCYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CCYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CCYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CCYX_hid_MAXSIZE 262144) +set(GENERIC_F401CCYX_hid_MAXDATASIZE 65536) +set(GENERIC_F401CCYX_hid_MCU cortex-m4) +set(GENERIC_F401CCYX_hid_FPCONF "-") +add_library(GENERIC_F401CCYX_hid INTERFACE) +target_compile_options(GENERIC_F401CCYX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCYX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CCYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CCYX" + "BOARD_NAME=\"GENERIC_F401CCYX\"" + "BOARD_ID=GENERIC_F401CCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CCYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CCYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CCYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CCYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CCYX_hid_MCU} +) +target_link_libraries(GENERIC_F401CCYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CDUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CDUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CDUX_MAXSIZE 393216) +set(GENERIC_F401CDUX_MAXDATASIZE 98304) +set(GENERIC_F401CDUX_MCU cortex-m4) +set(GENERIC_F401CDUX_FPCONF "-") +add_library(GENERIC_F401CDUX INTERFACE) +target_compile_options(GENERIC_F401CDUX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDUX_MCU} +) +target_compile_definitions(GENERIC_F401CDUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CDUX" + "BOARD_NAME=\"GENERIC_F401CDUX\"" + "BOARD_ID=GENERIC_F401CDUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CDUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CDUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CDUX INTERFACE + "LINKER:--default-script=${GENERIC_F401CDUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDUX_MCU} +) +target_link_libraries(GENERIC_F401CDUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CDUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CDUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CDUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CDUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CDUX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CDUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CDUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CDUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CDUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CDUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CDUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CDUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CDUX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CDUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CDUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CDUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CDUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CDUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CDUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CDUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CDUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CDUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CDUX_hid_MAXSIZE 393216) +set(GENERIC_F401CDUX_hid_MAXDATASIZE 98304) +set(GENERIC_F401CDUX_hid_MCU cortex-m4) +set(GENERIC_F401CDUX_hid_FPCONF "-") +add_library(GENERIC_F401CDUX_hid INTERFACE) +target_compile_options(GENERIC_F401CDUX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDUX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CDUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CDUX" + "BOARD_NAME=\"GENERIC_F401CDUX\"" + "BOARD_ID=GENERIC_F401CDUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CDUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CDUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CDUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CDUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDUX_hid_MCU} +) +target_link_libraries(GENERIC_F401CDUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CDYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CDYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CDYX_MAXSIZE 393216) +set(GENERIC_F401CDYX_MAXDATASIZE 98304) +set(GENERIC_F401CDYX_MCU cortex-m4) +set(GENERIC_F401CDYX_FPCONF "-") +add_library(GENERIC_F401CDYX INTERFACE) +target_compile_options(GENERIC_F401CDYX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDYX_MCU} +) +target_compile_definitions(GENERIC_F401CDYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CDYX" + "BOARD_NAME=\"GENERIC_F401CDYX\"" + "BOARD_ID=GENERIC_F401CDYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CDYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CDYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CDYX INTERFACE + "LINKER:--default-script=${GENERIC_F401CDYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDYX_MCU} +) +target_link_libraries(GENERIC_F401CDYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CDYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CDYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CDYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CDYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CDYX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CDYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CDYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CDYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CDYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CDYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CDYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CDYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CDYX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CDYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CDYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CDYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CDYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CDYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CDYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CDYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CDYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CDYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CDYX_hid_MAXSIZE 393216) +set(GENERIC_F401CDYX_hid_MAXDATASIZE 98304) +set(GENERIC_F401CDYX_hid_MCU cortex-m4) +set(GENERIC_F401CDYX_hid_FPCONF "-") +add_library(GENERIC_F401CDYX_hid INTERFACE) +target_compile_options(GENERIC_F401CDYX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDYX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CDYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CDYX" + "BOARD_NAME=\"GENERIC_F401CDYX\"" + "BOARD_ID=GENERIC_F401CDYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CDYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CDYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CDYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CDYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CDYX_hid_MCU} +) +target_link_libraries(GENERIC_F401CDYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CEUX_MAXSIZE 524288) +set(GENERIC_F401CEUX_MAXDATASIZE 98304) +set(GENERIC_F401CEUX_MCU cortex-m4) +set(GENERIC_F401CEUX_FPCONF "-") +add_library(GENERIC_F401CEUX INTERFACE) +target_compile_options(GENERIC_F401CEUX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEUX_MCU} +) +target_compile_definitions(GENERIC_F401CEUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CEUX" + "BOARD_NAME=\"GENERIC_F401CEUX\"" + "BOARD_ID=GENERIC_F401CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CEUX INTERFACE + "LINKER:--default-script=${GENERIC_F401CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEUX_MCU} +) +target_link_libraries(GENERIC_F401CEUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CEUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CEUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CEUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CEUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CEUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CEUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CEUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CEUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CEUX_hid_MAXSIZE 524288) +set(GENERIC_F401CEUX_hid_MAXDATASIZE 98304) +set(GENERIC_F401CEUX_hid_MCU cortex-m4) +set(GENERIC_F401CEUX_hid_FPCONF "-") +add_library(GENERIC_F401CEUX_hid INTERFACE) +target_compile_options(GENERIC_F401CEUX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEUX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CEUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CEUX" + "BOARD_NAME=\"GENERIC_F401CEUX\"" + "BOARD_ID=GENERIC_F401CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CEUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CEUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CEUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CEUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEUX_hid_MCU} +) +target_link_libraries(GENERIC_F401CEUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401CEYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CEYX_MAXSIZE 524288) +set(GENERIC_F401CEYX_MAXDATASIZE 98304) +set(GENERIC_F401CEYX_MCU cortex-m4) +set(GENERIC_F401CEYX_FPCONF "-") +add_library(GENERIC_F401CEYX INTERFACE) +target_compile_options(GENERIC_F401CEYX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEYX_MCU} +) +target_compile_definitions(GENERIC_F401CEYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CEYX" + "BOARD_NAME=\"GENERIC_F401CEYX\"" + "BOARD_ID=GENERIC_F401CEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CEYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CEYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CEYX INTERFACE + "LINKER:--default-script=${GENERIC_F401CEYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEYX_MCU} +) +target_link_libraries(GENERIC_F401CEYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401CEYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401CEYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CEYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401CEYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401CEYX_serial_none INTERFACE) +target_compile_options(GENERIC_F401CEYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401CEYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401CEYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401CEYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401CEYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401CEYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401CEYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401CEYX_usb_none INTERFACE) +target_compile_options(GENERIC_F401CEYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CEYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401CEYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401CEYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401CEYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401CEYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401CEYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401CEYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401CEYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(GENERIC_F401CEYX_hid_MAXSIZE 524288) +set(GENERIC_F401CEYX_hid_MAXDATASIZE 98304) +set(GENERIC_F401CEYX_hid_MCU cortex-m4) +set(GENERIC_F401CEYX_hid_FPCONF "-") +add_library(GENERIC_F401CEYX_hid INTERFACE) +target_compile_options(GENERIC_F401CEYX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEYX_hid_MCU} +) +target_compile_definitions(GENERIC_F401CEYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401CEYX" + "BOARD_NAME=\"GENERIC_F401CEYX\"" + "BOARD_ID=GENERIC_F401CEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401CEYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401CEYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401CEYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401CEYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401CEYX_hid_MCU} +) +target_link_libraries(GENERIC_F401CEYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RBTX_MAXSIZE 131072) +set(GENERIC_F401RBTX_MAXDATASIZE 65536) +set(GENERIC_F401RBTX_MCU cortex-m4) +set(GENERIC_F401RBTX_FPCONF "-") +add_library(GENERIC_F401RBTX INTERFACE) +target_compile_options(GENERIC_F401RBTX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RBTX_MCU} +) +target_compile_definitions(GENERIC_F401RBTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RBTX" + "BOARD_NAME=\"GENERIC_F401RBTX\"" + "BOARD_ID=GENERIC_F401RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F401RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RBTX_MCU} +) +target_link_libraries(GENERIC_F401RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F401RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F401RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401RBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RBTX_hid_MAXSIZE 131072) +set(GENERIC_F401RBTX_hid_MAXDATASIZE 65536) +set(GENERIC_F401RBTX_hid_MCU cortex-m4) +set(GENERIC_F401RBTX_hid_FPCONF "-") +add_library(GENERIC_F401RBTX_hid INTERFACE) +target_compile_options(GENERIC_F401RBTX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F401RBTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RBTX" + "BOARD_NAME=\"GENERIC_F401RBTX\"" + "BOARD_ID=GENERIC_F401RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401RBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RBTX_hid_MCU} +) +target_link_libraries(GENERIC_F401RBTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RCTX_MAXSIZE 262144) +set(GENERIC_F401RCTX_MAXDATASIZE 65536) +set(GENERIC_F401RCTX_MCU cortex-m4) +set(GENERIC_F401RCTX_FPCONF "-") +add_library(GENERIC_F401RCTX INTERFACE) +target_compile_options(GENERIC_F401RCTX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RCTX_MCU} +) +target_compile_definitions(GENERIC_F401RCTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RCTX" + "BOARD_NAME=\"GENERIC_F401RCTX\"" + "BOARD_ID=GENERIC_F401RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F401RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RCTX_MCU} +) +target_link_libraries(GENERIC_F401RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F401RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F401RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401RCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RCTX_hid_MAXSIZE 262144) +set(GENERIC_F401RCTX_hid_MAXDATASIZE 65536) +set(GENERIC_F401RCTX_hid_MCU cortex-m4) +set(GENERIC_F401RCTX_hid_FPCONF "-") +add_library(GENERIC_F401RCTX_hid INTERFACE) +target_compile_options(GENERIC_F401RCTX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F401RCTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RCTX" + "BOARD_NAME=\"GENERIC_F401RCTX\"" + "BOARD_ID=GENERIC_F401RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401RCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RCTX_hid_MCU} +) +target_link_libraries(GENERIC_F401RCTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401RDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RDTX_MAXSIZE 393216) +set(GENERIC_F401RDTX_MAXDATASIZE 98304) +set(GENERIC_F401RDTX_MCU cortex-m4) +set(GENERIC_F401RDTX_FPCONF "-") +add_library(GENERIC_F401RDTX INTERFACE) +target_compile_options(GENERIC_F401RDTX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RDTX_MCU} +) +target_compile_definitions(GENERIC_F401RDTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RDTX" + "BOARD_NAME=\"GENERIC_F401RDTX\"" + "BOARD_ID=GENERIC_F401RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RDTX INTERFACE + "LINKER:--default-script=${GENERIC_F401RDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RDTX_MCU} +) +target_link_libraries(GENERIC_F401RDTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401RDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401RDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401RDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401RDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F401RDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401RDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401RDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401RDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401RDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401RDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401RDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401RDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F401RDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401RDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401RDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401RDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401RDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401RDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RDTX_hid_MAXSIZE 393216) +set(GENERIC_F401RDTX_hid_MAXDATASIZE 98304) +set(GENERIC_F401RDTX_hid_MCU cortex-m4) +set(GENERIC_F401RDTX_hid_FPCONF "-") +add_library(GENERIC_F401RDTX_hid INTERFACE) +target_compile_options(GENERIC_F401RDTX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F401RDTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RDTX" + "BOARD_NAME=\"GENERIC_F401RDTX\"" + "BOARD_ID=GENERIC_F401RDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401RDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RDTX_hid_MCU} +) +target_link_libraries(GENERIC_F401RDTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RETX_MAXSIZE 524288) +set(GENERIC_F401RETX_MAXDATASIZE 98304) +set(GENERIC_F401RETX_MCU cortex-m4) +set(GENERIC_F401RETX_FPCONF "-") +add_library(GENERIC_F401RETX INTERFACE) +target_compile_options(GENERIC_F401RETX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RETX_MCU} +) +target_compile_definitions(GENERIC_F401RETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RETX" + "BOARD_NAME=\"GENERIC_F401RETX\"" + "BOARD_ID=GENERIC_F401RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RETX INTERFACE + "LINKER:--default-script=${GENERIC_F401RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RETX_MCU} +) +target_link_libraries(GENERIC_F401RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F401RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F401RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401RETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(GENERIC_F401RETX_hid_MAXSIZE 524288) +set(GENERIC_F401RETX_hid_MAXDATASIZE 98304) +set(GENERIC_F401RETX_hid_MCU cortex-m4) +set(GENERIC_F401RETX_hid_FPCONF "-") +add_library(GENERIC_F401RETX_hid INTERFACE) +target_compile_options(GENERIC_F401RETX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RETX_hid_MCU} +) +target_compile_definitions(GENERIC_F401RETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401RETX" + "BOARD_NAME=\"GENERIC_F401RETX\"" + "BOARD_ID=GENERIC_F401RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401RETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401RETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401RETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401RETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401RETX_hid_MCU} +) +target_link_libraries(GENERIC_F401RETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VBTX_MAXSIZE 131072) +set(GENERIC_F401VBTX_MAXDATASIZE 65536) +set(GENERIC_F401VBTX_MCU cortex-m4) +set(GENERIC_F401VBTX_FPCONF "-") +add_library(GENERIC_F401VBTX INTERFACE) +target_compile_options(GENERIC_F401VBTX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VBTX_MCU} +) +target_compile_definitions(GENERIC_F401VBTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VBTX" + "BOARD_NAME=\"GENERIC_F401VBTX\"" + "BOARD_ID=GENERIC_F401VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VBTX INTERFACE + "LINKER:--default-script=${GENERIC_F401VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VBTX_MCU} +) +target_link_libraries(GENERIC_F401VBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F401VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F401VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401VBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VBTX_hid_MAXSIZE 131072) +set(GENERIC_F401VBTX_hid_MAXDATASIZE 65536) +set(GENERIC_F401VBTX_hid_MCU cortex-m4) +set(GENERIC_F401VBTX_hid_FPCONF "-") +add_library(GENERIC_F401VBTX_hid INTERFACE) +target_compile_options(GENERIC_F401VBTX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F401VBTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VBTX" + "BOARD_NAME=\"GENERIC_F401VBTX\"" + "BOARD_ID=GENERIC_F401VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401VBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VBTX_hid_MCU} +) +target_link_libraries(GENERIC_F401VBTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VCTX_MAXSIZE 262144) +set(GENERIC_F401VCTX_MAXDATASIZE 65536) +set(GENERIC_F401VCTX_MCU cortex-m4) +set(GENERIC_F401VCTX_FPCONF "-") +add_library(GENERIC_F401VCTX INTERFACE) +target_compile_options(GENERIC_F401VCTX INTERFACE + "SHELL:-DSTM32F401xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VCTX_MCU} +) +target_compile_definitions(GENERIC_F401VCTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VCTX" + "BOARD_NAME=\"GENERIC_F401VCTX\"" + "BOARD_ID=GENERIC_F401VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F401VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VCTX_MCU} +) +target_link_libraries(GENERIC_F401VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F401VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F401VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401VCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VCTX_hid_MAXSIZE 262144) +set(GENERIC_F401VCTX_hid_MAXDATASIZE 65536) +set(GENERIC_F401VCTX_hid_MCU cortex-m4) +set(GENERIC_F401VCTX_hid_FPCONF "-") +add_library(GENERIC_F401VCTX_hid INTERFACE) +target_compile_options(GENERIC_F401VCTX_hid INTERFACE + "SHELL:-DSTM32F401xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F401VCTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VCTX" + "BOARD_NAME=\"GENERIC_F401VCTX\"" + "BOARD_ID=GENERIC_F401VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401VCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VCTX_hid_MCU} +) +target_link_libraries(GENERIC_F401VCTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401VDTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VDTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VDTX_MAXSIZE 393216) +set(GENERIC_F401VDTX_MAXDATASIZE 98304) +set(GENERIC_F401VDTX_MCU cortex-m4) +set(GENERIC_F401VDTX_FPCONF "-") +add_library(GENERIC_F401VDTX INTERFACE) +target_compile_options(GENERIC_F401VDTX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VDTX_MCU} +) +target_compile_definitions(GENERIC_F401VDTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VDTX" + "BOARD_NAME=\"GENERIC_F401VDTX\"" + "BOARD_ID=GENERIC_F401VDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VDTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VDTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VDTX INTERFACE + "LINKER:--default-script=${GENERIC_F401VDTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VDTX_MCU} +) +target_link_libraries(GENERIC_F401VDTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401VDTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401VDTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VDTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401VDTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401VDTX_serial_none INTERFACE) +target_compile_options(GENERIC_F401VDTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401VDTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401VDTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401VDTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401VDTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401VDTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401VDTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401VDTX_usb_none INTERFACE) +target_compile_options(GENERIC_F401VDTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VDTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401VDTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VDTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401VDTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401VDTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401VDTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401VDTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VDTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VDTX_hid_MAXSIZE 393216) +set(GENERIC_F401VDTX_hid_MAXDATASIZE 98304) +set(GENERIC_F401VDTX_hid_MCU cortex-m4) +set(GENERIC_F401VDTX_hid_FPCONF "-") +add_library(GENERIC_F401VDTX_hid INTERFACE) +target_compile_options(GENERIC_F401VDTX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VDTX_hid_MCU} +) +target_compile_definitions(GENERIC_F401VDTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VDTX" + "BOARD_NAME=\"GENERIC_F401VDTX\"" + "BOARD_ID=GENERIC_F401VDTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VDTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VDTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VDTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401VDTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=393216" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VDTX_hid_MCU} +) +target_link_libraries(GENERIC_F401VDTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F401VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VETX_MAXSIZE 524288) +set(GENERIC_F401VETX_MAXDATASIZE 98304) +set(GENERIC_F401VETX_MCU cortex-m4) +set(GENERIC_F401VETX_FPCONF "-") +add_library(GENERIC_F401VETX INTERFACE) +target_compile_options(GENERIC_F401VETX INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VETX_MCU} +) +target_compile_definitions(GENERIC_F401VETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VETX" + "BOARD_NAME=\"GENERIC_F401VETX\"" + "BOARD_ID=GENERIC_F401VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VETX INTERFACE + "LINKER:--default-script=${GENERIC_F401VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VETX_MCU} +) +target_link_libraries(GENERIC_F401VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F401VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F401VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F401VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F401VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F401VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F401VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F401VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F401VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F401VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F401VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F401VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F401VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F401VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F401VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F401VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F401VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F401VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F401VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F401VETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F401VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(GENERIC_F401VETX_hid_MAXSIZE 524288) +set(GENERIC_F401VETX_hid_MAXDATASIZE 98304) +set(GENERIC_F401VETX_hid_MCU cortex-m4) +set(GENERIC_F401VETX_hid_FPCONF "-") +add_library(GENERIC_F401VETX_hid INTERFACE) +target_compile_options(GENERIC_F401VETX_hid INTERFACE + "SHELL:-DSTM32F401xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VETX_hid_MCU} +) +target_compile_definitions(GENERIC_F401VETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F401VETX" + "BOARD_NAME=\"GENERIC_F401VETX\"" + "BOARD_ID=GENERIC_F401VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F401VETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F401VETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F401VETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F401VETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F401VETX_hid_MCU} +) +target_link_libraries(GENERIC_F401VETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F405RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F405RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") +set(GENERIC_F405RGTX_MAXSIZE 1048576) +set(GENERIC_F405RGTX_MAXDATASIZE 131072) +set(GENERIC_F405RGTX_MCU cortex-m4) +set(GENERIC_F405RGTX_FPCONF "-") +add_library(GENERIC_F405RGTX INTERFACE) +target_compile_options(GENERIC_F405RGTX INTERFACE + "SHELL:-DSTM32F405xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F405RGTX_MCU} +) +target_compile_definitions(GENERIC_F405RGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F405RGTX" + "BOARD_NAME=\"GENERIC_F405RGTX\"" + "BOARD_ID=GENERIC_F405RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F405RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F405RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F405RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F405RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F405RGTX_MCU} +) +target_link_libraries(GENERIC_F405RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F405RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F405RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F405RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F405RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F405RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F405RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F405RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F405RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F405RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F405RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F405RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F405RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F405RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F405RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F405RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F405RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F405RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F405RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F405RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F405RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F405RGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F405RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") +set(GENERIC_F405RGTX_hid_MAXSIZE 1048576) +set(GENERIC_F405RGTX_hid_MAXDATASIZE 131072) +set(GENERIC_F405RGTX_hid_MCU cortex-m4) +set(GENERIC_F405RGTX_hid_FPCONF "-") +add_library(GENERIC_F405RGTX_hid INTERFACE) +target_compile_options(GENERIC_F405RGTX_hid INTERFACE + "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F405RGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F405RGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F405RGTX" + "BOARD_NAME=\"GENERIC_F405RGTX\"" + "BOARD_ID=GENERIC_F405RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F405RGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F405RGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F405RGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F405RGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F405RGTX_hid_MCU} +) +target_link_libraries(GENERIC_F405RGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F407VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F407VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F407VETX_MAXSIZE 524288) +set(GENERIC_F407VETX_MAXDATASIZE 131072) +set(GENERIC_F407VETX_MCU cortex-m4) +set(GENERIC_F407VETX_FPCONF "-") +add_library(GENERIC_F407VETX INTERFACE) +target_compile_options(GENERIC_F407VETX INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VETX_MCU} +) +target_compile_definitions(GENERIC_F407VETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407VETX" + "BOARD_NAME=\"GENERIC_F407VETX\"" + "BOARD_ID=GENERIC_F407VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F407VETX INTERFACE + "LINKER:--default-script=${GENERIC_F407VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VETX_MCU} +) +target_link_libraries(GENERIC_F407VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F407VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F407VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F407VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F407VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F407VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F407VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F407VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F407VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F407VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F407VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F407VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F407VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F407VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F407VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F407VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F407VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F407VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F407VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F407VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F407VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F407VETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F407VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F407VETX_hid_MAXSIZE 524288) +set(GENERIC_F407VETX_hid_MAXDATASIZE 131072) +set(GENERIC_F407VETX_hid_MCU cortex-m4) +set(GENERIC_F407VETX_hid_FPCONF "-") +add_library(GENERIC_F407VETX_hid INTERFACE) +target_compile_options(GENERIC_F407VETX_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VETX_hid_MCU} +) +target_compile_definitions(GENERIC_F407VETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407VETX" + "BOARD_NAME=\"GENERIC_F407VETX\"" + "BOARD_ID=GENERIC_F407VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407VETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407VETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F407VETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F407VETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VETX_hid_MCU} +) +target_link_libraries(GENERIC_F407VETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F407VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F407VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F407VGTX_MAXSIZE 1048576) +set(GENERIC_F407VGTX_MAXDATASIZE 131072) +set(GENERIC_F407VGTX_MCU cortex-m4) +set(GENERIC_F407VGTX_FPCONF "-") +add_library(GENERIC_F407VGTX INTERFACE) +target_compile_options(GENERIC_F407VGTX INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VGTX_MCU} +) +target_compile_definitions(GENERIC_F407VGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407VGTX" + "BOARD_NAME=\"GENERIC_F407VGTX\"" + "BOARD_ID=GENERIC_F407VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F407VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F407VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VGTX_MCU} +) +target_link_libraries(GENERIC_F407VGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F407VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F407VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F407VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F407VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F407VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F407VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F407VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F407VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F407VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F407VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F407VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F407VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F407VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F407VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F407VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F407VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F407VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F407VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F407VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F407VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F407VGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F407VGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F407VGTX_hid_MAXSIZE 1048576) +set(GENERIC_F407VGTX_hid_MAXDATASIZE 131072) +set(GENERIC_F407VGTX_hid_MCU cortex-m4) +set(GENERIC_F407VGTX_hid_FPCONF "-") +add_library(GENERIC_F407VGTX_hid INTERFACE) +target_compile_options(GENERIC_F407VGTX_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F407VGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407VGTX" + "BOARD_NAME=\"GENERIC_F407VGTX\"" + "BOARD_ID=GENERIC_F407VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407VGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407VGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F407VGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F407VGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407VGTX_hid_MCU} +) +target_link_libraries(GENERIC_F407VGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F407ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F407ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F407ZETX_MAXSIZE 524288) +set(GENERIC_F407ZETX_MAXDATASIZE 131072) +set(GENERIC_F407ZETX_MCU cortex-m4) +set(GENERIC_F407ZETX_FPCONF "-") +add_library(GENERIC_F407ZETX INTERFACE) +target_compile_options(GENERIC_F407ZETX INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZETX_MCU} +) +target_compile_definitions(GENERIC_F407ZETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407ZETX" + "BOARD_NAME=\"GENERIC_F407ZETX\"" + "BOARD_ID=GENERIC_F407ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F407ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F407ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZETX_MCU} +) +target_link_libraries(GENERIC_F407ZETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F407ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F407ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F407ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F407ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F407ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F407ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F407ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F407ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F407ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F407ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F407ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F407ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F407ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F407ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F407ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F407ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F407ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F407ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F407ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F407ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F407ZETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F407ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F407ZETX_hid_MAXSIZE 524288) +set(GENERIC_F407ZETX_hid_MAXDATASIZE 131072) +set(GENERIC_F407ZETX_hid_MCU cortex-m4) +set(GENERIC_F407ZETX_hid_FPCONF "-") +add_library(GENERIC_F407ZETX_hid INTERFACE) +target_compile_options(GENERIC_F407ZETX_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZETX_hid_MCU} +) +target_compile_definitions(GENERIC_F407ZETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407ZETX" + "BOARD_NAME=\"GENERIC_F407ZETX\"" + "BOARD_ID=GENERIC_F407ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407ZETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407ZETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F407ZETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F407ZETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZETX_hid_MCU} +) +target_link_libraries(GENERIC_F407ZETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F407ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F407ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F407ZGTX_MAXSIZE 1048576) +set(GENERIC_F407ZGTX_MAXDATASIZE 131072) +set(GENERIC_F407ZGTX_MCU cortex-m4) +set(GENERIC_F407ZGTX_FPCONF "-") +add_library(GENERIC_F407ZGTX INTERFACE) +target_compile_options(GENERIC_F407ZGTX INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZGTX_MCU} +) +target_compile_definitions(GENERIC_F407ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407ZGTX" + "BOARD_NAME=\"GENERIC_F407ZGTX\"" + "BOARD_ID=GENERIC_F407ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F407ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F407ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZGTX_MCU} +) +target_link_libraries(GENERIC_F407ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F407ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F407ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F407ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F407ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F407ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F407ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F407ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F407ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F407ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F407ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F407ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F407ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F407ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F407ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F407ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F407ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F407ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F407ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F407ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F407ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F407ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F407ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F407ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F407ZGTX_hid_MAXDATASIZE 131072) +set(GENERIC_F407ZGTX_hid_MCU cortex-m4) +set(GENERIC_F407ZGTX_hid_FPCONF "-") +add_library(GENERIC_F407ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F407ZGTX_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F407ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F407ZGTX" + "BOARD_NAME=\"GENERIC_F407ZGTX\"" + "BOARD_ID=GENERIC_F407ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F407ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F407ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F407ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F407ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F407ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F407ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T") +set(GENERIC_F410C8TX_MAXSIZE 65536) +set(GENERIC_F410C8TX_MAXDATASIZE 32768) +set(GENERIC_F410C8TX_MCU cortex-m4) +set(GENERIC_F410C8TX_FPCONF "-") +add_library(GENERIC_F410C8TX INTERFACE) +target_compile_options(GENERIC_F410C8TX INTERFACE + "SHELL:-DSTM32F410Cx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8TX_MCU} +) +target_compile_definitions(GENERIC_F410C8TX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410C8TX" + "BOARD_NAME=\"GENERIC_F410C8TX\"" + "BOARD_ID=GENERIC_F410C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410C8TX INTERFACE + "LINKER:--default-script=${GENERIC_F410C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8TX_MCU} +) +target_link_libraries(GENERIC_F410C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F410C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F410C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410C8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410C8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T") +set(GENERIC_F410C8TX_hid_MAXSIZE 65536) +set(GENERIC_F410C8TX_hid_MAXDATASIZE 32768) +set(GENERIC_F410C8TX_hid_MCU cortex-m4) +set(GENERIC_F410C8TX_hid_FPCONF "-") +add_library(GENERIC_F410C8TX_hid INTERFACE) +target_compile_options(GENERIC_F410C8TX_hid INTERFACE + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F410C8TX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410C8TX" + "BOARD_NAME=\"GENERIC_F410C8TX\"" + "BOARD_ID=GENERIC_F410C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410C8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410C8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410C8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410C8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8TX_hid_MCU} +) +target_link_libraries(GENERIC_F410C8TX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U") +set(GENERIC_F410C8UX_MAXSIZE 65536) +set(GENERIC_F410C8UX_MAXDATASIZE 32768) +set(GENERIC_F410C8UX_MCU cortex-m4) +set(GENERIC_F410C8UX_FPCONF "-") +add_library(GENERIC_F410C8UX INTERFACE) +target_compile_options(GENERIC_F410C8UX INTERFACE + "SHELL:-DSTM32F410Cx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8UX_MCU} +) +target_compile_definitions(GENERIC_F410C8UX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410C8UX" + "BOARD_NAME=\"GENERIC_F410C8UX\"" + "BOARD_ID=GENERIC_F410C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410C8UX INTERFACE + "LINKER:--default-script=${GENERIC_F410C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8UX_MCU} +) +target_link_libraries(GENERIC_F410C8UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_F410C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_F410C8UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410C8UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410C8UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410C8UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410C8UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410C8UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410C8UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410C8UX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410C8UX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U") +set(GENERIC_F410C8UX_hid_MAXSIZE 65536) +set(GENERIC_F410C8UX_hid_MAXDATASIZE 32768) +set(GENERIC_F410C8UX_hid_MCU cortex-m4) +set(GENERIC_F410C8UX_hid_FPCONF "-") +add_library(GENERIC_F410C8UX_hid INTERFACE) +target_compile_options(GENERIC_F410C8UX_hid INTERFACE + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8UX_hid_MCU} +) +target_compile_definitions(GENERIC_F410C8UX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410C8UX" + "BOARD_NAME=\"GENERIC_F410C8UX\"" + "BOARD_ID=GENERIC_F410C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410C8UX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410C8UX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410C8UX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410C8UX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410C8UX_hid_MCU} +) +target_link_libraries(GENERIC_F410C8UX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T") +set(GENERIC_F410CBTX_MAXSIZE 131072) +set(GENERIC_F410CBTX_MAXDATASIZE 32768) +set(GENERIC_F410CBTX_MCU cortex-m4) +set(GENERIC_F410CBTX_FPCONF "-") +add_library(GENERIC_F410CBTX INTERFACE) +target_compile_options(GENERIC_F410CBTX INTERFACE + "SHELL:-DSTM32F410Cx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBTX_MCU} +) +target_compile_definitions(GENERIC_F410CBTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410CBTX" + "BOARD_NAME=\"GENERIC_F410CBTX\"" + "BOARD_ID=GENERIC_F410CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410CBTX INTERFACE + "LINKER:--default-script=${GENERIC_F410CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBTX_MCU} +) +target_link_libraries(GENERIC_F410CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F410CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F410CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410CBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410CBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)T") +set(GENERIC_F410CBTX_hid_MAXSIZE 131072) +set(GENERIC_F410CBTX_hid_MAXDATASIZE 32768) +set(GENERIC_F410CBTX_hid_MCU cortex-m4) +set(GENERIC_F410CBTX_hid_FPCONF "-") +add_library(GENERIC_F410CBTX_hid INTERFACE) +target_compile_options(GENERIC_F410CBTX_hid INTERFACE + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F410CBTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410CBTX" + "BOARD_NAME=\"GENERIC_F410CBTX\"" + "BOARD_ID=GENERIC_F410CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410CBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410CBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410CBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410CBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBTX_hid_MCU} +) +target_link_libraries(GENERIC_F410CBTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U") +set(GENERIC_F410CBUX_MAXSIZE 131072) +set(GENERIC_F410CBUX_MAXDATASIZE 32768) +set(GENERIC_F410CBUX_MCU cortex-m4) +set(GENERIC_F410CBUX_FPCONF "-") +add_library(GENERIC_F410CBUX INTERFACE) +target_compile_options(GENERIC_F410CBUX INTERFACE + "SHELL:-DSTM32F410Cx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBUX_MCU} +) +target_compile_definitions(GENERIC_F410CBUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410CBUX" + "BOARD_NAME=\"GENERIC_F410CBUX\"" + "BOARD_ID=GENERIC_F410CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410CBUX INTERFACE + "LINKER:--default-script=${GENERIC_F410CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBUX_MCU} +) +target_link_libraries(GENERIC_F410CBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_F410CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_F410CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410CBUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410CBUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410C(8-B)U") +set(GENERIC_F410CBUX_hid_MAXSIZE 131072) +set(GENERIC_F410CBUX_hid_MAXDATASIZE 32768) +set(GENERIC_F410CBUX_hid_MCU cortex-m4) +set(GENERIC_F410CBUX_hid_FPCONF "-") +add_library(GENERIC_F410CBUX_hid INTERFACE) +target_compile_options(GENERIC_F410CBUX_hid INTERFACE + "SHELL:-DSTM32F410Cx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBUX_hid_MCU} +) +target_compile_definitions(GENERIC_F410CBUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410CBUX" + "BOARD_NAME=\"GENERIC_F410CBUX\"" + "BOARD_ID=GENERIC_F410CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410CBUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410CBUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410CBUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410CBUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410CBUX_hid_MCU} +) +target_link_libraries(GENERIC_F410CBUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410R8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410R8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410R8IX_MAXSIZE 65536) +set(GENERIC_F410R8IX_MAXDATASIZE 32768) +set(GENERIC_F410R8IX_MCU cortex-m4) +set(GENERIC_F410R8IX_FPCONF "-") +add_library(GENERIC_F410R8IX INTERFACE) +target_compile_options(GENERIC_F410R8IX INTERFACE + "SHELL:-DSTM32F410Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8IX_MCU} +) +target_compile_definitions(GENERIC_F410R8IX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410R8IX" + "BOARD_NAME=\"GENERIC_F410R8IX\"" + "BOARD_ID=GENERIC_F410R8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410R8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410R8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410R8IX INTERFACE + "LINKER:--default-script=${GENERIC_F410R8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8IX_MCU} +) +target_link_libraries(GENERIC_F410R8IX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410R8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410R8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410R8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410R8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410R8IX_serial_none INTERFACE) +target_compile_options(GENERIC_F410R8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410R8IX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410R8IX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410R8IX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410R8IX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410R8IX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410R8IX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410R8IX_usb_none INTERFACE) +target_compile_options(GENERIC_F410R8IX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410R8IX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410R8IX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410R8IX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410R8IX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410R8IX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410R8IX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410R8IX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410R8IX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410R8IX_hid_MAXSIZE 65536) +set(GENERIC_F410R8IX_hid_MAXDATASIZE 32768) +set(GENERIC_F410R8IX_hid_MCU cortex-m4) +set(GENERIC_F410R8IX_hid_FPCONF "-") +add_library(GENERIC_F410R8IX_hid INTERFACE) +target_compile_options(GENERIC_F410R8IX_hid INTERFACE + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8IX_hid_MCU} +) +target_compile_definitions(GENERIC_F410R8IX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410R8IX" + "BOARD_NAME=\"GENERIC_F410R8IX\"" + "BOARD_ID=GENERIC_F410R8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410R8IX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410R8IX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410R8IX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410R8IX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8IX_hid_MCU} +) +target_link_libraries(GENERIC_F410R8IX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410R8TX_MAXSIZE 65536) +set(GENERIC_F410R8TX_MAXDATASIZE 32768) +set(GENERIC_F410R8TX_MCU cortex-m4) +set(GENERIC_F410R8TX_FPCONF "-") +add_library(GENERIC_F410R8TX INTERFACE) +target_compile_options(GENERIC_F410R8TX INTERFACE + "SHELL:-DSTM32F410Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8TX_MCU} +) +target_compile_definitions(GENERIC_F410R8TX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410R8TX" + "BOARD_NAME=\"GENERIC_F410R8TX\"" + "BOARD_ID=GENERIC_F410R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F410R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8TX_MCU} +) +target_link_libraries(GENERIC_F410R8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F410R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F410R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410R8TX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410R8TX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410R8TX_hid_MAXSIZE 65536) +set(GENERIC_F410R8TX_hid_MAXDATASIZE 32768) +set(GENERIC_F410R8TX_hid_MCU cortex-m4) +set(GENERIC_F410R8TX_hid_FPCONF "-") +add_library(GENERIC_F410R8TX_hid INTERFACE) +target_compile_options(GENERIC_F410R8TX_hid INTERFACE + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8TX_hid_MCU} +) +target_compile_definitions(GENERIC_F410R8TX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410R8TX" + "BOARD_NAME=\"GENERIC_F410R8TX\"" + "BOARD_ID=GENERIC_F410R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410R8TX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410R8TX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410R8TX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410R8TX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410R8TX_hid_MCU} +) +target_link_libraries(GENERIC_F410R8TX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410RBIX_MAXSIZE 131072) +set(GENERIC_F410RBIX_MAXDATASIZE 32768) +set(GENERIC_F410RBIX_MCU cortex-m4) +set(GENERIC_F410RBIX_FPCONF "-") +add_library(GENERIC_F410RBIX INTERFACE) +target_compile_options(GENERIC_F410RBIX INTERFACE + "SHELL:-DSTM32F410Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBIX_MCU} +) +target_compile_definitions(GENERIC_F410RBIX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410RBIX" + "BOARD_NAME=\"GENERIC_F410RBIX\"" + "BOARD_ID=GENERIC_F410RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410RBIX INTERFACE + "LINKER:--default-script=${GENERIC_F410RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBIX_MCU} +) +target_link_libraries(GENERIC_F410RBIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_F410RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_F410RBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410RBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410RBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410RBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410RBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410RBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410RBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410RBIX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410RBIX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410RBIX_hid_MAXSIZE 131072) +set(GENERIC_F410RBIX_hid_MAXDATASIZE 32768) +set(GENERIC_F410RBIX_hid_MCU cortex-m4) +set(GENERIC_F410RBIX_hid_FPCONF "-") +add_library(GENERIC_F410RBIX_hid INTERFACE) +target_compile_options(GENERIC_F410RBIX_hid INTERFACE + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBIX_hid_MCU} +) +target_compile_definitions(GENERIC_F410RBIX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410RBIX" + "BOARD_NAME=\"GENERIC_F410RBIX\"" + "BOARD_ID=GENERIC_F410RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410RBIX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410RBIX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410RBIX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410RBIX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBIX_hid_MCU} +) +target_link_libraries(GENERIC_F410RBIX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410RBTX_MAXSIZE 131072) +set(GENERIC_F410RBTX_MAXDATASIZE 32768) +set(GENERIC_F410RBTX_MCU cortex-m4) +set(GENERIC_F410RBTX_FPCONF "-") +add_library(GENERIC_F410RBTX INTERFACE) +target_compile_options(GENERIC_F410RBTX INTERFACE + "SHELL:-DSTM32F410Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBTX_MCU} +) +target_compile_definitions(GENERIC_F410RBTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410RBTX" + "BOARD_NAME=\"GENERIC_F410RBTX\"" + "BOARD_ID=GENERIC_F410RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410RBTX INTERFACE + "LINKER:--default-script=${GENERIC_F410RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBTX_MCU} +) +target_link_libraries(GENERIC_F410RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_F410RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_F410RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410RBTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410RBTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410R(8-B)(I-T)") +set(GENERIC_F410RBTX_hid_MAXSIZE 131072) +set(GENERIC_F410RBTX_hid_MAXDATASIZE 32768) +set(GENERIC_F410RBTX_hid_MCU cortex-m4) +set(GENERIC_F410RBTX_hid_FPCONF "-") +add_library(GENERIC_F410RBTX_hid INTERFACE) +target_compile_options(GENERIC_F410RBTX_hid INTERFACE + "SHELL:-DSTM32F410Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBTX_hid_MCU} +) +target_compile_definitions(GENERIC_F410RBTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410RBTX" + "BOARD_NAME=\"GENERIC_F410RBTX\"" + "BOARD_ID=GENERIC_F410RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410RBTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410RBTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410RBTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410RBTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410RBTX_hid_MCU} +) +target_link_libraries(GENERIC_F410RBTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410T8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410T8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y") +set(GENERIC_F410T8YX_MAXSIZE 65536) +set(GENERIC_F410T8YX_MAXDATASIZE 32768) +set(GENERIC_F410T8YX_MCU cortex-m4) +set(GENERIC_F410T8YX_FPCONF "-") +add_library(GENERIC_F410T8YX INTERFACE) +target_compile_options(GENERIC_F410T8YX INTERFACE + "SHELL:-DSTM32F410Tx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410T8YX_MCU} +) +target_compile_definitions(GENERIC_F410T8YX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410T8YX" + "BOARD_NAME=\"GENERIC_F410T8YX\"" + "BOARD_ID=GENERIC_F410T8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410T8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410T8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410T8YX INTERFACE + "LINKER:--default-script=${GENERIC_F410T8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410T8YX_MCU} +) +target_link_libraries(GENERIC_F410T8YX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410T8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410T8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410T8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410T8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410T8YX_serial_none INTERFACE) +target_compile_options(GENERIC_F410T8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410T8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410T8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410T8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410T8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410T8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410T8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410T8YX_usb_none INTERFACE) +target_compile_options(GENERIC_F410T8YX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410T8YX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410T8YX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410T8YX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410T8YX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410T8YX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410T8YX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410T8YX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410T8YX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y") +set(GENERIC_F410T8YX_hid_MAXSIZE 65536) +set(GENERIC_F410T8YX_hid_MAXDATASIZE 32768) +set(GENERIC_F410T8YX_hid_MCU cortex-m4) +set(GENERIC_F410T8YX_hid_FPCONF "-") +add_library(GENERIC_F410T8YX_hid INTERFACE) +target_compile_options(GENERIC_F410T8YX_hid INTERFACE + "SHELL:-DSTM32F410Tx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410T8YX_hid_MCU} +) +target_compile_definitions(GENERIC_F410T8YX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410T8YX" + "BOARD_NAME=\"GENERIC_F410T8YX\"" + "BOARD_ID=GENERIC_F410T8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410T8YX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410T8YX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410T8YX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410T8YX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410T8YX_hid_MCU} +) +target_link_libraries(GENERIC_F410T8YX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F410TBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F410TBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y") +set(GENERIC_F410TBYX_MAXSIZE 131072) +set(GENERIC_F410TBYX_MAXDATASIZE 32768) +set(GENERIC_F410TBYX_MCU cortex-m4) +set(GENERIC_F410TBYX_FPCONF "-") +add_library(GENERIC_F410TBYX INTERFACE) +target_compile_options(GENERIC_F410TBYX INTERFACE + "SHELL:-DSTM32F410Tx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410TBYX_MCU} +) +target_compile_definitions(GENERIC_F410TBYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410TBYX" + "BOARD_NAME=\"GENERIC_F410TBYX\"" + "BOARD_ID=GENERIC_F410TBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410TBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410TBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F410TBYX INTERFACE + "LINKER:--default-script=${GENERIC_F410TBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410TBYX_MCU} +) +target_link_libraries(GENERIC_F410TBYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F410TBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F410TBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F410TBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F410TBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F410TBYX_serial_none INTERFACE) +target_compile_options(GENERIC_F410TBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F410TBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F410TBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F410TBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F410TBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F410TBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F410TBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F410TBYX_usb_none INTERFACE) +target_compile_options(GENERIC_F410TBYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F410TBYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F410TBYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F410TBYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F410TBYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F410TBYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F410TBYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F410TBYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F410TBYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F410T(8-B)Y") +set(GENERIC_F410TBYX_hid_MAXSIZE 131072) +set(GENERIC_F410TBYX_hid_MAXDATASIZE 32768) +set(GENERIC_F410TBYX_hid_MCU cortex-m4) +set(GENERIC_F410TBYX_hid_FPCONF "-") +add_library(GENERIC_F410TBYX_hid INTERFACE) +target_compile_options(GENERIC_F410TBYX_hid INTERFACE + "SHELL:-DSTM32F410Tx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410TBYX_hid_MCU} +) +target_compile_definitions(GENERIC_F410TBYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F410TBYX" + "BOARD_NAME=\"GENERIC_F410TBYX\"" + "BOARD_ID=GENERIC_F410TBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F410TBYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F410TBYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F410TBYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F410TBYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F410TBYX_hid_MCU} +) +target_link_libraries(GENERIC_F410TBYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F411CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CCUX_MAXSIZE 262144) +set(GENERIC_F411CCUX_MAXDATASIZE 131072) +set(GENERIC_F411CCUX_MCU cortex-m4) +set(GENERIC_F411CCUX_FPCONF "-") +add_library(GENERIC_F411CCUX INTERFACE) +target_compile_options(GENERIC_F411CCUX INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCUX_MCU} +) +target_compile_definitions(GENERIC_F411CCUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CCUX" + "BOARD_NAME=\"GENERIC_F411CCUX\"" + "BOARD_ID=GENERIC_F411CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CCUX INTERFACE + "LINKER:--default-script=${GENERIC_F411CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCUX_MCU} +) +target_link_libraries(GENERIC_F411CCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F411CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F411CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F411CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F411CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_F411CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F411CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F411CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F411CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F411CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F411CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F411CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F411CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_F411CCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F411CCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F411CCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F411CCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F411CCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F411CCUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CCUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CCUX_hid_MAXSIZE 262144) +set(GENERIC_F411CCUX_hid_MAXDATASIZE 131072) +set(GENERIC_F411CCUX_hid_MCU cortex-m4) +set(GENERIC_F411CCUX_hid_FPCONF "-") +add_library(GENERIC_F411CCUX_hid INTERFACE) +target_compile_options(GENERIC_F411CCUX_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCUX_hid_MCU} +) +target_compile_definitions(GENERIC_F411CCUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CCUX" + "BOARD_NAME=\"GENERIC_F411CCUX\"" + "BOARD_ID=GENERIC_F411CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CCUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CCUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CCUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F411CCUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCUX_hid_MCU} +) +target_link_libraries(GENERIC_F411CCUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F411CCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CCYX_MAXSIZE 262144) +set(GENERIC_F411CCYX_MAXDATASIZE 131072) +set(GENERIC_F411CCYX_MCU cortex-m4) +set(GENERIC_F411CCYX_FPCONF "-") +add_library(GENERIC_F411CCYX INTERFACE) +target_compile_options(GENERIC_F411CCYX INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCYX_MCU} +) +target_compile_definitions(GENERIC_F411CCYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CCYX" + "BOARD_NAME=\"GENERIC_F411CCYX\"" + "BOARD_ID=GENERIC_F411CCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CCYX INTERFACE + "LINKER:--default-script=${GENERIC_F411CCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCYX_MCU} +) +target_link_libraries(GENERIC_F411CCYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F411CCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F411CCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F411CCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F411CCYX_serial_none INTERFACE) +target_compile_options(GENERIC_F411CCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F411CCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F411CCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F411CCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F411CCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F411CCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F411CCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F411CCYX_usb_none INTERFACE) +target_compile_options(GENERIC_F411CCYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CCYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F411CCYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CCYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F411CCYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F411CCYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F411CCYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F411CCYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CCYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CCYX_hid_MAXSIZE 262144) +set(GENERIC_F411CCYX_hid_MAXDATASIZE 131072) +set(GENERIC_F411CCYX_hid_MCU cortex-m4) +set(GENERIC_F411CCYX_hid_FPCONF "-") +add_library(GENERIC_F411CCYX_hid INTERFACE) +target_compile_options(GENERIC_F411CCYX_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCYX_hid_MCU} +) +target_compile_definitions(GENERIC_F411CCYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CCYX" + "BOARD_NAME=\"GENERIC_F411CCYX\"" + "BOARD_ID=GENERIC_F411CCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CCYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CCYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CCYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F411CCYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CCYX_hid_MCU} +) +target_link_libraries(GENERIC_F411CCYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F411CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CEUX_MAXSIZE 524288) +set(GENERIC_F411CEUX_MAXDATASIZE 131072) +set(GENERIC_F411CEUX_MCU cortex-m4) +set(GENERIC_F411CEUX_FPCONF "-") +add_library(GENERIC_F411CEUX INTERFACE) +target_compile_options(GENERIC_F411CEUX INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEUX_MCU} +) +target_compile_definitions(GENERIC_F411CEUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CEUX" + "BOARD_NAME=\"GENERIC_F411CEUX\"" + "BOARD_ID=GENERIC_F411CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CEUX INTERFACE + "LINKER:--default-script=${GENERIC_F411CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEUX_MCU} +) +target_link_libraries(GENERIC_F411CEUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F411CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F411CEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F411CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F411CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_F411CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F411CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F411CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F411CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F411CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F411CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F411CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F411CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_F411CEUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CEUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F411CEUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CEUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F411CEUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F411CEUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F411CEUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F411CEUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CEUX_hid_MAXSIZE 524288) +set(GENERIC_F411CEUX_hid_MAXDATASIZE 131072) +set(GENERIC_F411CEUX_hid_MCU cortex-m4) +set(GENERIC_F411CEUX_hid_FPCONF "-") +add_library(GENERIC_F411CEUX_hid INTERFACE) +target_compile_options(GENERIC_F411CEUX_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEUX_hid_MCU} +) +target_compile_definitions(GENERIC_F411CEUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CEUX" + "BOARD_NAME=\"GENERIC_F411CEUX\"" + "BOARD_ID=GENERIC_F411CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CEUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CEUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CEUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F411CEUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEUX_hid_MCU} +) +target_link_libraries(GENERIC_F411CEUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F411CEYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CEYX_MAXSIZE 524288) +set(GENERIC_F411CEYX_MAXDATASIZE 131072) +set(GENERIC_F411CEYX_MCU cortex-m4) +set(GENERIC_F411CEYX_FPCONF "-") +add_library(GENERIC_F411CEYX INTERFACE) +target_compile_options(GENERIC_F411CEYX INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEYX_MCU} +) +target_compile_definitions(GENERIC_F411CEYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CEYX" + "BOARD_NAME=\"GENERIC_F411CEYX\"" + "BOARD_ID=GENERIC_F411CEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CEYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CEYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CEYX INTERFACE + "LINKER:--default-script=${GENERIC_F411CEYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEYX_MCU} +) +target_link_libraries(GENERIC_F411CEYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F411CEYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F411CEYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CEYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F411CEYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F411CEYX_serial_none INTERFACE) +target_compile_options(GENERIC_F411CEYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F411CEYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F411CEYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F411CEYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F411CEYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F411CEYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F411CEYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F411CEYX_usb_none INTERFACE) +target_compile_options(GENERIC_F411CEYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CEYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F411CEYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F411CEYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F411CEYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F411CEYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F411CEYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F411CEYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F411CEYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(GENERIC_F411CEYX_hid_MAXSIZE 524288) +set(GENERIC_F411CEYX_hid_MAXDATASIZE 131072) +set(GENERIC_F411CEYX_hid_MCU cortex-m4) +set(GENERIC_F411CEYX_hid_FPCONF "-") +add_library(GENERIC_F411CEYX_hid INTERFACE) +target_compile_options(GENERIC_F411CEYX_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEYX_hid_MCU} +) +target_compile_definitions(GENERIC_F411CEYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411CEYX" + "BOARD_NAME=\"GENERIC_F411CEYX\"" + "BOARD_ID=GENERIC_F411CEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411CEYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411CEYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F411CEYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F411CEYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411CEYX_hid_MCU} +) +target_link_libraries(GENERIC_F411CEYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F411RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F411RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T") +set(GENERIC_F411RCTX_MAXSIZE 262144) +set(GENERIC_F411RCTX_MAXDATASIZE 131072) +set(GENERIC_F411RCTX_MCU cortex-m4) +set(GENERIC_F411RCTX_FPCONF "-") +add_library(GENERIC_F411RCTX INTERFACE) +target_compile_options(GENERIC_F411RCTX INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RCTX_MCU} +) +target_compile_definitions(GENERIC_F411RCTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411RCTX" + "BOARD_NAME=\"GENERIC_F411RCTX\"" + "BOARD_ID=GENERIC_F411RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F411RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F411RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RCTX_MCU} +) +target_link_libraries(GENERIC_F411RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F411RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F411RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F411RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F411RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F411RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F411RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F411RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F411RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F411RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F411RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F411RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F411RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F411RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F411RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F411RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F411RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F411RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F411RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F411RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F411RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F411RCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F411RCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T") +set(GENERIC_F411RCTX_hid_MAXSIZE 262144) +set(GENERIC_F411RCTX_hid_MAXDATASIZE 131072) +set(GENERIC_F411RCTX_hid_MCU cortex-m4) +set(GENERIC_F411RCTX_hid_FPCONF "-") +add_library(GENERIC_F411RCTX_hid INTERFACE) +target_compile_options(GENERIC_F411RCTX_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F411RCTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411RCTX" + "BOARD_NAME=\"GENERIC_F411RCTX\"" + "BOARD_ID=GENERIC_F411RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411RCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411RCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F411RCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F411RCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RCTX_hid_MCU} +) +target_link_libraries(GENERIC_F411RCTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F411RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F411RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T") +set(GENERIC_F411RETX_MAXSIZE 524288) +set(GENERIC_F411RETX_MAXDATASIZE 131072) +set(GENERIC_F411RETX_MCU cortex-m4) +set(GENERIC_F411RETX_FPCONF "-") +add_library(GENERIC_F411RETX INTERFACE) +target_compile_options(GENERIC_F411RETX INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RETX_MCU} +) +target_compile_definitions(GENERIC_F411RETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411RETX" + "BOARD_NAME=\"GENERIC_F411RETX\"" + "BOARD_ID=GENERIC_F411RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F411RETX INTERFACE + "LINKER:--default-script=${GENERIC_F411RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RETX_MCU} +) +target_link_libraries(GENERIC_F411RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F411RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F411RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F411RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F411RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F411RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F411RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F411RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F411RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F411RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F411RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F411RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F411RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F411RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F411RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F411RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F411RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F411RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F411RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F411RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F411RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F411RETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F411RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T") +set(GENERIC_F411RETX_hid_MAXSIZE 524288) +set(GENERIC_F411RETX_hid_MAXDATASIZE 131072) +set(GENERIC_F411RETX_hid_MCU cortex-m4) +set(GENERIC_F411RETX_hid_FPCONF "-") +add_library(GENERIC_F411RETX_hid INTERFACE) +target_compile_options(GENERIC_F411RETX_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RETX_hid_MCU} +) +target_compile_definitions(GENERIC_F411RETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F411RETX" + "BOARD_NAME=\"GENERIC_F411RETX\"" + "BOARD_ID=GENERIC_F411RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F411RETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F411RETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F411RETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F411RETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F411RETX_hid_MCU} +) +target_link_libraries(GENERIC_F411RETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F412CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U") +set(GENERIC_F412CEUX_MAXSIZE 524288) +set(GENERIC_F412CEUX_MAXDATASIZE 262144) +set(GENERIC_F412CEUX_MCU cortex-m4) +set(GENERIC_F412CEUX_FPCONF "-") +add_library(GENERIC_F412CEUX INTERFACE) +target_compile_options(GENERIC_F412CEUX INTERFACE + "SHELL:-DSTM32F412Cx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CEUX_MCU} +) +target_compile_definitions(GENERIC_F412CEUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412CEUX" + "BOARD_NAME=\"GENERIC_F412CEUX\"" + "BOARD_ID=GENERIC_F412CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F412CEUX INTERFACE + "LINKER:--default-script=${GENERIC_F412CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CEUX_MCU} +) +target_link_libraries(GENERIC_F412CEUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412CEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F412CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_F412CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F412CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_F412CEUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412CEUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412CEUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412CEUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412CEUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412CEUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412CEUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412CEUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412CEUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U") +set(GENERIC_F412CEUX_hid_MAXSIZE 524288) +set(GENERIC_F412CEUX_hid_MAXDATASIZE 262144) +set(GENERIC_F412CEUX_hid_MCU cortex-m4) +set(GENERIC_F412CEUX_hid_FPCONF "-") +add_library(GENERIC_F412CEUX_hid INTERFACE) +target_compile_options(GENERIC_F412CEUX_hid INTERFACE + "SHELL:-DSTM32F412Cx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CEUX_hid_MCU} +) +target_compile_definitions(GENERIC_F412CEUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412CEUX" + "BOARD_NAME=\"GENERIC_F412CEUX\"" + "BOARD_ID=GENERIC_F412CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412CEUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412CEUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412CEUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412CEUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CEUX_hid_MCU} +) +target_link_libraries(GENERIC_F412CEUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412CGUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F412CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U") +set(GENERIC_F412CGUX_MAXSIZE 1048576) +set(GENERIC_F412CGUX_MAXDATASIZE 262144) +set(GENERIC_F412CGUX_MCU cortex-m4) +set(GENERIC_F412CGUX_FPCONF "-") +add_library(GENERIC_F412CGUX INTERFACE) +target_compile_options(GENERIC_F412CGUX INTERFACE + "SHELL:-DSTM32F412Cx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CGUX_MCU} +) +target_compile_definitions(GENERIC_F412CGUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412CGUX" + "BOARD_NAME=\"GENERIC_F412CGUX\"" + "BOARD_ID=GENERIC_F412CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412CGUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412CGUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F412CGUX INTERFACE + "LINKER:--default-script=${GENERIC_F412CGUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CGUX_MCU} +) +target_link_libraries(GENERIC_F412CGUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412CGUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412CGUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412CGUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F412CGUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412CGUX_serial_none INTERFACE) +target_compile_options(GENERIC_F412CGUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412CGUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412CGUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412CGUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412CGUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412CGUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F412CGUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412CGUX_usb_none INTERFACE) +target_compile_options(GENERIC_F412CGUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412CGUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412CGUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412CGUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412CGUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412CGUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412CGUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412CGUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412CGUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412C(E-G)U") +set(GENERIC_F412CGUX_hid_MAXSIZE 1048576) +set(GENERIC_F412CGUX_hid_MAXDATASIZE 262144) +set(GENERIC_F412CGUX_hid_MCU cortex-m4) +set(GENERIC_F412CGUX_hid_FPCONF "-") +add_library(GENERIC_F412CGUX_hid INTERFACE) +target_compile_options(GENERIC_F412CGUX_hid INTERFACE + "SHELL:-DSTM32F412Cx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CGUX_hid_MCU} +) +target_compile_definitions(GENERIC_F412CGUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412CGUX" + "BOARD_NAME=\"GENERIC_F412CGUX\"" + "BOARD_ID=GENERIC_F412CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412CGUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412CGUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412CGUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412CGUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412CGUX_hid_MCU} +) +target_link_libraries(GENERIC_F412CGUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RETX_MAXSIZE 524288) +set(GENERIC_F412RETX_MAXDATASIZE 262144) +set(GENERIC_F412RETX_MCU cortex-m4) +set(GENERIC_F412RETX_FPCONF "-") +add_library(GENERIC_F412RETX INTERFACE) +target_compile_options(GENERIC_F412RETX INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RETX_MCU} +) +target_compile_definitions(GENERIC_F412RETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RETX" + "BOARD_NAME=\"GENERIC_F412RETX\"" + "BOARD_ID=GENERIC_F412RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RETX INTERFACE + "LINKER:--default-script=${GENERIC_F412RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RETX_MCU} +) +target_link_libraries(GENERIC_F412RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F412RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F412RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F412RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F412RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412RETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RETX_hid_MAXSIZE 524288) +set(GENERIC_F412RETX_hid_MAXDATASIZE 262144) +set(GENERIC_F412RETX_hid_MCU cortex-m4) +set(GENERIC_F412RETX_hid_FPCONF "-") +add_library(GENERIC_F412RETX_hid INTERFACE) +target_compile_options(GENERIC_F412RETX_hid INTERFACE + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RETX_hid_MCU} +) +target_compile_definitions(GENERIC_F412RETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RETX" + "BOARD_NAME=\"GENERIC_F412RETX\"" + "BOARD_ID=GENERIC_F412RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412RETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RETX_hid_MCU} +) +target_link_libraries(GENERIC_F412RETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F412REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412REYX_MAXSIZE 524288) +set(GENERIC_F412REYX_MAXDATASIZE 262144) +set(GENERIC_F412REYX_MCU cortex-m4) +set(GENERIC_F412REYX_FPCONF "-") +add_library(GENERIC_F412REYX INTERFACE) +target_compile_options(GENERIC_F412REYX INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYX_MCU} +) +target_compile_definitions(GENERIC_F412REYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412REYX" + "BOARD_NAME=\"GENERIC_F412REYX\"" + "BOARD_ID=GENERIC_F412REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F412REYX INTERFACE + "LINKER:--default-script=${GENERIC_F412REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYX_MCU} +) +target_link_libraries(GENERIC_F412REYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F412REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412REYX_serial_none INTERFACE) +target_compile_options(GENERIC_F412REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F412REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412REYX_usb_none INTERFACE) +target_compile_options(GENERIC_F412REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412REYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412REYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412REYX_hid_MAXSIZE 524288) +set(GENERIC_F412REYX_hid_MAXDATASIZE 262144) +set(GENERIC_F412REYX_hid_MCU cortex-m4) +set(GENERIC_F412REYX_hid_FPCONF "-") +add_library(GENERIC_F412REYX_hid INTERFACE) +target_compile_options(GENERIC_F412REYX_hid INTERFACE + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYX_hid_MCU} +) +target_compile_definitions(GENERIC_F412REYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412REYX" + "BOARD_NAME=\"GENERIC_F412REYX\"" + "BOARD_ID=GENERIC_F412REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412REYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412REYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412REYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412REYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYX_hid_MCU} +) +target_link_libraries(GENERIC_F412REYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412REYXP +# ----------------------------------------------------------------------------- + +set(GENERIC_F412REYXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412REYXP_MAXSIZE 524288) +set(GENERIC_F412REYXP_MAXDATASIZE 262144) +set(GENERIC_F412REYXP_MCU cortex-m4) +set(GENERIC_F412REYXP_FPCONF "-") +add_library(GENERIC_F412REYXP INTERFACE) +target_compile_options(GENERIC_F412REYXP INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYXP_MCU} +) +target_compile_definitions(GENERIC_F412REYXP INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412REYXP" + "BOARD_NAME=\"GENERIC_F412REYXP\"" + "BOARD_ID=GENERIC_F412REYXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412REYXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412REYXP_VARIANT_PATH} +) + +target_link_options(GENERIC_F412REYXP INTERFACE + "LINKER:--default-script=${GENERIC_F412REYXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYXP_MCU} +) +target_link_libraries(GENERIC_F412REYXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412REYXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412REYXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412REYXP_serial_generic INTERFACE) +target_compile_options(GENERIC_F412REYXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412REYXP_serial_none INTERFACE) +target_compile_options(GENERIC_F412REYXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412REYXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412REYXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412REYXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412REYXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412REYXP_usb_HID INTERFACE) +target_compile_options(GENERIC_F412REYXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412REYXP_usb_none INTERFACE) +target_compile_options(GENERIC_F412REYXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412REYXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412REYXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412REYXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412REYXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412REYXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412REYXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412REYXP_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412REYXP_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412REYXP_hid_MAXSIZE 524288) +set(GENERIC_F412REYXP_hid_MAXDATASIZE 262144) +set(GENERIC_F412REYXP_hid_MCU cortex-m4) +set(GENERIC_F412REYXP_hid_FPCONF "-") +add_library(GENERIC_F412REYXP_hid INTERFACE) +target_compile_options(GENERIC_F412REYXP_hid INTERFACE + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYXP_hid_MCU} +) +target_compile_definitions(GENERIC_F412REYXP_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412REYXP" + "BOARD_NAME=\"GENERIC_F412REYXP\"" + "BOARD_ID=GENERIC_F412REYXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412REYXP_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412REYXP_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412REYXP_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412REYXP_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412REYXP_hid_MCU} +) +target_link_libraries(GENERIC_F412REYXP_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RGTX_MAXSIZE 1048576) +set(GENERIC_F412RGTX_MAXDATASIZE 262144) +set(GENERIC_F412RGTX_MCU cortex-m4) +set(GENERIC_F412RGTX_FPCONF "-") +add_library(GENERIC_F412RGTX INTERFACE) +target_compile_options(GENERIC_F412RGTX INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGTX_MCU} +) +target_compile_definitions(GENERIC_F412RGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RGTX" + "BOARD_NAME=\"GENERIC_F412RGTX\"" + "BOARD_ID=GENERIC_F412RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F412RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGTX_MCU} +) +target_link_libraries(GENERIC_F412RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F412RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F412RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F412RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F412RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412RGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RGTX_hid_MAXSIZE 1048576) +set(GENERIC_F412RGTX_hid_MAXDATASIZE 262144) +set(GENERIC_F412RGTX_hid_MCU cortex-m4) +set(GENERIC_F412RGTX_hid_FPCONF "-") +add_library(GENERIC_F412RGTX_hid INTERFACE) +target_compile_options(GENERIC_F412RGTX_hid INTERFACE + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F412RGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RGTX" + "BOARD_NAME=\"GENERIC_F412RGTX\"" + "BOARD_ID=GENERIC_F412RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412RGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGTX_hid_MCU} +) +target_link_libraries(GENERIC_F412RGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412RGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RGYX_MAXSIZE 1048576) +set(GENERIC_F412RGYX_MAXDATASIZE 262144) +set(GENERIC_F412RGYX_MCU cortex-m4) +set(GENERIC_F412RGYX_FPCONF "-") +add_library(GENERIC_F412RGYX INTERFACE) +target_compile_options(GENERIC_F412RGYX INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYX_MCU} +) +target_compile_definitions(GENERIC_F412RGYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RGYX" + "BOARD_NAME=\"GENERIC_F412RGYX\"" + "BOARD_ID=GENERIC_F412RGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RGYX INTERFACE + "LINKER:--default-script=${GENERIC_F412RGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYX_MCU} +) +target_link_libraries(GENERIC_F412RGYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412RGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412RGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F412RGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412RGYX_serial_none INTERFACE) +target_compile_options(GENERIC_F412RGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412RGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412RGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412RGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412RGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412RGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F412RGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412RGYX_usb_none INTERFACE) +target_compile_options(GENERIC_F412RGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412RGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412RGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412RGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412RGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412RGYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RGYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RGYX_hid_MAXSIZE 1048576) +set(GENERIC_F412RGYX_hid_MAXDATASIZE 262144) +set(GENERIC_F412RGYX_hid_MCU cortex-m4) +set(GENERIC_F412RGYX_hid_FPCONF "-") +add_library(GENERIC_F412RGYX_hid INTERFACE) +target_compile_options(GENERIC_F412RGYX_hid INTERFACE + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYX_hid_MCU} +) +target_compile_definitions(GENERIC_F412RGYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RGYX" + "BOARD_NAME=\"GENERIC_F412RGYX\"" + "BOARD_ID=GENERIC_F412RGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RGYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RGYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RGYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412RGYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYX_hid_MCU} +) +target_link_libraries(GENERIC_F412RGYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F412RGYXP +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RGYXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RGYXP_MAXSIZE 1048576) +set(GENERIC_F412RGYXP_MAXDATASIZE 262144) +set(GENERIC_F412RGYXP_MCU cortex-m4) +set(GENERIC_F412RGYXP_FPCONF "-") +add_library(GENERIC_F412RGYXP INTERFACE) +target_compile_options(GENERIC_F412RGYXP INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYXP_MCU} +) +target_compile_definitions(GENERIC_F412RGYXP INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RGYXP" + "BOARD_NAME=\"GENERIC_F412RGYXP\"" + "BOARD_ID=GENERIC_F412RGYXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RGYXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RGYXP_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RGYXP INTERFACE + "LINKER:--default-script=${GENERIC_F412RGYXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYXP_MCU} +) +target_link_libraries(GENERIC_F412RGYXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F412RGYXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_F412RGYXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGYXP_serial_generic INTERFACE) +target_compile_options(GENERIC_F412RGYXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F412RGYXP_serial_none INTERFACE) +target_compile_options(GENERIC_F412RGYXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F412RGYXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_F412RGYXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F412RGYXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F412RGYXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F412RGYXP_usb_HID INTERFACE) +target_compile_options(GENERIC_F412RGYXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F412RGYXP_usb_none INTERFACE) +target_compile_options(GENERIC_F412RGYXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGYXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_F412RGYXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F412RGYXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_F412RGYXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F412RGYXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F412RGYXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F412RGYXP_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F412RGYXP_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(GENERIC_F412RGYXP_hid_MAXSIZE 1048576) +set(GENERIC_F412RGYXP_hid_MAXDATASIZE 262144) +set(GENERIC_F412RGYXP_hid_MCU cortex-m4) +set(GENERIC_F412RGYXP_hid_FPCONF "-") +add_library(GENERIC_F412RGYXP_hid INTERFACE) +target_compile_options(GENERIC_F412RGYXP_hid INTERFACE + "SHELL:-DSTM32F412Rx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYXP_hid_MCU} +) +target_compile_definitions(GENERIC_F412RGYXP_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F412RGYXP" + "BOARD_NAME=\"GENERIC_F412RGYXP\"" + "BOARD_ID=GENERIC_F412RGYXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F412RGYXP_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F412RGYXP_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F412RGYXP_hid INTERFACE + "LINKER:--default-script=${GENERIC_F412RGYXP_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F412RGYXP_hid_MCU} +) +target_link_libraries(GENERIC_F412RGYXP_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413CGUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU") +set(GENERIC_F413CGUX_MAXSIZE 1048576) +set(GENERIC_F413CGUX_MAXDATASIZE 327680) +set(GENERIC_F413CGUX_MCU cortex-m4) +set(GENERIC_F413CGUX_FPCONF "-") +add_library(GENERIC_F413CGUX INTERFACE) +target_compile_options(GENERIC_F413CGUX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CGUX_MCU} +) +target_compile_definitions(GENERIC_F413CGUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413CGUX" + "BOARD_NAME=\"GENERIC_F413CGUX\"" + "BOARD_ID=GENERIC_F413CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413CGUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413CGUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413CGUX INTERFACE + "LINKER:--default-script=${GENERIC_F413CGUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CGUX_MCU} +) +target_link_libraries(GENERIC_F413CGUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413CGUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413CGUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413CGUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413CGUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413CGUX_serial_none INTERFACE) +target_compile_options(GENERIC_F413CGUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413CGUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413CGUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413CGUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413CGUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413CGUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413CGUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413CGUX_usb_none INTERFACE) +target_compile_options(GENERIC_F413CGUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413CGUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413CGUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413CGUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413CGUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413CGUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413CGUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413CGUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413CGUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU") +set(GENERIC_F413CGUX_hid_MAXSIZE 1048576) +set(GENERIC_F413CGUX_hid_MAXDATASIZE 327680) +set(GENERIC_F413CGUX_hid_MCU cortex-m4) +set(GENERIC_F413CGUX_hid_FPCONF "-") +add_library(GENERIC_F413CGUX_hid INTERFACE) +target_compile_options(GENERIC_F413CGUX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CGUX_hid_MCU} +) +target_compile_definitions(GENERIC_F413CGUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413CGUX" + "BOARD_NAME=\"GENERIC_F413CGUX\"" + "BOARD_ID=GENERIC_F413CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413CGUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413CGUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413CGUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413CGUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CGUX_hid_MCU} +) +target_link_libraries(GENERIC_F413CGUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413CHUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413CHUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU") +set(GENERIC_F413CHUX_MAXSIZE 1572864) +set(GENERIC_F413CHUX_MAXDATASIZE 327680) +set(GENERIC_F413CHUX_MCU cortex-m4) +set(GENERIC_F413CHUX_FPCONF "-") +add_library(GENERIC_F413CHUX INTERFACE) +target_compile_options(GENERIC_F413CHUX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CHUX_MCU} +) +target_compile_definitions(GENERIC_F413CHUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413CHUX" + "BOARD_NAME=\"GENERIC_F413CHUX\"" + "BOARD_ID=GENERIC_F413CHUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413CHUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413CHUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413CHUX INTERFACE + "LINKER:--default-script=${GENERIC_F413CHUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CHUX_MCU} +) +target_link_libraries(GENERIC_F413CHUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413CHUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413CHUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413CHUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413CHUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413CHUX_serial_none INTERFACE) +target_compile_options(GENERIC_F413CHUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413CHUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413CHUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413CHUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413CHUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413CHUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413CHUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413CHUX_usb_none INTERFACE) +target_compile_options(GENERIC_F413CHUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413CHUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413CHUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413CHUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413CHUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413CHUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413CHUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413CHUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413CHUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU") +set(GENERIC_F413CHUX_hid_MAXSIZE 1572864) +set(GENERIC_F413CHUX_hid_MAXDATASIZE 327680) +set(GENERIC_F413CHUX_hid_MCU cortex-m4) +set(GENERIC_F413CHUX_hid_FPCONF "-") +add_library(GENERIC_F413CHUX_hid INTERFACE) +target_compile_options(GENERIC_F413CHUX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CHUX_hid_MCU} +) +target_compile_definitions(GENERIC_F413CHUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413CHUX" + "BOARD_NAME=\"GENERIC_F413CHUX\"" + "BOARD_ID=GENERIC_F413CHUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413CHUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413CHUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413CHUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413CHUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413CHUX_hid_MCU} +) +target_link_libraries(GENERIC_F413CHUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT") +set(GENERIC_F413RGTX_MAXSIZE 1048576) +set(GENERIC_F413RGTX_MAXDATASIZE 327680) +set(GENERIC_F413RGTX_MCU cortex-m4) +set(GENERIC_F413RGTX_FPCONF "-") +add_library(GENERIC_F413RGTX INTERFACE) +target_compile_options(GENERIC_F413RGTX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RGTX_MCU} +) +target_compile_definitions(GENERIC_F413RGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413RGTX" + "BOARD_NAME=\"GENERIC_F413RGTX\"" + "BOARD_ID=GENERIC_F413RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F413RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RGTX_MCU} +) +target_link_libraries(GENERIC_F413RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F413RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F413RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413RGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT") +set(GENERIC_F413RGTX_hid_MAXSIZE 1048576) +set(GENERIC_F413RGTX_hid_MAXDATASIZE 327680) +set(GENERIC_F413RGTX_hid_MCU cortex-m4) +set(GENERIC_F413RGTX_hid_FPCONF "-") +add_library(GENERIC_F413RGTX_hid INTERFACE) +target_compile_options(GENERIC_F413RGTX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F413RGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413RGTX" + "BOARD_NAME=\"GENERIC_F413RGTX\"" + "BOARD_ID=GENERIC_F413RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413RGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413RGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413RGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413RGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RGTX_hid_MCU} +) +target_link_libraries(GENERIC_F413RGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413RHTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413RHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT") +set(GENERIC_F413RHTX_MAXSIZE 1572864) +set(GENERIC_F413RHTX_MAXDATASIZE 327680) +set(GENERIC_F413RHTX_MCU cortex-m4) +set(GENERIC_F413RHTX_FPCONF "-") +add_library(GENERIC_F413RHTX INTERFACE) +target_compile_options(GENERIC_F413RHTX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RHTX_MCU} +) +target_compile_definitions(GENERIC_F413RHTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413RHTX" + "BOARD_NAME=\"GENERIC_F413RHTX\"" + "BOARD_ID=GENERIC_F413RHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413RHTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413RHTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413RHTX INTERFACE + "LINKER:--default-script=${GENERIC_F413RHTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RHTX_MCU} +) +target_link_libraries(GENERIC_F413RHTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413RHTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413RHTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413RHTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413RHTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413RHTX_serial_none INTERFACE) +target_compile_options(GENERIC_F413RHTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413RHTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413RHTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413RHTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413RHTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413RHTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413RHTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413RHTX_usb_none INTERFACE) +target_compile_options(GENERIC_F413RHTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413RHTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413RHTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413RHTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413RHTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413RHTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413RHTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413RHTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413RHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT") +set(GENERIC_F413RHTX_hid_MAXSIZE 1572864) +set(GENERIC_F413RHTX_hid_MAXDATASIZE 327680) +set(GENERIC_F413RHTX_hid_MCU cortex-m4) +set(GENERIC_F413RHTX_hid_FPCONF "-") +add_library(GENERIC_F413RHTX_hid INTERFACE) +target_compile_options(GENERIC_F413RHTX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RHTX_hid_MCU} +) +target_compile_definitions(GENERIC_F413RHTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413RHTX" + "BOARD_NAME=\"GENERIC_F413RHTX\"" + "BOARD_ID=GENERIC_F413RHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413RHTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413RHTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413RHTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413RHTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413RHTX_hid_MCU} +) +target_link_libraries(GENERIC_F413RHTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413ZGJX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZGJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZGJX_MAXSIZE 1048576) +set(GENERIC_F413ZGJX_MAXDATASIZE 327680) +set(GENERIC_F413ZGJX_MCU cortex-m4) +set(GENERIC_F413ZGJX_FPCONF "-") +add_library(GENERIC_F413ZGJX INTERFACE) +target_compile_options(GENERIC_F413ZGJX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGJX_MCU} +) +target_compile_definitions(GENERIC_F413ZGJX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZGJX" + "BOARD_NAME=\"GENERIC_F413ZGJX\"" + "BOARD_ID=GENERIC_F413ZGJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZGJX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZGJX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZGJX INTERFACE + "LINKER:--default-script=${GENERIC_F413ZGJX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGJX_MCU} +) +target_link_libraries(GENERIC_F413ZGJX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413ZGJX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413ZGJX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZGJX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413ZGJX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413ZGJX_serial_none INTERFACE) +target_compile_options(GENERIC_F413ZGJX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413ZGJX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413ZGJX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413ZGJX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413ZGJX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413ZGJX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413ZGJX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413ZGJX_usb_none INTERFACE) +target_compile_options(GENERIC_F413ZGJX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZGJX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413ZGJX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZGJX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413ZGJX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413ZGJX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413ZGJX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413ZGJX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZGJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZGJX_hid_MAXSIZE 1048576) +set(GENERIC_F413ZGJX_hid_MAXDATASIZE 327680) +set(GENERIC_F413ZGJX_hid_MCU cortex-m4) +set(GENERIC_F413ZGJX_hid_FPCONF "-") +add_library(GENERIC_F413ZGJX_hid INTERFACE) +target_compile_options(GENERIC_F413ZGJX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGJX_hid_MCU} +) +target_compile_definitions(GENERIC_F413ZGJX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZGJX" + "BOARD_NAME=\"GENERIC_F413ZGJX\"" + "BOARD_ID=GENERIC_F413ZGJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZGJX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZGJX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZGJX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413ZGJX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGJX_hid_MCU} +) +target_link_libraries(GENERIC_F413ZGJX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZGTX_MAXSIZE 1048576) +set(GENERIC_F413ZGTX_MAXDATASIZE 327680) +set(GENERIC_F413ZGTX_MCU cortex-m4) +set(GENERIC_F413ZGTX_FPCONF "-") +add_library(GENERIC_F413ZGTX INTERFACE) +target_compile_options(GENERIC_F413ZGTX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGTX_MCU} +) +target_compile_definitions(GENERIC_F413ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZGTX" + "BOARD_NAME=\"GENERIC_F413ZGTX\"" + "BOARD_ID=GENERIC_F413ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F413ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGTX_MCU} +) +target_link_libraries(GENERIC_F413ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F413ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F413ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F413ZGTX_hid_MAXDATASIZE 327680) +set(GENERIC_F413ZGTX_hid_MCU cortex-m4) +set(GENERIC_F413ZGTX_hid_FPCONF "-") +add_library(GENERIC_F413ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F413ZGTX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F413ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZGTX" + "BOARD_NAME=\"GENERIC_F413ZGTX\"" + "BOARD_ID=GENERIC_F413ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F413ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413ZHJX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZHJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZHJX_MAXSIZE 1572864) +set(GENERIC_F413ZHJX_MAXDATASIZE 327680) +set(GENERIC_F413ZHJX_MCU cortex-m4) +set(GENERIC_F413ZHJX_FPCONF "-") +add_library(GENERIC_F413ZHJX INTERFACE) +target_compile_options(GENERIC_F413ZHJX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHJX_MCU} +) +target_compile_definitions(GENERIC_F413ZHJX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZHJX" + "BOARD_NAME=\"GENERIC_F413ZHJX\"" + "BOARD_ID=GENERIC_F413ZHJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZHJX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZHJX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZHJX INTERFACE + "LINKER:--default-script=${GENERIC_F413ZHJX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHJX_MCU} +) +target_link_libraries(GENERIC_F413ZHJX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413ZHJX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413ZHJX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZHJX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413ZHJX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413ZHJX_serial_none INTERFACE) +target_compile_options(GENERIC_F413ZHJX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413ZHJX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413ZHJX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413ZHJX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413ZHJX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413ZHJX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413ZHJX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413ZHJX_usb_none INTERFACE) +target_compile_options(GENERIC_F413ZHJX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZHJX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413ZHJX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZHJX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413ZHJX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413ZHJX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413ZHJX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413ZHJX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZHJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZHJX_hid_MAXSIZE 1572864) +set(GENERIC_F413ZHJX_hid_MAXDATASIZE 327680) +set(GENERIC_F413ZHJX_hid_MCU cortex-m4) +set(GENERIC_F413ZHJX_hid_FPCONF "-") +add_library(GENERIC_F413ZHJX_hid INTERFACE) +target_compile_options(GENERIC_F413ZHJX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHJX_hid_MCU} +) +target_compile_definitions(GENERIC_F413ZHJX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZHJX" + "BOARD_NAME=\"GENERIC_F413ZHJX\"" + "BOARD_ID=GENERIC_F413ZHJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZHJX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZHJX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZHJX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413ZHJX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHJX_hid_MCU} +) +target_link_libraries(GENERIC_F413ZHJX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F413ZHTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZHTX_MAXSIZE 1572864) +set(GENERIC_F413ZHTX_MAXDATASIZE 327680) +set(GENERIC_F413ZHTX_MCU cortex-m4) +set(GENERIC_F413ZHTX_FPCONF "-") +add_library(GENERIC_F413ZHTX INTERFACE) +target_compile_options(GENERIC_F413ZHTX INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHTX_MCU} +) +target_compile_definitions(GENERIC_F413ZHTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZHTX" + "BOARD_NAME=\"GENERIC_F413ZHTX\"" + "BOARD_ID=GENERIC_F413ZHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZHTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZHTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZHTX INTERFACE + "LINKER:--default-script=${GENERIC_F413ZHTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHTX_MCU} +) +target_link_libraries(GENERIC_F413ZHTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F413ZHTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F413ZHTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZHTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F413ZHTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F413ZHTX_serial_none INTERFACE) +target_compile_options(GENERIC_F413ZHTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F413ZHTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F413ZHTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F413ZHTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F413ZHTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F413ZHTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F413ZHTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F413ZHTX_usb_none INTERFACE) +target_compile_options(GENERIC_F413ZHTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZHTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F413ZHTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F413ZHTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F413ZHTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F413ZHTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F413ZHTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F413ZHTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F413ZHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F413ZHTX_hid_MAXSIZE 1572864) +set(GENERIC_F413ZHTX_hid_MAXDATASIZE 327680) +set(GENERIC_F413ZHTX_hid_MCU cortex-m4) +set(GENERIC_F413ZHTX_hid_FPCONF "-") +add_library(GENERIC_F413ZHTX_hid INTERFACE) +target_compile_options(GENERIC_F413ZHTX_hid INTERFACE + "SHELL:-DSTM32F413xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHTX_hid_MCU} +) +target_compile_definitions(GENERIC_F413ZHTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F413ZHTX" + "BOARD_NAME=\"GENERIC_F413ZHTX\"" + "BOARD_ID=GENERIC_F413ZHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F413ZHTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F413ZHTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F413ZHTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F413ZHTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F413ZHTX_hid_MCU} +) +target_link_libraries(GENERIC_F413ZHTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F415RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F415RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") +set(GENERIC_F415RGTX_MAXSIZE 1048576) +set(GENERIC_F415RGTX_MAXDATASIZE 131072) +set(GENERIC_F415RGTX_MCU cortex-m4) +set(GENERIC_F415RGTX_FPCONF "-") +add_library(GENERIC_F415RGTX INTERFACE) +target_compile_options(GENERIC_F415RGTX INTERFACE + "SHELL:-DSTM32F415xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F415RGTX_MCU} +) +target_compile_definitions(GENERIC_F415RGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F415RGTX" + "BOARD_NAME=\"GENERIC_F415RGTX\"" + "BOARD_ID=GENERIC_F415RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F415RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F415RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F415RGTX INTERFACE + "LINKER:--default-script=${GENERIC_F415RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F415RGTX_MCU} +) +target_link_libraries(GENERIC_F415RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F415RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F415RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F415RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F415RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F415RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F415RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F415RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F415RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F415RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F415RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F415RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F415RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F415RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F415RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F415RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F415RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F415RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F415RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F415RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F415RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F415RGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F415RGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") +set(GENERIC_F415RGTX_hid_MAXSIZE 1048576) +set(GENERIC_F415RGTX_hid_MAXDATASIZE 131072) +set(GENERIC_F415RGTX_hid_MCU cortex-m4) +set(GENERIC_F415RGTX_hid_FPCONF "-") +add_library(GENERIC_F415RGTX_hid INTERFACE) +target_compile_options(GENERIC_F415RGTX_hid INTERFACE + "SHELL:-DSTM32F415xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F415RGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F415RGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F415RGTX" + "BOARD_NAME=\"GENERIC_F415RGTX\"" + "BOARD_ID=GENERIC_F415RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F415RGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F415RGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F415RGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F415RGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F415RGTX_hid_MCU} +) +target_link_libraries(GENERIC_F415RGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F417VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F417VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F417VETX_MAXSIZE 524288) +set(GENERIC_F417VETX_MAXDATASIZE 131072) +set(GENERIC_F417VETX_MCU cortex-m4) +set(GENERIC_F417VETX_FPCONF "-") +add_library(GENERIC_F417VETX INTERFACE) +target_compile_options(GENERIC_F417VETX INTERFACE + "SHELL:-DSTM32F417xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VETX_MCU} +) +target_compile_definitions(GENERIC_F417VETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417VETX" + "BOARD_NAME=\"GENERIC_F417VETX\"" + "BOARD_ID=GENERIC_F417VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F417VETX INTERFACE + "LINKER:--default-script=${GENERIC_F417VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VETX_MCU} +) +target_link_libraries(GENERIC_F417VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F417VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F417VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F417VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F417VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F417VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F417VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F417VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F417VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F417VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F417VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F417VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F417VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F417VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F417VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F417VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F417VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F417VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F417VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F417VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F417VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F417VETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F417VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F417VETX_hid_MAXSIZE 524288) +set(GENERIC_F417VETX_hid_MAXDATASIZE 131072) +set(GENERIC_F417VETX_hid_MCU cortex-m4) +set(GENERIC_F417VETX_hid_FPCONF "-") +add_library(GENERIC_F417VETX_hid INTERFACE) +target_compile_options(GENERIC_F417VETX_hid INTERFACE + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VETX_hid_MCU} +) +target_compile_definitions(GENERIC_F417VETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417VETX" + "BOARD_NAME=\"GENERIC_F417VETX\"" + "BOARD_ID=GENERIC_F417VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417VETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417VETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F417VETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F417VETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VETX_hid_MCU} +) +target_link_libraries(GENERIC_F417VETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F417VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F417VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F417VGTX_MAXSIZE 1048576) +set(GENERIC_F417VGTX_MAXDATASIZE 131072) +set(GENERIC_F417VGTX_MCU cortex-m4) +set(GENERIC_F417VGTX_FPCONF "-") +add_library(GENERIC_F417VGTX INTERFACE) +target_compile_options(GENERIC_F417VGTX INTERFACE + "SHELL:-DSTM32F417xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VGTX_MCU} +) +target_compile_definitions(GENERIC_F417VGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417VGTX" + "BOARD_NAME=\"GENERIC_F417VGTX\"" + "BOARD_ID=GENERIC_F417VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F417VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F417VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VGTX_MCU} +) +target_link_libraries(GENERIC_F417VGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F417VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F417VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F417VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F417VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F417VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F417VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F417VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F417VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F417VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F417VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F417VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F417VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F417VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F417VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F417VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F417VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F417VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F417VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F417VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F417VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F417VGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F417VGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(GENERIC_F417VGTX_hid_MAXSIZE 1048576) +set(GENERIC_F417VGTX_hid_MAXDATASIZE 131072) +set(GENERIC_F417VGTX_hid_MCU cortex-m4) +set(GENERIC_F417VGTX_hid_FPCONF "-") +add_library(GENERIC_F417VGTX_hid INTERFACE) +target_compile_options(GENERIC_F417VGTX_hid INTERFACE + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F417VGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417VGTX" + "BOARD_NAME=\"GENERIC_F417VGTX\"" + "BOARD_ID=GENERIC_F417VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417VGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417VGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F417VGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F417VGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417VGTX_hid_MCU} +) +target_link_libraries(GENERIC_F417VGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F417ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F417ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F417ZETX_MAXSIZE 524288) +set(GENERIC_F417ZETX_MAXDATASIZE 131072) +set(GENERIC_F417ZETX_MCU cortex-m4) +set(GENERIC_F417ZETX_FPCONF "-") +add_library(GENERIC_F417ZETX INTERFACE) +target_compile_options(GENERIC_F417ZETX INTERFACE + "SHELL:-DSTM32F417xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZETX_MCU} +) +target_compile_definitions(GENERIC_F417ZETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417ZETX" + "BOARD_NAME=\"GENERIC_F417ZETX\"" + "BOARD_ID=GENERIC_F417ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F417ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F417ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZETX_MCU} +) +target_link_libraries(GENERIC_F417ZETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F417ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F417ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F417ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F417ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F417ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F417ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F417ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F417ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F417ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F417ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F417ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F417ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F417ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F417ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F417ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F417ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F417ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F417ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F417ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F417ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F417ZETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F417ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F417ZETX_hid_MAXSIZE 524288) +set(GENERIC_F417ZETX_hid_MAXDATASIZE 131072) +set(GENERIC_F417ZETX_hid_MCU cortex-m4) +set(GENERIC_F417ZETX_hid_FPCONF "-") +add_library(GENERIC_F417ZETX_hid INTERFACE) +target_compile_options(GENERIC_F417ZETX_hid INTERFACE + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZETX_hid_MCU} +) +target_compile_definitions(GENERIC_F417ZETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417ZETX" + "BOARD_NAME=\"GENERIC_F417ZETX\"" + "BOARD_ID=GENERIC_F417ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417ZETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417ZETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F417ZETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F417ZETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZETX_hid_MCU} +) +target_link_libraries(GENERIC_F417ZETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F417ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F417ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F417ZGTX_MAXSIZE 1048576) +set(GENERIC_F417ZGTX_MAXDATASIZE 131072) +set(GENERIC_F417ZGTX_MCU cortex-m4) +set(GENERIC_F417ZGTX_FPCONF "-") +add_library(GENERIC_F417ZGTX INTERFACE) +target_compile_options(GENERIC_F417ZGTX INTERFACE + "SHELL:-DSTM32F417xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZGTX_MCU} +) +target_compile_definitions(GENERIC_F417ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417ZGTX" + "BOARD_NAME=\"GENERIC_F417ZGTX\"" + "BOARD_ID=GENERIC_F417ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F417ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F417ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZGTX_MCU} +) +target_link_libraries(GENERIC_F417ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F417ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F417ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F417ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F417ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F417ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F417ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F417ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F417ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F417ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F417ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F417ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F417ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F417ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F417ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F417ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F417ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F417ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F417ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F417ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F417ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F417ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F417ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(GENERIC_F417ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F417ZGTX_hid_MAXDATASIZE 131072) +set(GENERIC_F417ZGTX_hid_MCU cortex-m4) +set(GENERIC_F417ZGTX_hid_FPCONF "-") +add_library(GENERIC_F417ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F417ZGTX_hid INTERFACE + "SHELL:-DSTM32F417xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F417ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F417ZGTX" + "BOARD_NAME=\"GENERIC_F417ZGTX\"" + "BOARD_ID=GENERIC_F417ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F417ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F417ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F417ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F417ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F417ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F417ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F423CHUX +# ----------------------------------------------------------------------------- + +set(GENERIC_F423CHUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU") +set(GENERIC_F423CHUX_MAXSIZE 1572864) +set(GENERIC_F423CHUX_MAXDATASIZE 327680) +set(GENERIC_F423CHUX_MCU cortex-m4) +set(GENERIC_F423CHUX_FPCONF "-") +add_library(GENERIC_F423CHUX INTERFACE) +target_compile_options(GENERIC_F423CHUX INTERFACE + "SHELL:-DSTM32F423xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423CHUX_MCU} +) +target_compile_definitions(GENERIC_F423CHUX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423CHUX" + "BOARD_NAME=\"GENERIC_F423CHUX\"" + "BOARD_ID=GENERIC_F423CHUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423CHUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423CHUX_VARIANT_PATH} +) + +target_link_options(GENERIC_F423CHUX INTERFACE + "LINKER:--default-script=${GENERIC_F423CHUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423CHUX_MCU} +) +target_link_libraries(GENERIC_F423CHUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F423CHUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F423CHUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F423CHUX_serial_generic INTERFACE) +target_compile_options(GENERIC_F423CHUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F423CHUX_serial_none INTERFACE) +target_compile_options(GENERIC_F423CHUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F423CHUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F423CHUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F423CHUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F423CHUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F423CHUX_usb_HID INTERFACE) +target_compile_options(GENERIC_F423CHUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F423CHUX_usb_none INTERFACE) +target_compile_options(GENERIC_F423CHUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F423CHUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F423CHUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F423CHUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F423CHUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F423CHUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F423CHUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F423CHUX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F423CHUX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413C(G-H)U_F423CHU") +set(GENERIC_F423CHUX_hid_MAXSIZE 1572864) +set(GENERIC_F423CHUX_hid_MAXDATASIZE 327680) +set(GENERIC_F423CHUX_hid_MCU cortex-m4) +set(GENERIC_F423CHUX_hid_FPCONF "-") +add_library(GENERIC_F423CHUX_hid INTERFACE) +target_compile_options(GENERIC_F423CHUX_hid INTERFACE + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423CHUX_hid_MCU} +) +target_compile_definitions(GENERIC_F423CHUX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423CHUX" + "BOARD_NAME=\"GENERIC_F423CHUX\"" + "BOARD_ID=GENERIC_F423CHUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423CHUX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423CHUX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F423CHUX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F423CHUX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423CHUX_hid_MCU} +) +target_link_libraries(GENERIC_F423CHUX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F423RHTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F423RHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT") +set(GENERIC_F423RHTX_MAXSIZE 1572864) +set(GENERIC_F423RHTX_MAXDATASIZE 327680) +set(GENERIC_F423RHTX_MCU cortex-m4) +set(GENERIC_F423RHTX_FPCONF "-") +add_library(GENERIC_F423RHTX INTERFACE) +target_compile_options(GENERIC_F423RHTX INTERFACE + "SHELL:-DSTM32F423xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423RHTX_MCU} +) +target_compile_definitions(GENERIC_F423RHTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423RHTX" + "BOARD_NAME=\"GENERIC_F423RHTX\"" + "BOARD_ID=GENERIC_F423RHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423RHTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423RHTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F423RHTX INTERFACE + "LINKER:--default-script=${GENERIC_F423RHTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423RHTX_MCU} +) +target_link_libraries(GENERIC_F423RHTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F423RHTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F423RHTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F423RHTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F423RHTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F423RHTX_serial_none INTERFACE) +target_compile_options(GENERIC_F423RHTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F423RHTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F423RHTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F423RHTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F423RHTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F423RHTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F423RHTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F423RHTX_usb_none INTERFACE) +target_compile_options(GENERIC_F423RHTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F423RHTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F423RHTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F423RHTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F423RHTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F423RHTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F423RHTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F423RHTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F423RHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413R(G-H)T_F423RHT") +set(GENERIC_F423RHTX_hid_MAXSIZE 1572864) +set(GENERIC_F423RHTX_hid_MAXDATASIZE 327680) +set(GENERIC_F423RHTX_hid_MCU cortex-m4) +set(GENERIC_F423RHTX_hid_FPCONF "-") +add_library(GENERIC_F423RHTX_hid INTERFACE) +target_compile_options(GENERIC_F423RHTX_hid INTERFACE + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423RHTX_hid_MCU} +) +target_compile_definitions(GENERIC_F423RHTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423RHTX" + "BOARD_NAME=\"GENERIC_F423RHTX\"" + "BOARD_ID=GENERIC_F423RHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423RHTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423RHTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F423RHTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F423RHTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423RHTX_hid_MCU} +) +target_link_libraries(GENERIC_F423RHTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F423ZHJX +# ----------------------------------------------------------------------------- + +set(GENERIC_F423ZHJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F423ZHJX_MAXSIZE 1572864) +set(GENERIC_F423ZHJX_MAXDATASIZE 327680) +set(GENERIC_F423ZHJX_MCU cortex-m4) +set(GENERIC_F423ZHJX_FPCONF "-") +add_library(GENERIC_F423ZHJX INTERFACE) +target_compile_options(GENERIC_F423ZHJX INTERFACE + "SHELL:-DSTM32F423xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHJX_MCU} +) +target_compile_definitions(GENERIC_F423ZHJX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423ZHJX" + "BOARD_NAME=\"GENERIC_F423ZHJX\"" + "BOARD_ID=GENERIC_F423ZHJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423ZHJX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423ZHJX_VARIANT_PATH} +) + +target_link_options(GENERIC_F423ZHJX INTERFACE + "LINKER:--default-script=${GENERIC_F423ZHJX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHJX_MCU} +) +target_link_libraries(GENERIC_F423ZHJX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F423ZHJX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F423ZHJX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F423ZHJX_serial_generic INTERFACE) +target_compile_options(GENERIC_F423ZHJX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F423ZHJX_serial_none INTERFACE) +target_compile_options(GENERIC_F423ZHJX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F423ZHJX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F423ZHJX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F423ZHJX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F423ZHJX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F423ZHJX_usb_HID INTERFACE) +target_compile_options(GENERIC_F423ZHJX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F423ZHJX_usb_none INTERFACE) +target_compile_options(GENERIC_F423ZHJX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F423ZHJX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F423ZHJX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F423ZHJX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F423ZHJX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F423ZHJX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F423ZHJX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F423ZHJX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F423ZHJX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F423ZHJX_hid_MAXSIZE 1572864) +set(GENERIC_F423ZHJX_hid_MAXDATASIZE 327680) +set(GENERIC_F423ZHJX_hid_MCU cortex-m4) +set(GENERIC_F423ZHJX_hid_FPCONF "-") +add_library(GENERIC_F423ZHJX_hid INTERFACE) +target_compile_options(GENERIC_F423ZHJX_hid INTERFACE + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHJX_hid_MCU} +) +target_compile_definitions(GENERIC_F423ZHJX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423ZHJX" + "BOARD_NAME=\"GENERIC_F423ZHJX\"" + "BOARD_ID=GENERIC_F423ZHJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423ZHJX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423ZHJX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F423ZHJX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F423ZHJX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHJX_hid_MCU} +) +target_link_libraries(GENERIC_F423ZHJX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F423ZHTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F423ZHTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F423ZHTX_MAXSIZE 1572864) +set(GENERIC_F423ZHTX_MAXDATASIZE 327680) +set(GENERIC_F423ZHTX_MCU cortex-m4) +set(GENERIC_F423ZHTX_FPCONF "-") +add_library(GENERIC_F423ZHTX INTERFACE) +target_compile_options(GENERIC_F423ZHTX INTERFACE + "SHELL:-DSTM32F423xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHTX_MCU} +) +target_compile_definitions(GENERIC_F423ZHTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423ZHTX" + "BOARD_NAME=\"GENERIC_F423ZHTX\"" + "BOARD_ID=GENERIC_F423ZHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423ZHTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423ZHTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F423ZHTX INTERFACE + "LINKER:--default-script=${GENERIC_F423ZHTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHTX_MCU} +) +target_link_libraries(GENERIC_F423ZHTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F423ZHTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F423ZHTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F423ZHTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F423ZHTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F423ZHTX_serial_none INTERFACE) +target_compile_options(GENERIC_F423ZHTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F423ZHTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F423ZHTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F423ZHTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F423ZHTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F423ZHTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F423ZHTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F423ZHTX_usb_none INTERFACE) +target_compile_options(GENERIC_F423ZHTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F423ZHTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F423ZHTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F423ZHTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F423ZHTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F423ZHTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F423ZHTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F423ZHTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F423ZHTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(GENERIC_F423ZHTX_hid_MAXSIZE 1572864) +set(GENERIC_F423ZHTX_hid_MAXDATASIZE 327680) +set(GENERIC_F423ZHTX_hid_MCU cortex-m4) +set(GENERIC_F423ZHTX_hid_FPCONF "-") +add_library(GENERIC_F423ZHTX_hid INTERFACE) +target_compile_options(GENERIC_F423ZHTX_hid INTERFACE + "SHELL:-DSTM32F423xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHTX_hid_MCU} +) +target_compile_definitions(GENERIC_F423ZHTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F423ZHTX" + "BOARD_NAME=\"GENERIC_F423ZHTX\"" + "BOARD_ID=GENERIC_F423ZHTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F423ZHTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F423ZHTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F423ZHTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F423ZHTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F423ZHTX_hid_MCU} +) +target_link_libraries(GENERIC_F423ZHTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F427ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F427ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F427ZGTX_MAXSIZE 1048576) +set(GENERIC_F427ZGTX_MAXDATASIZE 196608) +set(GENERIC_F427ZGTX_MCU cortex-m4) +set(GENERIC_F427ZGTX_FPCONF "-") +add_library(GENERIC_F427ZGTX INTERFACE) +target_compile_options(GENERIC_F427ZGTX INTERFACE + "SHELL:-DSTM32F427xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZGTX_MCU} +) +target_compile_definitions(GENERIC_F427ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F427ZGTX" + "BOARD_NAME=\"GENERIC_F427ZGTX\"" + "BOARD_ID=GENERIC_F427ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F427ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F427ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F427ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F427ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZGTX_MCU} +) +target_link_libraries(GENERIC_F427ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F427ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F427ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F427ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F427ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F427ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F427ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F427ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F427ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F427ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F427ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F427ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F427ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F427ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F427ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F427ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F427ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F427ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F427ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F427ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F427ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F427ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F427ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F427ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F427ZGTX_hid_MAXDATASIZE 196608) +set(GENERIC_F427ZGTX_hid_MCU cortex-m4) +set(GENERIC_F427ZGTX_hid_FPCONF "-") +add_library(GENERIC_F427ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F427ZGTX_hid INTERFACE + "SHELL:-DSTM32F427xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F427ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F427ZGTX" + "BOARD_NAME=\"GENERIC_F427ZGTX\"" + "BOARD_ID=GENERIC_F427ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F427ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F427ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F427ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F427ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F427ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F427ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F427ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F427ZITX_MAXSIZE 2097152) +set(GENERIC_F427ZITX_MAXDATASIZE 196608) +set(GENERIC_F427ZITX_MCU cortex-m4) +set(GENERIC_F427ZITX_FPCONF "-") +add_library(GENERIC_F427ZITX INTERFACE) +target_compile_options(GENERIC_F427ZITX INTERFACE + "SHELL:-DSTM32F427xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZITX_MCU} +) +target_compile_definitions(GENERIC_F427ZITX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F427ZITX" + "BOARD_NAME=\"GENERIC_F427ZITX\"" + "BOARD_ID=GENERIC_F427ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F427ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F427ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F427ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F427ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZITX_MCU} +) +target_link_libraries(GENERIC_F427ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F427ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F427ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F427ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F427ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F427ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F427ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F427ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F427ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F427ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F427ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F427ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F427ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F427ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F427ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F427ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F427ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F427ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F427ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F427ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F427ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F427ZITX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F427ZITX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F427ZITX_hid_MAXSIZE 2097152) +set(GENERIC_F427ZITX_hid_MAXDATASIZE 196608) +set(GENERIC_F427ZITX_hid_MCU cortex-m4) +set(GENERIC_F427ZITX_hid_FPCONF "-") +add_library(GENERIC_F427ZITX_hid INTERFACE) +target_compile_options(GENERIC_F427ZITX_hid INTERFACE + "SHELL:-DSTM32F427xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZITX_hid_MCU} +) +target_compile_definitions(GENERIC_F427ZITX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F427ZITX" + "BOARD_NAME=\"GENERIC_F427ZITX\"" + "BOARD_ID=GENERIC_F427ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F427ZITX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F427ZITX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F427ZITX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F427ZITX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F427ZITX_hid_MCU} +) +target_link_libraries(GENERIC_F427ZITX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F429ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZETX_MAXSIZE 524288) +set(GENERIC_F429ZETX_MAXDATASIZE 196608) +set(GENERIC_F429ZETX_MCU cortex-m4) +set(GENERIC_F429ZETX_FPCONF "-") +add_library(GENERIC_F429ZETX INTERFACE) +target_compile_options(GENERIC_F429ZETX INTERFACE + "SHELL:-DSTM32F429xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZETX_MCU} +) +target_compile_definitions(GENERIC_F429ZETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZETX" + "BOARD_NAME=\"GENERIC_F429ZETX\"" + "BOARD_ID=GENERIC_F429ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F429ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZETX_MCU} +) +target_link_libraries(GENERIC_F429ZETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F429ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F429ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F429ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F429ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F429ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F429ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F429ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F429ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F429ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F429ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F429ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F429ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F429ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F429ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F429ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F429ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F429ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F429ZETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZETX_hid_MAXSIZE 524288) +set(GENERIC_F429ZETX_hid_MAXDATASIZE 196608) +set(GENERIC_F429ZETX_hid_MCU cortex-m4) +set(GENERIC_F429ZETX_hid_FPCONF "-") +add_library(GENERIC_F429ZETX_hid INTERFACE) +target_compile_options(GENERIC_F429ZETX_hid INTERFACE + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZETX_hid_MCU} +) +target_compile_definitions(GENERIC_F429ZETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZETX" + "BOARD_NAME=\"GENERIC_F429ZETX\"" + "BOARD_ID=GENERIC_F429ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F429ZETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZETX_hid_MCU} +) +target_link_libraries(GENERIC_F429ZETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F429ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZGTX_MAXSIZE 1048576) +set(GENERIC_F429ZGTX_MAXDATASIZE 196608) +set(GENERIC_F429ZGTX_MCU cortex-m4) +set(GENERIC_F429ZGTX_FPCONF "-") +add_library(GENERIC_F429ZGTX INTERFACE) +target_compile_options(GENERIC_F429ZGTX INTERFACE + "SHELL:-DSTM32F429xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGTX_MCU} +) +target_compile_definitions(GENERIC_F429ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZGTX" + "BOARD_NAME=\"GENERIC_F429ZGTX\"" + "BOARD_ID=GENERIC_F429ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F429ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGTX_MCU} +) +target_link_libraries(GENERIC_F429ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F429ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F429ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F429ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F429ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F429ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F429ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F429ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F429ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F429ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F429ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F429ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F429ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F429ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F429ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F429ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F429ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F429ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F429ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F429ZGTX_hid_MAXDATASIZE 196608) +set(GENERIC_F429ZGTX_hid_MCU cortex-m4) +set(GENERIC_F429ZGTX_hid_FPCONF "-") +add_library(GENERIC_F429ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F429ZGTX_hid INTERFACE + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F429ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZGTX" + "BOARD_NAME=\"GENERIC_F429ZGTX\"" + "BOARD_ID=GENERIC_F429ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F429ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F429ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F429ZGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZGYX_MAXSIZE 1048576) +set(GENERIC_F429ZGYX_MAXDATASIZE 196608) +set(GENERIC_F429ZGYX_MCU cortex-m4) +set(GENERIC_F429ZGYX_FPCONF "-") +add_library(GENERIC_F429ZGYX INTERFACE) +target_compile_options(GENERIC_F429ZGYX INTERFACE + "SHELL:-DSTM32F429xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGYX_MCU} +) +target_compile_definitions(GENERIC_F429ZGYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZGYX" + "BOARD_NAME=\"GENERIC_F429ZGYX\"" + "BOARD_ID=GENERIC_F429ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZGYX INTERFACE + "LINKER:--default-script=${GENERIC_F429ZGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGYX_MCU} +) +target_link_libraries(GENERIC_F429ZGYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F429ZGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F429ZGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F429ZGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F429ZGYX_serial_none INTERFACE) +target_compile_options(GENERIC_F429ZGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F429ZGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F429ZGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F429ZGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F429ZGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F429ZGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F429ZGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F429ZGYX_usb_none INTERFACE) +target_compile_options(GENERIC_F429ZGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F429ZGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F429ZGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F429ZGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F429ZGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F429ZGYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZGYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZGYX_hid_MAXSIZE 1048576) +set(GENERIC_F429ZGYX_hid_MAXDATASIZE 196608) +set(GENERIC_F429ZGYX_hid_MCU cortex-m4) +set(GENERIC_F429ZGYX_hid_FPCONF "-") +add_library(GENERIC_F429ZGYX_hid INTERFACE) +target_compile_options(GENERIC_F429ZGYX_hid INTERFACE + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGYX_hid_MCU} +) +target_compile_definitions(GENERIC_F429ZGYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZGYX" + "BOARD_NAME=\"GENERIC_F429ZGYX\"" + "BOARD_ID=GENERIC_F429ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZGYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZGYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZGYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F429ZGYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZGYX_hid_MCU} +) +target_link_libraries(GENERIC_F429ZGYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F429ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZITX_MAXSIZE 2097152) +set(GENERIC_F429ZITX_MAXDATASIZE 196608) +set(GENERIC_F429ZITX_MCU cortex-m4) +set(GENERIC_F429ZITX_FPCONF "-") +add_library(GENERIC_F429ZITX INTERFACE) +target_compile_options(GENERIC_F429ZITX INTERFACE + "SHELL:-DSTM32F429xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZITX_MCU} +) +target_compile_definitions(GENERIC_F429ZITX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZITX" + "BOARD_NAME=\"GENERIC_F429ZITX\"" + "BOARD_ID=GENERIC_F429ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F429ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZITX_MCU} +) +target_link_libraries(GENERIC_F429ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F429ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F429ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F429ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F429ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F429ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F429ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F429ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F429ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F429ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F429ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F429ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F429ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F429ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F429ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F429ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F429ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F429ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F429ZITX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZITX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZITX_hid_MAXSIZE 2097152) +set(GENERIC_F429ZITX_hid_MAXDATASIZE 196608) +set(GENERIC_F429ZITX_hid_MCU cortex-m4) +set(GENERIC_F429ZITX_hid_FPCONF "-") +add_library(GENERIC_F429ZITX_hid INTERFACE) +target_compile_options(GENERIC_F429ZITX_hid INTERFACE + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZITX_hid_MCU} +) +target_compile_definitions(GENERIC_F429ZITX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZITX" + "BOARD_NAME=\"GENERIC_F429ZITX\"" + "BOARD_ID=GENERIC_F429ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZITX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZITX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZITX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F429ZITX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZITX_hid_MCU} +) +target_link_libraries(GENERIC_F429ZITX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F429ZIYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZIYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZIYX_MAXSIZE 2097152) +set(GENERIC_F429ZIYX_MAXDATASIZE 196608) +set(GENERIC_F429ZIYX_MCU cortex-m4) +set(GENERIC_F429ZIYX_FPCONF "-") +add_library(GENERIC_F429ZIYX INTERFACE) +target_compile_options(GENERIC_F429ZIYX INTERFACE + "SHELL:-DSTM32F429xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZIYX_MCU} +) +target_compile_definitions(GENERIC_F429ZIYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZIYX" + "BOARD_NAME=\"GENERIC_F429ZIYX\"" + "BOARD_ID=GENERIC_F429ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZIYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZIYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZIYX INTERFACE + "LINKER:--default-script=${GENERIC_F429ZIYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZIYX_MCU} +) +target_link_libraries(GENERIC_F429ZIYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F429ZIYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F429ZIYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZIYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F429ZIYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F429ZIYX_serial_none INTERFACE) +target_compile_options(GENERIC_F429ZIYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F429ZIYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F429ZIYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F429ZIYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F429ZIYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F429ZIYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F429ZIYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F429ZIYX_usb_none INTERFACE) +target_compile_options(GENERIC_F429ZIYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZIYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F429ZIYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F429ZIYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F429ZIYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F429ZIYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F429ZIYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F429ZIYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F429ZIYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F429ZIYX_hid_MAXSIZE 2097152) +set(GENERIC_F429ZIYX_hid_MAXDATASIZE 196608) +set(GENERIC_F429ZIYX_hid_MCU cortex-m4) +set(GENERIC_F429ZIYX_hid_FPCONF "-") +add_library(GENERIC_F429ZIYX_hid INTERFACE) +target_compile_options(GENERIC_F429ZIYX_hid INTERFACE + "SHELL:-DSTM32F429xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZIYX_hid_MCU} +) +target_compile_definitions(GENERIC_F429ZIYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F429ZIYX" + "BOARD_NAME=\"GENERIC_F429ZIYX\"" + "BOARD_ID=GENERIC_F429ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F429ZIYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F429ZIYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F429ZIYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F429ZIYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F429ZIYX_hid_MCU} +) +target_link_libraries(GENERIC_F429ZIYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F437ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F437ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F437ZGTX_MAXSIZE 1048576) +set(GENERIC_F437ZGTX_MAXDATASIZE 196608) +set(GENERIC_F437ZGTX_MCU cortex-m4) +set(GENERIC_F437ZGTX_FPCONF "-") +add_library(GENERIC_F437ZGTX INTERFACE) +target_compile_options(GENERIC_F437ZGTX INTERFACE + "SHELL:-DSTM32F437xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZGTX_MCU} +) +target_compile_definitions(GENERIC_F437ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F437ZGTX" + "BOARD_NAME=\"GENERIC_F437ZGTX\"" + "BOARD_ID=GENERIC_F437ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F437ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F437ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F437ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F437ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZGTX_MCU} +) +target_link_libraries(GENERIC_F437ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F437ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F437ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F437ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F437ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F437ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F437ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F437ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F437ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F437ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F437ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F437ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F437ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F437ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F437ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F437ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F437ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F437ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F437ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F437ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F437ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F437ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F437ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F437ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F437ZGTX_hid_MAXDATASIZE 196608) +set(GENERIC_F437ZGTX_hid_MCU cortex-m4) +set(GENERIC_F437ZGTX_hid_FPCONF "-") +add_library(GENERIC_F437ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F437ZGTX_hid INTERFACE + "SHELL:-DSTM32F437xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F437ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F437ZGTX" + "BOARD_NAME=\"GENERIC_F437ZGTX\"" + "BOARD_ID=GENERIC_F437ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F437ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F437ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F437ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F437ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F437ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F437ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F437ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F437ZITX_MAXSIZE 2097152) +set(GENERIC_F437ZITX_MAXDATASIZE 196608) +set(GENERIC_F437ZITX_MCU cortex-m4) +set(GENERIC_F437ZITX_FPCONF "-") +add_library(GENERIC_F437ZITX INTERFACE) +target_compile_options(GENERIC_F437ZITX INTERFACE + "SHELL:-DSTM32F437xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZITX_MCU} +) +target_compile_definitions(GENERIC_F437ZITX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F437ZITX" + "BOARD_NAME=\"GENERIC_F437ZITX\"" + "BOARD_ID=GENERIC_F437ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F437ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F437ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F437ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F437ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZITX_MCU} +) +target_link_libraries(GENERIC_F437ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F437ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F437ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F437ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F437ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F437ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F437ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F437ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F437ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F437ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F437ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F437ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F437ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F437ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F437ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F437ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F437ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F437ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F437ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F437ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F437ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F437ZITX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F437ZITX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F437ZITX_hid_MAXSIZE 2097152) +set(GENERIC_F437ZITX_hid_MAXDATASIZE 196608) +set(GENERIC_F437ZITX_hid_MCU cortex-m4) +set(GENERIC_F437ZITX_hid_FPCONF "-") +add_library(GENERIC_F437ZITX_hid INTERFACE) +target_compile_options(GENERIC_F437ZITX_hid INTERFACE + "SHELL:-DSTM32F437xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZITX_hid_MCU} +) +target_compile_definitions(GENERIC_F437ZITX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F437ZITX" + "BOARD_NAME=\"GENERIC_F437ZITX\"" + "BOARD_ID=GENERIC_F437ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F437ZITX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F437ZITX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F437ZITX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F437ZITX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F437ZITX_hid_MCU} +) +target_link_libraries(GENERIC_F437ZITX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F439ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZGTX_MAXSIZE 1048576) +set(GENERIC_F439ZGTX_MAXDATASIZE 196608) +set(GENERIC_F439ZGTX_MCU cortex-m4) +set(GENERIC_F439ZGTX_FPCONF "-") +add_library(GENERIC_F439ZGTX INTERFACE) +target_compile_options(GENERIC_F439ZGTX INTERFACE + "SHELL:-DSTM32F439xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGTX_MCU} +) +target_compile_definitions(GENERIC_F439ZGTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZGTX" + "BOARD_NAME=\"GENERIC_F439ZGTX\"" + "BOARD_ID=GENERIC_F439ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F439ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGTX_MCU} +) +target_link_libraries(GENERIC_F439ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F439ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F439ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F439ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F439ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F439ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F439ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F439ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F439ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F439ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F439ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F439ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F439ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F439ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F439ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F439ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F439ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F439ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F439ZGTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZGTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZGTX_hid_MAXSIZE 1048576) +set(GENERIC_F439ZGTX_hid_MAXDATASIZE 196608) +set(GENERIC_F439ZGTX_hid_MCU cortex-m4) +set(GENERIC_F439ZGTX_hid_FPCONF "-") +add_library(GENERIC_F439ZGTX_hid INTERFACE) +target_compile_options(GENERIC_F439ZGTX_hid INTERFACE + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGTX_hid_MCU} +) +target_compile_definitions(GENERIC_F439ZGTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZGTX" + "BOARD_NAME=\"GENERIC_F439ZGTX\"" + "BOARD_ID=GENERIC_F439ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZGTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZGTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZGTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F439ZGTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGTX_hid_MCU} +) +target_link_libraries(GENERIC_F439ZGTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F439ZGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZGYX_MAXSIZE 1048576) +set(GENERIC_F439ZGYX_MAXDATASIZE 196608) +set(GENERIC_F439ZGYX_MCU cortex-m4) +set(GENERIC_F439ZGYX_FPCONF "-") +add_library(GENERIC_F439ZGYX INTERFACE) +target_compile_options(GENERIC_F439ZGYX INTERFACE + "SHELL:-DSTM32F439xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGYX_MCU} +) +target_compile_definitions(GENERIC_F439ZGYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZGYX" + "BOARD_NAME=\"GENERIC_F439ZGYX\"" + "BOARD_ID=GENERIC_F439ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZGYX INTERFACE + "LINKER:--default-script=${GENERIC_F439ZGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGYX_MCU} +) +target_link_libraries(GENERIC_F439ZGYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F439ZGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F439ZGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F439ZGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F439ZGYX_serial_none INTERFACE) +target_compile_options(GENERIC_F439ZGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F439ZGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F439ZGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F439ZGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F439ZGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F439ZGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F439ZGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F439ZGYX_usb_none INTERFACE) +target_compile_options(GENERIC_F439ZGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F439ZGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F439ZGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F439ZGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F439ZGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F439ZGYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZGYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZGYX_hid_MAXSIZE 1048576) +set(GENERIC_F439ZGYX_hid_MAXDATASIZE 196608) +set(GENERIC_F439ZGYX_hid_MCU cortex-m4) +set(GENERIC_F439ZGYX_hid_FPCONF "-") +add_library(GENERIC_F439ZGYX_hid INTERFACE) +target_compile_options(GENERIC_F439ZGYX_hid INTERFACE + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGYX_hid_MCU} +) +target_compile_definitions(GENERIC_F439ZGYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZGYX" + "BOARD_NAME=\"GENERIC_F439ZGYX\"" + "BOARD_ID=GENERIC_F439ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZGYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZGYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZGYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F439ZGYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZGYX_hid_MCU} +) +target_link_libraries(GENERIC_F439ZGYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F439ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZITX_MAXSIZE 2097152) +set(GENERIC_F439ZITX_MAXDATASIZE 196608) +set(GENERIC_F439ZITX_MCU cortex-m4) +set(GENERIC_F439ZITX_FPCONF "-") +add_library(GENERIC_F439ZITX INTERFACE) +target_compile_options(GENERIC_F439ZITX INTERFACE + "SHELL:-DSTM32F439xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZITX_MCU} +) +target_compile_definitions(GENERIC_F439ZITX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZITX" + "BOARD_NAME=\"GENERIC_F439ZITX\"" + "BOARD_ID=GENERIC_F439ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F439ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZITX_MCU} +) +target_link_libraries(GENERIC_F439ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F439ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F439ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F439ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F439ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F439ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F439ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F439ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F439ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F439ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F439ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F439ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F439ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F439ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F439ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F439ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F439ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F439ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F439ZITX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZITX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZITX_hid_MAXSIZE 2097152) +set(GENERIC_F439ZITX_hid_MAXDATASIZE 196608) +set(GENERIC_F439ZITX_hid_MCU cortex-m4) +set(GENERIC_F439ZITX_hid_FPCONF "-") +add_library(GENERIC_F439ZITX_hid INTERFACE) +target_compile_options(GENERIC_F439ZITX_hid INTERFACE + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZITX_hid_MCU} +) +target_compile_definitions(GENERIC_F439ZITX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZITX" + "BOARD_NAME=\"GENERIC_F439ZITX\"" + "BOARD_ID=GENERIC_F439ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZITX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZITX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZITX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F439ZITX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZITX_hid_MCU} +) +target_link_libraries(GENERIC_F439ZITX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F439ZIYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZIYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZIYX_MAXSIZE 2097152) +set(GENERIC_F439ZIYX_MAXDATASIZE 196608) +set(GENERIC_F439ZIYX_MCU cortex-m4) +set(GENERIC_F439ZIYX_FPCONF "-") +add_library(GENERIC_F439ZIYX INTERFACE) +target_compile_options(GENERIC_F439ZIYX INTERFACE + "SHELL:-DSTM32F439xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZIYX_MCU} +) +target_compile_definitions(GENERIC_F439ZIYX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZIYX" + "BOARD_NAME=\"GENERIC_F439ZIYX\"" + "BOARD_ID=GENERIC_F439ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZIYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZIYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZIYX INTERFACE + "LINKER:--default-script=${GENERIC_F439ZIYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZIYX_MCU} +) +target_link_libraries(GENERIC_F439ZIYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F439ZIYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F439ZIYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZIYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F439ZIYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F439ZIYX_serial_none INTERFACE) +target_compile_options(GENERIC_F439ZIYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F439ZIYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F439ZIYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F439ZIYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F439ZIYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F439ZIYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F439ZIYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F439ZIYX_usb_none INTERFACE) +target_compile_options(GENERIC_F439ZIYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZIYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F439ZIYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F439ZIYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F439ZIYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F439ZIYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F439ZIYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F439ZIYX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F439ZIYX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(GENERIC_F439ZIYX_hid_MAXSIZE 2097152) +set(GENERIC_F439ZIYX_hid_MAXDATASIZE 196608) +set(GENERIC_F439ZIYX_hid_MCU cortex-m4) +set(GENERIC_F439ZIYX_hid_FPCONF "-") +add_library(GENERIC_F439ZIYX_hid INTERFACE) +target_compile_options(GENERIC_F439ZIYX_hid INTERFACE + "SHELL:-DSTM32F439xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZIYX_hid_MCU} +) +target_compile_definitions(GENERIC_F439ZIYX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F439ZIYX" + "BOARD_NAME=\"GENERIC_F439ZIYX\"" + "BOARD_ID=GENERIC_F439ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F439ZIYX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F439ZIYX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F439ZIYX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F439ZIYX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F439ZIYX_hid_MCU} +) +target_link_libraries(GENERIC_F439ZIYX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F446RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F446RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446R(C-E)T") +set(GENERIC_F446RCTX_MAXSIZE 262144) +set(GENERIC_F446RCTX_MAXDATASIZE 131072) +set(GENERIC_F446RCTX_MCU cortex-m4) +set(GENERIC_F446RCTX_FPCONF "-") +add_library(GENERIC_F446RCTX INTERFACE) +target_compile_options(GENERIC_F446RCTX INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RCTX_MCU} +) +target_compile_definitions(GENERIC_F446RCTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446RCTX" + "BOARD_NAME=\"GENERIC_F446RCTX\"" + "BOARD_ID=GENERIC_F446RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F446RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F446RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RCTX_MCU} +) +target_link_libraries(GENERIC_F446RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F446RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F446RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F446RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F446RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F446RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F446RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F446RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F446RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F446RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F446RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F446RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F446RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F446RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F446RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F446RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F446RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F446RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F446RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F446RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F446RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F446RCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F446RCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446R(C-E)T") +set(GENERIC_F446RCTX_hid_MAXSIZE 262144) +set(GENERIC_F446RCTX_hid_MAXDATASIZE 131072) +set(GENERIC_F446RCTX_hid_MCU cortex-m4) +set(GENERIC_F446RCTX_hid_FPCONF "-") +add_library(GENERIC_F446RCTX_hid INTERFACE) +target_compile_options(GENERIC_F446RCTX_hid INTERFACE + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F446RCTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446RCTX" + "BOARD_NAME=\"GENERIC_F446RCTX\"" + "BOARD_ID=GENERIC_F446RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446RCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446RCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F446RCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F446RCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RCTX_hid_MCU} +) +target_link_libraries(GENERIC_F446RCTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F446RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F446RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446R(C-E)T") +set(GENERIC_F446RETX_MAXSIZE 524288) +set(GENERIC_F446RETX_MAXDATASIZE 131072) +set(GENERIC_F446RETX_MCU cortex-m4) +set(GENERIC_F446RETX_FPCONF "-") +add_library(GENERIC_F446RETX INTERFACE) +target_compile_options(GENERIC_F446RETX INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RETX_MCU} +) +target_compile_definitions(GENERIC_F446RETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446RETX" + "BOARD_NAME=\"GENERIC_F446RETX\"" + "BOARD_ID=GENERIC_F446RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F446RETX INTERFACE + "LINKER:--default-script=${GENERIC_F446RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RETX_MCU} +) +target_link_libraries(GENERIC_F446RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F446RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F446RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F446RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F446RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F446RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F446RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F446RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F446RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F446RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F446RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F446RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F446RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F446RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F446RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F446RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F446RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F446RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F446RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F446RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F446RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F446RETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F446RETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446R(C-E)T") +set(GENERIC_F446RETX_hid_MAXSIZE 524288) +set(GENERIC_F446RETX_hid_MAXDATASIZE 131072) +set(GENERIC_F446RETX_hid_MCU cortex-m4) +set(GENERIC_F446RETX_hid_FPCONF "-") +add_library(GENERIC_F446RETX_hid INTERFACE) +target_compile_options(GENERIC_F446RETX_hid INTERFACE + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RETX_hid_MCU} +) +target_compile_definitions(GENERIC_F446RETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446RETX" + "BOARD_NAME=\"GENERIC_F446RETX\"" + "BOARD_ID=GENERIC_F446RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446RETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446RETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F446RETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F446RETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446RETX_hid_MCU} +) +target_link_libraries(GENERIC_F446RETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F446VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F446VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(GENERIC_F446VCTX_MAXSIZE 262144) +set(GENERIC_F446VCTX_MAXDATASIZE 131072) +set(GENERIC_F446VCTX_MCU cortex-m4) +set(GENERIC_F446VCTX_FPCONF "-") +add_library(GENERIC_F446VCTX INTERFACE) +target_compile_options(GENERIC_F446VCTX INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VCTX_MCU} +) +target_compile_definitions(GENERIC_F446VCTX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446VCTX" + "BOARD_NAME=\"GENERIC_F446VCTX\"" + "BOARD_ID=GENERIC_F446VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F446VCTX INTERFACE + "LINKER:--default-script=${GENERIC_F446VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VCTX_MCU} +) +target_link_libraries(GENERIC_F446VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F446VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F446VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F446VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F446VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F446VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F446VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F446VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F446VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F446VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F446VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F446VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F446VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F446VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F446VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F446VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F446VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F446VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F446VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F446VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F446VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F446VCTX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F446VCTX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(GENERIC_F446VCTX_hid_MAXSIZE 262144) +set(GENERIC_F446VCTX_hid_MAXDATASIZE 131072) +set(GENERIC_F446VCTX_hid_MCU cortex-m4) +set(GENERIC_F446VCTX_hid_FPCONF "-") +add_library(GENERIC_F446VCTX_hid INTERFACE) +target_compile_options(GENERIC_F446VCTX_hid INTERFACE + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VCTX_hid_MCU} +) +target_compile_definitions(GENERIC_F446VCTX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446VCTX" + "BOARD_NAME=\"GENERIC_F446VCTX\"" + "BOARD_ID=GENERIC_F446VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446VCTX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446VCTX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F446VCTX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F446VCTX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VCTX_hid_MCU} +) +target_link_libraries(GENERIC_F446VCTX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F446VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F446VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(GENERIC_F446VETX_MAXSIZE 524288) +set(GENERIC_F446VETX_MAXDATASIZE 131072) +set(GENERIC_F446VETX_MCU cortex-m4) +set(GENERIC_F446VETX_FPCONF "-") +add_library(GENERIC_F446VETX INTERFACE) +target_compile_options(GENERIC_F446VETX INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VETX_MCU} +) +target_compile_definitions(GENERIC_F446VETX INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446VETX" + "BOARD_NAME=\"GENERIC_F446VETX\"" + "BOARD_ID=GENERIC_F446VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F446VETX INTERFACE + "LINKER:--default-script=${GENERIC_F446VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VETX_MCU} +) +target_link_libraries(GENERIC_F446VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_F446VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F446VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F446VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F446VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F446VETX_serial_none INTERFACE) +target_compile_options(GENERIC_F446VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F446VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F446VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F446VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F446VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F446VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F446VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F446VETX_usb_none INTERFACE) +target_compile_options(GENERIC_F446VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F446VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F446VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F446VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F446VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F446VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F446VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F446VETX_hid +# ----------------------------------------------------------------------------- + +set(GENERIC_F446VETX_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(GENERIC_F446VETX_hid_MAXSIZE 524288) +set(GENERIC_F446VETX_hid_MAXDATASIZE 131072) +set(GENERIC_F446VETX_hid_MCU cortex-m4) +set(GENERIC_F446VETX_hid_FPCONF "-") +add_library(GENERIC_F446VETX_hid INTERFACE) +target_compile_options(GENERIC_F446VETX_hid INTERFACE + "SHELL:-DSTM32F446xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VETX_hid_MCU} +) +target_compile_definitions(GENERIC_F446VETX_hid INTERFACE + "STM32F4xx" + "ARDUINO_GENERIC_F446VETX" + "BOARD_NAME=\"GENERIC_F446VETX\"" + "BOARD_ID=GENERIC_F446VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F446VETX_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${GENERIC_F446VETX_hid_VARIANT_PATH} +) + +target_link_options(GENERIC_F446VETX_hid INTERFACE + "LINKER:--default-script=${GENERIC_F446VETX_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F446VETX_hid_MCU} +) +target_link_libraries(GENERIC_F446VETX_hid INTERFACE + arm_cortexM4lf_math +) + + +# GENERIC_F722RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F722RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET") +set(GENERIC_F722RCTX_MAXSIZE 262144) +set(GENERIC_F722RCTX_MAXDATASIZE 196608) +set(GENERIC_F722RCTX_MCU cortex-m7) +set(GENERIC_F722RCTX_FPCONF "-") +add_library(GENERIC_F722RCTX INTERFACE) +target_compile_options(GENERIC_F722RCTX INTERFACE + "SHELL:-DSTM32F722xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722RCTX_MCU} +) +target_compile_definitions(GENERIC_F722RCTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F722RCTX" + "BOARD_NAME=\"GENERIC_F722RCTX\"" + "BOARD_ID=GENERIC_F722RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F722RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F722RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F722RCTX INTERFACE + "LINKER:--default-script=${GENERIC_F722RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722RCTX_MCU} +) +target_link_libraries(GENERIC_F722RCTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F722RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F722RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F722RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F722RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F722RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F722RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F722RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F722RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F722RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F722RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F722RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F722RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F722RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F722RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F722RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F722RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F722RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F722RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F722RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F722RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F722RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F722RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET") +set(GENERIC_F722RETX_MAXSIZE 524288) +set(GENERIC_F722RETX_MAXDATASIZE 196608) +set(GENERIC_F722RETX_MCU cortex-m7) +set(GENERIC_F722RETX_FPCONF "-") +add_library(GENERIC_F722RETX INTERFACE) +target_compile_options(GENERIC_F722RETX INTERFACE + "SHELL:-DSTM32F722xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722RETX_MCU} +) +target_compile_definitions(GENERIC_F722RETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F722RETX" + "BOARD_NAME=\"GENERIC_F722RETX\"" + "BOARD_ID=GENERIC_F722RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F722RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F722RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F722RETX INTERFACE + "LINKER:--default-script=${GENERIC_F722RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722RETX_MCU} +) +target_link_libraries(GENERIC_F722RETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F722RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F722RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F722RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F722RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F722RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F722RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F722RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F722RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F722RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F722RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F722RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F722RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F722RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F722RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F722RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F722RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F722RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F722RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F722RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F722RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F722ZCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F722ZCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722Z(C-E)T_F732ZET") +set(GENERIC_F722ZCTX_MAXSIZE 262144) +set(GENERIC_F722ZCTX_MAXDATASIZE 196608) +set(GENERIC_F722ZCTX_MCU cortex-m7) +set(GENERIC_F722ZCTX_FPCONF "-") +add_library(GENERIC_F722ZCTX INTERFACE) +target_compile_options(GENERIC_F722ZCTX INTERFACE + "SHELL:-DSTM32F722xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722ZCTX_MCU} +) +target_compile_definitions(GENERIC_F722ZCTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F722ZCTX" + "BOARD_NAME=\"GENERIC_F722ZCTX\"" + "BOARD_ID=GENERIC_F722ZCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F722ZCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F722ZCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F722ZCTX INTERFACE + "LINKER:--default-script=${GENERIC_F722ZCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722ZCTX_MCU} +) +target_link_libraries(GENERIC_F722ZCTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F722ZCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F722ZCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F722ZCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F722ZCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F722ZCTX_serial_none INTERFACE) +target_compile_options(GENERIC_F722ZCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F722ZCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F722ZCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F722ZCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F722ZCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F722ZCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F722ZCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F722ZCTX_usb_none INTERFACE) +target_compile_options(GENERIC_F722ZCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F722ZCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F722ZCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F722ZCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F722ZCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F722ZCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F722ZCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F722ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F722ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722Z(C-E)T_F732ZET") +set(GENERIC_F722ZETX_MAXSIZE 524288) +set(GENERIC_F722ZETX_MAXDATASIZE 196608) +set(GENERIC_F722ZETX_MCU cortex-m7) +set(GENERIC_F722ZETX_FPCONF "-") +add_library(GENERIC_F722ZETX INTERFACE) +target_compile_options(GENERIC_F722ZETX INTERFACE + "SHELL:-DSTM32F722xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722ZETX_MCU} +) +target_compile_definitions(GENERIC_F722ZETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F722ZETX" + "BOARD_NAME=\"GENERIC_F722ZETX\"" + "BOARD_ID=GENERIC_F722ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F722ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F722ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F722ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F722ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F722ZETX_MCU} +) +target_link_libraries(GENERIC_F722ZETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F722ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F722ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F722ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F722ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F722ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F722ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F722ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F722ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F722ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F722ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F722ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F722ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F722ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F722ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F722ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F722ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F722ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F722ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F722ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F722ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F730R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F730R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET") +set(GENERIC_F730R8TX_MAXSIZE 65536) +set(GENERIC_F730R8TX_MAXDATASIZE 196608) +set(GENERIC_F730R8TX_MCU cortex-m7) +set(GENERIC_F730R8TX_FPCONF "-") +add_library(GENERIC_F730R8TX INTERFACE) +target_compile_options(GENERIC_F730R8TX INTERFACE + "SHELL:-DSTM32F730xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F730R8TX_MCU} +) +target_compile_definitions(GENERIC_F730R8TX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F730R8TX" + "BOARD_NAME=\"GENERIC_F730R8TX\"" + "BOARD_ID=GENERIC_F730R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F730R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F730R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F730R8TX INTERFACE + "LINKER:--default-script=${GENERIC_F730R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F730R8TX_MCU} +) +target_link_libraries(GENERIC_F730R8TX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F730R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F730R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F730R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F730R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F730R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F730R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F730R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F730R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F730R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F730R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F730R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F730R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F730R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F730R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F730R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F730R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F730R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F730R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F730R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F730R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F732RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F732RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET") +set(GENERIC_F732RETX_MAXSIZE 524288) +set(GENERIC_F732RETX_MAXDATASIZE 196608) +set(GENERIC_F732RETX_MCU cortex-m7) +set(GENERIC_F732RETX_FPCONF "-") +add_library(GENERIC_F732RETX INTERFACE) +target_compile_options(GENERIC_F732RETX INTERFACE + "SHELL:-DSTM32F732xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F732RETX_MCU} +) +target_compile_definitions(GENERIC_F732RETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F732RETX" + "BOARD_NAME=\"GENERIC_F732RETX\"" + "BOARD_ID=GENERIC_F732RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F732RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F732RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F732RETX INTERFACE + "LINKER:--default-script=${GENERIC_F732RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F732RETX_MCU} +) +target_link_libraries(GENERIC_F732RETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F732RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F732RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F732RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F732RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F732RETX_serial_none INTERFACE) +target_compile_options(GENERIC_F732RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F732RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F732RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F732RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F732RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F732RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F732RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F732RETX_usb_none INTERFACE) +target_compile_options(GENERIC_F732RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F732RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F732RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F732RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F732RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F732RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F732RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F732ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F732ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722Z(C-E)T_F732ZET") +set(GENERIC_F732ZETX_MAXSIZE 524288) +set(GENERIC_F732ZETX_MAXDATASIZE 196608) +set(GENERIC_F732ZETX_MCU cortex-m7) +set(GENERIC_F732ZETX_FPCONF "-") +add_library(GENERIC_F732ZETX INTERFACE) +target_compile_options(GENERIC_F732ZETX INTERFACE + "SHELL:-DSTM32F732xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F732ZETX_MCU} +) +target_compile_definitions(GENERIC_F732ZETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F732ZETX" + "BOARD_NAME=\"GENERIC_F732ZETX\"" + "BOARD_ID=GENERIC_F732ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F732ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F732ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F732ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F732ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F732ZETX_MCU} +) +target_link_libraries(GENERIC_F732ZETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F732ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F732ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F732ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F732ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F732ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F732ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F732ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F732ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F732ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F732ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F732ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F732ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F732ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F732ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F732ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F732ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F732ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F732ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F732ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F732ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F745ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F745ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F745ZETX_MAXSIZE 524288) +set(GENERIC_F745ZETX_MAXDATASIZE 327680) +set(GENERIC_F745ZETX_MCU cortex-m7) +set(GENERIC_F745ZETX_FPCONF "-") +add_library(GENERIC_F745ZETX INTERFACE) +target_compile_options(GENERIC_F745ZETX INTERFACE + "SHELL:-DSTM32F745xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F745ZETX_MCU} +) +target_compile_definitions(GENERIC_F745ZETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F745ZETX" + "BOARD_NAME=\"GENERIC_F745ZETX\"" + "BOARD_ID=GENERIC_F745ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F745ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F745ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F745ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F745ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F745ZETX_MCU} +) +target_link_libraries(GENERIC_F745ZETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F745ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F745ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F745ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F745ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F745ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F745ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F745ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F745ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F745ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F745ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F745ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F745ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F745ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F745ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F745ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F745ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F745ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F745ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F745ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F745ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F745ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F745ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F745ZGTX_MAXSIZE 1048576) +set(GENERIC_F745ZGTX_MAXDATASIZE 327680) +set(GENERIC_F745ZGTX_MCU cortex-m7) +set(GENERIC_F745ZGTX_FPCONF "-") +add_library(GENERIC_F745ZGTX INTERFACE) +target_compile_options(GENERIC_F745ZGTX INTERFACE + "SHELL:-DSTM32F745xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F745ZGTX_MCU} +) +target_compile_definitions(GENERIC_F745ZGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F745ZGTX" + "BOARD_NAME=\"GENERIC_F745ZGTX\"" + "BOARD_ID=GENERIC_F745ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F745ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F745ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F745ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F745ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F745ZGTX_MCU} +) +target_link_libraries(GENERIC_F745ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F745ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F745ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F745ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F745ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F745ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F745ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F745ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F745ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F745ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F745ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F745ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F745ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F745ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F745ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F745ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F745ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F745ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F745ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F745ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F745ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746BETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746BETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F746BETX_MAXSIZE 524288) +set(GENERIC_F746BETX_MAXDATASIZE 327680) +set(GENERIC_F746BETX_MCU cortex-m7) +set(GENERIC_F746BETX_FPCONF "-") +add_library(GENERIC_F746BETX INTERFACE) +target_compile_options(GENERIC_F746BETX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746BETX_MCU} +) +target_compile_definitions(GENERIC_F746BETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746BETX" + "BOARD_NAME=\"GENERIC_F746BETX\"" + "BOARD_ID=GENERIC_F746BETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746BETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746BETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746BETX INTERFACE + "LINKER:--default-script=${GENERIC_F746BETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746BETX_MCU} +) +target_link_libraries(GENERIC_F746BETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746BETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746BETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746BETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746BETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746BETX_serial_none INTERFACE) +target_compile_options(GENERIC_F746BETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746BETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746BETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746BETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746BETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746BETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746BETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746BETX_usb_none INTERFACE) +target_compile_options(GENERIC_F746BETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746BETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746BETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746BETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746BETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746BETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746BETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746BGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746BGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F746BGTX_MAXSIZE 1048576) +set(GENERIC_F746BGTX_MAXDATASIZE 327680) +set(GENERIC_F746BGTX_MCU cortex-m7) +set(GENERIC_F746BGTX_FPCONF "-") +add_library(GENERIC_F746BGTX INTERFACE) +target_compile_options(GENERIC_F746BGTX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746BGTX_MCU} +) +target_compile_definitions(GENERIC_F746BGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746BGTX" + "BOARD_NAME=\"GENERIC_F746BGTX\"" + "BOARD_ID=GENERIC_F746BGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746BGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746BGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746BGTX INTERFACE + "LINKER:--default-script=${GENERIC_F746BGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746BGTX_MCU} +) +target_link_libraries(GENERIC_F746BGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746BGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746BGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746BGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746BGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746BGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F746BGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746BGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746BGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746BGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746BGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746BGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746BGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746BGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F746BGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746BGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746BGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746BGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746BGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746BGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746BGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746NEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746NEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F746NEHX_MAXSIZE 524288) +set(GENERIC_F746NEHX_MAXDATASIZE 327680) +set(GENERIC_F746NEHX_MCU cortex-m7) +set(GENERIC_F746NEHX_FPCONF "-") +add_library(GENERIC_F746NEHX INTERFACE) +target_compile_options(GENERIC_F746NEHX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746NEHX_MCU} +) +target_compile_definitions(GENERIC_F746NEHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746NEHX" + "BOARD_NAME=\"GENERIC_F746NEHX\"" + "BOARD_ID=GENERIC_F746NEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746NEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746NEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746NEHX INTERFACE + "LINKER:--default-script=${GENERIC_F746NEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746NEHX_MCU} +) +target_link_libraries(GENERIC_F746NEHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746NEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746NEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746NEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746NEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746NEHX_serial_none INTERFACE) +target_compile_options(GENERIC_F746NEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746NEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746NEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746NEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746NEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746NEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746NEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746NEHX_usb_none INTERFACE) +target_compile_options(GENERIC_F746NEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746NEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746NEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746NEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746NEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746NEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746NEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746NGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746NGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F746NGHX_MAXSIZE 1048576) +set(GENERIC_F746NGHX_MAXDATASIZE 327680) +set(GENERIC_F746NGHX_MCU cortex-m7) +set(GENERIC_F746NGHX_FPCONF "-") +add_library(GENERIC_F746NGHX INTERFACE) +target_compile_options(GENERIC_F746NGHX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746NGHX_MCU} +) +target_compile_definitions(GENERIC_F746NGHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746NGHX" + "BOARD_NAME=\"GENERIC_F746NGHX\"" + "BOARD_ID=GENERIC_F746NGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746NGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746NGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746NGHX INTERFACE + "LINKER:--default-script=${GENERIC_F746NGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746NGHX_MCU} +) +target_link_libraries(GENERIC_F746NGHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746NGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746NGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746NGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746NGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746NGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F746NGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746NGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746NGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746NGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746NGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746NGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746NGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746NGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F746NGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746NGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746NGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746NGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746NGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746NGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746NGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F746ZETX_MAXSIZE 524288) +set(GENERIC_F746ZETX_MAXDATASIZE 327680) +set(GENERIC_F746ZETX_MCU cortex-m7) +set(GENERIC_F746ZETX_FPCONF "-") +add_library(GENERIC_F746ZETX INTERFACE) +target_compile_options(GENERIC_F746ZETX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZETX_MCU} +) +target_compile_definitions(GENERIC_F746ZETX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746ZETX" + "BOARD_NAME=\"GENERIC_F746ZETX\"" + "BOARD_ID=GENERIC_F746ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746ZETX INTERFACE + "LINKER:--default-script=${GENERIC_F746ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZETX_MCU} +) +target_link_libraries(GENERIC_F746ZETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_F746ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_F746ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746ZEYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746ZEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F746ZEYX_MAXSIZE 524288) +set(GENERIC_F746ZEYX_MAXDATASIZE 327680) +set(GENERIC_F746ZEYX_MCU cortex-m7) +set(GENERIC_F746ZEYX_FPCONF "-") +add_library(GENERIC_F746ZEYX INTERFACE) +target_compile_options(GENERIC_F746ZEYX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZEYX_MCU} +) +target_compile_definitions(GENERIC_F746ZEYX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746ZEYX" + "BOARD_NAME=\"GENERIC_F746ZEYX\"" + "BOARD_ID=GENERIC_F746ZEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746ZEYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746ZEYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746ZEYX INTERFACE + "LINKER:--default-script=${GENERIC_F746ZEYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZEYX_MCU} +) +target_link_libraries(GENERIC_F746ZEYX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746ZEYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746ZEYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZEYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746ZEYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746ZEYX_serial_none INTERFACE) +target_compile_options(GENERIC_F746ZEYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746ZEYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746ZEYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746ZEYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746ZEYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746ZEYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746ZEYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746ZEYX_usb_none INTERFACE) +target_compile_options(GENERIC_F746ZEYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZEYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746ZEYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZEYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746ZEYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746ZEYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746ZEYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F746ZGTX_MAXSIZE 1048576) +set(GENERIC_F746ZGTX_MAXDATASIZE 327680) +set(GENERIC_F746ZGTX_MCU cortex-m7) +set(GENERIC_F746ZGTX_FPCONF "-") +add_library(GENERIC_F746ZGTX INTERFACE) +target_compile_options(GENERIC_F746ZGTX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZGTX_MCU} +) +target_compile_definitions(GENERIC_F746ZGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746ZGTX" + "BOARD_NAME=\"GENERIC_F746ZGTX\"" + "BOARD_ID=GENERIC_F746ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F746ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZGTX_MCU} +) +target_link_libraries(GENERIC_F746ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F746ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F746ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F746ZGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F746ZGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F746ZGYX_MAXSIZE 1048576) +set(GENERIC_F746ZGYX_MAXDATASIZE 327680) +set(GENERIC_F746ZGYX_MCU cortex-m7) +set(GENERIC_F746ZGYX_FPCONF "-") +add_library(GENERIC_F746ZGYX INTERFACE) +target_compile_options(GENERIC_F746ZGYX INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZGYX_MCU} +) +target_compile_definitions(GENERIC_F746ZGYX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F746ZGYX" + "BOARD_NAME=\"GENERIC_F746ZGYX\"" + "BOARD_ID=GENERIC_F746ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F746ZGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F746ZGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F746ZGYX INTERFACE + "LINKER:--default-script=${GENERIC_F746ZGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F746ZGYX_MCU} +) +target_link_libraries(GENERIC_F746ZGYX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F746ZGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F746ZGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F746ZGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F746ZGYX_serial_none INTERFACE) +target_compile_options(GENERIC_F746ZGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F746ZGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F746ZGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F746ZGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F746ZGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F746ZGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F746ZGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F746ZGYX_usb_none INTERFACE) +target_compile_options(GENERIC_F746ZGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F746ZGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F746ZGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F746ZGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F746ZGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F746ZGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F750N8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_F750N8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F750N8HX_MAXSIZE 65536) +set(GENERIC_F750N8HX_MAXDATASIZE 327680) +set(GENERIC_F750N8HX_MCU cortex-m7) +set(GENERIC_F750N8HX_FPCONF "-") +add_library(GENERIC_F750N8HX INTERFACE) +target_compile_options(GENERIC_F750N8HX INTERFACE + "SHELL:-DSTM32F750xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F750N8HX_MCU} +) +target_compile_definitions(GENERIC_F750N8HX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F750N8HX" + "BOARD_NAME=\"GENERIC_F750N8HX\"" + "BOARD_ID=GENERIC_F750N8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F750N8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F750N8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_F750N8HX INTERFACE + "LINKER:--default-script=${GENERIC_F750N8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F750N8HX_MCU} +) +target_link_libraries(GENERIC_F750N8HX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F750N8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F750N8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F750N8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_F750N8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F750N8HX_serial_none INTERFACE) +target_compile_options(GENERIC_F750N8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F750N8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F750N8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F750N8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F750N8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F750N8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_F750N8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F750N8HX_usb_none INTERFACE) +target_compile_options(GENERIC_F750N8HX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F750N8HX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F750N8HX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F750N8HX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F750N8HX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F750N8HX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F750N8HX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F750Z8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_F750Z8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F750Z8TX_MAXSIZE 65536) +set(GENERIC_F750Z8TX_MAXDATASIZE 327680) +set(GENERIC_F750Z8TX_MCU cortex-m7) +set(GENERIC_F750Z8TX_FPCONF "-") +add_library(GENERIC_F750Z8TX INTERFACE) +target_compile_options(GENERIC_F750Z8TX INTERFACE + "SHELL:-DSTM32F750xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F750Z8TX_MCU} +) +target_compile_definitions(GENERIC_F750Z8TX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F750Z8TX" + "BOARD_NAME=\"GENERIC_F750Z8TX\"" + "BOARD_ID=GENERIC_F750Z8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F750Z8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F750Z8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_F750Z8TX INTERFACE + "LINKER:--default-script=${GENERIC_F750Z8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F750Z8TX_MCU} +) +target_link_libraries(GENERIC_F750Z8TX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F750Z8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F750Z8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F750Z8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_F750Z8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F750Z8TX_serial_none INTERFACE) +target_compile_options(GENERIC_F750Z8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F750Z8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F750Z8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F750Z8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F750Z8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F750Z8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_F750Z8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F750Z8TX_usb_none INTERFACE) +target_compile_options(GENERIC_F750Z8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F750Z8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F750Z8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F750Z8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F750Z8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F750Z8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F750Z8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F756BGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F756BGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F756BGTX_MAXSIZE 1048576) +set(GENERIC_F756BGTX_MAXDATASIZE 327680) +set(GENERIC_F756BGTX_MCU cortex-m7) +set(GENERIC_F756BGTX_FPCONF "-") +add_library(GENERIC_F756BGTX INTERFACE) +target_compile_options(GENERIC_F756BGTX INTERFACE + "SHELL:-DSTM32F756xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756BGTX_MCU} +) +target_compile_definitions(GENERIC_F756BGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F756BGTX" + "BOARD_NAME=\"GENERIC_F756BGTX\"" + "BOARD_ID=GENERIC_F756BGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F756BGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F756BGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F756BGTX INTERFACE + "LINKER:--default-script=${GENERIC_F756BGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756BGTX_MCU} +) +target_link_libraries(GENERIC_F756BGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F756BGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F756BGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F756BGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F756BGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F756BGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F756BGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F756BGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F756BGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F756BGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F756BGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F756BGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F756BGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F756BGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F756BGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F756BGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F756BGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F756BGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F756BGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F756BGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F756BGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F756NGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F756NGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH") +set(GENERIC_F756NGHX_MAXSIZE 1048576) +set(GENERIC_F756NGHX_MAXDATASIZE 327680) +set(GENERIC_F756NGHX_MCU cortex-m7) +set(GENERIC_F756NGHX_FPCONF "-") +add_library(GENERIC_F756NGHX INTERFACE) +target_compile_options(GENERIC_F756NGHX INTERFACE + "SHELL:-DSTM32F756xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756NGHX_MCU} +) +target_compile_definitions(GENERIC_F756NGHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F756NGHX" + "BOARD_NAME=\"GENERIC_F756NGHX\"" + "BOARD_ID=GENERIC_F756NGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F756NGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F756NGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F756NGHX INTERFACE + "LINKER:--default-script=${GENERIC_F756NGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756NGHX_MCU} +) +target_link_libraries(GENERIC_F756NGHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F756NGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F756NGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F756NGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F756NGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F756NGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F756NGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F756NGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F756NGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F756NGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F756NGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F756NGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F756NGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F756NGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F756NGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F756NGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F756NGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F756NGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F756NGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F756NGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F756NGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F756ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F756ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F756ZGTX_MAXSIZE 1048576) +set(GENERIC_F756ZGTX_MAXDATASIZE 327680) +set(GENERIC_F756ZGTX_MCU cortex-m7) +set(GENERIC_F756ZGTX_FPCONF "-") +add_library(GENERIC_F756ZGTX INTERFACE) +target_compile_options(GENERIC_F756ZGTX INTERFACE + "SHELL:-DSTM32F756xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756ZGTX_MCU} +) +target_compile_definitions(GENERIC_F756ZGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F756ZGTX" + "BOARD_NAME=\"GENERIC_F756ZGTX\"" + "BOARD_ID=GENERIC_F756ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F756ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F756ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F756ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F756ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756ZGTX_MCU} +) +target_link_libraries(GENERIC_F756ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F756ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F756ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F756ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F756ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F756ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F756ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F756ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F756ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F756ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F756ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F756ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F756ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F756ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F756ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F756ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F756ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F756ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F756ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F756ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F756ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F756ZGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_F756ZGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(GENERIC_F756ZGYX_MAXSIZE 1048576) +set(GENERIC_F756ZGYX_MAXDATASIZE 327680) +set(GENERIC_F756ZGYX_MCU cortex-m7) +set(GENERIC_F756ZGYX_FPCONF "-") +add_library(GENERIC_F756ZGYX INTERFACE) +target_compile_options(GENERIC_F756ZGYX INTERFACE + "SHELL:-DSTM32F756xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756ZGYX_MCU} +) +target_compile_definitions(GENERIC_F756ZGYX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F756ZGYX" + "BOARD_NAME=\"GENERIC_F756ZGYX\"" + "BOARD_ID=GENERIC_F756ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F756ZGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F756ZGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_F756ZGYX INTERFACE + "LINKER:--default-script=${GENERIC_F756ZGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F756ZGYX_MCU} +) +target_link_libraries(GENERIC_F756ZGYX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F756ZGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F756ZGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F756ZGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_F756ZGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F756ZGYX_serial_none INTERFACE) +target_compile_options(GENERIC_F756ZGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F756ZGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F756ZGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F756ZGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F756ZGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F756ZGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_F756ZGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F756ZGYX_usb_none INTERFACE) +target_compile_options(GENERIC_F756ZGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F756ZGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F756ZGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F756ZGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F756ZGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F756ZGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F756ZGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765IGKX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765IGKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F765IGKX_MAXSIZE 1048576) +set(GENERIC_F765IGKX_MAXDATASIZE 393216) +set(GENERIC_F765IGKX_MCU cortex-m7) +set(GENERIC_F765IGKX_FPCONF "-") +add_library(GENERIC_F765IGKX INTERFACE) +target_compile_options(GENERIC_F765IGKX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IGKX_MCU} +) +target_compile_definitions(GENERIC_F765IGKX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765IGKX" + "BOARD_NAME=\"GENERIC_F765IGKX\"" + "BOARD_ID=GENERIC_F765IGKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765IGKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765IGKX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765IGKX INTERFACE + "LINKER:--default-script=${GENERIC_F765IGKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IGKX_MCU} +) +target_link_libraries(GENERIC_F765IGKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765IGKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765IGKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IGKX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765IGKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765IGKX_serial_none INTERFACE) +target_compile_options(GENERIC_F765IGKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765IGKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765IGKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765IGKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765IGKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765IGKX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765IGKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765IGKX_usb_none INTERFACE) +target_compile_options(GENERIC_F765IGKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IGKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765IGKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IGKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765IGKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765IGKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765IGKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F765IGTX_MAXSIZE 1048576) +set(GENERIC_F765IGTX_MAXDATASIZE 393216) +set(GENERIC_F765IGTX_MCU cortex-m7) +set(GENERIC_F765IGTX_FPCONF "-") +add_library(GENERIC_F765IGTX INTERFACE) +target_compile_options(GENERIC_F765IGTX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IGTX_MCU} +) +target_compile_definitions(GENERIC_F765IGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765IGTX" + "BOARD_NAME=\"GENERIC_F765IGTX\"" + "BOARD_ID=GENERIC_F765IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765IGTX INTERFACE + "LINKER:--default-script=${GENERIC_F765IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IGTX_MCU} +) +target_link_libraries(GENERIC_F765IGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F765IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F765IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765IIKX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765IIKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F765IIKX_MAXSIZE 2097152) +set(GENERIC_F765IIKX_MAXDATASIZE 393216) +set(GENERIC_F765IIKX_MCU cortex-m7) +set(GENERIC_F765IIKX_FPCONF "-") +add_library(GENERIC_F765IIKX INTERFACE) +target_compile_options(GENERIC_F765IIKX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IIKX_MCU} +) +target_compile_definitions(GENERIC_F765IIKX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765IIKX" + "BOARD_NAME=\"GENERIC_F765IIKX\"" + "BOARD_ID=GENERIC_F765IIKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765IIKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765IIKX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765IIKX INTERFACE + "LINKER:--default-script=${GENERIC_F765IIKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IIKX_MCU} +) +target_link_libraries(GENERIC_F765IIKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765IIKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765IIKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IIKX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765IIKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765IIKX_serial_none INTERFACE) +target_compile_options(GENERIC_F765IIKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765IIKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765IIKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765IIKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765IIKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765IIKX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765IIKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765IIKX_usb_none INTERFACE) +target_compile_options(GENERIC_F765IIKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IIKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765IIKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IIKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765IIKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765IIKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765IIKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F765IITX_MAXSIZE 2097152) +set(GENERIC_F765IITX_MAXDATASIZE 393216) +set(GENERIC_F765IITX_MCU cortex-m7) +set(GENERIC_F765IITX_FPCONF "-") +add_library(GENERIC_F765IITX INTERFACE) +target_compile_options(GENERIC_F765IITX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IITX_MCU} +) +target_compile_definitions(GENERIC_F765IITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765IITX" + "BOARD_NAME=\"GENERIC_F765IITX\"" + "BOARD_ID=GENERIC_F765IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765IITX INTERFACE + "LINKER:--default-script=${GENERIC_F765IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765IITX_MCU} +) +target_link_libraries(GENERIC_F765IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765IITX_serial_none INTERFACE) +target_compile_options(GENERIC_F765IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765IITX_usb_none INTERFACE) +target_compile_options(GENERIC_F765IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765VGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765VGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F765VGHX_MAXSIZE 1048576) +set(GENERIC_F765VGHX_MAXDATASIZE 393216) +set(GENERIC_F765VGHX_MCU cortex-m7) +set(GENERIC_F765VGHX_FPCONF "-") +add_library(GENERIC_F765VGHX INTERFACE) +target_compile_options(GENERIC_F765VGHX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VGHX_MCU} +) +target_compile_definitions(GENERIC_F765VGHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765VGHX" + "BOARD_NAME=\"GENERIC_F765VGHX\"" + "BOARD_ID=GENERIC_F765VGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765VGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765VGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765VGHX INTERFACE + "LINKER:--default-script=${GENERIC_F765VGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VGHX_MCU} +) +target_link_libraries(GENERIC_F765VGHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765VGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765VGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765VGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765VGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F765VGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765VGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765VGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765VGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765VGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765VGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765VGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765VGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F765VGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765VGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765VGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765VGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765VGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F765VGTX_MAXSIZE 1048576) +set(GENERIC_F765VGTX_MAXDATASIZE 393216) +set(GENERIC_F765VGTX_MCU cortex-m7) +set(GENERIC_F765VGTX_FPCONF "-") +add_library(GENERIC_F765VGTX INTERFACE) +target_compile_options(GENERIC_F765VGTX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VGTX_MCU} +) +target_compile_definitions(GENERIC_F765VGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765VGTX" + "BOARD_NAME=\"GENERIC_F765VGTX\"" + "BOARD_ID=GENERIC_F765VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F765VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VGTX_MCU} +) +target_link_libraries(GENERIC_F765VGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F765VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F765VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765VIHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765VIHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F765VIHX_MAXSIZE 2097152) +set(GENERIC_F765VIHX_MAXDATASIZE 393216) +set(GENERIC_F765VIHX_MCU cortex-m7) +set(GENERIC_F765VIHX_FPCONF "-") +add_library(GENERIC_F765VIHX INTERFACE) +target_compile_options(GENERIC_F765VIHX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VIHX_MCU} +) +target_compile_definitions(GENERIC_F765VIHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765VIHX" + "BOARD_NAME=\"GENERIC_F765VIHX\"" + "BOARD_ID=GENERIC_F765VIHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765VIHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765VIHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765VIHX INTERFACE + "LINKER:--default-script=${GENERIC_F765VIHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VIHX_MCU} +) +target_link_libraries(GENERIC_F765VIHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765VIHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765VIHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VIHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765VIHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765VIHX_serial_none INTERFACE) +target_compile_options(GENERIC_F765VIHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765VIHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765VIHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765VIHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765VIHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765VIHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765VIHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765VIHX_usb_none INTERFACE) +target_compile_options(GENERIC_F765VIHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VIHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765VIHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VIHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765VIHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765VIHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765VIHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F765VITX_MAXSIZE 2097152) +set(GENERIC_F765VITX_MAXDATASIZE 393216) +set(GENERIC_F765VITX_MCU cortex-m7) +set(GENERIC_F765VITX_FPCONF "-") +add_library(GENERIC_F765VITX INTERFACE) +target_compile_options(GENERIC_F765VITX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VITX_MCU} +) +target_compile_definitions(GENERIC_F765VITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765VITX" + "BOARD_NAME=\"GENERIC_F765VITX\"" + "BOARD_ID=GENERIC_F765VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765VITX INTERFACE + "LINKER:--default-script=${GENERIC_F765VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765VITX_MCU} +) +target_link_libraries(GENERIC_F765VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765VITX_serial_none INTERFACE) +target_compile_options(GENERIC_F765VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765VITX_usb_none INTERFACE) +target_compile_options(GENERIC_F765VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT") +set(GENERIC_F765ZGTX_MAXSIZE 1048576) +set(GENERIC_F765ZGTX_MAXDATASIZE 393216) +set(GENERIC_F765ZGTX_MCU cortex-m7) +set(GENERIC_F765ZGTX_FPCONF "-") +add_library(GENERIC_F765ZGTX INTERFACE) +target_compile_options(GENERIC_F765ZGTX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765ZGTX_MCU} +) +target_compile_definitions(GENERIC_F765ZGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765ZGTX" + "BOARD_NAME=\"GENERIC_F765ZGTX\"" + "BOARD_ID=GENERIC_F765ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F765ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765ZGTX_MCU} +) +target_link_libraries(GENERIC_F765ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F765ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F765ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F765ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F765ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT") +set(GENERIC_F765ZITX_MAXSIZE 2097152) +set(GENERIC_F765ZITX_MAXDATASIZE 393216) +set(GENERIC_F765ZITX_MCU cortex-m7) +set(GENERIC_F765ZITX_FPCONF "-") +add_library(GENERIC_F765ZITX INTERFACE) +target_compile_options(GENERIC_F765ZITX INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765ZITX_MCU} +) +target_compile_definitions(GENERIC_F765ZITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F765ZITX" + "BOARD_NAME=\"GENERIC_F765ZITX\"" + "BOARD_ID=GENERIC_F765ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F765ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F765ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F765ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F765ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F765ZITX_MCU} +) +target_link_libraries(GENERIC_F765ZITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F765ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F765ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F765ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F765ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F765ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F765ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F765ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F765ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F765ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F765ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F765ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F765ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F765ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F765ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F765ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F765ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F765ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F765ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F765ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F765ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767IGKX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767IGKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F767IGKX_MAXSIZE 1048576) +set(GENERIC_F767IGKX_MAXDATASIZE 393216) +set(GENERIC_F767IGKX_MCU cortex-m7) +set(GENERIC_F767IGKX_FPCONF "-") +add_library(GENERIC_F767IGKX INTERFACE) +target_compile_options(GENERIC_F767IGKX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IGKX_MCU} +) +target_compile_definitions(GENERIC_F767IGKX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767IGKX" + "BOARD_NAME=\"GENERIC_F767IGKX\"" + "BOARD_ID=GENERIC_F767IGKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767IGKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767IGKX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767IGKX INTERFACE + "LINKER:--default-script=${GENERIC_F767IGKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IGKX_MCU} +) +target_link_libraries(GENERIC_F767IGKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767IGKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767IGKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IGKX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767IGKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767IGKX_serial_none INTERFACE) +target_compile_options(GENERIC_F767IGKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767IGKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767IGKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767IGKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767IGKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767IGKX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767IGKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767IGKX_usb_none INTERFACE) +target_compile_options(GENERIC_F767IGKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IGKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767IGKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IGKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767IGKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767IGKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767IGKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F767IGTX_MAXSIZE 1048576) +set(GENERIC_F767IGTX_MAXDATASIZE 393216) +set(GENERIC_F767IGTX_MCU cortex-m7) +set(GENERIC_F767IGTX_FPCONF "-") +add_library(GENERIC_F767IGTX INTERFACE) +target_compile_options(GENERIC_F767IGTX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IGTX_MCU} +) +target_compile_definitions(GENERIC_F767IGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767IGTX" + "BOARD_NAME=\"GENERIC_F767IGTX\"" + "BOARD_ID=GENERIC_F767IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767IGTX INTERFACE + "LINKER:--default-script=${GENERIC_F767IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IGTX_MCU} +) +target_link_libraries(GENERIC_F767IGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F767IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F767IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767IIKX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767IIKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F767IIKX_MAXSIZE 2097152) +set(GENERIC_F767IIKX_MAXDATASIZE 393216) +set(GENERIC_F767IIKX_MCU cortex-m7) +set(GENERIC_F767IIKX_FPCONF "-") +add_library(GENERIC_F767IIKX INTERFACE) +target_compile_options(GENERIC_F767IIKX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IIKX_MCU} +) +target_compile_definitions(GENERIC_F767IIKX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767IIKX" + "BOARD_NAME=\"GENERIC_F767IIKX\"" + "BOARD_ID=GENERIC_F767IIKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767IIKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767IIKX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767IIKX INTERFACE + "LINKER:--default-script=${GENERIC_F767IIKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IIKX_MCU} +) +target_link_libraries(GENERIC_F767IIKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767IIKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767IIKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IIKX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767IIKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767IIKX_serial_none INTERFACE) +target_compile_options(GENERIC_F767IIKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767IIKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767IIKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767IIKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767IIKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767IIKX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767IIKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767IIKX_usb_none INTERFACE) +target_compile_options(GENERIC_F767IIKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IIKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767IIKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IIKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767IIKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767IIKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767IIKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F767IITX_MAXSIZE 2097152) +set(GENERIC_F767IITX_MAXDATASIZE 393216) +set(GENERIC_F767IITX_MCU cortex-m7) +set(GENERIC_F767IITX_FPCONF "-") +add_library(GENERIC_F767IITX INTERFACE) +target_compile_options(GENERIC_F767IITX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IITX_MCU} +) +target_compile_definitions(GENERIC_F767IITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767IITX" + "BOARD_NAME=\"GENERIC_F767IITX\"" + "BOARD_ID=GENERIC_F767IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767IITX INTERFACE + "LINKER:--default-script=${GENERIC_F767IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767IITX_MCU} +) +target_link_libraries(GENERIC_F767IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767IITX_serial_none INTERFACE) +target_compile_options(GENERIC_F767IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767IITX_usb_none INTERFACE) +target_compile_options(GENERIC_F767IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767VGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767VGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F767VGHX_MAXSIZE 1048576) +set(GENERIC_F767VGHX_MAXDATASIZE 393216) +set(GENERIC_F767VGHX_MCU cortex-m7) +set(GENERIC_F767VGHX_FPCONF "-") +add_library(GENERIC_F767VGHX INTERFACE) +target_compile_options(GENERIC_F767VGHX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VGHX_MCU} +) +target_compile_definitions(GENERIC_F767VGHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767VGHX" + "BOARD_NAME=\"GENERIC_F767VGHX\"" + "BOARD_ID=GENERIC_F767VGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767VGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767VGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767VGHX INTERFACE + "LINKER:--default-script=${GENERIC_F767VGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VGHX_MCU} +) +target_link_libraries(GENERIC_F767VGHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767VGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767VGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767VGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767VGHX_serial_none INTERFACE) +target_compile_options(GENERIC_F767VGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767VGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767VGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767VGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767VGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767VGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767VGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767VGHX_usb_none INTERFACE) +target_compile_options(GENERIC_F767VGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767VGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767VGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767VGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767VGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F767VGTX_MAXSIZE 1048576) +set(GENERIC_F767VGTX_MAXDATASIZE 393216) +set(GENERIC_F767VGTX_MCU cortex-m7) +set(GENERIC_F767VGTX_FPCONF "-") +add_library(GENERIC_F767VGTX INTERFACE) +target_compile_options(GENERIC_F767VGTX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VGTX_MCU} +) +target_compile_definitions(GENERIC_F767VGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767VGTX" + "BOARD_NAME=\"GENERIC_F767VGTX\"" + "BOARD_ID=GENERIC_F767VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767VGTX INTERFACE + "LINKER:--default-script=${GENERIC_F767VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VGTX_MCU} +) +target_link_libraries(GENERIC_F767VGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F767VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F767VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767VIHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767VIHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F767VIHX_MAXSIZE 2097152) +set(GENERIC_F767VIHX_MAXDATASIZE 393216) +set(GENERIC_F767VIHX_MCU cortex-m7) +set(GENERIC_F767VIHX_FPCONF "-") +add_library(GENERIC_F767VIHX INTERFACE) +target_compile_options(GENERIC_F767VIHX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VIHX_MCU} +) +target_compile_definitions(GENERIC_F767VIHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767VIHX" + "BOARD_NAME=\"GENERIC_F767VIHX\"" + "BOARD_ID=GENERIC_F767VIHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767VIHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767VIHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767VIHX INTERFACE + "LINKER:--default-script=${GENERIC_F767VIHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VIHX_MCU} +) +target_link_libraries(GENERIC_F767VIHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767VIHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767VIHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VIHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767VIHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767VIHX_serial_none INTERFACE) +target_compile_options(GENERIC_F767VIHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767VIHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767VIHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767VIHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767VIHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767VIHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767VIHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767VIHX_usb_none INTERFACE) +target_compile_options(GENERIC_F767VIHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VIHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767VIHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VIHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767VIHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767VIHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767VIHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F767VITX_MAXSIZE 2097152) +set(GENERIC_F767VITX_MAXDATASIZE 393216) +set(GENERIC_F767VITX_MCU cortex-m7) +set(GENERIC_F767VITX_FPCONF "-") +add_library(GENERIC_F767VITX INTERFACE) +target_compile_options(GENERIC_F767VITX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VITX_MCU} +) +target_compile_definitions(GENERIC_F767VITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767VITX" + "BOARD_NAME=\"GENERIC_F767VITX\"" + "BOARD_ID=GENERIC_F767VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767VITX INTERFACE + "LINKER:--default-script=${GENERIC_F767VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767VITX_MCU} +) +target_link_libraries(GENERIC_F767VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767VITX_serial_none INTERFACE) +target_compile_options(GENERIC_F767VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767VITX_usb_none INTERFACE) +target_compile_options(GENERIC_F767VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT") +set(GENERIC_F767ZGTX_MAXSIZE 1048576) +set(GENERIC_F767ZGTX_MAXDATASIZE 393216) +set(GENERIC_F767ZGTX_MCU cortex-m7) +set(GENERIC_F767ZGTX_FPCONF "-") +add_library(GENERIC_F767ZGTX INTERFACE) +target_compile_options(GENERIC_F767ZGTX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767ZGTX_MCU} +) +target_compile_definitions(GENERIC_F767ZGTX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767ZGTX" + "BOARD_NAME=\"GENERIC_F767ZGTX\"" + "BOARD_ID=GENERIC_F767ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_F767ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767ZGTX_MCU} +) +target_link_libraries(GENERIC_F767ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_F767ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_F767ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F767ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F767ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT") +set(GENERIC_F767ZITX_MAXSIZE 2097152) +set(GENERIC_F767ZITX_MAXDATASIZE 393216) +set(GENERIC_F767ZITX_MCU cortex-m7) +set(GENERIC_F767ZITX_FPCONF "-") +add_library(GENERIC_F767ZITX INTERFACE) +target_compile_options(GENERIC_F767ZITX INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767ZITX_MCU} +) +target_compile_definitions(GENERIC_F767ZITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F767ZITX" + "BOARD_NAME=\"GENERIC_F767ZITX\"" + "BOARD_ID=GENERIC_F767ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F767ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F767ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F767ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F767ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F767ZITX_MCU} +) +target_link_libraries(GENERIC_F767ZITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F767ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F767ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F767ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F767ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F767ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F767ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F767ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F767ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F767ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F767ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F767ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F767ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F767ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F767ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F767ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F767ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F767ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F767ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F767ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F767ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F777IIKX +# ----------------------------------------------------------------------------- + +set(GENERIC_F777IIKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F777IIKX_MAXSIZE 2097152) +set(GENERIC_F777IIKX_MAXDATASIZE 393216) +set(GENERIC_F777IIKX_MCU cortex-m7) +set(GENERIC_F777IIKX_FPCONF "-") +add_library(GENERIC_F777IIKX INTERFACE) +target_compile_options(GENERIC_F777IIKX INTERFACE + "SHELL:-DSTM32F777xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777IIKX_MCU} +) +target_compile_definitions(GENERIC_F777IIKX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F777IIKX" + "BOARD_NAME=\"GENERIC_F777IIKX\"" + "BOARD_ID=GENERIC_F777IIKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F777IIKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F777IIKX_VARIANT_PATH} +) + +target_link_options(GENERIC_F777IIKX INTERFACE + "LINKER:--default-script=${GENERIC_F777IIKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777IIKX_MCU} +) +target_link_libraries(GENERIC_F777IIKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F777IIKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F777IIKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F777IIKX_serial_generic INTERFACE) +target_compile_options(GENERIC_F777IIKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F777IIKX_serial_none INTERFACE) +target_compile_options(GENERIC_F777IIKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F777IIKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F777IIKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F777IIKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F777IIKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F777IIKX_usb_HID INTERFACE) +target_compile_options(GENERIC_F777IIKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F777IIKX_usb_none INTERFACE) +target_compile_options(GENERIC_F777IIKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F777IIKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F777IIKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F777IIKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F777IIKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F777IIKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F777IIKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F777IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F777IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)") +set(GENERIC_F777IITX_MAXSIZE 2097152) +set(GENERIC_F777IITX_MAXDATASIZE 393216) +set(GENERIC_F777IITX_MCU cortex-m7) +set(GENERIC_F777IITX_FPCONF "-") +add_library(GENERIC_F777IITX INTERFACE) +target_compile_options(GENERIC_F777IITX INTERFACE + "SHELL:-DSTM32F777xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777IITX_MCU} +) +target_compile_definitions(GENERIC_F777IITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F777IITX" + "BOARD_NAME=\"GENERIC_F777IITX\"" + "BOARD_ID=GENERIC_F777IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F777IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F777IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F777IITX INTERFACE + "LINKER:--default-script=${GENERIC_F777IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777IITX_MCU} +) +target_link_libraries(GENERIC_F777IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F777IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F777IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F777IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F777IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F777IITX_serial_none INTERFACE) +target_compile_options(GENERIC_F777IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F777IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F777IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F777IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F777IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F777IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F777IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F777IITX_usb_none INTERFACE) +target_compile_options(GENERIC_F777IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F777IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F777IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F777IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F777IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F777IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F777IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F777VIHX +# ----------------------------------------------------------------------------- + +set(GENERIC_F777VIHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F777VIHX_MAXSIZE 2097152) +set(GENERIC_F777VIHX_MAXDATASIZE 393216) +set(GENERIC_F777VIHX_MCU cortex-m7) +set(GENERIC_F777VIHX_FPCONF "-") +add_library(GENERIC_F777VIHX INTERFACE) +target_compile_options(GENERIC_F777VIHX INTERFACE + "SHELL:-DSTM32F777xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777VIHX_MCU} +) +target_compile_definitions(GENERIC_F777VIHX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F777VIHX" + "BOARD_NAME=\"GENERIC_F777VIHX\"" + "BOARD_ID=GENERIC_F777VIHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F777VIHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F777VIHX_VARIANT_PATH} +) + +target_link_options(GENERIC_F777VIHX INTERFACE + "LINKER:--default-script=${GENERIC_F777VIHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777VIHX_MCU} +) +target_link_libraries(GENERIC_F777VIHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F777VIHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F777VIHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F777VIHX_serial_generic INTERFACE) +target_compile_options(GENERIC_F777VIHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F777VIHX_serial_none INTERFACE) +target_compile_options(GENERIC_F777VIHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F777VIHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F777VIHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F777VIHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F777VIHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F777VIHX_usb_HID INTERFACE) +target_compile_options(GENERIC_F777VIHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F777VIHX_usb_none INTERFACE) +target_compile_options(GENERIC_F777VIHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F777VIHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F777VIHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F777VIHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F777VIHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F777VIHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F777VIHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F777VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F777VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(GENERIC_F777VITX_MAXSIZE 2097152) +set(GENERIC_F777VITX_MAXDATASIZE 393216) +set(GENERIC_F777VITX_MCU cortex-m7) +set(GENERIC_F777VITX_FPCONF "-") +add_library(GENERIC_F777VITX INTERFACE) +target_compile_options(GENERIC_F777VITX INTERFACE + "SHELL:-DSTM32F777xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777VITX_MCU} +) +target_compile_definitions(GENERIC_F777VITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F777VITX" + "BOARD_NAME=\"GENERIC_F777VITX\"" + "BOARD_ID=GENERIC_F777VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F777VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F777VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F777VITX INTERFACE + "LINKER:--default-script=${GENERIC_F777VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777VITX_MCU} +) +target_link_libraries(GENERIC_F777VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F777VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F777VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F777VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F777VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F777VITX_serial_none INTERFACE) +target_compile_options(GENERIC_F777VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F777VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F777VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F777VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F777VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F777VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F777VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F777VITX_usb_none INTERFACE) +target_compile_options(GENERIC_F777VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F777VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F777VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F777VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F777VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F777VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F777VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_F777ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_F777ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT") +set(GENERIC_F777ZITX_MAXSIZE 2097152) +set(GENERIC_F777ZITX_MAXDATASIZE 393216) +set(GENERIC_F777ZITX_MCU cortex-m7) +set(GENERIC_F777ZITX_FPCONF "-") +add_library(GENERIC_F777ZITX INTERFACE) +target_compile_options(GENERIC_F777ZITX INTERFACE + "SHELL:-DSTM32F777xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777ZITX_MCU} +) +target_compile_definitions(GENERIC_F777ZITX INTERFACE + "STM32F7xx" + "ARDUINO_GENERIC_F777ZITX" + "BOARD_NAME=\"GENERIC_F777ZITX\"" + "BOARD_ID=GENERIC_F777ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_F777ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${GENERIC_F777ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_F777ZITX INTERFACE + "LINKER:--default-script=${GENERIC_F777ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=393216" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_F777ZITX_MCU} +) +target_link_libraries(GENERIC_F777ZITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_F777ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_F777ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_F777ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_F777ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_F777ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_F777ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_F777ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_F777ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_F777ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_F777ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_F777ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_F777ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_F777ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_F777ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_F777ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_F777ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_F777ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_F777ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_F777ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_F777ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G030C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G030C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030C(6-8)T") +set(GENERIC_G030C6TX_MAXSIZE 32768) +set(GENERIC_G030C6TX_MAXDATASIZE 8192) +set(GENERIC_G030C6TX_MCU cortex-m0plus) +set(GENERIC_G030C6TX_FPCONF "-") +add_library(GENERIC_G030C6TX INTERFACE) +target_compile_options(GENERIC_G030C6TX INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G030C6TX_MCU} +) +target_compile_definitions(GENERIC_G030C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G030C6TX" + "BOARD_NAME=\"GENERIC_G030C6TX\"" + "BOARD_ID=GENERIC_G030C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G030C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G030C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G030C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G030C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G030C6TX_MCU} +) +target_link_libraries(GENERIC_G030C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G030C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G030C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G030C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G030C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G030C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G030C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G030C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G030C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G030C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G030C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G030C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G030C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G030C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G030C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G030C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G030C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030C(6-8)T") +set(GENERIC_G030C8TX_MAXSIZE 65536) +set(GENERIC_G030C8TX_MAXDATASIZE 8192) +set(GENERIC_G030C8TX_MCU cortex-m0plus) +set(GENERIC_G030C8TX_FPCONF "-") +add_library(GENERIC_G030C8TX INTERFACE) +target_compile_options(GENERIC_G030C8TX INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G030C8TX_MCU} +) +target_compile_definitions(GENERIC_G030C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G030C8TX" + "BOARD_NAME=\"GENERIC_G030C8TX\"" + "BOARD_ID=GENERIC_G030C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G030C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G030C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G030C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G030C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G030C8TX_MCU} +) +target_link_libraries(GENERIC_G030C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G030C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G030C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G030C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G030C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G030C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G030C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G030C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G030C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G030C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G030C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G030C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G030C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G030C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G030C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G030F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G030F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030F6P") +set(GENERIC_G030F6PX_MAXSIZE 32768) +set(GENERIC_G030F6PX_MAXDATASIZE 8192) +set(GENERIC_G030F6PX_MCU cortex-m0plus) +set(GENERIC_G030F6PX_FPCONF "-") +add_library(GENERIC_G030F6PX INTERFACE) +target_compile_options(GENERIC_G030F6PX INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G030F6PX_MCU} +) +target_compile_definitions(GENERIC_G030F6PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G030F6PX" + "BOARD_NAME=\"GENERIC_G030F6PX\"" + "BOARD_ID=GENERIC_G030F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G030F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G030F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G030F6PX INTERFACE + "LINKER:--default-script=${GENERIC_G030F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G030F6PX_MCU} +) +target_link_libraries(GENERIC_G030F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G030F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G030F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G030F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G030F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G030F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_G030F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G030F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G030F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G030F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G030F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G030F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G030F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G030F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_G030F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G030J6MX +# ----------------------------------------------------------------------------- + +set(GENERIC_G030J6MX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030J6M") +set(GENERIC_G030J6MX_MAXSIZE 32768) +set(GENERIC_G030J6MX_MAXDATASIZE 8192) +set(GENERIC_G030J6MX_MCU cortex-m0plus) +set(GENERIC_G030J6MX_FPCONF "-") +add_library(GENERIC_G030J6MX INTERFACE) +target_compile_options(GENERIC_G030J6MX INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G030J6MX_MCU} +) +target_compile_definitions(GENERIC_G030J6MX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G030J6MX" + "BOARD_NAME=\"GENERIC_G030J6MX\"" + "BOARD_ID=GENERIC_G030J6MX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G030J6MX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G030J6MX_VARIANT_PATH} +) + +target_link_options(GENERIC_G030J6MX INTERFACE + "LINKER:--default-script=${GENERIC_G030J6MX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G030J6MX_MCU} +) +target_link_libraries(GENERIC_G030J6MX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G030J6MX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G030J6MX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G030J6MX_serial_generic INTERFACE) +target_compile_options(GENERIC_G030J6MX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G030J6MX_serial_none INTERFACE) +target_compile_options(GENERIC_G030J6MX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G030J6MX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G030J6MX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G030J6MX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G030J6MX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G030J6MX_usb_HID INTERFACE) +target_compile_options(GENERIC_G030J6MX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G030J6MX_usb_none INTERFACE) +target_compile_options(GENERIC_G030J6MX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G030K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G030K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030K(6-8)T") +set(GENERIC_G030K6TX_MAXSIZE 32768) +set(GENERIC_G030K6TX_MAXDATASIZE 8192) +set(GENERIC_G030K6TX_MCU cortex-m0plus) +set(GENERIC_G030K6TX_FPCONF "-") +add_library(GENERIC_G030K6TX INTERFACE) +target_compile_options(GENERIC_G030K6TX INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G030K6TX_MCU} +) +target_compile_definitions(GENERIC_G030K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G030K6TX" + "BOARD_NAME=\"GENERIC_G030K6TX\"" + "BOARD_ID=GENERIC_G030K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G030K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G030K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G030K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G030K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G030K6TX_MCU} +) +target_link_libraries(GENERIC_G030K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G030K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G030K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G030K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G030K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G030K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G030K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G030K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G030K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G030K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G030K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G030K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G030K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G030K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G030K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G030K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G030K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G030K(6-8)T") +set(GENERIC_G030K8TX_MAXSIZE 65536) +set(GENERIC_G030K8TX_MAXDATASIZE 8192) +set(GENERIC_G030K8TX_MCU cortex-m0plus) +set(GENERIC_G030K8TX_FPCONF "-") +add_library(GENERIC_G030K8TX INTERFACE) +target_compile_options(GENERIC_G030K8TX INTERFACE + "SHELL:-DSTM32G030xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G030K8TX_MCU} +) +target_compile_definitions(GENERIC_G030K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G030K8TX" + "BOARD_NAME=\"GENERIC_G030K8TX\"" + "BOARD_ID=GENERIC_G030K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G030K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G030K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G030K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G030K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G030K8TX_MCU} +) +target_link_libraries(GENERIC_G030K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G030K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G030K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G030K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G030K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G030K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G030K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G030K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G030K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G030K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G030K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G030K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G030K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G030K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G030K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G031C4TX_MAXSIZE 16384) +set(GENERIC_G031C4TX_MAXDATASIZE 8192) +set(GENERIC_G031C4TX_MCU cortex-m0plus) +set(GENERIC_G031C4TX_FPCONF "-") +add_library(GENERIC_G031C4TX INTERFACE) +target_compile_options(GENERIC_G031C4TX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031C4TX_MCU} +) +target_compile_definitions(GENERIC_G031C4TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031C4TX" + "BOARD_NAME=\"GENERIC_G031C4TX\"" + "BOARD_ID=GENERIC_G031C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031C4TX INTERFACE + "LINKER:--default-script=${GENERIC_G031C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031C4TX_MCU} +) +target_link_libraries(GENERIC_G031C4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_G031C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_G031C4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031C4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031C4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G031C4UX_MAXSIZE 16384) +set(GENERIC_G031C4UX_MAXDATASIZE 8192) +set(GENERIC_G031C4UX_MCU cortex-m0plus) +set(GENERIC_G031C4UX_FPCONF "-") +add_library(GENERIC_G031C4UX INTERFACE) +target_compile_options(GENERIC_G031C4UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031C4UX_MCU} +) +target_compile_definitions(GENERIC_G031C4UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031C4UX" + "BOARD_NAME=\"GENERIC_G031C4UX\"" + "BOARD_ID=GENERIC_G031C4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031C4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031C4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031C4UX INTERFACE + "LINKER:--default-script=${GENERIC_G031C4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031C4UX_MCU} +) +target_link_libraries(GENERIC_G031C4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031C4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031C4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031C4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031C4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031C4UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031C4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031C4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031C4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031C4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031C4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031C4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031C4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031C4UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031C4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G031C6TX_MAXSIZE 32768) +set(GENERIC_G031C6TX_MAXDATASIZE 8192) +set(GENERIC_G031C6TX_MCU cortex-m0plus) +set(GENERIC_G031C6TX_FPCONF "-") +add_library(GENERIC_G031C6TX INTERFACE) +target_compile_options(GENERIC_G031C6TX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031C6TX_MCU} +) +target_compile_definitions(GENERIC_G031C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031C6TX" + "BOARD_NAME=\"GENERIC_G031C6TX\"" + "BOARD_ID=GENERIC_G031C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G031C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031C6TX_MCU} +) +target_link_libraries(GENERIC_G031C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G031C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G031C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G031C6UX_MAXSIZE 32768) +set(GENERIC_G031C6UX_MAXDATASIZE 8192) +set(GENERIC_G031C6UX_MCU cortex-m0plus) +set(GENERIC_G031C6UX_FPCONF "-") +add_library(GENERIC_G031C6UX INTERFACE) +target_compile_options(GENERIC_G031C6UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031C6UX_MCU} +) +target_compile_definitions(GENERIC_G031C6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031C6UX" + "BOARD_NAME=\"GENERIC_G031C6UX\"" + "BOARD_ID=GENERIC_G031C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031C6UX INTERFACE + "LINKER:--default-script=${GENERIC_G031C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031C6UX_MCU} +) +target_link_libraries(GENERIC_G031C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G031C8TX_MAXSIZE 65536) +set(GENERIC_G031C8TX_MAXDATASIZE 8192) +set(GENERIC_G031C8TX_MCU cortex-m0plus) +set(GENERIC_G031C8TX_FPCONF "-") +add_library(GENERIC_G031C8TX INTERFACE) +target_compile_options(GENERIC_G031C8TX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031C8TX_MCU} +) +target_compile_definitions(GENERIC_G031C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031C8TX" + "BOARD_NAME=\"GENERIC_G031C8TX\"" + "BOARD_ID=GENERIC_G031C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G031C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031C8TX_MCU} +) +target_link_libraries(GENERIC_G031C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G031C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G031C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G031C8UX_MAXSIZE 65536) +set(GENERIC_G031C8UX_MAXDATASIZE 8192) +set(GENERIC_G031C8UX_MCU cortex-m0plus) +set(GENERIC_G031C8UX_FPCONF "-") +add_library(GENERIC_G031C8UX INTERFACE) +target_compile_options(GENERIC_G031C8UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031C8UX_MCU} +) +target_compile_definitions(GENERIC_G031C8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031C8UX" + "BOARD_NAME=\"GENERIC_G031C8UX\"" + "BOARD_ID=GENERIC_G031C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031C8UX INTERFACE + "LINKER:--default-script=${GENERIC_G031C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031C8UX_MCU} +) +target_link_libraries(GENERIC_G031C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G031F4PX_MAXSIZE 16384) +set(GENERIC_G031F4PX_MAXDATASIZE 8192) +set(GENERIC_G031F4PX_MCU cortex-m0plus) +set(GENERIC_G031F4PX_FPCONF "-") +add_library(GENERIC_G031F4PX INTERFACE) +target_compile_options(GENERIC_G031F4PX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031F4PX_MCU} +) +target_compile_definitions(GENERIC_G031F4PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031F4PX" + "BOARD_NAME=\"GENERIC_G031F4PX\"" + "BOARD_ID=GENERIC_G031F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031F4PX INTERFACE + "LINKER:--default-script=${GENERIC_G031F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031F4PX_MCU} +) +target_link_libraries(GENERIC_G031F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_G031F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_G031F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G031F6PX_MAXSIZE 32768) +set(GENERIC_G031F6PX_MAXDATASIZE 8192) +set(GENERIC_G031F6PX_MCU cortex-m0plus) +set(GENERIC_G031F6PX_FPCONF "-") +add_library(GENERIC_G031F6PX INTERFACE) +target_compile_options(GENERIC_G031F6PX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031F6PX_MCU} +) +target_compile_definitions(GENERIC_G031F6PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031F6PX" + "BOARD_NAME=\"GENERIC_G031F6PX\"" + "BOARD_ID=GENERIC_G031F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031F6PX INTERFACE + "LINKER:--default-script=${GENERIC_G031F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031F6PX_MCU} +) +target_link_libraries(GENERIC_G031F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_G031F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_G031F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031F8PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031F8PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G031F8PX_MAXSIZE 65536) +set(GENERIC_G031F8PX_MAXDATASIZE 8192) +set(GENERIC_G031F8PX_MCU cortex-m0plus) +set(GENERIC_G031F8PX_FPCONF "-") +add_library(GENERIC_G031F8PX INTERFACE) +target_compile_options(GENERIC_G031F8PX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031F8PX_MCU} +) +target_compile_definitions(GENERIC_G031F8PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031F8PX" + "BOARD_NAME=\"GENERIC_G031F8PX\"" + "BOARD_ID=GENERIC_G031F8PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031F8PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031F8PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031F8PX INTERFACE + "LINKER:--default-script=${GENERIC_G031F8PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031F8PX_MCU} +) +target_link_libraries(GENERIC_G031F8PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031F8PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031F8PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031F8PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031F8PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031F8PX_serial_none INTERFACE) +target_compile_options(GENERIC_G031F8PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031F8PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031F8PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031F8PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031F8PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031F8PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031F8PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031F8PX_usb_none INTERFACE) +target_compile_options(GENERIC_G031F8PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031G4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031G4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U") +set(GENERIC_G031G4UX_MAXSIZE 16384) +set(GENERIC_G031G4UX_MAXDATASIZE 8192) +set(GENERIC_G031G4UX_MCU cortex-m0plus) +set(GENERIC_G031G4UX_FPCONF "-") +add_library(GENERIC_G031G4UX INTERFACE) +target_compile_options(GENERIC_G031G4UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031G4UX_MCU} +) +target_compile_definitions(GENERIC_G031G4UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031G4UX" + "BOARD_NAME=\"GENERIC_G031G4UX\"" + "BOARD_ID=GENERIC_G031G4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031G4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031G4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031G4UX INTERFACE + "LINKER:--default-script=${GENERIC_G031G4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031G4UX_MCU} +) +target_link_libraries(GENERIC_G031G4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031G4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031G4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031G4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031G4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031G4UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031G4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031G4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031G4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031G4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031G4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031G4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031G4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031G4UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031G4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U") +set(GENERIC_G031G6UX_MAXSIZE 32768) +set(GENERIC_G031G6UX_MAXDATASIZE 8192) +set(GENERIC_G031G6UX_MCU cortex-m0plus) +set(GENERIC_G031G6UX_FPCONF "-") +add_library(GENERIC_G031G6UX INTERFACE) +target_compile_options(GENERIC_G031G6UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031G6UX_MCU} +) +target_compile_definitions(GENERIC_G031G6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031G6UX" + "BOARD_NAME=\"GENERIC_G031G6UX\"" + "BOARD_ID=GENERIC_G031G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031G6UX INTERFACE + "LINKER:--default-script=${GENERIC_G031G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031G6UX_MCU} +) +target_link_libraries(GENERIC_G031G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031G8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031G8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U") +set(GENERIC_G031G8UX_MAXSIZE 65536) +set(GENERIC_G031G8UX_MAXDATASIZE 8192) +set(GENERIC_G031G8UX_MCU cortex-m0plus) +set(GENERIC_G031G8UX_FPCONF "-") +add_library(GENERIC_G031G8UX INTERFACE) +target_compile_options(GENERIC_G031G8UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031G8UX_MCU} +) +target_compile_definitions(GENERIC_G031G8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031G8UX" + "BOARD_NAME=\"GENERIC_G031G8UX\"" + "BOARD_ID=GENERIC_G031G8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031G8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031G8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031G8UX INTERFACE + "LINKER:--default-script=${GENERIC_G031G8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031G8UX_MCU} +) +target_link_libraries(GENERIC_G031G8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031G8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031G8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031G8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031G8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031G8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031G8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031G8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031G8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031G8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031G8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031G8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031G8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031G8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031G8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031J4MX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031J4MX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031J(4-6)M_G041J6M") +set(GENERIC_G031J4MX_MAXSIZE 16384) +set(GENERIC_G031J4MX_MAXDATASIZE 8192) +set(GENERIC_G031J4MX_MCU cortex-m0plus) +set(GENERIC_G031J4MX_FPCONF "-") +add_library(GENERIC_G031J4MX INTERFACE) +target_compile_options(GENERIC_G031J4MX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031J4MX_MCU} +) +target_compile_definitions(GENERIC_G031J4MX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031J4MX" + "BOARD_NAME=\"GENERIC_G031J4MX\"" + "BOARD_ID=GENERIC_G031J4MX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031J4MX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031J4MX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031J4MX INTERFACE + "LINKER:--default-script=${GENERIC_G031J4MX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031J4MX_MCU} +) +target_link_libraries(GENERIC_G031J4MX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031J4MX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031J4MX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031J4MX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031J4MX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031J4MX_serial_none INTERFACE) +target_compile_options(GENERIC_G031J4MX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031J4MX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031J4MX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031J4MX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031J4MX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031J4MX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031J4MX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031J4MX_usb_none INTERFACE) +target_compile_options(GENERIC_G031J4MX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031J6MX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031J6MX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031J(4-6)M_G041J6M") +set(GENERIC_G031J6MX_MAXSIZE 32768) +set(GENERIC_G031J6MX_MAXDATASIZE 8192) +set(GENERIC_G031J6MX_MCU cortex-m0plus) +set(GENERIC_G031J6MX_FPCONF "-") +add_library(GENERIC_G031J6MX INTERFACE) +target_compile_options(GENERIC_G031J6MX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031J6MX_MCU} +) +target_compile_definitions(GENERIC_G031J6MX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031J6MX" + "BOARD_NAME=\"GENERIC_G031J6MX\"" + "BOARD_ID=GENERIC_G031J6MX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031J6MX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031J6MX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031J6MX INTERFACE + "LINKER:--default-script=${GENERIC_G031J6MX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031J6MX_MCU} +) +target_link_libraries(GENERIC_G031J6MX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031J6MX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031J6MX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031J6MX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031J6MX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031J6MX_serial_none INTERFACE) +target_compile_options(GENERIC_G031J6MX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031J6MX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031J6MX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031J6MX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031J6MX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031J6MX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031J6MX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031J6MX_usb_none INTERFACE) +target_compile_options(GENERIC_G031J6MX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G031K4TX_MAXSIZE 16384) +set(GENERIC_G031K4TX_MAXDATASIZE 8192) +set(GENERIC_G031K4TX_MCU cortex-m0plus) +set(GENERIC_G031K4TX_FPCONF "-") +add_library(GENERIC_G031K4TX INTERFACE) +target_compile_options(GENERIC_G031K4TX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031K4TX_MCU} +) +target_compile_definitions(GENERIC_G031K4TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031K4TX" + "BOARD_NAME=\"GENERIC_G031K4TX\"" + "BOARD_ID=GENERIC_G031K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031K4TX INTERFACE + "LINKER:--default-script=${GENERIC_G031K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031K4TX_MCU} +) +target_link_libraries(GENERIC_G031K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_G031K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_G031K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031K4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031K4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G031K4UX_MAXSIZE 16384) +set(GENERIC_G031K4UX_MAXDATASIZE 8192) +set(GENERIC_G031K4UX_MCU cortex-m0plus) +set(GENERIC_G031K4UX_FPCONF "-") +add_library(GENERIC_G031K4UX INTERFACE) +target_compile_options(GENERIC_G031K4UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031K4UX_MCU} +) +target_compile_definitions(GENERIC_G031K4UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031K4UX" + "BOARD_NAME=\"GENERIC_G031K4UX\"" + "BOARD_ID=GENERIC_G031K4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031K4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031K4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031K4UX INTERFACE + "LINKER:--default-script=${GENERIC_G031K4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031K4UX_MCU} +) +target_link_libraries(GENERIC_G031K4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031K4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031K4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031K4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031K4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031K4UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031K4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031K4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031K4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031K4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031K4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031K4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031K4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031K4UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031K4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G031K6TX_MAXSIZE 32768) +set(GENERIC_G031K6TX_MAXDATASIZE 8192) +set(GENERIC_G031K6TX_MCU cortex-m0plus) +set(GENERIC_G031K6TX_FPCONF "-") +add_library(GENERIC_G031K6TX INTERFACE) +target_compile_options(GENERIC_G031K6TX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031K6TX_MCU} +) +target_compile_definitions(GENERIC_G031K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031K6TX" + "BOARD_NAME=\"GENERIC_G031K6TX\"" + "BOARD_ID=GENERIC_G031K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G031K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031K6TX_MCU} +) +target_link_libraries(GENERIC_G031K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G031K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G031K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G031K6UX_MAXSIZE 32768) +set(GENERIC_G031K6UX_MAXDATASIZE 8192) +set(GENERIC_G031K6UX_MCU cortex-m0plus) +set(GENERIC_G031K6UX_FPCONF "-") +add_library(GENERIC_G031K6UX INTERFACE) +target_compile_options(GENERIC_G031K6UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031K6UX_MCU} +) +target_compile_definitions(GENERIC_G031K6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031K6UX" + "BOARD_NAME=\"GENERIC_G031K6UX\"" + "BOARD_ID=GENERIC_G031K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031K6UX INTERFACE + "LINKER:--default-script=${GENERIC_G031K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031K6UX_MCU} +) +target_link_libraries(GENERIC_G031K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G031K8TX_MAXSIZE 65536) +set(GENERIC_G031K8TX_MAXDATASIZE 8192) +set(GENERIC_G031K8TX_MCU cortex-m0plus) +set(GENERIC_G031K8TX_FPCONF "-") +add_library(GENERIC_G031K8TX INTERFACE) +target_compile_options(GENERIC_G031K8TX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031K8TX_MCU} +) +target_compile_definitions(GENERIC_G031K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031K8TX" + "BOARD_NAME=\"GENERIC_G031K8TX\"" + "BOARD_ID=GENERIC_G031K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G031K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031K8TX_MCU} +) +target_link_libraries(GENERIC_G031K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G031K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G031K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G031K8UX_MAXSIZE 65536) +set(GENERIC_G031K8UX_MAXDATASIZE 8192) +set(GENERIC_G031K8UX_MCU cortex-m0plus) +set(GENERIC_G031K8UX_FPCONF "-") +add_library(GENERIC_G031K8UX INTERFACE) +target_compile_options(GENERIC_G031K8UX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031K8UX_MCU} +) +target_compile_definitions(GENERIC_G031K8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031K8UX" + "BOARD_NAME=\"GENERIC_G031K8UX\"" + "BOARD_ID=GENERIC_G031K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031K8UX INTERFACE + "LINKER:--default-script=${GENERIC_G031K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031K8UX_MCU} +) +target_link_libraries(GENERIC_G031K8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G031K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G031K8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G031Y8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_G031Y8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G031Y8YX_MAXSIZE 65536) +set(GENERIC_G031Y8YX_MAXDATASIZE 8192) +set(GENERIC_G031Y8YX_MCU cortex-m0plus) +set(GENERIC_G031Y8YX_FPCONF "-") +add_library(GENERIC_G031Y8YX INTERFACE) +target_compile_options(GENERIC_G031Y8YX INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G031Y8YX_MCU} +) +target_compile_definitions(GENERIC_G031Y8YX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G031Y8YX" + "BOARD_NAME=\"GENERIC_G031Y8YX\"" + "BOARD_ID=GENERIC_G031Y8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G031Y8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G031Y8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_G031Y8YX INTERFACE + "LINKER:--default-script=${GENERIC_G031Y8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G031Y8YX_MCU} +) +target_link_libraries(GENERIC_G031Y8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G031Y8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G031Y8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G031Y8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_G031Y8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G031Y8YX_serial_none INTERFACE) +target_compile_options(GENERIC_G031Y8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G031Y8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G031Y8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G031Y8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G031Y8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G031Y8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_G031Y8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G031Y8YX_usb_none INTERFACE) +target_compile_options(GENERIC_G031Y8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G041C6TX_MAXSIZE 32768) +set(GENERIC_G041C6TX_MAXDATASIZE 8192) +set(GENERIC_G041C6TX_MCU cortex-m0plus) +set(GENERIC_G041C6TX_FPCONF "-") +add_library(GENERIC_G041C6TX INTERFACE) +target_compile_options(GENERIC_G041C6TX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041C6TX_MCU} +) +target_compile_definitions(GENERIC_G041C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041C6TX" + "BOARD_NAME=\"GENERIC_G041C6TX\"" + "BOARD_ID=GENERIC_G041C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G041C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041C6TX_MCU} +) +target_link_libraries(GENERIC_G041C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G041C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G041C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G041C6UX_MAXSIZE 32768) +set(GENERIC_G041C6UX_MAXDATASIZE 8192) +set(GENERIC_G041C6UX_MCU cortex-m0plus) +set(GENERIC_G041C6UX_FPCONF "-") +add_library(GENERIC_G041C6UX INTERFACE) +target_compile_options(GENERIC_G041C6UX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041C6UX_MCU} +) +target_compile_definitions(GENERIC_G041C6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041C6UX" + "BOARD_NAME=\"GENERIC_G041C6UX\"" + "BOARD_ID=GENERIC_G041C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041C6UX INTERFACE + "LINKER:--default-script=${GENERIC_G041C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041C6UX_MCU} +) +target_link_libraries(GENERIC_G041C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G041C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G041C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G041C8TX_MAXSIZE 65536) +set(GENERIC_G041C8TX_MAXDATASIZE 8192) +set(GENERIC_G041C8TX_MCU cortex-m0plus) +set(GENERIC_G041C8TX_FPCONF "-") +add_library(GENERIC_G041C8TX INTERFACE) +target_compile_options(GENERIC_G041C8TX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041C8TX_MCU} +) +target_compile_definitions(GENERIC_G041C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041C8TX" + "BOARD_NAME=\"GENERIC_G041C8TX\"" + "BOARD_ID=GENERIC_G041C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G041C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041C8TX_MCU} +) +target_link_libraries(GENERIC_G041C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G041C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G041C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)") +set(GENERIC_G041C8UX_MAXSIZE 65536) +set(GENERIC_G041C8UX_MAXDATASIZE 8192) +set(GENERIC_G041C8UX_MCU cortex-m0plus) +set(GENERIC_G041C8UX_FPCONF "-") +add_library(GENERIC_G041C8UX INTERFACE) +target_compile_options(GENERIC_G041C8UX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041C8UX_MCU} +) +target_compile_definitions(GENERIC_G041C8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041C8UX" + "BOARD_NAME=\"GENERIC_G041C8UX\"" + "BOARD_ID=GENERIC_G041C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041C8UX INTERFACE + "LINKER:--default-script=${GENERIC_G041C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041C8UX_MCU} +) +target_link_libraries(GENERIC_G041C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G041C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G041C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G041F6PX_MAXSIZE 32768) +set(GENERIC_G041F6PX_MAXDATASIZE 8192) +set(GENERIC_G041F6PX_MCU cortex-m0plus) +set(GENERIC_G041F6PX_FPCONF "-") +add_library(GENERIC_G041F6PX INTERFACE) +target_compile_options(GENERIC_G041F6PX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041F6PX_MCU} +) +target_compile_definitions(GENERIC_G041F6PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041F6PX" + "BOARD_NAME=\"GENERIC_G041F6PX\"" + "BOARD_ID=GENERIC_G041F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041F6PX INTERFACE + "LINKER:--default-script=${GENERIC_G041F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041F6PX_MCU} +) +target_link_libraries(GENERIC_G041F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_G041F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_G041F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041F8PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041F8PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G041F8PX_MAXSIZE 65536) +set(GENERIC_G041F8PX_MAXDATASIZE 8192) +set(GENERIC_G041F8PX_MCU cortex-m0plus) +set(GENERIC_G041F8PX_FPCONF "-") +add_library(GENERIC_G041F8PX INTERFACE) +target_compile_options(GENERIC_G041F8PX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041F8PX_MCU} +) +target_compile_definitions(GENERIC_G041F8PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041F8PX" + "BOARD_NAME=\"GENERIC_G041F8PX\"" + "BOARD_ID=GENERIC_G041F8PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041F8PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041F8PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041F8PX INTERFACE + "LINKER:--default-script=${GENERIC_G041F8PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041F8PX_MCU} +) +target_link_libraries(GENERIC_G041F8PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041F8PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041F8PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041F8PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041F8PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041F8PX_serial_none INTERFACE) +target_compile_options(GENERIC_G041F8PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041F8PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041F8PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041F8PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041F8PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041F8PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041F8PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041F8PX_usb_none INTERFACE) +target_compile_options(GENERIC_G041F8PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U") +set(GENERIC_G041G6UX_MAXSIZE 32768) +set(GENERIC_G041G6UX_MAXDATASIZE 8192) +set(GENERIC_G041G6UX_MCU cortex-m0plus) +set(GENERIC_G041G6UX_FPCONF "-") +add_library(GENERIC_G041G6UX INTERFACE) +target_compile_options(GENERIC_G041G6UX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041G6UX_MCU} +) +target_compile_definitions(GENERIC_G041G6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041G6UX" + "BOARD_NAME=\"GENERIC_G041G6UX\"" + "BOARD_ID=GENERIC_G041G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041G6UX INTERFACE + "LINKER:--default-script=${GENERIC_G041G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041G6UX_MCU} +) +target_link_libraries(GENERIC_G041G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G041G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G041G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041G8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041G8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U") +set(GENERIC_G041G8UX_MAXSIZE 65536) +set(GENERIC_G041G8UX_MAXDATASIZE 8192) +set(GENERIC_G041G8UX_MCU cortex-m0plus) +set(GENERIC_G041G8UX_FPCONF "-") +add_library(GENERIC_G041G8UX INTERFACE) +target_compile_options(GENERIC_G041G8UX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041G8UX_MCU} +) +target_compile_definitions(GENERIC_G041G8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041G8UX" + "BOARD_NAME=\"GENERIC_G041G8UX\"" + "BOARD_ID=GENERIC_G041G8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041G8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041G8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041G8UX INTERFACE + "LINKER:--default-script=${GENERIC_G041G8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041G8UX_MCU} +) +target_link_libraries(GENERIC_G041G8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041G8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041G8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041G8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041G8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041G8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G041G8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041G8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041G8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041G8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041G8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041G8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041G8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041G8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G041G8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041J6MX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041J6MX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031J(4-6)M_G041J6M") +set(GENERIC_G041J6MX_MAXSIZE 32768) +set(GENERIC_G041J6MX_MAXDATASIZE 8192) +set(GENERIC_G041J6MX_MCU cortex-m0plus) +set(GENERIC_G041J6MX_FPCONF "-") +add_library(GENERIC_G041J6MX INTERFACE) +target_compile_options(GENERIC_G041J6MX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041J6MX_MCU} +) +target_compile_definitions(GENERIC_G041J6MX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041J6MX" + "BOARD_NAME=\"GENERIC_G041J6MX\"" + "BOARD_ID=GENERIC_G041J6MX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041J6MX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041J6MX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041J6MX INTERFACE + "LINKER:--default-script=${GENERIC_G041J6MX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041J6MX_MCU} +) +target_link_libraries(GENERIC_G041J6MX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041J6MX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041J6MX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041J6MX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041J6MX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041J6MX_serial_none INTERFACE) +target_compile_options(GENERIC_G041J6MX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041J6MX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041J6MX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041J6MX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041J6MX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041J6MX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041J6MX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041J6MX_usb_none INTERFACE) +target_compile_options(GENERIC_G041J6MX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G041K6TX_MAXSIZE 32768) +set(GENERIC_G041K6TX_MAXDATASIZE 8192) +set(GENERIC_G041K6TX_MCU cortex-m0plus) +set(GENERIC_G041K6TX_FPCONF "-") +add_library(GENERIC_G041K6TX INTERFACE) +target_compile_options(GENERIC_G041K6TX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041K6TX_MCU} +) +target_compile_definitions(GENERIC_G041K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041K6TX" + "BOARD_NAME=\"GENERIC_G041K6TX\"" + "BOARD_ID=GENERIC_G041K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G041K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041K6TX_MCU} +) +target_link_libraries(GENERIC_G041K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G041K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G041K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G041K6UX_MAXSIZE 32768) +set(GENERIC_G041K6UX_MAXDATASIZE 8192) +set(GENERIC_G041K6UX_MCU cortex-m0plus) +set(GENERIC_G041K6UX_FPCONF "-") +add_library(GENERIC_G041K6UX INTERFACE) +target_compile_options(GENERIC_G041K6UX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041K6UX_MCU} +) +target_compile_definitions(GENERIC_G041K6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041K6UX" + "BOARD_NAME=\"GENERIC_G041K6UX\"" + "BOARD_ID=GENERIC_G041K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041K6UX INTERFACE + "LINKER:--default-script=${GENERIC_G041K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041K6UX_MCU} +) +target_link_libraries(GENERIC_G041K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G041K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G041K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G041K8TX_MAXSIZE 65536) +set(GENERIC_G041K8TX_MAXDATASIZE 8192) +set(GENERIC_G041K8TX_MCU cortex-m0plus) +set(GENERIC_G041K8TX_FPCONF "-") +add_library(GENERIC_G041K8TX INTERFACE) +target_compile_options(GENERIC_G041K8TX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041K8TX_MCU} +) +target_compile_definitions(GENERIC_G041K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041K8TX" + "BOARD_NAME=\"GENERIC_G041K8TX\"" + "BOARD_ID=GENERIC_G041K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G041K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041K8TX_MCU} +) +target_link_libraries(GENERIC_G041K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G041K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G041K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(GENERIC_G041K8UX_MAXSIZE 65536) +set(GENERIC_G041K8UX_MAXDATASIZE 8192) +set(GENERIC_G041K8UX_MCU cortex-m0plus) +set(GENERIC_G041K8UX_FPCONF "-") +add_library(GENERIC_G041K8UX INTERFACE) +target_compile_options(GENERIC_G041K8UX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041K8UX_MCU} +) +target_compile_definitions(GENERIC_G041K8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041K8UX" + "BOARD_NAME=\"GENERIC_G041K8UX\"" + "BOARD_ID=GENERIC_G041K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041K8UX INTERFACE + "LINKER:--default-script=${GENERIC_G041K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041K8UX_MCU} +) +target_link_libraries(GENERIC_G041K8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G041K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G041K8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G041Y8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_G041Y8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y") +set(GENERIC_G041Y8YX_MAXSIZE 65536) +set(GENERIC_G041Y8YX_MAXDATASIZE 8192) +set(GENERIC_G041Y8YX_MCU cortex-m0plus) +set(GENERIC_G041Y8YX_FPCONF "-") +add_library(GENERIC_G041Y8YX INTERFACE) +target_compile_options(GENERIC_G041Y8YX INTERFACE + "SHELL:-DSTM32G041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G041Y8YX_MCU} +) +target_compile_definitions(GENERIC_G041Y8YX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G041Y8YX" + "BOARD_NAME=\"GENERIC_G041Y8YX\"" + "BOARD_ID=GENERIC_G041Y8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G041Y8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G041Y8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_G041Y8YX INTERFACE + "LINKER:--default-script=${GENERIC_G041Y8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_G041Y8YX_MCU} +) +target_link_libraries(GENERIC_G041Y8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G041Y8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G041Y8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G041Y8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_G041Y8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G041Y8YX_serial_none INTERFACE) +target_compile_options(GENERIC_G041Y8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G041Y8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G041Y8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G041Y8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G041Y8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G041Y8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_G041Y8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G041Y8YX_usb_none INTERFACE) +target_compile_options(GENERIC_G041Y8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G050C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G050C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G050C(6-8)T") +set(GENERIC_G050C6TX_MAXSIZE 32768) +set(GENERIC_G050C6TX_MAXDATASIZE 18432) +set(GENERIC_G050C6TX_MCU cortex-m0plus) +set(GENERIC_G050C6TX_FPCONF "-") +add_library(GENERIC_G050C6TX INTERFACE) +target_compile_options(GENERIC_G050C6TX INTERFACE + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G050C6TX_MCU} +) +target_compile_definitions(GENERIC_G050C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G050C6TX" + "BOARD_NAME=\"GENERIC_G050C6TX\"" + "BOARD_ID=GENERIC_G050C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G050C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G050C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G050C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G050C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G050C6TX_MCU} +) +target_link_libraries(GENERIC_G050C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G050C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G050C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G050C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G050C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G050C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G050C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G050C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G050C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G050C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G050C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G050C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G050C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G050C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G050C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G050C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G050C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G050C(6-8)T") +set(GENERIC_G050C8TX_MAXSIZE 65536) +set(GENERIC_G050C8TX_MAXDATASIZE 18432) +set(GENERIC_G050C8TX_MCU cortex-m0plus) +set(GENERIC_G050C8TX_FPCONF "-") +add_library(GENERIC_G050C8TX INTERFACE) +target_compile_options(GENERIC_G050C8TX INTERFACE + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G050C8TX_MCU} +) +target_compile_definitions(GENERIC_G050C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G050C8TX" + "BOARD_NAME=\"GENERIC_G050C8TX\"" + "BOARD_ID=GENERIC_G050C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G050C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G050C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G050C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G050C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G050C8TX_MCU} +) +target_link_libraries(GENERIC_G050C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G050C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G050C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G050C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G050C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G050C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G050C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G050C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G050C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G050C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G050C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G050C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G050C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G050C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G050C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G050F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G050F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G050F6P") +set(GENERIC_G050F6PX_MAXSIZE 32768) +set(GENERIC_G050F6PX_MAXDATASIZE 18432) +set(GENERIC_G050F6PX_MCU cortex-m0plus) +set(GENERIC_G050F6PX_FPCONF "-") +add_library(GENERIC_G050F6PX INTERFACE) +target_compile_options(GENERIC_G050F6PX INTERFACE + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G050F6PX_MCU} +) +target_compile_definitions(GENERIC_G050F6PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G050F6PX" + "BOARD_NAME=\"GENERIC_G050F6PX\"" + "BOARD_ID=GENERIC_G050F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G050F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G050F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G050F6PX INTERFACE + "LINKER:--default-script=${GENERIC_G050F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G050F6PX_MCU} +) +target_link_libraries(GENERIC_G050F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G050F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G050F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G050F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G050F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G050F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_G050F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G050F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G050F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G050F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G050F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G050F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G050F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G050F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_G050F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G050K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G050K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G050K(6-8)T") +set(GENERIC_G050K6TX_MAXSIZE 32768) +set(GENERIC_G050K6TX_MAXDATASIZE 18432) +set(GENERIC_G050K6TX_MCU cortex-m0plus) +set(GENERIC_G050K6TX_FPCONF "-") +add_library(GENERIC_G050K6TX INTERFACE) +target_compile_options(GENERIC_G050K6TX INTERFACE + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G050K6TX_MCU} +) +target_compile_definitions(GENERIC_G050K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G050K6TX" + "BOARD_NAME=\"GENERIC_G050K6TX\"" + "BOARD_ID=GENERIC_G050K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G050K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G050K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G050K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G050K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G050K6TX_MCU} +) +target_link_libraries(GENERIC_G050K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G050K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G050K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G050K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G050K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G050K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G050K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G050K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G050K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G050K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G050K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G050K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G050K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G050K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G050K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G050K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G050K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G050K(6-8)T") +set(GENERIC_G050K8TX_MAXSIZE 65536) +set(GENERIC_G050K8TX_MAXDATASIZE 18432) +set(GENERIC_G050K8TX_MCU cortex-m0plus) +set(GENERIC_G050K8TX_FPCONF "-") +add_library(GENERIC_G050K8TX INTERFACE) +target_compile_options(GENERIC_G050K8TX INTERFACE + "SHELL:-DSTM32G050xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G050K8TX_MCU} +) +target_compile_definitions(GENERIC_G050K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G050K8TX" + "BOARD_NAME=\"GENERIC_G050K8TX\"" + "BOARD_ID=GENERIC_G050K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G050K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G050K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G050K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G050K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G050K8TX_MCU} +) +target_link_libraries(GENERIC_G050K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G050K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G050K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G050K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G050K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G050K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G050K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G050K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G050K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G050K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G050K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G050K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G050K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G050K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G050K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G051C6TX_MAXSIZE 32768) +set(GENERIC_G051C6TX_MAXDATASIZE 18432) +set(GENERIC_G051C6TX_MCU cortex-m0plus) +set(GENERIC_G051C6TX_FPCONF "-") +add_library(GENERIC_G051C6TX INTERFACE) +target_compile_options(GENERIC_G051C6TX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051C6TX_MCU} +) +target_compile_definitions(GENERIC_G051C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051C6TX" + "BOARD_NAME=\"GENERIC_G051C6TX\"" + "BOARD_ID=GENERIC_G051C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G051C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051C6TX_MCU} +) +target_link_libraries(GENERIC_G051C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G051C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G051C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G051C6UX_MAXSIZE 32768) +set(GENERIC_G051C6UX_MAXDATASIZE 18432) +set(GENERIC_G051C6UX_MCU cortex-m0plus) +set(GENERIC_G051C6UX_FPCONF "-") +add_library(GENERIC_G051C6UX INTERFACE) +target_compile_options(GENERIC_G051C6UX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051C6UX_MCU} +) +target_compile_definitions(GENERIC_G051C6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051C6UX" + "BOARD_NAME=\"GENERIC_G051C6UX\"" + "BOARD_ID=GENERIC_G051C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051C6UX INTERFACE + "LINKER:--default-script=${GENERIC_G051C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051C6UX_MCU} +) +target_link_libraries(GENERIC_G051C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G051C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G051C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G051C8TX_MAXSIZE 65536) +set(GENERIC_G051C8TX_MAXDATASIZE 18432) +set(GENERIC_G051C8TX_MCU cortex-m0plus) +set(GENERIC_G051C8TX_FPCONF "-") +add_library(GENERIC_G051C8TX INTERFACE) +target_compile_options(GENERIC_G051C8TX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051C8TX_MCU} +) +target_compile_definitions(GENERIC_G051C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051C8TX" + "BOARD_NAME=\"GENERIC_G051C8TX\"" + "BOARD_ID=GENERIC_G051C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G051C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051C8TX_MCU} +) +target_link_libraries(GENERIC_G051C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G051C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G051C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G051C8UX_MAXSIZE 65536) +set(GENERIC_G051C8UX_MAXDATASIZE 18432) +set(GENERIC_G051C8UX_MCU cortex-m0plus) +set(GENERIC_G051C8UX_FPCONF "-") +add_library(GENERIC_G051C8UX INTERFACE) +target_compile_options(GENERIC_G051C8UX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051C8UX_MCU} +) +target_compile_definitions(GENERIC_G051C8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051C8UX" + "BOARD_NAME=\"GENERIC_G051C8UX\"" + "BOARD_ID=GENERIC_G051C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051C8UX INTERFACE + "LINKER:--default-script=${GENERIC_G051C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051C8UX_MCU} +) +target_link_libraries(GENERIC_G051C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G051C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G051C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)") +set(GENERIC_G051F6PX_MAXSIZE 32768) +set(GENERIC_G051F6PX_MAXDATASIZE 18432) +set(GENERIC_G051F6PX_MCU cortex-m0plus) +set(GENERIC_G051F6PX_FPCONF "-") +add_library(GENERIC_G051F6PX INTERFACE) +target_compile_options(GENERIC_G051F6PX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051F6PX_MCU} +) +target_compile_definitions(GENERIC_G051F6PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051F6PX" + "BOARD_NAME=\"GENERIC_G051F6PX\"" + "BOARD_ID=GENERIC_G051F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051F6PX INTERFACE + "LINKER:--default-script=${GENERIC_G051F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051F6PX_MCU} +) +target_link_libraries(GENERIC_G051F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_G051F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_G051F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051F8PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051F8PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)") +set(GENERIC_G051F8PX_MAXSIZE 65536) +set(GENERIC_G051F8PX_MAXDATASIZE 18432) +set(GENERIC_G051F8PX_MCU cortex-m0plus) +set(GENERIC_G051F8PX_FPCONF "-") +add_library(GENERIC_G051F8PX INTERFACE) +target_compile_options(GENERIC_G051F8PX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051F8PX_MCU} +) +target_compile_definitions(GENERIC_G051F8PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051F8PX" + "BOARD_NAME=\"GENERIC_G051F8PX\"" + "BOARD_ID=GENERIC_G051F8PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051F8PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051F8PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051F8PX INTERFACE + "LINKER:--default-script=${GENERIC_G051F8PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051F8PX_MCU} +) +target_link_libraries(GENERIC_G051F8PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051F8PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051F8PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051F8PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051F8PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051F8PX_serial_none INTERFACE) +target_compile_options(GENERIC_G051F8PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051F8PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051F8PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051F8PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051F8PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051F8PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051F8PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051F8PX_usb_none INTERFACE) +target_compile_options(GENERIC_G051F8PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051F8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051F8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)") +set(GENERIC_G051F8YX_MAXSIZE 65536) +set(GENERIC_G051F8YX_MAXDATASIZE 18432) +set(GENERIC_G051F8YX_MCU cortex-m0plus) +set(GENERIC_G051F8YX_FPCONF "-") +add_library(GENERIC_G051F8YX INTERFACE) +target_compile_options(GENERIC_G051F8YX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051F8YX_MCU} +) +target_compile_definitions(GENERIC_G051F8YX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051F8YX" + "BOARD_NAME=\"GENERIC_G051F8YX\"" + "BOARD_ID=GENERIC_G051F8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051F8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051F8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051F8YX INTERFACE + "LINKER:--default-script=${GENERIC_G051F8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051F8YX_MCU} +) +target_link_libraries(GENERIC_G051F8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051F8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051F8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051F8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051F8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051F8YX_serial_none INTERFACE) +target_compile_options(GENERIC_G051F8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051F8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051F8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051F8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051F8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051F8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051F8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051F8YX_usb_none INTERFACE) +target_compile_options(GENERIC_G051F8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U") +set(GENERIC_G051G6UX_MAXSIZE 32768) +set(GENERIC_G051G6UX_MAXDATASIZE 18432) +set(GENERIC_G051G6UX_MCU cortex-m0plus) +set(GENERIC_G051G6UX_FPCONF "-") +add_library(GENERIC_G051G6UX INTERFACE) +target_compile_options(GENERIC_G051G6UX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051G6UX_MCU} +) +target_compile_definitions(GENERIC_G051G6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051G6UX" + "BOARD_NAME=\"GENERIC_G051G6UX\"" + "BOARD_ID=GENERIC_G051G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051G6UX INTERFACE + "LINKER:--default-script=${GENERIC_G051G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051G6UX_MCU} +) +target_link_libraries(GENERIC_G051G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G051G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G051G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051G8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051G8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U") +set(GENERIC_G051G8UX_MAXSIZE 65536) +set(GENERIC_G051G8UX_MAXDATASIZE 18432) +set(GENERIC_G051G8UX_MCU cortex-m0plus) +set(GENERIC_G051G8UX_FPCONF "-") +add_library(GENERIC_G051G8UX INTERFACE) +target_compile_options(GENERIC_G051G8UX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051G8UX_MCU} +) +target_compile_definitions(GENERIC_G051G8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051G8UX" + "BOARD_NAME=\"GENERIC_G051G8UX\"" + "BOARD_ID=GENERIC_G051G8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051G8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051G8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051G8UX INTERFACE + "LINKER:--default-script=${GENERIC_G051G8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051G8UX_MCU} +) +target_link_libraries(GENERIC_G051G8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051G8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051G8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051G8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051G8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051G8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G051G8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051G8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051G8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051G8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051G8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051G8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051G8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051G8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G051G8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G051K6TX_MAXSIZE 32768) +set(GENERIC_G051K6TX_MAXDATASIZE 18432) +set(GENERIC_G051K6TX_MCU cortex-m0plus) +set(GENERIC_G051K6TX_FPCONF "-") +add_library(GENERIC_G051K6TX INTERFACE) +target_compile_options(GENERIC_G051K6TX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051K6TX_MCU} +) +target_compile_definitions(GENERIC_G051K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051K6TX" + "BOARD_NAME=\"GENERIC_G051K6TX\"" + "BOARD_ID=GENERIC_G051K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G051K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051K6TX_MCU} +) +target_link_libraries(GENERIC_G051K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G051K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G051K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G051K6UX_MAXSIZE 32768) +set(GENERIC_G051K6UX_MAXDATASIZE 18432) +set(GENERIC_G051K6UX_MCU cortex-m0plus) +set(GENERIC_G051K6UX_FPCONF "-") +add_library(GENERIC_G051K6UX INTERFACE) +target_compile_options(GENERIC_G051K6UX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051K6UX_MCU} +) +target_compile_definitions(GENERIC_G051K6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051K6UX" + "BOARD_NAME=\"GENERIC_G051K6UX\"" + "BOARD_ID=GENERIC_G051K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051K6UX INTERFACE + "LINKER:--default-script=${GENERIC_G051K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051K6UX_MCU} +) +target_link_libraries(GENERIC_G051K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G051K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G051K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G051K8TX_MAXSIZE 65536) +set(GENERIC_G051K8TX_MAXDATASIZE 18432) +set(GENERIC_G051K8TX_MCU cortex-m0plus) +set(GENERIC_G051K8TX_FPCONF "-") +add_library(GENERIC_G051K8TX INTERFACE) +target_compile_options(GENERIC_G051K8TX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051K8TX_MCU} +) +target_compile_definitions(GENERIC_G051K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051K8TX" + "BOARD_NAME=\"GENERIC_G051K8TX\"" + "BOARD_ID=GENERIC_G051K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G051K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051K8TX_MCU} +) +target_link_libraries(GENERIC_G051K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G051K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G051K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G051K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G051K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G051K8UX_MAXSIZE 65536) +set(GENERIC_G051K8UX_MAXDATASIZE 18432) +set(GENERIC_G051K8UX_MCU cortex-m0plus) +set(GENERIC_G051K8UX_FPCONF "-") +add_library(GENERIC_G051K8UX INTERFACE) +target_compile_options(GENERIC_G051K8UX INTERFACE + "SHELL:-DSTM32G051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G051K8UX_MCU} +) +target_compile_definitions(GENERIC_G051K8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G051K8UX" + "BOARD_NAME=\"GENERIC_G051K8UX\"" + "BOARD_ID=GENERIC_G051K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G051K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G051K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G051K8UX INTERFACE + "LINKER:--default-script=${GENERIC_G051K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G051K8UX_MCU} +) +target_link_libraries(GENERIC_G051K8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G051K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G051K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G051K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G051K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G051K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G051K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G051K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G051K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G051K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G051K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G051K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G051K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G051K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G051K8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G061C6TX_MAXSIZE 32768) +set(GENERIC_G061C6TX_MAXDATASIZE 18432) +set(GENERIC_G061C6TX_MCU cortex-m0plus) +set(GENERIC_G061C6TX_FPCONF "-") +add_library(GENERIC_G061C6TX INTERFACE) +target_compile_options(GENERIC_G061C6TX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061C6TX_MCU} +) +target_compile_definitions(GENERIC_G061C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061C6TX" + "BOARD_NAME=\"GENERIC_G061C6TX\"" + "BOARD_ID=GENERIC_G061C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G061C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061C6TX_MCU} +) +target_link_libraries(GENERIC_G061C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G061C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G061C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G061C6UX_MAXSIZE 32768) +set(GENERIC_G061C6UX_MAXDATASIZE 18432) +set(GENERIC_G061C6UX_MCU cortex-m0plus) +set(GENERIC_G061C6UX_FPCONF "-") +add_library(GENERIC_G061C6UX INTERFACE) +target_compile_options(GENERIC_G061C6UX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061C6UX_MCU} +) +target_compile_definitions(GENERIC_G061C6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061C6UX" + "BOARD_NAME=\"GENERIC_G061C6UX\"" + "BOARD_ID=GENERIC_G061C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061C6UX INTERFACE + "LINKER:--default-script=${GENERIC_G061C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061C6UX_MCU} +) +target_link_libraries(GENERIC_G061C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G061C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G061C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G061C8TX_MAXSIZE 65536) +set(GENERIC_G061C8TX_MAXDATASIZE 18432) +set(GENERIC_G061C8TX_MCU cortex-m0plus) +set(GENERIC_G061C8TX_FPCONF "-") +add_library(GENERIC_G061C8TX INTERFACE) +target_compile_options(GENERIC_G061C8TX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061C8TX_MCU} +) +target_compile_definitions(GENERIC_G061C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061C8TX" + "BOARD_NAME=\"GENERIC_G061C8TX\"" + "BOARD_ID=GENERIC_G061C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G061C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061C8TX_MCU} +) +target_link_libraries(GENERIC_G061C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G061C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G061C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)") +set(GENERIC_G061C8UX_MAXSIZE 65536) +set(GENERIC_G061C8UX_MAXDATASIZE 18432) +set(GENERIC_G061C8UX_MCU cortex-m0plus) +set(GENERIC_G061C8UX_FPCONF "-") +add_library(GENERIC_G061C8UX INTERFACE) +target_compile_options(GENERIC_G061C8UX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061C8UX_MCU} +) +target_compile_definitions(GENERIC_G061C8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061C8UX" + "BOARD_NAME=\"GENERIC_G061C8UX\"" + "BOARD_ID=GENERIC_G061C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061C8UX INTERFACE + "LINKER:--default-script=${GENERIC_G061C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061C8UX_MCU} +) +target_link_libraries(GENERIC_G061C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G061C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G061C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)") +set(GENERIC_G061F6PX_MAXSIZE 32768) +set(GENERIC_G061F6PX_MAXDATASIZE 18432) +set(GENERIC_G061F6PX_MCU cortex-m0plus) +set(GENERIC_G061F6PX_FPCONF "-") +add_library(GENERIC_G061F6PX INTERFACE) +target_compile_options(GENERIC_G061F6PX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061F6PX_MCU} +) +target_compile_definitions(GENERIC_G061F6PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061F6PX" + "BOARD_NAME=\"GENERIC_G061F6PX\"" + "BOARD_ID=GENERIC_G061F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061F6PX INTERFACE + "LINKER:--default-script=${GENERIC_G061F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061F6PX_MCU} +) +target_link_libraries(GENERIC_G061F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_G061F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_G061F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061F8PX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061F8PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)") +set(GENERIC_G061F8PX_MAXSIZE 65536) +set(GENERIC_G061F8PX_MAXDATASIZE 18432) +set(GENERIC_G061F8PX_MCU cortex-m0plus) +set(GENERIC_G061F8PX_FPCONF "-") +add_library(GENERIC_G061F8PX INTERFACE) +target_compile_options(GENERIC_G061F8PX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061F8PX_MCU} +) +target_compile_definitions(GENERIC_G061F8PX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061F8PX" + "BOARD_NAME=\"GENERIC_G061F8PX\"" + "BOARD_ID=GENERIC_G061F8PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061F8PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061F8PX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061F8PX INTERFACE + "LINKER:--default-script=${GENERIC_G061F8PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061F8PX_MCU} +) +target_link_libraries(GENERIC_G061F8PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061F8PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061F8PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061F8PX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061F8PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061F8PX_serial_none INTERFACE) +target_compile_options(GENERIC_G061F8PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061F8PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061F8PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061F8PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061F8PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061F8PX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061F8PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061F8PX_usb_none INTERFACE) +target_compile_options(GENERIC_G061F8PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061F8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061F8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)") +set(GENERIC_G061F8YX_MAXSIZE 65536) +set(GENERIC_G061F8YX_MAXDATASIZE 18432) +set(GENERIC_G061F8YX_MCU cortex-m0plus) +set(GENERIC_G061F8YX_FPCONF "-") +add_library(GENERIC_G061F8YX INTERFACE) +target_compile_options(GENERIC_G061F8YX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061F8YX_MCU} +) +target_compile_definitions(GENERIC_G061F8YX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061F8YX" + "BOARD_NAME=\"GENERIC_G061F8YX\"" + "BOARD_ID=GENERIC_G061F8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061F8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061F8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061F8YX INTERFACE + "LINKER:--default-script=${GENERIC_G061F8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061F8YX_MCU} +) +target_link_libraries(GENERIC_G061F8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061F8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061F8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061F8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061F8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061F8YX_serial_none INTERFACE) +target_compile_options(GENERIC_G061F8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061F8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061F8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061F8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061F8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061F8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061F8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061F8YX_usb_none INTERFACE) +target_compile_options(GENERIC_G061F8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U") +set(GENERIC_G061G6UX_MAXSIZE 32768) +set(GENERIC_G061G6UX_MAXDATASIZE 18432) +set(GENERIC_G061G6UX_MCU cortex-m0plus) +set(GENERIC_G061G6UX_FPCONF "-") +add_library(GENERIC_G061G6UX INTERFACE) +target_compile_options(GENERIC_G061G6UX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061G6UX_MCU} +) +target_compile_definitions(GENERIC_G061G6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061G6UX" + "BOARD_NAME=\"GENERIC_G061G6UX\"" + "BOARD_ID=GENERIC_G061G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061G6UX INTERFACE + "LINKER:--default-script=${GENERIC_G061G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061G6UX_MCU} +) +target_link_libraries(GENERIC_G061G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G061G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G061G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061G8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061G8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U") +set(GENERIC_G061G8UX_MAXSIZE 65536) +set(GENERIC_G061G8UX_MAXDATASIZE 18432) +set(GENERIC_G061G8UX_MCU cortex-m0plus) +set(GENERIC_G061G8UX_FPCONF "-") +add_library(GENERIC_G061G8UX INTERFACE) +target_compile_options(GENERIC_G061G8UX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061G8UX_MCU} +) +target_compile_definitions(GENERIC_G061G8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061G8UX" + "BOARD_NAME=\"GENERIC_G061G8UX\"" + "BOARD_ID=GENERIC_G061G8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061G8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061G8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061G8UX INTERFACE + "LINKER:--default-script=${GENERIC_G061G8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061G8UX_MCU} +) +target_link_libraries(GENERIC_G061G8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061G8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061G8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061G8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061G8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061G8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G061G8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061G8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061G8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061G8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061G8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061G8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061G8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061G8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G061G8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G061K6TX_MAXSIZE 32768) +set(GENERIC_G061K6TX_MAXDATASIZE 18432) +set(GENERIC_G061K6TX_MCU cortex-m0plus) +set(GENERIC_G061K6TX_FPCONF "-") +add_library(GENERIC_G061K6TX INTERFACE) +target_compile_options(GENERIC_G061K6TX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061K6TX_MCU} +) +target_compile_definitions(GENERIC_G061K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061K6TX" + "BOARD_NAME=\"GENERIC_G061K6TX\"" + "BOARD_ID=GENERIC_G061K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G061K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061K6TX_MCU} +) +target_link_libraries(GENERIC_G061K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G061K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G061K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G061K6UX_MAXSIZE 32768) +set(GENERIC_G061K6UX_MAXDATASIZE 18432) +set(GENERIC_G061K6UX_MCU cortex-m0plus) +set(GENERIC_G061K6UX_FPCONF "-") +add_library(GENERIC_G061K6UX INTERFACE) +target_compile_options(GENERIC_G061K6UX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061K6UX_MCU} +) +target_compile_definitions(GENERIC_G061K6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061K6UX" + "BOARD_NAME=\"GENERIC_G061K6UX\"" + "BOARD_ID=GENERIC_G061K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061K6UX INTERFACE + "LINKER:--default-script=${GENERIC_G061K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061K6UX_MCU} +) +target_link_libraries(GENERIC_G061K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G061K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G061K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G061K8TX_MAXSIZE 65536) +set(GENERIC_G061K8TX_MAXDATASIZE 18432) +set(GENERIC_G061K8TX_MCU cortex-m0plus) +set(GENERIC_G061K8TX_FPCONF "-") +add_library(GENERIC_G061K8TX INTERFACE) +target_compile_options(GENERIC_G061K8TX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061K8TX_MCU} +) +target_compile_definitions(GENERIC_G061K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061K8TX" + "BOARD_NAME=\"GENERIC_G061K8TX\"" + "BOARD_ID=GENERIC_G061K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G061K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061K8TX_MCU} +) +target_link_libraries(GENERIC_G061K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G061K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G061K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G061K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G061K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)") +set(GENERIC_G061K8UX_MAXSIZE 65536) +set(GENERIC_G061K8UX_MAXDATASIZE 18432) +set(GENERIC_G061K8UX_MCU cortex-m0plus) +set(GENERIC_G061K8UX_FPCONF "-") +add_library(GENERIC_G061K8UX INTERFACE) +target_compile_options(GENERIC_G061K8UX INTERFACE + "SHELL:-DSTM32G061xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G061K8UX_MCU} +) +target_compile_definitions(GENERIC_G061K8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G061K8UX" + "BOARD_NAME=\"GENERIC_G061K8UX\"" + "BOARD_ID=GENERIC_G061K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G061K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G061K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G061K8UX INTERFACE + "LINKER:--default-script=${GENERIC_G061K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=18432" + "SHELL: " + -mcpu=${GENERIC_G061K8UX_MCU} +) +target_link_libraries(GENERIC_G061K8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G061K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G061K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G061K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G061K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G061K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G061K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G061K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G061K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G061K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G061K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G061K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G061K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G061K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G061K8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G070CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G070CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G070CBT") +set(GENERIC_G070CBTX_MAXSIZE 131072) +set(GENERIC_G070CBTX_MAXDATASIZE 36864) +set(GENERIC_G070CBTX_MCU cortex-m0plus) +set(GENERIC_G070CBTX_FPCONF "-") +add_library(GENERIC_G070CBTX INTERFACE) +target_compile_options(GENERIC_G070CBTX INTERFACE + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G070CBTX_MCU} +) +target_compile_definitions(GENERIC_G070CBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G070CBTX" + "BOARD_NAME=\"GENERIC_G070CBTX\"" + "BOARD_ID=GENERIC_G070CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G070CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G070CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G070CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G070CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G070CBTX_MCU} +) +target_link_libraries(GENERIC_G070CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G070CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G070CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G070CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G070CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G070CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G070CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G070CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G070CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G070CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G070CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G070CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G070CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G070CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G070CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G070KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G070KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G070KBT") +set(GENERIC_G070KBTX_MAXSIZE 131072) +set(GENERIC_G070KBTX_MAXDATASIZE 36864) +set(GENERIC_G070KBTX_MCU cortex-m0plus) +set(GENERIC_G070KBTX_FPCONF "-") +add_library(GENERIC_G070KBTX INTERFACE) +target_compile_options(GENERIC_G070KBTX INTERFACE + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G070KBTX_MCU} +) +target_compile_definitions(GENERIC_G070KBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G070KBTX" + "BOARD_NAME=\"GENERIC_G070KBTX\"" + "BOARD_ID=GENERIC_G070KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G070KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G070KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G070KBTX INTERFACE + "LINKER:--default-script=${GENERIC_G070KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G070KBTX_MCU} +) +target_link_libraries(GENERIC_G070KBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G070KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G070KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G070KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G070KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G070KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G070KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G070KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G070KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G070KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G070KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G070KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G070KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G070KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G070KBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G070RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G070RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G070RBT") +set(GENERIC_G070RBTX_MAXSIZE 131072) +set(GENERIC_G070RBTX_MAXDATASIZE 36864) +set(GENERIC_G070RBTX_MCU cortex-m0plus) +set(GENERIC_G070RBTX_FPCONF "-") +add_library(GENERIC_G070RBTX INTERFACE) +target_compile_options(GENERIC_G070RBTX INTERFACE + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G070RBTX_MCU} +) +target_compile_definitions(GENERIC_G070RBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G070RBTX" + "BOARD_NAME=\"GENERIC_G070RBTX\"" + "BOARD_ID=GENERIC_G070RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G070RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G070RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G070RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G070RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G070RBTX_MCU} +) +target_link_libraries(GENERIC_G070RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G070RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G070RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G070RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G070RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G070RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G070RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G070RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G070RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G070RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G070RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G070RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G070RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G070RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G070RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G071C6TX_MAXSIZE 32768) +set(GENERIC_G071C6TX_MAXDATASIZE 36864) +set(GENERIC_G071C6TX_MCU cortex-m0plus) +set(GENERIC_G071C6TX_FPCONF "-") +add_library(GENERIC_G071C6TX INTERFACE) +target_compile_options(GENERIC_G071C6TX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071C6TX_MCU} +) +target_compile_definitions(GENERIC_G071C6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071C6TX" + "BOARD_NAME=\"GENERIC_G071C6TX\"" + "BOARD_ID=GENERIC_G071C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G071C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071C6TX_MCU} +) +target_link_libraries(GENERIC_G071C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G071C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G071C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G071C6UX_MAXSIZE 32768) +set(GENERIC_G071C6UX_MAXDATASIZE 36864) +set(GENERIC_G071C6UX_MCU cortex-m0plus) +set(GENERIC_G071C6UX_FPCONF "-") +add_library(GENERIC_G071C6UX INTERFACE) +target_compile_options(GENERIC_G071C6UX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071C6UX_MCU} +) +target_compile_definitions(GENERIC_G071C6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071C6UX" + "BOARD_NAME=\"GENERIC_G071C6UX\"" + "BOARD_ID=GENERIC_G071C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071C6UX INTERFACE + "LINKER:--default-script=${GENERIC_G071C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071C6UX_MCU} +) +target_link_libraries(GENERIC_G071C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G071C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G071C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G071C8TX_MAXSIZE 65536) +set(GENERIC_G071C8TX_MAXDATASIZE 36864) +set(GENERIC_G071C8TX_MCU cortex-m0plus) +set(GENERIC_G071C8TX_FPCONF "-") +add_library(GENERIC_G071C8TX INTERFACE) +target_compile_options(GENERIC_G071C8TX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071C8TX_MCU} +) +target_compile_definitions(GENERIC_G071C8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071C8TX" + "BOARD_NAME=\"GENERIC_G071C8TX\"" + "BOARD_ID=GENERIC_G071C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G071C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071C8TX_MCU} +) +target_link_libraries(GENERIC_G071C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G071C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G071C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G071C8UX_MAXSIZE 65536) +set(GENERIC_G071C8UX_MAXDATASIZE 36864) +set(GENERIC_G071C8UX_MCU cortex-m0plus) +set(GENERIC_G071C8UX_FPCONF "-") +add_library(GENERIC_G071C8UX INTERFACE) +target_compile_options(GENERIC_G071C8UX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071C8UX_MCU} +) +target_compile_definitions(GENERIC_G071C8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071C8UX" + "BOARD_NAME=\"GENERIC_G071C8UX\"" + "BOARD_ID=GENERIC_G071C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071C8UX INTERFACE + "LINKER:--default-script=${GENERIC_G071C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071C8UX_MCU} +) +target_link_libraries(GENERIC_G071C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G071C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G071C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G071CBTX_MAXSIZE 131072) +set(GENERIC_G071CBTX_MAXDATASIZE 36864) +set(GENERIC_G071CBTX_MCU cortex-m0plus) +set(GENERIC_G071CBTX_FPCONF "-") +add_library(GENERIC_G071CBTX INTERFACE) +target_compile_options(GENERIC_G071CBTX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071CBTX_MCU} +) +target_compile_definitions(GENERIC_G071CBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071CBTX" + "BOARD_NAME=\"GENERIC_G071CBTX\"" + "BOARD_ID=GENERIC_G071CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G071CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071CBTX_MCU} +) +target_link_libraries(GENERIC_G071CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G071CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G071CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G071CBUX_MAXSIZE 131072) +set(GENERIC_G071CBUX_MAXDATASIZE 36864) +set(GENERIC_G071CBUX_MCU cortex-m0plus) +set(GENERIC_G071CBUX_FPCONF "-") +add_library(GENERIC_G071CBUX INTERFACE) +target_compile_options(GENERIC_G071CBUX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071CBUX_MCU} +) +target_compile_definitions(GENERIC_G071CBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071CBUX" + "BOARD_NAME=\"GENERIC_G071CBUX\"" + "BOARD_ID=GENERIC_G071CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071CBUX INTERFACE + "LINKER:--default-script=${GENERIC_G071CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071CBUX_MCU} +) +target_link_libraries(GENERIC_G071CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G071CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G071CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071EBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071EBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071EBY_G081EBY") +set(GENERIC_G071EBYX_MAXSIZE 131072) +set(GENERIC_G071EBYX_MAXDATASIZE 36864) +set(GENERIC_G071EBYX_MCU cortex-m0plus) +set(GENERIC_G071EBYX_FPCONF "-") +add_library(GENERIC_G071EBYX INTERFACE) +target_compile_options(GENERIC_G071EBYX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071EBYX_MCU} +) +target_compile_definitions(GENERIC_G071EBYX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071EBYX" + "BOARD_NAME=\"GENERIC_G071EBYX\"" + "BOARD_ID=GENERIC_G071EBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071EBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071EBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071EBYX INTERFACE + "LINKER:--default-script=${GENERIC_G071EBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071EBYX_MCU} +) +target_link_libraries(GENERIC_G071EBYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071EBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071EBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071EBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071EBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071EBYX_serial_none INTERFACE) +target_compile_options(GENERIC_G071EBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071EBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071EBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071EBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071EBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071EBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071EBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071EBYX_usb_none INTERFACE) +target_compile_options(GENERIC_G071EBYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(6-8-B)U_G081GBU") +set(GENERIC_G071G6UX_MAXSIZE 32768) +set(GENERIC_G071G6UX_MAXDATASIZE 36864) +set(GENERIC_G071G6UX_MCU cortex-m0plus) +set(GENERIC_G071G6UX_FPCONF "-") +add_library(GENERIC_G071G6UX INTERFACE) +target_compile_options(GENERIC_G071G6UX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071G6UX_MCU} +) +target_compile_definitions(GENERIC_G071G6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071G6UX" + "BOARD_NAME=\"GENERIC_G071G6UX\"" + "BOARD_ID=GENERIC_G071G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071G6UX INTERFACE + "LINKER:--default-script=${GENERIC_G071G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071G6UX_MCU} +) +target_link_libraries(GENERIC_G071G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G071G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G071G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071G8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071G8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(6-8-B)U_G081GBU") +set(GENERIC_G071G8UX_MAXSIZE 65536) +set(GENERIC_G071G8UX_MAXDATASIZE 36864) +set(GENERIC_G071G8UX_MCU cortex-m0plus) +set(GENERIC_G071G8UX_FPCONF "-") +add_library(GENERIC_G071G8UX INTERFACE) +target_compile_options(GENERIC_G071G8UX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071G8UX_MCU} +) +target_compile_definitions(GENERIC_G071G8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071G8UX" + "BOARD_NAME=\"GENERIC_G071G8UX\"" + "BOARD_ID=GENERIC_G071G8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071G8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071G8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071G8UX INTERFACE + "LINKER:--default-script=${GENERIC_G071G8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071G8UX_MCU} +) +target_link_libraries(GENERIC_G071G8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071G8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071G8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071G8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071G8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071G8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G071G8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071G8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071G8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071G8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071G8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071G8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071G8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071G8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G071G8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071G8UXN +# ----------------------------------------------------------------------------- + +set(GENERIC_G071G8UXN_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN") +set(GENERIC_G071G8UXN_MAXSIZE 65536) +set(GENERIC_G071G8UXN_MAXDATASIZE 36864) +set(GENERIC_G071G8UXN_MCU cortex-m0plus) +set(GENERIC_G071G8UXN_FPCONF "-") +add_library(GENERIC_G071G8UXN INTERFACE) +target_compile_options(GENERIC_G071G8UXN INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071G8UXN_MCU} +) +target_compile_definitions(GENERIC_G071G8UXN INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071G8UXN" + "BOARD_NAME=\"GENERIC_G071G8UXN\"" + "BOARD_ID=GENERIC_G071G8UXN" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071G8UXN INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071G8UXN_VARIANT_PATH} +) + +target_link_options(GENERIC_G071G8UXN INTERFACE + "LINKER:--default-script=${GENERIC_G071G8UXN_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071G8UXN_MCU} +) +target_link_libraries(GENERIC_G071G8UXN INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071G8UXN_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071G8UXN_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071G8UXN_serial_generic INTERFACE) +target_compile_options(GENERIC_G071G8UXN_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071G8UXN_serial_none INTERFACE) +target_compile_options(GENERIC_G071G8UXN_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071G8UXN_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071G8UXN_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071G8UXN_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071G8UXN_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071G8UXN_usb_HID INTERFACE) +target_compile_options(GENERIC_G071G8UXN_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071G8UXN_usb_none INTERFACE) +target_compile_options(GENERIC_G071G8UXN_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071GBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071GBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(6-8-B)U_G081GBU") +set(GENERIC_G071GBUX_MAXSIZE 131072) +set(GENERIC_G071GBUX_MAXDATASIZE 36864) +set(GENERIC_G071GBUX_MCU cortex-m0plus) +set(GENERIC_G071GBUX_FPCONF "-") +add_library(GENERIC_G071GBUX INTERFACE) +target_compile_options(GENERIC_G071GBUX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071GBUX_MCU} +) +target_compile_definitions(GENERIC_G071GBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071GBUX" + "BOARD_NAME=\"GENERIC_G071GBUX\"" + "BOARD_ID=GENERIC_G071GBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071GBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071GBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071GBUX INTERFACE + "LINKER:--default-script=${GENERIC_G071GBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071GBUX_MCU} +) +target_link_libraries(GENERIC_G071GBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071GBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071GBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071GBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071GBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071GBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G071GBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071GBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071GBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071GBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071GBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071GBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071GBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071GBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G071GBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071GBUXN +# ----------------------------------------------------------------------------- + +set(GENERIC_G071GBUXN_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN") +set(GENERIC_G071GBUXN_MAXSIZE 131072) +set(GENERIC_G071GBUXN_MAXDATASIZE 36864) +set(GENERIC_G071GBUXN_MCU cortex-m0plus) +set(GENERIC_G071GBUXN_FPCONF "-") +add_library(GENERIC_G071GBUXN INTERFACE) +target_compile_options(GENERIC_G071GBUXN INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071GBUXN_MCU} +) +target_compile_definitions(GENERIC_G071GBUXN INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071GBUXN" + "BOARD_NAME=\"GENERIC_G071GBUXN\"" + "BOARD_ID=GENERIC_G071GBUXN" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071GBUXN INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071GBUXN_VARIANT_PATH} +) + +target_link_options(GENERIC_G071GBUXN INTERFACE + "LINKER:--default-script=${GENERIC_G071GBUXN_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071GBUXN_MCU} +) +target_link_libraries(GENERIC_G071GBUXN INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071GBUXN_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071GBUXN_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071GBUXN_serial_generic INTERFACE) +target_compile_options(GENERIC_G071GBUXN_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071GBUXN_serial_none INTERFACE) +target_compile_options(GENERIC_G071GBUXN_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071GBUXN_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071GBUXN_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071GBUXN_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071GBUXN_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071GBUXN_usb_HID INTERFACE) +target_compile_options(GENERIC_G071GBUXN_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071GBUXN_usb_none INTERFACE) +target_compile_options(GENERIC_G071GBUXN_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G071K6TX_MAXSIZE 32768) +set(GENERIC_G071K6TX_MAXDATASIZE 36864) +set(GENERIC_G071K6TX_MCU cortex-m0plus) +set(GENERIC_G071K6TX_FPCONF "-") +add_library(GENERIC_G071K6TX INTERFACE) +target_compile_options(GENERIC_G071K6TX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071K6TX_MCU} +) +target_compile_definitions(GENERIC_G071K6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071K6TX" + "BOARD_NAME=\"GENERIC_G071K6TX\"" + "BOARD_ID=GENERIC_G071K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G071K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071K6TX_MCU} +) +target_link_libraries(GENERIC_G071K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G071K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G071K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G071K6UX_MAXSIZE 32768) +set(GENERIC_G071K6UX_MAXDATASIZE 36864) +set(GENERIC_G071K6UX_MCU cortex-m0plus) +set(GENERIC_G071K6UX_FPCONF "-") +add_library(GENERIC_G071K6UX INTERFACE) +target_compile_options(GENERIC_G071K6UX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071K6UX_MCU} +) +target_compile_definitions(GENERIC_G071K6UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071K6UX" + "BOARD_NAME=\"GENERIC_G071K6UX\"" + "BOARD_ID=GENERIC_G071K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071K6UX INTERFACE + "LINKER:--default-script=${GENERIC_G071K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071K6UX_MCU} +) +target_link_libraries(GENERIC_G071K6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G071K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G071K6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G071K8TX_MAXSIZE 65536) +set(GENERIC_G071K8TX_MAXDATASIZE 36864) +set(GENERIC_G071K8TX_MCU cortex-m0plus) +set(GENERIC_G071K8TX_FPCONF "-") +add_library(GENERIC_G071K8TX INTERFACE) +target_compile_options(GENERIC_G071K8TX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071K8TX_MCU} +) +target_compile_definitions(GENERIC_G071K8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071K8TX" + "BOARD_NAME=\"GENERIC_G071K8TX\"" + "BOARD_ID=GENERIC_G071K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G071K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071K8TX_MCU} +) +target_link_libraries(GENERIC_G071K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G071K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G071K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G071K8UX_MAXSIZE 65536) +set(GENERIC_G071K8UX_MAXDATASIZE 36864) +set(GENERIC_G071K8UX_MCU cortex-m0plus) +set(GENERIC_G071K8UX_FPCONF "-") +add_library(GENERIC_G071K8UX INTERFACE) +target_compile_options(GENERIC_G071K8UX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071K8UX_MCU} +) +target_compile_definitions(GENERIC_G071K8UX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071K8UX" + "BOARD_NAME=\"GENERIC_G071K8UX\"" + "BOARD_ID=GENERIC_G071K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071K8UX INTERFACE + "LINKER:--default-script=${GENERIC_G071K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071K8UX_MCU} +) +target_link_libraries(GENERIC_G071K8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G071K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G071K8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G071KBTX_MAXSIZE 131072) +set(GENERIC_G071KBTX_MAXDATASIZE 36864) +set(GENERIC_G071KBTX_MCU cortex-m0plus) +set(GENERIC_G071KBTX_FPCONF "-") +add_library(GENERIC_G071KBTX INTERFACE) +target_compile_options(GENERIC_G071KBTX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071KBTX_MCU} +) +target_compile_definitions(GENERIC_G071KBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071KBTX" + "BOARD_NAME=\"GENERIC_G071KBTX\"" + "BOARD_ID=GENERIC_G071KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071KBTX INTERFACE + "LINKER:--default-script=${GENERIC_G071KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071KBTX_MCU} +) +target_link_libraries(GENERIC_G071KBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G071KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G071KBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G071KBUX_MAXSIZE 131072) +set(GENERIC_G071KBUX_MAXDATASIZE 36864) +set(GENERIC_G071KBUX_MCU cortex-m0plus) +set(GENERIC_G071KBUX_FPCONF "-") +add_library(GENERIC_G071KBUX INTERFACE) +target_compile_options(GENERIC_G071KBUX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071KBUX_MCU} +) +target_compile_definitions(GENERIC_G071KBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071KBUX" + "BOARD_NAME=\"GENERIC_G071KBUX\"" + "BOARD_ID=GENERIC_G071KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071KBUX INTERFACE + "LINKER:--default-script=${GENERIC_G071KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071KBUX_MCU} +) +target_link_libraries(GENERIC_G071KBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G071KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G071KBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(GENERIC_G071R6TX_MAXSIZE 32768) +set(GENERIC_G071R6TX_MAXDATASIZE 36864) +set(GENERIC_G071R6TX_MCU cortex-m0plus) +set(GENERIC_G071R6TX_FPCONF "-") +add_library(GENERIC_G071R6TX INTERFACE) +target_compile_options(GENERIC_G071R6TX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071R6TX_MCU} +) +target_compile_definitions(GENERIC_G071R6TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071R6TX" + "BOARD_NAME=\"GENERIC_G071R6TX\"" + "BOARD_ID=GENERIC_G071R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071R6TX INTERFACE + "LINKER:--default-script=${GENERIC_G071R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071R6TX_MCU} +) +target_link_libraries(GENERIC_G071R6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G071R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G071R6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(GENERIC_G071R8TX_MAXSIZE 65536) +set(GENERIC_G071R8TX_MAXDATASIZE 36864) +set(GENERIC_G071R8TX_MCU cortex-m0plus) +set(GENERIC_G071R8TX_FPCONF "-") +add_library(GENERIC_G071R8TX INTERFACE) +target_compile_options(GENERIC_G071R8TX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071R8TX_MCU} +) +target_compile_definitions(GENERIC_G071R8TX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071R8TX" + "BOARD_NAME=\"GENERIC_G071R8TX\"" + "BOARD_ID=GENERIC_G071R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071R8TX INTERFACE + "LINKER:--default-script=${GENERIC_G071R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071R8TX_MCU} +) +target_link_libraries(GENERIC_G071R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G071R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G071R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(GENERIC_G071RBIX_MAXSIZE 131072) +set(GENERIC_G071RBIX_MAXDATASIZE 36864) +set(GENERIC_G071RBIX_MCU cortex-m0plus) +set(GENERIC_G071RBIX_FPCONF "-") +add_library(GENERIC_G071RBIX INTERFACE) +target_compile_options(GENERIC_G071RBIX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071RBIX_MCU} +) +target_compile_definitions(GENERIC_G071RBIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071RBIX" + "BOARD_NAME=\"GENERIC_G071RBIX\"" + "BOARD_ID=GENERIC_G071RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071RBIX INTERFACE + "LINKER:--default-script=${GENERIC_G071RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071RBIX_MCU} +) +target_link_libraries(GENERIC_G071RBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G071RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G071RBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G071RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G071RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(GENERIC_G071RBTX_MAXSIZE 131072) +set(GENERIC_G071RBTX_MAXDATASIZE 36864) +set(GENERIC_G071RBTX_MCU cortex-m0plus) +set(GENERIC_G071RBTX_FPCONF "-") +add_library(GENERIC_G071RBTX INTERFACE) +target_compile_options(GENERIC_G071RBTX INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G071RBTX_MCU} +) +target_compile_definitions(GENERIC_G071RBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G071RBTX" + "BOARD_NAME=\"GENERIC_G071RBTX\"" + "BOARD_ID=GENERIC_G071RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G071RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G071RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G071RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G071RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G071RBTX_MCU} +) +target_link_libraries(GENERIC_G071RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G071RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G071RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G071RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G071RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G071RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G071RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G071RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G071RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G071RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G071RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G071RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G071RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G071RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G071RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G081CBTX_MAXSIZE 131072) +set(GENERIC_G081CBTX_MAXDATASIZE 36864) +set(GENERIC_G081CBTX_MCU cortex-m0plus) +set(GENERIC_G081CBTX_FPCONF "-") +add_library(GENERIC_G081CBTX INTERFACE) +target_compile_options(GENERIC_G081CBTX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081CBTX_MCU} +) +target_compile_definitions(GENERIC_G081CBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081CBTX" + "BOARD_NAME=\"GENERIC_G081CBTX\"" + "BOARD_ID=GENERIC_G081CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G081CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081CBTX_MCU} +) +target_link_libraries(GENERIC_G081CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G081CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G081CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)") +set(GENERIC_G081CBUX_MAXSIZE 131072) +set(GENERIC_G081CBUX_MAXDATASIZE 36864) +set(GENERIC_G081CBUX_MCU cortex-m0plus) +set(GENERIC_G081CBUX_FPCONF "-") +add_library(GENERIC_G081CBUX INTERFACE) +target_compile_options(GENERIC_G081CBUX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081CBUX_MCU} +) +target_compile_definitions(GENERIC_G081CBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081CBUX" + "BOARD_NAME=\"GENERIC_G081CBUX\"" + "BOARD_ID=GENERIC_G081CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081CBUX INTERFACE + "LINKER:--default-script=${GENERIC_G081CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081CBUX_MCU} +) +target_link_libraries(GENERIC_G081CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G081CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G081CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081EBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081EBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071EBY_G081EBY") +set(GENERIC_G081EBYX_MAXSIZE 131072) +set(GENERIC_G081EBYX_MAXDATASIZE 36864) +set(GENERIC_G081EBYX_MCU cortex-m0plus) +set(GENERIC_G081EBYX_FPCONF "-") +add_library(GENERIC_G081EBYX INTERFACE) +target_compile_options(GENERIC_G081EBYX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081EBYX_MCU} +) +target_compile_definitions(GENERIC_G081EBYX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081EBYX" + "BOARD_NAME=\"GENERIC_G081EBYX\"" + "BOARD_ID=GENERIC_G081EBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081EBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081EBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081EBYX INTERFACE + "LINKER:--default-script=${GENERIC_G081EBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081EBYX_MCU} +) +target_link_libraries(GENERIC_G081EBYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081EBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081EBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081EBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081EBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081EBYX_serial_none INTERFACE) +target_compile_options(GENERIC_G081EBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081EBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081EBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081EBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081EBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081EBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081EBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081EBYX_usb_none INTERFACE) +target_compile_options(GENERIC_G081EBYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081GBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081GBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(6-8-B)U_G081GBU") +set(GENERIC_G081GBUX_MAXSIZE 131072) +set(GENERIC_G081GBUX_MAXDATASIZE 36864) +set(GENERIC_G081GBUX_MCU cortex-m0plus) +set(GENERIC_G081GBUX_FPCONF "-") +add_library(GENERIC_G081GBUX INTERFACE) +target_compile_options(GENERIC_G081GBUX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081GBUX_MCU} +) +target_compile_definitions(GENERIC_G081GBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081GBUX" + "BOARD_NAME=\"GENERIC_G081GBUX\"" + "BOARD_ID=GENERIC_G081GBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081GBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081GBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081GBUX INTERFACE + "LINKER:--default-script=${GENERIC_G081GBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081GBUX_MCU} +) +target_link_libraries(GENERIC_G081GBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081GBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081GBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081GBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081GBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081GBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G081GBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081GBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081GBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081GBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081GBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081GBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081GBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081GBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G081GBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081GBUXN +# ----------------------------------------------------------------------------- + +set(GENERIC_G081GBUXN_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN") +set(GENERIC_G081GBUXN_MAXSIZE 131072) +set(GENERIC_G081GBUXN_MAXDATASIZE 36864) +set(GENERIC_G081GBUXN_MCU cortex-m0plus) +set(GENERIC_G081GBUXN_FPCONF "-") +add_library(GENERIC_G081GBUXN INTERFACE) +target_compile_options(GENERIC_G081GBUXN INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081GBUXN_MCU} +) +target_compile_definitions(GENERIC_G081GBUXN INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081GBUXN" + "BOARD_NAME=\"GENERIC_G081GBUXN\"" + "BOARD_ID=GENERIC_G081GBUXN" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081GBUXN INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081GBUXN_VARIANT_PATH} +) + +target_link_options(GENERIC_G081GBUXN INTERFACE + "LINKER:--default-script=${GENERIC_G081GBUXN_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081GBUXN_MCU} +) +target_link_libraries(GENERIC_G081GBUXN INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081GBUXN_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081GBUXN_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081GBUXN_serial_generic INTERFACE) +target_compile_options(GENERIC_G081GBUXN_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081GBUXN_serial_none INTERFACE) +target_compile_options(GENERIC_G081GBUXN_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081GBUXN_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081GBUXN_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081GBUXN_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081GBUXN_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081GBUXN_usb_HID INTERFACE) +target_compile_options(GENERIC_G081GBUXN_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081GBUXN_usb_none INTERFACE) +target_compile_options(GENERIC_G081GBUXN_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G081KBTX_MAXSIZE 131072) +set(GENERIC_G081KBTX_MAXDATASIZE 36864) +set(GENERIC_G081KBTX_MCU cortex-m0plus) +set(GENERIC_G081KBTX_FPCONF "-") +add_library(GENERIC_G081KBTX INTERFACE) +target_compile_options(GENERIC_G081KBTX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081KBTX_MCU} +) +target_compile_definitions(GENERIC_G081KBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081KBTX" + "BOARD_NAME=\"GENERIC_G081KBTX\"" + "BOARD_ID=GENERIC_G081KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081KBTX INTERFACE + "LINKER:--default-script=${GENERIC_G081KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081KBTX_MCU} +) +target_link_libraries(GENERIC_G081KBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G081KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G081KBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)") +set(GENERIC_G081KBUX_MAXSIZE 131072) +set(GENERIC_G081KBUX_MAXDATASIZE 36864) +set(GENERIC_G081KBUX_MCU cortex-m0plus) +set(GENERIC_G081KBUX_FPCONF "-") +add_library(GENERIC_G081KBUX INTERFACE) +target_compile_options(GENERIC_G081KBUX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081KBUX_MCU} +) +target_compile_definitions(GENERIC_G081KBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081KBUX" + "BOARD_NAME=\"GENERIC_G081KBUX\"" + "BOARD_ID=GENERIC_G081KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081KBUX INTERFACE + "LINKER:--default-script=${GENERIC_G081KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081KBUX_MCU} +) +target_link_libraries(GENERIC_G081KBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G081KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G081KBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(GENERIC_G081RBIX_MAXSIZE 131072) +set(GENERIC_G081RBIX_MAXDATASIZE 36864) +set(GENERIC_G081RBIX_MCU cortex-m0plus) +set(GENERIC_G081RBIX_FPCONF "-") +add_library(GENERIC_G081RBIX INTERFACE) +target_compile_options(GENERIC_G081RBIX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081RBIX_MCU} +) +target_compile_definitions(GENERIC_G081RBIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081RBIX" + "BOARD_NAME=\"GENERIC_G081RBIX\"" + "BOARD_ID=GENERIC_G081RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081RBIX INTERFACE + "LINKER:--default-script=${GENERIC_G081RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081RBIX_MCU} +) +target_link_libraries(GENERIC_G081RBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G081RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G081RBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G081RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G081RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(GENERIC_G081RBTX_MAXSIZE 131072) +set(GENERIC_G081RBTX_MAXDATASIZE 36864) +set(GENERIC_G081RBTX_MCU cortex-m0plus) +set(GENERIC_G081RBTX_FPCONF "-") +add_library(GENERIC_G081RBTX INTERFACE) +target_compile_options(GENERIC_G081RBTX INTERFACE + "SHELL:-DSTM32G081xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G081RBTX_MCU} +) +target_compile_definitions(GENERIC_G081RBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G081RBTX" + "BOARD_NAME=\"GENERIC_G081RBTX\"" + "BOARD_ID=GENERIC_G081RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G081RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G081RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G081RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G081RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${GENERIC_G081RBTX_MCU} +) +target_link_libraries(GENERIC_G081RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G081RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G081RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G081RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G081RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G081RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G081RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G081RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G081RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G081RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G081RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G081RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G081RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G081RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G081RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B0CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B0CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B0CET") +set(GENERIC_G0B0CETX_MAXSIZE 524288) +set(GENERIC_G0B0CETX_MAXDATASIZE 147456) +set(GENERIC_G0B0CETX_MCU cortex-m0plus) +set(GENERIC_G0B0CETX_FPCONF "-") +add_library(GENERIC_G0B0CETX INTERFACE) +target_compile_options(GENERIC_G0B0CETX INTERFACE + "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B0CETX_MCU} +) +target_compile_definitions(GENERIC_G0B0CETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B0CETX" + "BOARD_NAME=\"GENERIC_G0B0CETX\"" + "BOARD_ID=GENERIC_G0B0CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B0CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B0CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B0CETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B0CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B0CETX_MCU} +) +target_link_libraries(GENERIC_G0B0CETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B0CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B0CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B0CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B0CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B0CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B0CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B0CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B0CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B0CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B0CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B0CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B0CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B0CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B0CETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B0RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B0RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B0RET") +set(GENERIC_G0B0RETX_MAXSIZE 524288) +set(GENERIC_G0B0RETX_MAXDATASIZE 147456) +set(GENERIC_G0B0RETX_MCU cortex-m0plus) +set(GENERIC_G0B0RETX_FPCONF "-") +add_library(GENERIC_G0B0RETX INTERFACE) +target_compile_options(GENERIC_G0B0RETX INTERFACE + "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B0RETX_MCU} +) +target_compile_definitions(GENERIC_G0B0RETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B0RETX" + "BOARD_NAME=\"GENERIC_G0B0RETX\"" + "BOARD_ID=GENERIC_G0B0RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B0RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B0RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B0RETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B0RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B0RETX_MCU} +) +target_link_libraries(GENERIC_G0B0RETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B0RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B0RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B0RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B0RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B0RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B0RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B0RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B0RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B0RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B0RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B0RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B0RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B0RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B0RETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B0VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B0VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B0VET") +set(GENERIC_G0B0VETX_MAXSIZE 524288) +set(GENERIC_G0B0VETX_MAXDATASIZE 147456) +set(GENERIC_G0B0VETX_MCU cortex-m0plus) +set(GENERIC_G0B0VETX_FPCONF "-") +add_library(GENERIC_G0B0VETX INTERFACE) +target_compile_options(GENERIC_G0B0VETX INTERFACE + "SHELL:-DSTM32G0B0xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B0VETX_MCU} +) +target_compile_definitions(GENERIC_G0B0VETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B0VETX" + "BOARD_NAME=\"GENERIC_G0B0VETX\"" + "BOARD_ID=GENERIC_G0B0VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B0VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B0VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B0VETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B0VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B0VETX_MCU} +) +target_link_libraries(GENERIC_G0B0VETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B0VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B0VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B0VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B0VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B0VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B0VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B0VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B0VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B0VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B0VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B0VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B0VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B0VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B0VETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0B1CBTX_MAXSIZE 131072) +set(GENERIC_G0B1CBTX_MAXDATASIZE 147456) +set(GENERIC_G0B1CBTX_MCU cortex-m0plus) +set(GENERIC_G0B1CBTX_FPCONF "-") +add_library(GENERIC_G0B1CBTX INTERFACE) +target_compile_options(GENERIC_G0B1CBTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1CBTX_MCU} +) +target_compile_definitions(GENERIC_G0B1CBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1CBTX" + "BOARD_NAME=\"GENERIC_G0B1CBTX\"" + "BOARD_ID=GENERIC_G0B1CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1CBTX_MCU} +) +target_link_libraries(GENERIC_G0B1CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0B1CBUX_MAXSIZE 131072) +set(GENERIC_G0B1CBUX_MAXDATASIZE 147456) +set(GENERIC_G0B1CBUX_MCU cortex-m0plus) +set(GENERIC_G0B1CBUX_FPCONF "-") +add_library(GENERIC_G0B1CBUX INTERFACE) +target_compile_options(GENERIC_G0B1CBUX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1CBUX_MCU} +) +target_compile_definitions(GENERIC_G0B1CBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1CBUX" + "BOARD_NAME=\"GENERIC_G0B1CBUX\"" + "BOARD_ID=GENERIC_G0B1CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1CBUX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1CBUX_MCU} +) +target_link_libraries(GENERIC_G0B1CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0B1CCTX_MAXSIZE 262144) +set(GENERIC_G0B1CCTX_MAXDATASIZE 147456) +set(GENERIC_G0B1CCTX_MCU cortex-m0plus) +set(GENERIC_G0B1CCTX_FPCONF "-") +add_library(GENERIC_G0B1CCTX INTERFACE) +target_compile_options(GENERIC_G0B1CCTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1CCTX_MCU} +) +target_compile_definitions(GENERIC_G0B1CCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1CCTX" + "BOARD_NAME=\"GENERIC_G0B1CCTX\"" + "BOARD_ID=GENERIC_G0B1CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1CCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1CCTX_MCU} +) +target_link_libraries(GENERIC_G0B1CCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1CCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0B1CCUX_MAXSIZE 262144) +set(GENERIC_G0B1CCUX_MAXDATASIZE 147456) +set(GENERIC_G0B1CCUX_MCU cortex-m0plus) +set(GENERIC_G0B1CCUX_FPCONF "-") +add_library(GENERIC_G0B1CCUX INTERFACE) +target_compile_options(GENERIC_G0B1CCUX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1CCUX_MCU} +) +target_compile_definitions(GENERIC_G0B1CCUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1CCUX" + "BOARD_NAME=\"GENERIC_G0B1CCUX\"" + "BOARD_ID=GENERIC_G0B1CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1CCUX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1CCUX_MCU} +) +target_link_libraries(GENERIC_G0B1CCUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1CCUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0B1CETX_MAXSIZE 524288) +set(GENERIC_G0B1CETX_MAXDATASIZE 147456) +set(GENERIC_G0B1CETX_MCU cortex-m0plus) +set(GENERIC_G0B1CETX_FPCONF "-") +add_library(GENERIC_G0B1CETX INTERFACE) +target_compile_options(GENERIC_G0B1CETX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1CETX_MCU} +) +target_compile_definitions(GENERIC_G0B1CETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1CETX" + "BOARD_NAME=\"GENERIC_G0B1CETX\"" + "BOARD_ID=GENERIC_G0B1CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1CETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1CETX_MCU} +) +target_link_libraries(GENERIC_G0B1CETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1CETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0B1CEUX_MAXSIZE 524288) +set(GENERIC_G0B1CEUX_MAXDATASIZE 147456) +set(GENERIC_G0B1CEUX_MCU cortex-m0plus) +set(GENERIC_G0B1CEUX_FPCONF "-") +add_library(GENERIC_G0B1CEUX INTERFACE) +target_compile_options(GENERIC_G0B1CEUX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1CEUX_MCU} +) +target_compile_definitions(GENERIC_G0B1CEUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1CEUX" + "BOARD_NAME=\"GENERIC_G0B1CEUX\"" + "BOARD_ID=GENERIC_G0B1CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1CEUX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1CEUX_MCU} +) +target_link_libraries(GENERIC_G0B1CEUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1CEUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0B1KBTX_MAXSIZE 131072) +set(GENERIC_G0B1KBTX_MAXDATASIZE 147456) +set(GENERIC_G0B1KBTX_MCU cortex-m0plus) +set(GENERIC_G0B1KBTX_FPCONF "-") +add_library(GENERIC_G0B1KBTX INTERFACE) +target_compile_options(GENERIC_G0B1KBTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1KBTX_MCU} +) +target_compile_definitions(GENERIC_G0B1KBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1KBTX" + "BOARD_NAME=\"GENERIC_G0B1KBTX\"" + "BOARD_ID=GENERIC_G0B1KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1KBTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1KBTX_MCU} +) +target_link_libraries(GENERIC_G0B1KBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1KBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0B1KBUX_MAXSIZE 131072) +set(GENERIC_G0B1KBUX_MAXDATASIZE 147456) +set(GENERIC_G0B1KBUX_MCU cortex-m0plus) +set(GENERIC_G0B1KBUX_FPCONF "-") +add_library(GENERIC_G0B1KBUX INTERFACE) +target_compile_options(GENERIC_G0B1KBUX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1KBUX_MCU} +) +target_compile_definitions(GENERIC_G0B1KBUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1KBUX" + "BOARD_NAME=\"GENERIC_G0B1KBUX\"" + "BOARD_ID=GENERIC_G0B1KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1KBUX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1KBUX_MCU} +) +target_link_libraries(GENERIC_G0B1KBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1KBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1KCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1KCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0B1KCTX_MAXSIZE 262144) +set(GENERIC_G0B1KCTX_MAXDATASIZE 147456) +set(GENERIC_G0B1KCTX_MCU cortex-m0plus) +set(GENERIC_G0B1KCTX_FPCONF "-") +add_library(GENERIC_G0B1KCTX INTERFACE) +target_compile_options(GENERIC_G0B1KCTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1KCTX_MCU} +) +target_compile_definitions(GENERIC_G0B1KCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1KCTX" + "BOARD_NAME=\"GENERIC_G0B1KCTX\"" + "BOARD_ID=GENERIC_G0B1KCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1KCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1KCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1KCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1KCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1KCTX_MCU} +) +target_link_libraries(GENERIC_G0B1KCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1KCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1KCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1KCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1KCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1KCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1KCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1KCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1KCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1KCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1KCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0B1KCUX_MAXSIZE 262144) +set(GENERIC_G0B1KCUX_MAXDATASIZE 147456) +set(GENERIC_G0B1KCUX_MCU cortex-m0plus) +set(GENERIC_G0B1KCUX_FPCONF "-") +add_library(GENERIC_G0B1KCUX INTERFACE) +target_compile_options(GENERIC_G0B1KCUX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1KCUX_MCU} +) +target_compile_definitions(GENERIC_G0B1KCUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1KCUX" + "BOARD_NAME=\"GENERIC_G0B1KCUX\"" + "BOARD_ID=GENERIC_G0B1KCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1KCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1KCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1KCUX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1KCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1KCUX_MCU} +) +target_link_libraries(GENERIC_G0B1KCUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1KCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1KCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1KCUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1KCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1KCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1KCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1KCUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1KCUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1KETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1KETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0B1KETX_MAXSIZE 524288) +set(GENERIC_G0B1KETX_MAXDATASIZE 147456) +set(GENERIC_G0B1KETX_MCU cortex-m0plus) +set(GENERIC_G0B1KETX_FPCONF "-") +add_library(GENERIC_G0B1KETX INTERFACE) +target_compile_options(GENERIC_G0B1KETX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1KETX_MCU} +) +target_compile_definitions(GENERIC_G0B1KETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1KETX" + "BOARD_NAME=\"GENERIC_G0B1KETX\"" + "BOARD_ID=GENERIC_G0B1KETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1KETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1KETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1KETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1KETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1KETX_MCU} +) +target_link_libraries(GENERIC_G0B1KETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1KETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1KETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1KETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1KETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1KETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1KETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1KETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1KETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1KETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1KETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1KETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1KETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1KETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1KETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1KEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1KEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0B1KEUX_MAXSIZE 524288) +set(GENERIC_G0B1KEUX_MAXDATASIZE 147456) +set(GENERIC_G0B1KEUX_MCU cortex-m0plus) +set(GENERIC_G0B1KEUX_FPCONF "-") +add_library(GENERIC_G0B1KEUX INTERFACE) +target_compile_options(GENERIC_G0B1KEUX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1KEUX_MCU} +) +target_compile_definitions(GENERIC_G0B1KEUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1KEUX" + "BOARD_NAME=\"GENERIC_G0B1KEUX\"" + "BOARD_ID=GENERIC_G0B1KEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1KEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1KEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1KEUX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1KEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1KEUX_MCU} +) +target_link_libraries(GENERIC_G0B1KEUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1KEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1KEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1KEUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1KEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1KEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1KEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1KEUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1KEUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1MBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1MBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T") +set(GENERIC_G0B1MBTX_MAXSIZE 131072) +set(GENERIC_G0B1MBTX_MAXDATASIZE 147456) +set(GENERIC_G0B1MBTX_MCU cortex-m0plus) +set(GENERIC_G0B1MBTX_FPCONF "-") +add_library(GENERIC_G0B1MBTX INTERFACE) +target_compile_options(GENERIC_G0B1MBTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1MBTX_MCU} +) +target_compile_definitions(GENERIC_G0B1MBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1MBTX" + "BOARD_NAME=\"GENERIC_G0B1MBTX\"" + "BOARD_ID=GENERIC_G0B1MBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1MBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1MBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1MBTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1MBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1MBTX_MCU} +) +target_link_libraries(GENERIC_G0B1MBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1MBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1MBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1MBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1MBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1MBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1MBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1MBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1MBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1MCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T") +set(GENERIC_G0B1MCTX_MAXSIZE 262144) +set(GENERIC_G0B1MCTX_MAXDATASIZE 147456) +set(GENERIC_G0B1MCTX_MCU cortex-m0plus) +set(GENERIC_G0B1MCTX_FPCONF "-") +add_library(GENERIC_G0B1MCTX INTERFACE) +target_compile_options(GENERIC_G0B1MCTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1MCTX_MCU} +) +target_compile_definitions(GENERIC_G0B1MCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1MCTX" + "BOARD_NAME=\"GENERIC_G0B1MCTX\"" + "BOARD_ID=GENERIC_G0B1MCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1MCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1MCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1MCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1MCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1MCTX_MCU} +) +target_link_libraries(GENERIC_G0B1MCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1MCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1MCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1MCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1MCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1MCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1MCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1MCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1MCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T") +set(GENERIC_G0B1METX_MAXSIZE 524288) +set(GENERIC_G0B1METX_MAXDATASIZE 147456) +set(GENERIC_G0B1METX_MCU cortex-m0plus) +set(GENERIC_G0B1METX_FPCONF "-") +add_library(GENERIC_G0B1METX INTERFACE) +target_compile_options(GENERIC_G0B1METX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1METX_MCU} +) +target_compile_definitions(GENERIC_G0B1METX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1METX" + "BOARD_NAME=\"GENERIC_G0B1METX\"" + "BOARD_ID=GENERIC_G0B1METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1METX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1METX_MCU} +) +target_link_libraries(GENERIC_G0B1METX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1METX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1METX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1METX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1NEYX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1NEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1NEY_G0C1NEY") +set(GENERIC_G0B1NEYX_MAXSIZE 524288) +set(GENERIC_G0B1NEYX_MAXDATASIZE 147456) +set(GENERIC_G0B1NEYX_MCU cortex-m0plus) +set(GENERIC_G0B1NEYX_FPCONF "-") +add_library(GENERIC_G0B1NEYX INTERFACE) +target_compile_options(GENERIC_G0B1NEYX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1NEYX_MCU} +) +target_compile_definitions(GENERIC_G0B1NEYX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1NEYX" + "BOARD_NAME=\"GENERIC_G0B1NEYX\"" + "BOARD_ID=GENERIC_G0B1NEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1NEYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1NEYX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1NEYX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1NEYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1NEYX_MCU} +) +target_link_libraries(GENERIC_G0B1NEYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1NEYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1NEYX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1NEYX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1NEYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1NEYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1NEYX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1NEYX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1NEYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T") +set(GENERIC_G0B1RBTX_MAXSIZE 131072) +set(GENERIC_G0B1RBTX_MAXDATASIZE 147456) +set(GENERIC_G0B1RBTX_MCU cortex-m0plus) +set(GENERIC_G0B1RBTX_FPCONF "-") +add_library(GENERIC_G0B1RBTX INTERFACE) +target_compile_options(GENERIC_G0B1RBTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1RBTX_MCU} +) +target_compile_definitions(GENERIC_G0B1RBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1RBTX" + "BOARD_NAME=\"GENERIC_G0B1RBTX\"" + "BOARD_ID=GENERIC_G0B1RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1RBTX_MCU} +) +target_link_libraries(GENERIC_G0B1RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T") +set(GENERIC_G0B1RCTX_MAXSIZE 262144) +set(GENERIC_G0B1RCTX_MAXDATASIZE 147456) +set(GENERIC_G0B1RCTX_MCU cortex-m0plus) +set(GENERIC_G0B1RCTX_FPCONF "-") +add_library(GENERIC_G0B1RCTX INTERFACE) +target_compile_options(GENERIC_G0B1RCTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1RCTX_MCU} +) +target_compile_definitions(GENERIC_G0B1RCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1RCTX" + "BOARD_NAME=\"GENERIC_G0B1RCTX\"" + "BOARD_ID=GENERIC_G0B1RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1RCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1RCTX_MCU} +) +target_link_libraries(GENERIC_G0B1RCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1RCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T") +set(GENERIC_G0B1RETX_MAXSIZE 524288) +set(GENERIC_G0B1RETX_MAXDATASIZE 147456) +set(GENERIC_G0B1RETX_MCU cortex-m0plus) +set(GENERIC_G0B1RETX_FPCONF "-") +add_library(GENERIC_G0B1RETX INTERFACE) +target_compile_options(GENERIC_G0B1RETX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1RETX_MCU} +) +target_compile_definitions(GENERIC_G0B1RETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1RETX" + "BOARD_NAME=\"GENERIC_G0B1RETX\"" + "BOARD_ID=GENERIC_G0B1RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1RETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1RETX_MCU} +) +target_link_libraries(GENERIC_G0B1RETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1RETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1VBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1VBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0B1VBIX_MAXSIZE 131072) +set(GENERIC_G0B1VBIX_MAXDATASIZE 147456) +set(GENERIC_G0B1VBIX_MCU cortex-m0plus) +set(GENERIC_G0B1VBIX_FPCONF "-") +add_library(GENERIC_G0B1VBIX INTERFACE) +target_compile_options(GENERIC_G0B1VBIX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1VBIX_MCU} +) +target_compile_definitions(GENERIC_G0B1VBIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1VBIX" + "BOARD_NAME=\"GENERIC_G0B1VBIX\"" + "BOARD_ID=GENERIC_G0B1VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1VBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1VBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1VBIX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1VBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1VBIX_MCU} +) +target_link_libraries(GENERIC_G0B1VBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1VBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1VBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1VBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1VBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1VBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1VBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1VBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1VBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0B1VBTX_MAXSIZE 131072) +set(GENERIC_G0B1VBTX_MAXDATASIZE 147456) +set(GENERIC_G0B1VBTX_MCU cortex-m0plus) +set(GENERIC_G0B1VBTX_FPCONF "-") +add_library(GENERIC_G0B1VBTX INTERFACE) +target_compile_options(GENERIC_G0B1VBTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1VBTX_MCU} +) +target_compile_definitions(GENERIC_G0B1VBTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1VBTX" + "BOARD_NAME=\"GENERIC_G0B1VBTX\"" + "BOARD_ID=GENERIC_G0B1VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1VBTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1VBTX_MCU} +) +target_link_libraries(GENERIC_G0B1VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1VCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1VCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0B1VCIX_MAXSIZE 262144) +set(GENERIC_G0B1VCIX_MAXDATASIZE 147456) +set(GENERIC_G0B1VCIX_MCU cortex-m0plus) +set(GENERIC_G0B1VCIX_FPCONF "-") +add_library(GENERIC_G0B1VCIX INTERFACE) +target_compile_options(GENERIC_G0B1VCIX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1VCIX_MCU} +) +target_compile_definitions(GENERIC_G0B1VCIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1VCIX" + "BOARD_NAME=\"GENERIC_G0B1VCIX\"" + "BOARD_ID=GENERIC_G0B1VCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1VCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1VCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1VCIX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1VCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1VCIX_MCU} +) +target_link_libraries(GENERIC_G0B1VCIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1VCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1VCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1VCIX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1VCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1VCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1VCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1VCIX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1VCIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0B1VCTX_MAXSIZE 262144) +set(GENERIC_G0B1VCTX_MAXDATASIZE 147456) +set(GENERIC_G0B1VCTX_MCU cortex-m0plus) +set(GENERIC_G0B1VCTX_FPCONF "-") +add_library(GENERIC_G0B1VCTX INTERFACE) +target_compile_options(GENERIC_G0B1VCTX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1VCTX_MCU} +) +target_compile_definitions(GENERIC_G0B1VCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1VCTX" + "BOARD_NAME=\"GENERIC_G0B1VCTX\"" + "BOARD_ID=GENERIC_G0B1VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1VCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1VCTX_MCU} +) +target_link_libraries(GENERIC_G0B1VCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1VCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1VEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1VEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0B1VEIX_MAXSIZE 524288) +set(GENERIC_G0B1VEIX_MAXDATASIZE 147456) +set(GENERIC_G0B1VEIX_MCU cortex-m0plus) +set(GENERIC_G0B1VEIX_FPCONF "-") +add_library(GENERIC_G0B1VEIX INTERFACE) +target_compile_options(GENERIC_G0B1VEIX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1VEIX_MCU} +) +target_compile_definitions(GENERIC_G0B1VEIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1VEIX" + "BOARD_NAME=\"GENERIC_G0B1VEIX\"" + "BOARD_ID=GENERIC_G0B1VEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1VEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1VEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1VEIX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1VEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1VEIX_MCU} +) +target_link_libraries(GENERIC_G0B1VEIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1VEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1VEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1VEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1VEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1VEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1VEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1VEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1VEIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0B1VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0B1VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0B1VETX_MAXSIZE 524288) +set(GENERIC_G0B1VETX_MAXDATASIZE 147456) +set(GENERIC_G0B1VETX_MCU cortex-m0plus) +set(GENERIC_G0B1VETX_FPCONF "-") +add_library(GENERIC_G0B1VETX INTERFACE) +target_compile_options(GENERIC_G0B1VETX INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0B1VETX_MCU} +) +target_compile_definitions(GENERIC_G0B1VETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0B1VETX" + "BOARD_NAME=\"GENERIC_G0B1VETX\"" + "BOARD_ID=GENERIC_G0B1VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0B1VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0B1VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0B1VETX INTERFACE + "LINKER:--default-script=${GENERIC_G0B1VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0B1VETX_MCU} +) +target_link_libraries(GENERIC_G0B1VETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0B1VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0B1VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0B1VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0B1VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0B1VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0B1VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0B1VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0B1VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0B1VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0B1VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0B1VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0B1VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0B1VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0B1VETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0C1CCTX_MAXSIZE 262144) +set(GENERIC_G0C1CCTX_MAXDATASIZE 147456) +set(GENERIC_G0C1CCTX_MCU cortex-m0plus) +set(GENERIC_G0C1CCTX_FPCONF "-") +add_library(GENERIC_G0C1CCTX INTERFACE) +target_compile_options(GENERIC_G0C1CCTX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1CCTX_MCU} +) +target_compile_definitions(GENERIC_G0C1CCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1CCTX" + "BOARD_NAME=\"GENERIC_G0C1CCTX\"" + "BOARD_ID=GENERIC_G0C1CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1CCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1CCTX_MCU} +) +target_link_libraries(GENERIC_G0C1CCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1CCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0C1CCUX_MAXSIZE 262144) +set(GENERIC_G0C1CCUX_MAXDATASIZE 147456) +set(GENERIC_G0C1CCUX_MCU cortex-m0plus) +set(GENERIC_G0C1CCUX_FPCONF "-") +add_library(GENERIC_G0C1CCUX INTERFACE) +target_compile_options(GENERIC_G0C1CCUX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1CCUX_MCU} +) +target_compile_definitions(GENERIC_G0C1CCUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1CCUX" + "BOARD_NAME=\"GENERIC_G0C1CCUX\"" + "BOARD_ID=GENERIC_G0C1CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1CCUX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1CCUX_MCU} +) +target_link_libraries(GENERIC_G0C1CCUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1CCUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0C1CETX_MAXSIZE 524288) +set(GENERIC_G0C1CETX_MAXDATASIZE 147456) +set(GENERIC_G0C1CETX_MCU cortex-m0plus) +set(GENERIC_G0C1CETX_FPCONF "-") +add_library(GENERIC_G0C1CETX INTERFACE) +target_compile_options(GENERIC_G0C1CETX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1CETX_MCU} +) +target_compile_definitions(GENERIC_G0C1CETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1CETX" + "BOARD_NAME=\"GENERIC_G0C1CETX\"" + "BOARD_ID=GENERIC_G0C1CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1CETX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1CETX_MCU} +) +target_link_libraries(GENERIC_G0C1CETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1CETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)") +set(GENERIC_G0C1CEUX_MAXSIZE 524288) +set(GENERIC_G0C1CEUX_MAXDATASIZE 147456) +set(GENERIC_G0C1CEUX_MCU cortex-m0plus) +set(GENERIC_G0C1CEUX_FPCONF "-") +add_library(GENERIC_G0C1CEUX INTERFACE) +target_compile_options(GENERIC_G0C1CEUX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1CEUX_MCU} +) +target_compile_definitions(GENERIC_G0C1CEUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1CEUX" + "BOARD_NAME=\"GENERIC_G0C1CEUX\"" + "BOARD_ID=GENERIC_G0C1CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1CEUX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1CEUX_MCU} +) +target_link_libraries(GENERIC_G0C1CEUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1CEUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1KCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1KCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0C1KCTX_MAXSIZE 262144) +set(GENERIC_G0C1KCTX_MAXDATASIZE 147456) +set(GENERIC_G0C1KCTX_MCU cortex-m0plus) +set(GENERIC_G0C1KCTX_FPCONF "-") +add_library(GENERIC_G0C1KCTX INTERFACE) +target_compile_options(GENERIC_G0C1KCTX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1KCTX_MCU} +) +target_compile_definitions(GENERIC_G0C1KCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1KCTX" + "BOARD_NAME=\"GENERIC_G0C1KCTX\"" + "BOARD_ID=GENERIC_G0C1KCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1KCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1KCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1KCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1KCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1KCTX_MCU} +) +target_link_libraries(GENERIC_G0C1KCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1KCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1KCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1KCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1KCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1KCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1KCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1KCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1KCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1KCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1KCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0C1KCUX_MAXSIZE 262144) +set(GENERIC_G0C1KCUX_MAXDATASIZE 147456) +set(GENERIC_G0C1KCUX_MCU cortex-m0plus) +set(GENERIC_G0C1KCUX_FPCONF "-") +add_library(GENERIC_G0C1KCUX INTERFACE) +target_compile_options(GENERIC_G0C1KCUX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1KCUX_MCU} +) +target_compile_definitions(GENERIC_G0C1KCUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1KCUX" + "BOARD_NAME=\"GENERIC_G0C1KCUX\"" + "BOARD_ID=GENERIC_G0C1KCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1KCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1KCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1KCUX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1KCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1KCUX_MCU} +) +target_link_libraries(GENERIC_G0C1KCUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1KCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1KCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1KCUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1KCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1KCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1KCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1KCUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1KCUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1KETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1KETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0C1KETX_MAXSIZE 524288) +set(GENERIC_G0C1KETX_MAXDATASIZE 147456) +set(GENERIC_G0C1KETX_MCU cortex-m0plus) +set(GENERIC_G0C1KETX_FPCONF "-") +add_library(GENERIC_G0C1KETX INTERFACE) +target_compile_options(GENERIC_G0C1KETX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1KETX_MCU} +) +target_compile_definitions(GENERIC_G0C1KETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1KETX" + "BOARD_NAME=\"GENERIC_G0C1KETX\"" + "BOARD_ID=GENERIC_G0C1KETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1KETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1KETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1KETX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1KETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1KETX_MCU} +) +target_link_libraries(GENERIC_G0C1KETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1KETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1KETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1KETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1KETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1KETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1KETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1KETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1KETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1KETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1KETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1KETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1KETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1KETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1KETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1KEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1KEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)") +set(GENERIC_G0C1KEUX_MAXSIZE 524288) +set(GENERIC_G0C1KEUX_MAXDATASIZE 147456) +set(GENERIC_G0C1KEUX_MCU cortex-m0plus) +set(GENERIC_G0C1KEUX_FPCONF "-") +add_library(GENERIC_G0C1KEUX INTERFACE) +target_compile_options(GENERIC_G0C1KEUX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1KEUX_MCU} +) +target_compile_definitions(GENERIC_G0C1KEUX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1KEUX" + "BOARD_NAME=\"GENERIC_G0C1KEUX\"" + "BOARD_ID=GENERIC_G0C1KEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1KEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1KEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1KEUX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1KEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1KEUX_MCU} +) +target_link_libraries(GENERIC_G0C1KEUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1KEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1KEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1KEUX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1KEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1KEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1KEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1KEUX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1KEUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1MCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T") +set(GENERIC_G0C1MCTX_MAXSIZE 262144) +set(GENERIC_G0C1MCTX_MAXDATASIZE 147456) +set(GENERIC_G0C1MCTX_MCU cortex-m0plus) +set(GENERIC_G0C1MCTX_FPCONF "-") +add_library(GENERIC_G0C1MCTX INTERFACE) +target_compile_options(GENERIC_G0C1MCTX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1MCTX_MCU} +) +target_compile_definitions(GENERIC_G0C1MCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1MCTX" + "BOARD_NAME=\"GENERIC_G0C1MCTX\"" + "BOARD_ID=GENERIC_G0C1MCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1MCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1MCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1MCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1MCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1MCTX_MCU} +) +target_link_libraries(GENERIC_G0C1MCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1MCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1MCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1MCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1MCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1MCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1MCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1MCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1MCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T") +set(GENERIC_G0C1METX_MAXSIZE 524288) +set(GENERIC_G0C1METX_MAXDATASIZE 147456) +set(GENERIC_G0C1METX_MCU cortex-m0plus) +set(GENERIC_G0C1METX_FPCONF "-") +add_library(GENERIC_G0C1METX INTERFACE) +target_compile_options(GENERIC_G0C1METX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1METX_MCU} +) +target_compile_definitions(GENERIC_G0C1METX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1METX" + "BOARD_NAME=\"GENERIC_G0C1METX\"" + "BOARD_ID=GENERIC_G0C1METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1METX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1METX_MCU} +) +target_link_libraries(GENERIC_G0C1METX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1METX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1METX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1METX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1NEYX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1NEYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1NEY_G0C1NEY") +set(GENERIC_G0C1NEYX_MAXSIZE 524288) +set(GENERIC_G0C1NEYX_MAXDATASIZE 147456) +set(GENERIC_G0C1NEYX_MCU cortex-m0plus) +set(GENERIC_G0C1NEYX_FPCONF "-") +add_library(GENERIC_G0C1NEYX INTERFACE) +target_compile_options(GENERIC_G0C1NEYX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1NEYX_MCU} +) +target_compile_definitions(GENERIC_G0C1NEYX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1NEYX" + "BOARD_NAME=\"GENERIC_G0C1NEYX\"" + "BOARD_ID=GENERIC_G0C1NEYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1NEYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1NEYX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1NEYX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1NEYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1NEYX_MCU} +) +target_link_libraries(GENERIC_G0C1NEYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1NEYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1NEYX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1NEYX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1NEYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1NEYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1NEYX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1NEYX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1NEYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T") +set(GENERIC_G0C1RCTX_MAXSIZE 262144) +set(GENERIC_G0C1RCTX_MAXDATASIZE 147456) +set(GENERIC_G0C1RCTX_MCU cortex-m0plus) +set(GENERIC_G0C1RCTX_FPCONF "-") +add_library(GENERIC_G0C1RCTX INTERFACE) +target_compile_options(GENERIC_G0C1RCTX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1RCTX_MCU} +) +target_compile_definitions(GENERIC_G0C1RCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1RCTX" + "BOARD_NAME=\"GENERIC_G0C1RCTX\"" + "BOARD_ID=GENERIC_G0C1RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1RCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1RCTX_MCU} +) +target_link_libraries(GENERIC_G0C1RCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1RCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T") +set(GENERIC_G0C1RETX_MAXSIZE 524288) +set(GENERIC_G0C1RETX_MAXDATASIZE 147456) +set(GENERIC_G0C1RETX_MCU cortex-m0plus) +set(GENERIC_G0C1RETX_FPCONF "-") +add_library(GENERIC_G0C1RETX INTERFACE) +target_compile_options(GENERIC_G0C1RETX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1RETX_MCU} +) +target_compile_definitions(GENERIC_G0C1RETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1RETX" + "BOARD_NAME=\"GENERIC_G0C1RETX\"" + "BOARD_ID=GENERIC_G0C1RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1RETX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1RETX_MCU} +) +target_link_libraries(GENERIC_G0C1RETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1RETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1VCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1VCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0C1VCIX_MAXSIZE 262144) +set(GENERIC_G0C1VCIX_MAXDATASIZE 147456) +set(GENERIC_G0C1VCIX_MCU cortex-m0plus) +set(GENERIC_G0C1VCIX_FPCONF "-") +add_library(GENERIC_G0C1VCIX INTERFACE) +target_compile_options(GENERIC_G0C1VCIX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1VCIX_MCU} +) +target_compile_definitions(GENERIC_G0C1VCIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1VCIX" + "BOARD_NAME=\"GENERIC_G0C1VCIX\"" + "BOARD_ID=GENERIC_G0C1VCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1VCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1VCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1VCIX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1VCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1VCIX_MCU} +) +target_link_libraries(GENERIC_G0C1VCIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1VCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1VCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1VCIX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1VCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1VCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1VCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1VCIX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1VCIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0C1VCTX_MAXSIZE 262144) +set(GENERIC_G0C1VCTX_MAXDATASIZE 147456) +set(GENERIC_G0C1VCTX_MCU cortex-m0plus) +set(GENERIC_G0C1VCTX_FPCONF "-") +add_library(GENERIC_G0C1VCTX INTERFACE) +target_compile_options(GENERIC_G0C1VCTX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1VCTX_MCU} +) +target_compile_definitions(GENERIC_G0C1VCTX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1VCTX" + "BOARD_NAME=\"GENERIC_G0C1VCTX\"" + "BOARD_ID=GENERIC_G0C1VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1VCTX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1VCTX_MCU} +) +target_link_libraries(GENERIC_G0C1VCTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1VCTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1VEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1VEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0C1VEIX_MAXSIZE 524288) +set(GENERIC_G0C1VEIX_MAXDATASIZE 147456) +set(GENERIC_G0C1VEIX_MCU cortex-m0plus) +set(GENERIC_G0C1VEIX_FPCONF "-") +add_library(GENERIC_G0C1VEIX INTERFACE) +target_compile_options(GENERIC_G0C1VEIX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1VEIX_MCU} +) +target_compile_definitions(GENERIC_G0C1VEIX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1VEIX" + "BOARD_NAME=\"GENERIC_G0C1VEIX\"" + "BOARD_ID=GENERIC_G0C1VEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1VEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1VEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1VEIX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1VEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1VEIX_MCU} +) +target_link_libraries(GENERIC_G0C1VEIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1VEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1VEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1VEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1VEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1VEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1VEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1VEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1VEIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G0C1VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G0C1VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)") +set(GENERIC_G0C1VETX_MAXSIZE 524288) +set(GENERIC_G0C1VETX_MAXDATASIZE 147456) +set(GENERIC_G0C1VETX_MCU cortex-m0plus) +set(GENERIC_G0C1VETX_FPCONF "-") +add_library(GENERIC_G0C1VETX INTERFACE) +target_compile_options(GENERIC_G0C1VETX INTERFACE + "SHELL:-DSTM32G0C1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_G0C1VETX_MCU} +) +target_compile_definitions(GENERIC_G0C1VETX INTERFACE + "STM32G0xx" + "ARDUINO_GENERIC_G0C1VETX" + "BOARD_NAME=\"GENERIC_G0C1VETX\"" + "BOARD_ID=GENERIC_G0C1VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G0C1VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${GENERIC_G0C1VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G0C1VETX INTERFACE + "LINKER:--default-script=${GENERIC_G0C1VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${GENERIC_G0C1VETX_MCU} +) +target_link_libraries(GENERIC_G0C1VETX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_G0C1VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G0C1VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G0C1VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G0C1VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G0C1VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G0C1VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G0C1VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G0C1VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G0C1VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G0C1VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G0C1VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G0C1VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G0C1VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G0C1VETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_G431C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)T_G441CBT") +set(GENERIC_G431C6TX_MAXSIZE 32768) +set(GENERIC_G431C6TX_MAXDATASIZE 32768) +set(GENERIC_G431C6TX_MCU cortex-m4) +set(GENERIC_G431C6TX_FPCONF "-") +add_library(GENERIC_G431C6TX INTERFACE) +target_compile_options(GENERIC_G431C6TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C6TX_MCU} +) +target_compile_definitions(GENERIC_G431C6TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431C6TX" + "BOARD_NAME=\"GENERIC_G431C6TX\"" + "BOARD_ID=GENERIC_G431C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431C6TX INTERFACE + "LINKER:--default-script=${GENERIC_G431C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C6TX_MCU} +) +target_link_libraries(GENERIC_G431C6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431C6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431C6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431C6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431C6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431C6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)U_G441CBU") +set(GENERIC_G431C6UX_MAXSIZE 32768) +set(GENERIC_G431C6UX_MAXDATASIZE 32768) +set(GENERIC_G431C6UX_MCU cortex-m4) +set(GENERIC_G431C6UX_FPCONF "-") +add_library(GENERIC_G431C6UX INTERFACE) +target_compile_options(GENERIC_G431C6UX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C6UX_MCU} +) +target_compile_definitions(GENERIC_G431C6UX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431C6UX" + "BOARD_NAME=\"GENERIC_G431C6UX\"" + "BOARD_ID=GENERIC_G431C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431C6UX INTERFACE + "LINKER:--default-script=${GENERIC_G431C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C6UX_MCU} +) +target_link_libraries(GENERIC_G431C6UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G431C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G431C6UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C6UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431C6UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C6UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431C6UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431C6UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431C6UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)T_G441CBT") +set(GENERIC_G431C8TX_MAXSIZE 65536) +set(GENERIC_G431C8TX_MAXDATASIZE 32768) +set(GENERIC_G431C8TX_MCU cortex-m4) +set(GENERIC_G431C8TX_FPCONF "-") +add_library(GENERIC_G431C8TX INTERFACE) +target_compile_options(GENERIC_G431C8TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C8TX_MCU} +) +target_compile_definitions(GENERIC_G431C8TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431C8TX" + "BOARD_NAME=\"GENERIC_G431C8TX\"" + "BOARD_ID=GENERIC_G431C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431C8TX INTERFACE + "LINKER:--default-script=${GENERIC_G431C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C8TX_MCU} +) +target_link_libraries(GENERIC_G431C8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431C8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431C8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431C8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431C8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431C8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)U_G441CBU") +set(GENERIC_G431C8UX_MAXSIZE 65536) +set(GENERIC_G431C8UX_MAXDATASIZE 32768) +set(GENERIC_G431C8UX_MCU cortex-m4) +set(GENERIC_G431C8UX_FPCONF "-") +add_library(GENERIC_G431C8UX INTERFACE) +target_compile_options(GENERIC_G431C8UX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C8UX_MCU} +) +target_compile_definitions(GENERIC_G431C8UX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431C8UX" + "BOARD_NAME=\"GENERIC_G431C8UX\"" + "BOARD_ID=GENERIC_G431C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431C8UX INTERFACE + "LINKER:--default-script=${GENERIC_G431C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431C8UX_MCU} +) +target_link_libraries(GENERIC_G431C8UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G431C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G431C8UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C8UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431C8UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431C8UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431C8UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431C8UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431C8UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)T_G441CBT") +set(GENERIC_G431CBTX_MAXSIZE 131072) +set(GENERIC_G431CBTX_MAXDATASIZE 32768) +set(GENERIC_G431CBTX_MCU cortex-m4) +set(GENERIC_G431CBTX_FPCONF "-") +add_library(GENERIC_G431CBTX INTERFACE) +target_compile_options(GENERIC_G431CBTX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431CBTX_MCU} +) +target_compile_definitions(GENERIC_G431CBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431CBTX" + "BOARD_NAME=\"GENERIC_G431CBTX\"" + "BOARD_ID=GENERIC_G431CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G431CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431CBTX_MCU} +) +target_link_libraries(GENERIC_G431CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G431CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G431CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)U_G441CBU") +set(GENERIC_G431CBUX_MAXSIZE 131072) +set(GENERIC_G431CBUX_MAXDATASIZE 32768) +set(GENERIC_G431CBUX_MCU cortex-m4) +set(GENERIC_G431CBUX_FPCONF "-") +add_library(GENERIC_G431CBUX INTERFACE) +target_compile_options(GENERIC_G431CBUX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431CBUX_MCU} +) +target_compile_definitions(GENERIC_G431CBUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431CBUX" + "BOARD_NAME=\"GENERIC_G431CBUX\"" + "BOARD_ID=GENERIC_G431CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431CBUX INTERFACE + "LINKER:--default-script=${GENERIC_G431CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431CBUX_MCU} +) +target_link_libraries(GENERIC_G431CBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G431CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G431CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G431K6TX_MAXSIZE 32768) +set(GENERIC_G431K6TX_MAXDATASIZE 32768) +set(GENERIC_G431K6TX_MCU cortex-m4) +set(GENERIC_G431K6TX_FPCONF "-") +add_library(GENERIC_G431K6TX INTERFACE) +target_compile_options(GENERIC_G431K6TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K6TX_MCU} +) +target_compile_definitions(GENERIC_G431K6TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431K6TX" + "BOARD_NAME=\"GENERIC_G431K6TX\"" + "BOARD_ID=GENERIC_G431K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431K6TX INTERFACE + "LINKER:--default-script=${GENERIC_G431K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K6TX_MCU} +) +target_link_libraries(GENERIC_G431K6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431K6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431K6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431K6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431K6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431K6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431K6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431K6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G431K6UX_MAXSIZE 32768) +set(GENERIC_G431K6UX_MAXDATASIZE 32768) +set(GENERIC_G431K6UX_MCU cortex-m4) +set(GENERIC_G431K6UX_FPCONF "-") +add_library(GENERIC_G431K6UX INTERFACE) +target_compile_options(GENERIC_G431K6UX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K6UX_MCU} +) +target_compile_definitions(GENERIC_G431K6UX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431K6UX" + "BOARD_NAME=\"GENERIC_G431K6UX\"" + "BOARD_ID=GENERIC_G431K6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431K6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431K6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431K6UX INTERFACE + "LINKER:--default-script=${GENERIC_G431K6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K6UX_MCU} +) +target_link_libraries(GENERIC_G431K6UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431K6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431K6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431K6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431K6UX_serial_none INTERFACE) +target_compile_options(GENERIC_G431K6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431K6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431K6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431K6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431K6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431K6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431K6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431K6UX_usb_none INTERFACE) +target_compile_options(GENERIC_G431K6UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K6UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431K6UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K6UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431K6UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431K6UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431K6UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G431K8TX_MAXSIZE 65536) +set(GENERIC_G431K8TX_MAXDATASIZE 32768) +set(GENERIC_G431K8TX_MCU cortex-m4) +set(GENERIC_G431K8TX_FPCONF "-") +add_library(GENERIC_G431K8TX INTERFACE) +target_compile_options(GENERIC_G431K8TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K8TX_MCU} +) +target_compile_definitions(GENERIC_G431K8TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431K8TX" + "BOARD_NAME=\"GENERIC_G431K8TX\"" + "BOARD_ID=GENERIC_G431K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431K8TX INTERFACE + "LINKER:--default-script=${GENERIC_G431K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K8TX_MCU} +) +target_link_libraries(GENERIC_G431K8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431K8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431K8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431K8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431K8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431K8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G431K8UX_MAXSIZE 65536) +set(GENERIC_G431K8UX_MAXDATASIZE 32768) +set(GENERIC_G431K8UX_MCU cortex-m4) +set(GENERIC_G431K8UX_FPCONF "-") +add_library(GENERIC_G431K8UX INTERFACE) +target_compile_options(GENERIC_G431K8UX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K8UX_MCU} +) +target_compile_definitions(GENERIC_G431K8UX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431K8UX" + "BOARD_NAME=\"GENERIC_G431K8UX\"" + "BOARD_ID=GENERIC_G431K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431K8UX INTERFACE + "LINKER:--default-script=${GENERIC_G431K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431K8UX_MCU} +) +target_link_libraries(GENERIC_G431K8UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_G431K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_G431K8UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K8UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431K8UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431K8UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431K8UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431K8UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431K8UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G431KBTX_MAXSIZE 131072) +set(GENERIC_G431KBTX_MAXDATASIZE 32768) +set(GENERIC_G431KBTX_MCU cortex-m4) +set(GENERIC_G431KBTX_FPCONF "-") +add_library(GENERIC_G431KBTX INTERFACE) +target_compile_options(GENERIC_G431KBTX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431KBTX_MCU} +) +target_compile_definitions(GENERIC_G431KBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431KBTX" + "BOARD_NAME=\"GENERIC_G431KBTX\"" + "BOARD_ID=GENERIC_G431KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431KBTX INTERFACE + "LINKER:--default-script=${GENERIC_G431KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431KBTX_MCU} +) +target_link_libraries(GENERIC_G431KBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G431KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G431KBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431KBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431KBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431KBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431KBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431KBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431KBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G431KBUX_MAXSIZE 131072) +set(GENERIC_G431KBUX_MAXDATASIZE 32768) +set(GENERIC_G431KBUX_MCU cortex-m4) +set(GENERIC_G431KBUX_FPCONF "-") +add_library(GENERIC_G431KBUX INTERFACE) +target_compile_options(GENERIC_G431KBUX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431KBUX_MCU} +) +target_compile_definitions(GENERIC_G431KBUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431KBUX" + "BOARD_NAME=\"GENERIC_G431KBUX\"" + "BOARD_ID=GENERIC_G431KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431KBUX INTERFACE + "LINKER:--default-script=${GENERIC_G431KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431KBUX_MCU} +) +target_link_libraries(GENERIC_G431KBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G431KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G431KBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431KBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431KBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431KBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431KBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431KBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431KBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431M6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431M6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431M(6-8-B)T_G441MBT") +set(GENERIC_G431M6TX_MAXSIZE 32768) +set(GENERIC_G431M6TX_MAXDATASIZE 32768) +set(GENERIC_G431M6TX_MCU cortex-m4) +set(GENERIC_G431M6TX_FPCONF "-") +add_library(GENERIC_G431M6TX INTERFACE) +target_compile_options(GENERIC_G431M6TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431M6TX_MCU} +) +target_compile_definitions(GENERIC_G431M6TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431M6TX" + "BOARD_NAME=\"GENERIC_G431M6TX\"" + "BOARD_ID=GENERIC_G431M6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431M6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431M6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431M6TX INTERFACE + "LINKER:--default-script=${GENERIC_G431M6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431M6TX_MCU} +) +target_link_libraries(GENERIC_G431M6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431M6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431M6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431M6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431M6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431M6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431M6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431M6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431M6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431M6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431M6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431M6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431M6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431M6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431M6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431M6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431M6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431M6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431M6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431M6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431M6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431M8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431M8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431M(6-8-B)T_G441MBT") +set(GENERIC_G431M8TX_MAXSIZE 65536) +set(GENERIC_G431M8TX_MAXDATASIZE 32768) +set(GENERIC_G431M8TX_MCU cortex-m4) +set(GENERIC_G431M8TX_FPCONF "-") +add_library(GENERIC_G431M8TX INTERFACE) +target_compile_options(GENERIC_G431M8TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431M8TX_MCU} +) +target_compile_definitions(GENERIC_G431M8TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431M8TX" + "BOARD_NAME=\"GENERIC_G431M8TX\"" + "BOARD_ID=GENERIC_G431M8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431M8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431M8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431M8TX INTERFACE + "LINKER:--default-script=${GENERIC_G431M8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431M8TX_MCU} +) +target_link_libraries(GENERIC_G431M8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431M8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431M8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431M8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431M8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431M8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431M8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431M8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431M8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431M8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431M8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431M8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431M8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431M8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431M8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431M8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431M8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431M8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431M8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431M8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431M8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431MBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431MBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431M(6-8-B)T_G441MBT") +set(GENERIC_G431MBTX_MAXSIZE 131072) +set(GENERIC_G431MBTX_MAXDATASIZE 32768) +set(GENERIC_G431MBTX_MCU cortex-m4) +set(GENERIC_G431MBTX_FPCONF "-") +add_library(GENERIC_G431MBTX INTERFACE) +target_compile_options(GENERIC_G431MBTX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431MBTX_MCU} +) +target_compile_definitions(GENERIC_G431MBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431MBTX" + "BOARD_NAME=\"GENERIC_G431MBTX\"" + "BOARD_ID=GENERIC_G431MBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431MBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431MBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431MBTX INTERFACE + "LINKER:--default-script=${GENERIC_G431MBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431MBTX_MCU} +) +target_link_libraries(GENERIC_G431MBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431MBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431MBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431MBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431MBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431MBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G431MBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431MBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431MBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431MBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431MBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431MBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431MBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431MBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G431MBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431MBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431MBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431MBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431MBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431MBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431MBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431R6IX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431R6IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G431R6IX_MAXSIZE 32768) +set(GENERIC_G431R6IX_MAXDATASIZE 32768) +set(GENERIC_G431R6IX_MCU cortex-m4) +set(GENERIC_G431R6IX_FPCONF "-") +add_library(GENERIC_G431R6IX INTERFACE) +target_compile_options(GENERIC_G431R6IX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R6IX_MCU} +) +target_compile_definitions(GENERIC_G431R6IX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431R6IX" + "BOARD_NAME=\"GENERIC_G431R6IX\"" + "BOARD_ID=GENERIC_G431R6IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431R6IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431R6IX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431R6IX INTERFACE + "LINKER:--default-script=${GENERIC_G431R6IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R6IX_MCU} +) +target_link_libraries(GENERIC_G431R6IX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431R6IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431R6IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R6IX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431R6IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431R6IX_serial_none INTERFACE) +target_compile_options(GENERIC_G431R6IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431R6IX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431R6IX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431R6IX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431R6IX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431R6IX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431R6IX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431R6IX_usb_none INTERFACE) +target_compile_options(GENERIC_G431R6IX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R6IX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431R6IX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R6IX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431R6IX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431R6IX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431R6IX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G431R6TX_MAXSIZE 32768) +set(GENERIC_G431R6TX_MAXDATASIZE 32768) +set(GENERIC_G431R6TX_MCU cortex-m4) +set(GENERIC_G431R6TX_FPCONF "-") +add_library(GENERIC_G431R6TX INTERFACE) +target_compile_options(GENERIC_G431R6TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R6TX_MCU} +) +target_compile_definitions(GENERIC_G431R6TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431R6TX" + "BOARD_NAME=\"GENERIC_G431R6TX\"" + "BOARD_ID=GENERIC_G431R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431R6TX INTERFACE + "LINKER:--default-script=${GENERIC_G431R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R6TX_MCU} +) +target_link_libraries(GENERIC_G431R6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431R6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431R6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431R6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431R6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431R6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431R8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431R8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G431R8IX_MAXSIZE 65536) +set(GENERIC_G431R8IX_MAXDATASIZE 32768) +set(GENERIC_G431R8IX_MCU cortex-m4) +set(GENERIC_G431R8IX_FPCONF "-") +add_library(GENERIC_G431R8IX INTERFACE) +target_compile_options(GENERIC_G431R8IX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R8IX_MCU} +) +target_compile_definitions(GENERIC_G431R8IX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431R8IX" + "BOARD_NAME=\"GENERIC_G431R8IX\"" + "BOARD_ID=GENERIC_G431R8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431R8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431R8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431R8IX INTERFACE + "LINKER:--default-script=${GENERIC_G431R8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R8IX_MCU} +) +target_link_libraries(GENERIC_G431R8IX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431R8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431R8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431R8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431R8IX_serial_none INTERFACE) +target_compile_options(GENERIC_G431R8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431R8IX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431R8IX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431R8IX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431R8IX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431R8IX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431R8IX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431R8IX_usb_none INTERFACE) +target_compile_options(GENERIC_G431R8IX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R8IX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431R8IX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R8IX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431R8IX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431R8IX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431R8IX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G431R8TX_MAXSIZE 65536) +set(GENERIC_G431R8TX_MAXDATASIZE 32768) +set(GENERIC_G431R8TX_MCU cortex-m4) +set(GENERIC_G431R8TX_FPCONF "-") +add_library(GENERIC_G431R8TX INTERFACE) +target_compile_options(GENERIC_G431R8TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R8TX_MCU} +) +target_compile_definitions(GENERIC_G431R8TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431R8TX" + "BOARD_NAME=\"GENERIC_G431R8TX\"" + "BOARD_ID=GENERIC_G431R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431R8TX INTERFACE + "LINKER:--default-script=${GENERIC_G431R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431R8TX_MCU} +) +target_link_libraries(GENERIC_G431R8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431R8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431R8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431R8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431R8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431R8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431R8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G431RBIX_MAXSIZE 131072) +set(GENERIC_G431RBIX_MAXDATASIZE 32768) +set(GENERIC_G431RBIX_MCU cortex-m4) +set(GENERIC_G431RBIX_FPCONF "-") +add_library(GENERIC_G431RBIX INTERFACE) +target_compile_options(GENERIC_G431RBIX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431RBIX_MCU} +) +target_compile_definitions(GENERIC_G431RBIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431RBIX" + "BOARD_NAME=\"GENERIC_G431RBIX\"" + "BOARD_ID=GENERIC_G431RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431RBIX INTERFACE + "LINKER:--default-script=${GENERIC_G431RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431RBIX_MCU} +) +target_link_libraries(GENERIC_G431RBIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G431RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G431RBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431RBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431RBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431RBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431RBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431RBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431RBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G431RBTX_MAXSIZE 131072) +set(GENERIC_G431RBTX_MAXDATASIZE 32768) +set(GENERIC_G431RBTX_MCU cortex-m4) +set(GENERIC_G431RBTX_FPCONF "-") +add_library(GENERIC_G431RBTX INTERFACE) +target_compile_options(GENERIC_G431RBTX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431RBTX_MCU} +) +target_compile_definitions(GENERIC_G431RBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431RBTX" + "BOARD_NAME=\"GENERIC_G431RBTX\"" + "BOARD_ID=GENERIC_G431RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G431RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431RBTX_MCU} +) +target_link_libraries(GENERIC_G431RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G431RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G431RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431V6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431V6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431V(6-8-B)T_G441VBT") +set(GENERIC_G431V6TX_MAXSIZE 32768) +set(GENERIC_G431V6TX_MAXDATASIZE 32768) +set(GENERIC_G431V6TX_MCU cortex-m4) +set(GENERIC_G431V6TX_FPCONF "-") +add_library(GENERIC_G431V6TX INTERFACE) +target_compile_options(GENERIC_G431V6TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431V6TX_MCU} +) +target_compile_definitions(GENERIC_G431V6TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431V6TX" + "BOARD_NAME=\"GENERIC_G431V6TX\"" + "BOARD_ID=GENERIC_G431V6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431V6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431V6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431V6TX INTERFACE + "LINKER:--default-script=${GENERIC_G431V6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431V6TX_MCU} +) +target_link_libraries(GENERIC_G431V6TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431V6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431V6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431V6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431V6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431V6TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431V6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431V6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431V6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431V6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431V6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431V6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431V6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431V6TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431V6TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431V6TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431V6TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431V6TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431V6TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431V6TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431V6TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431V(6-8-B)T_G441VBT") +set(GENERIC_G431V8TX_MAXSIZE 65536) +set(GENERIC_G431V8TX_MAXDATASIZE 32768) +set(GENERIC_G431V8TX_MCU cortex-m4) +set(GENERIC_G431V8TX_FPCONF "-") +add_library(GENERIC_G431V8TX INTERFACE) +target_compile_options(GENERIC_G431V8TX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431V8TX_MCU} +) +target_compile_definitions(GENERIC_G431V8TX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431V8TX" + "BOARD_NAME=\"GENERIC_G431V8TX\"" + "BOARD_ID=GENERIC_G431V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431V8TX INTERFACE + "LINKER:--default-script=${GENERIC_G431V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431V8TX_MCU} +) +target_link_libraries(GENERIC_G431V8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_G431V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_G431V8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431V8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431V8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431V8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431V8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431V8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431V8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G431VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G431VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431V(6-8-B)T_G441VBT") +set(GENERIC_G431VBTX_MAXSIZE 131072) +set(GENERIC_G431VBTX_MAXDATASIZE 32768) +set(GENERIC_G431VBTX_MCU cortex-m4) +set(GENERIC_G431VBTX_FPCONF "-") +add_library(GENERIC_G431VBTX INTERFACE) +target_compile_options(GENERIC_G431VBTX INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431VBTX_MCU} +) +target_compile_definitions(GENERIC_G431VBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G431VBTX" + "BOARD_NAME=\"GENERIC_G431VBTX\"" + "BOARD_ID=GENERIC_G431VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G431VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G431VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G431VBTX INTERFACE + "LINKER:--default-script=${GENERIC_G431VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G431VBTX_MCU} +) +target_link_libraries(GENERIC_G431VBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G431VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G431VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G431VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G431VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G431VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G431VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G431VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G431VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G431VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G431VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G431VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G431VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G431VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G431VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G431VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G431VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G431VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G431VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G431VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G431VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)T_G441CBT") +set(GENERIC_G441CBTX_MAXSIZE 131072) +set(GENERIC_G441CBTX_MAXDATASIZE 32768) +set(GENERIC_G441CBTX_MCU cortex-m4) +set(GENERIC_G441CBTX_FPCONF "-") +add_library(GENERIC_G441CBTX INTERFACE) +target_compile_options(GENERIC_G441CBTX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441CBTX_MCU} +) +target_compile_definitions(GENERIC_G441CBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441CBTX" + "BOARD_NAME=\"GENERIC_G441CBTX\"" + "BOARD_ID=GENERIC_G441CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G441CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441CBTX_MCU} +) +target_link_libraries(GENERIC_G441CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G441CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G441CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)U_G441CBU") +set(GENERIC_G441CBUX_MAXSIZE 131072) +set(GENERIC_G441CBUX_MAXDATASIZE 32768) +set(GENERIC_G441CBUX_MCU cortex-m4) +set(GENERIC_G441CBUX_FPCONF "-") +add_library(GENERIC_G441CBUX INTERFACE) +target_compile_options(GENERIC_G441CBUX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441CBUX_MCU} +) +target_compile_definitions(GENERIC_G441CBUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441CBUX" + "BOARD_NAME=\"GENERIC_G441CBUX\"" + "BOARD_ID=GENERIC_G441CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441CBUX INTERFACE + "LINKER:--default-script=${GENERIC_G441CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441CBUX_MCU} +) +target_link_libraries(GENERIC_G441CBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G441CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G441CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G441KBTX_MAXSIZE 131072) +set(GENERIC_G441KBTX_MAXDATASIZE 32768) +set(GENERIC_G441KBTX_MCU cortex-m4) +set(GENERIC_G441KBTX_FPCONF "-") +add_library(GENERIC_G441KBTX INTERFACE) +target_compile_options(GENERIC_G441KBTX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441KBTX_MCU} +) +target_compile_definitions(GENERIC_G441KBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441KBTX" + "BOARD_NAME=\"GENERIC_G441KBTX\"" + "BOARD_ID=GENERIC_G441KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441KBTX INTERFACE + "LINKER:--default-script=${GENERIC_G441KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441KBTX_MCU} +) +target_link_libraries(GENERIC_G441KBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G441KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G441KBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441KBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441KBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441KBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441KBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441KBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441KBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(GENERIC_G441KBUX_MAXSIZE 131072) +set(GENERIC_G441KBUX_MAXDATASIZE 32768) +set(GENERIC_G441KBUX_MCU cortex-m4) +set(GENERIC_G441KBUX_FPCONF "-") +add_library(GENERIC_G441KBUX INTERFACE) +target_compile_options(GENERIC_G441KBUX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441KBUX_MCU} +) +target_compile_definitions(GENERIC_G441KBUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441KBUX" + "BOARD_NAME=\"GENERIC_G441KBUX\"" + "BOARD_ID=GENERIC_G441KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441KBUX INTERFACE + "LINKER:--default-script=${GENERIC_G441KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441KBUX_MCU} +) +target_link_libraries(GENERIC_G441KBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_G441KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_G441KBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441KBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441KBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441KBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441KBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441KBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441KBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441MBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441MBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431M(6-8-B)T_G441MBT") +set(GENERIC_G441MBTX_MAXSIZE 131072) +set(GENERIC_G441MBTX_MAXDATASIZE 32768) +set(GENERIC_G441MBTX_MCU cortex-m4) +set(GENERIC_G441MBTX_FPCONF "-") +add_library(GENERIC_G441MBTX INTERFACE) +target_compile_options(GENERIC_G441MBTX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441MBTX_MCU} +) +target_compile_definitions(GENERIC_G441MBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441MBTX" + "BOARD_NAME=\"GENERIC_G441MBTX\"" + "BOARD_ID=GENERIC_G441MBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441MBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441MBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441MBTX INTERFACE + "LINKER:--default-script=${GENERIC_G441MBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441MBTX_MCU} +) +target_link_libraries(GENERIC_G441MBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441MBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441MBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441MBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441MBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441MBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G441MBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441MBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441MBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441MBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441MBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441MBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441MBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441MBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G441MBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441MBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441MBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441MBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441MBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441MBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441MBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G441RBIX_MAXSIZE 131072) +set(GENERIC_G441RBIX_MAXDATASIZE 32768) +set(GENERIC_G441RBIX_MCU cortex-m4) +set(GENERIC_G441RBIX_FPCONF "-") +add_library(GENERIC_G441RBIX INTERFACE) +target_compile_options(GENERIC_G441RBIX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441RBIX_MCU} +) +target_compile_definitions(GENERIC_G441RBIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441RBIX" + "BOARD_NAME=\"GENERIC_G441RBIX\"" + "BOARD_ID=GENERIC_G441RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441RBIX INTERFACE + "LINKER:--default-script=${GENERIC_G441RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441RBIX_MCU} +) +target_link_libraries(GENERIC_G441RBIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G441RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G441RBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441RBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441RBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441RBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441RBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441RBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441RBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(GENERIC_G441RBTX_MAXSIZE 131072) +set(GENERIC_G441RBTX_MAXDATASIZE 32768) +set(GENERIC_G441RBTX_MCU cortex-m4) +set(GENERIC_G441RBTX_FPCONF "-") +add_library(GENERIC_G441RBTX INTERFACE) +target_compile_options(GENERIC_G441RBTX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441RBTX_MCU} +) +target_compile_definitions(GENERIC_G441RBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441RBTX" + "BOARD_NAME=\"GENERIC_G441RBTX\"" + "BOARD_ID=GENERIC_G441RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G441RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441RBTX_MCU} +) +target_link_libraries(GENERIC_G441RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G441RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G441RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G441VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G441VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431V(6-8-B)T_G441VBT") +set(GENERIC_G441VBTX_MAXSIZE 131072) +set(GENERIC_G441VBTX_MAXDATASIZE 32768) +set(GENERIC_G441VBTX_MCU cortex-m4) +set(GENERIC_G441VBTX_FPCONF "-") +add_library(GENERIC_G441VBTX INTERFACE) +target_compile_options(GENERIC_G441VBTX INTERFACE + "SHELL:-DSTM32G441xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441VBTX_MCU} +) +target_compile_definitions(GENERIC_G441VBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G441VBTX" + "BOARD_NAME=\"GENERIC_G441VBTX\"" + "BOARD_ID=GENERIC_G441VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G441VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G441VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G441VBTX INTERFACE + "LINKER:--default-script=${GENERIC_G441VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G441VBTX_MCU} +) +target_link_libraries(GENERIC_G441VBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G441VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G441VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G441VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G441VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G441VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G441VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G441VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G441VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G441VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G441VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G441VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G441VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G441VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G441VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G441VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G441VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G441VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G441VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G441VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G441VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471C(C-E)T") +set(GENERIC_G471CCTX_MAXSIZE 262144) +set(GENERIC_G471CCTX_MAXDATASIZE 131072) +set(GENERIC_G471CCTX_MCU cortex-m4) +set(GENERIC_G471CCTX_FPCONF "-") +add_library(GENERIC_G471CCTX INTERFACE) +target_compile_options(GENERIC_G471CCTX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471CCTX_MCU} +) +target_compile_definitions(GENERIC_G471CCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471CCTX" + "BOARD_NAME=\"GENERIC_G471CCTX\"" + "BOARD_ID=GENERIC_G471CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471CCTX INTERFACE + "LINKER:--default-script=${GENERIC_G471CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471CCTX_MCU} +) +target_link_libraries(GENERIC_G471CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G471CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G471CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471C(C-E)T") +set(GENERIC_G471CETX_MAXSIZE 524288) +set(GENERIC_G471CETX_MAXDATASIZE 131072) +set(GENERIC_G471CETX_MCU cortex-m4) +set(GENERIC_G471CETX_FPCONF "-") +add_library(GENERIC_G471CETX INTERFACE) +target_compile_options(GENERIC_G471CETX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471CETX_MCU} +) +target_compile_definitions(GENERIC_G471CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471CETX" + "BOARD_NAME=\"GENERIC_G471CETX\"" + "BOARD_ID=GENERIC_G471CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471CETX INTERFACE + "LINKER:--default-script=${GENERIC_G471CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471CETX_MCU} +) +target_link_libraries(GENERIC_G471CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G471CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G471CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471MCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471M(C-E)T") +set(GENERIC_G471MCTX_MAXSIZE 262144) +set(GENERIC_G471MCTX_MAXDATASIZE 131072) +set(GENERIC_G471MCTX_MCU cortex-m4) +set(GENERIC_G471MCTX_FPCONF "-") +add_library(GENERIC_G471MCTX INTERFACE) +target_compile_options(GENERIC_G471MCTX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471MCTX_MCU} +) +target_compile_definitions(GENERIC_G471MCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471MCTX" + "BOARD_NAME=\"GENERIC_G471MCTX\"" + "BOARD_ID=GENERIC_G471MCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471MCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471MCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471MCTX INTERFACE + "LINKER:--default-script=${GENERIC_G471MCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471MCTX_MCU} +) +target_link_libraries(GENERIC_G471MCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471MCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471MCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471MCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471MCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471MCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G471MCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471MCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471MCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471MCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471MCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471MCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471MCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471MCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G471MCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471MCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471MCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471MCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471MCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471MCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471MCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471M(C-E)T") +set(GENERIC_G471METX_MAXSIZE 524288) +set(GENERIC_G471METX_MAXDATASIZE 131072) +set(GENERIC_G471METX_MCU cortex-m4) +set(GENERIC_G471METX_FPCONF "-") +add_library(GENERIC_G471METX INTERFACE) +target_compile_options(GENERIC_G471METX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471METX_MCU} +) +target_compile_definitions(GENERIC_G471METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471METX" + "BOARD_NAME=\"GENERIC_G471METX\"" + "BOARD_ID=GENERIC_G471METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471METX INTERFACE + "LINKER:--default-script=${GENERIC_G471METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471METX_MCU} +) +target_link_libraries(GENERIC_G471METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471METX_serial_none INTERFACE) +target_compile_options(GENERIC_G471METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471METX_usb_none INTERFACE) +target_compile_options(GENERIC_G471METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471QCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471QCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471Q(C-E)T") +set(GENERIC_G471QCTX_MAXSIZE 262144) +set(GENERIC_G471QCTX_MAXDATASIZE 131072) +set(GENERIC_G471QCTX_MCU cortex-m4) +set(GENERIC_G471QCTX_FPCONF "-") +add_library(GENERIC_G471QCTX INTERFACE) +target_compile_options(GENERIC_G471QCTX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471QCTX_MCU} +) +target_compile_definitions(GENERIC_G471QCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471QCTX" + "BOARD_NAME=\"GENERIC_G471QCTX\"" + "BOARD_ID=GENERIC_G471QCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471QCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471QCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471QCTX INTERFACE + "LINKER:--default-script=${GENERIC_G471QCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471QCTX_MCU} +) +target_link_libraries(GENERIC_G471QCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471QCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471QCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471QCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471QCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471QCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G471QCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471QCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471QCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471QCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471QCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471QCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471QCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471QCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G471QCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471QCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471QCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471QCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471QCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471QCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471QCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471QETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471QETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471Q(C-E)T") +set(GENERIC_G471QETX_MAXSIZE 524288) +set(GENERIC_G471QETX_MAXDATASIZE 131072) +set(GENERIC_G471QETX_MCU cortex-m4) +set(GENERIC_G471QETX_FPCONF "-") +add_library(GENERIC_G471QETX INTERFACE) +target_compile_options(GENERIC_G471QETX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471QETX_MCU} +) +target_compile_definitions(GENERIC_G471QETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471QETX" + "BOARD_NAME=\"GENERIC_G471QETX\"" + "BOARD_ID=GENERIC_G471QETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471QETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471QETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471QETX INTERFACE + "LINKER:--default-script=${GENERIC_G471QETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471QETX_MCU} +) +target_link_libraries(GENERIC_G471QETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471QETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471QETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471QETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471QETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471QETX_serial_none INTERFACE) +target_compile_options(GENERIC_G471QETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471QETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471QETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471QETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471QETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471QETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471QETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471QETX_usb_none INTERFACE) +target_compile_options(GENERIC_G471QETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471QETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471QETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471QETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471QETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471QETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471QETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471R(C-E)T") +set(GENERIC_G471RCTX_MAXSIZE 262144) +set(GENERIC_G471RCTX_MAXDATASIZE 131072) +set(GENERIC_G471RCTX_MCU cortex-m4) +set(GENERIC_G471RCTX_FPCONF "-") +add_library(GENERIC_G471RCTX INTERFACE) +target_compile_options(GENERIC_G471RCTX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471RCTX_MCU} +) +target_compile_definitions(GENERIC_G471RCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471RCTX" + "BOARD_NAME=\"GENERIC_G471RCTX\"" + "BOARD_ID=GENERIC_G471RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471RCTX INTERFACE + "LINKER:--default-script=${GENERIC_G471RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471RCTX_MCU} +) +target_link_libraries(GENERIC_G471RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G471RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G471RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471R(C-E)T") +set(GENERIC_G471RETX_MAXSIZE 524288) +set(GENERIC_G471RETX_MAXDATASIZE 131072) +set(GENERIC_G471RETX_MCU cortex-m4) +set(GENERIC_G471RETX_FPCONF "-") +add_library(GENERIC_G471RETX INTERFACE) +target_compile_options(GENERIC_G471RETX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471RETX_MCU} +) +target_compile_definitions(GENERIC_G471RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471RETX" + "BOARD_NAME=\"GENERIC_G471RETX\"" + "BOARD_ID=GENERIC_G471RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471RETX INTERFACE + "LINKER:--default-script=${GENERIC_G471RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471RETX_MCU} +) +target_link_libraries(GENERIC_G471RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G471RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G471RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471V(C-E)(H-I-T)") +set(GENERIC_G471VCHX_MAXSIZE 262144) +set(GENERIC_G471VCHX_MAXDATASIZE 131072) +set(GENERIC_G471VCHX_MCU cortex-m4) +set(GENERIC_G471VCHX_FPCONF "-") +add_library(GENERIC_G471VCHX INTERFACE) +target_compile_options(GENERIC_G471VCHX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VCHX_MCU} +) +target_compile_definitions(GENERIC_G471VCHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471VCHX" + "BOARD_NAME=\"GENERIC_G471VCHX\"" + "BOARD_ID=GENERIC_G471VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471VCHX INTERFACE + "LINKER:--default-script=${GENERIC_G471VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VCHX_MCU} +) +target_link_libraries(GENERIC_G471VCHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_G471VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_G471VCHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471VCHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471VCHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471VCHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471VCHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471VCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471VCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471V(C-E)(H-I-T)") +set(GENERIC_G471VCIX_MAXSIZE 262144) +set(GENERIC_G471VCIX_MAXDATASIZE 131072) +set(GENERIC_G471VCIX_MCU cortex-m4) +set(GENERIC_G471VCIX_FPCONF "-") +add_library(GENERIC_G471VCIX INTERFACE) +target_compile_options(GENERIC_G471VCIX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VCIX_MCU} +) +target_compile_definitions(GENERIC_G471VCIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471VCIX" + "BOARD_NAME=\"GENERIC_G471VCIX\"" + "BOARD_ID=GENERIC_G471VCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471VCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471VCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471VCIX INTERFACE + "LINKER:--default-script=${GENERIC_G471VCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VCIX_MCU} +) +target_link_libraries(GENERIC_G471VCIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471VCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471VCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471VCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471VCIX_serial_none INTERFACE) +target_compile_options(GENERIC_G471VCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471VCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471VCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471VCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471VCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471VCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471VCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471VCIX_usb_none INTERFACE) +target_compile_options(GENERIC_G471VCIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471VCIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471VCIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471VCIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471VCIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471V(C-E)(H-I-T)") +set(GENERIC_G471VCTX_MAXSIZE 262144) +set(GENERIC_G471VCTX_MAXDATASIZE 131072) +set(GENERIC_G471VCTX_MCU cortex-m4) +set(GENERIC_G471VCTX_FPCONF "-") +add_library(GENERIC_G471VCTX INTERFACE) +target_compile_options(GENERIC_G471VCTX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VCTX_MCU} +) +target_compile_definitions(GENERIC_G471VCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471VCTX" + "BOARD_NAME=\"GENERIC_G471VCTX\"" + "BOARD_ID=GENERIC_G471VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471VCTX INTERFACE + "LINKER:--default-script=${GENERIC_G471VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VCTX_MCU} +) +target_link_libraries(GENERIC_G471VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G471VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G471VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471VEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471V(C-E)(H-I-T)") +set(GENERIC_G471VEHX_MAXSIZE 524288) +set(GENERIC_G471VEHX_MAXDATASIZE 131072) +set(GENERIC_G471VEHX_MCU cortex-m4) +set(GENERIC_G471VEHX_FPCONF "-") +add_library(GENERIC_G471VEHX INTERFACE) +target_compile_options(GENERIC_G471VEHX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VEHX_MCU} +) +target_compile_definitions(GENERIC_G471VEHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471VEHX" + "BOARD_NAME=\"GENERIC_G471VEHX\"" + "BOARD_ID=GENERIC_G471VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471VEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471VEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471VEHX INTERFACE + "LINKER:--default-script=${GENERIC_G471VEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VEHX_MCU} +) +target_link_libraries(GENERIC_G471VEHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471VEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471VEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471VEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471VEHX_serial_none INTERFACE) +target_compile_options(GENERIC_G471VEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471VEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471VEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471VEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471VEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471VEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471VEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471VEHX_usb_none INTERFACE) +target_compile_options(GENERIC_G471VEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471VEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471VEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471VEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471VEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471VEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471VEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471V(C-E)(H-I-T)") +set(GENERIC_G471VEIX_MAXSIZE 524288) +set(GENERIC_G471VEIX_MAXDATASIZE 131072) +set(GENERIC_G471VEIX_MCU cortex-m4) +set(GENERIC_G471VEIX_FPCONF "-") +add_library(GENERIC_G471VEIX INTERFACE) +target_compile_options(GENERIC_G471VEIX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VEIX_MCU} +) +target_compile_definitions(GENERIC_G471VEIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471VEIX" + "BOARD_NAME=\"GENERIC_G471VEIX\"" + "BOARD_ID=GENERIC_G471VEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471VEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471VEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471VEIX INTERFACE + "LINKER:--default-script=${GENERIC_G471VEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VEIX_MCU} +) +target_link_libraries(GENERIC_G471VEIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471VEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471VEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471VEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471VEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G471VEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471VEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471VEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471VEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471VEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471VEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471VEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471VEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G471VEIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VEIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471VEIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VEIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471VEIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471VEIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471VEIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G471VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G471VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G471V(C-E)(H-I-T)") +set(GENERIC_G471VETX_MAXSIZE 524288) +set(GENERIC_G471VETX_MAXDATASIZE 131072) +set(GENERIC_G471VETX_MCU cortex-m4) +set(GENERIC_G471VETX_FPCONF "-") +add_library(GENERIC_G471VETX INTERFACE) +target_compile_options(GENERIC_G471VETX INTERFACE + "SHELL:-DSTM32G471xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VETX_MCU} +) +target_compile_definitions(GENERIC_G471VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G471VETX" + "BOARD_NAME=\"GENERIC_G471VETX\"" + "BOARD_ID=GENERIC_G471VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G471VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G471VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G471VETX INTERFACE + "LINKER:--default-script=${GENERIC_G471VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G471VETX_MCU} +) +target_link_libraries(GENERIC_G471VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G471VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G471VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G471VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G471VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G471VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G471VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G471VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G471VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G471VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G471VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G471VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G471VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G471VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G471VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G471VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G471VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G471VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G471VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G473CBTX_MAXSIZE 131072) +set(GENERIC_G473CBTX_MAXDATASIZE 131072) +set(GENERIC_G473CBTX_MCU cortex-m4) +set(GENERIC_G473CBTX_FPCONF "-") +add_library(GENERIC_G473CBTX INTERFACE) +target_compile_options(GENERIC_G473CBTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473CBTX_MCU} +) +target_compile_definitions(GENERIC_G473CBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473CBTX" + "BOARD_NAME=\"GENERIC_G473CBTX\"" + "BOARD_ID=GENERIC_G473CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G473CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473CBTX_MCU} +) +target_link_libraries(GENERIC_G473CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G473CCTX_MAXSIZE 262144) +set(GENERIC_G473CCTX_MAXDATASIZE 131072) +set(GENERIC_G473CCTX_MCU cortex-m4) +set(GENERIC_G473CCTX_FPCONF "-") +add_library(GENERIC_G473CCTX INTERFACE) +target_compile_options(GENERIC_G473CCTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473CCTX_MCU} +) +target_compile_definitions(GENERIC_G473CCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473CCTX" + "BOARD_NAME=\"GENERIC_G473CCTX\"" + "BOARD_ID=GENERIC_G473CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473CCTX INTERFACE + "LINKER:--default-script=${GENERIC_G473CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473CCTX_MCU} +) +target_link_libraries(GENERIC_G473CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G473CETX_MAXSIZE 524288) +set(GENERIC_G473CETX_MAXDATASIZE 131072) +set(GENERIC_G473CETX_MCU cortex-m4) +set(GENERIC_G473CETX_FPCONF "-") +add_library(GENERIC_G473CETX INTERFACE) +target_compile_options(GENERIC_G473CETX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473CETX_MCU} +) +target_compile_definitions(GENERIC_G473CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473CETX" + "BOARD_NAME=\"GENERIC_G473CETX\"" + "BOARD_ID=GENERIC_G473CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473CETX INTERFACE + "LINKER:--default-script=${GENERIC_G473CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473CETX_MCU} +) +target_link_libraries(GENERIC_G473CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G473CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G473CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473MBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473MBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G473MBTX_MAXSIZE 131072) +set(GENERIC_G473MBTX_MAXDATASIZE 131072) +set(GENERIC_G473MBTX_MCU cortex-m4) +set(GENERIC_G473MBTX_FPCONF "-") +add_library(GENERIC_G473MBTX INTERFACE) +target_compile_options(GENERIC_G473MBTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473MBTX_MCU} +) +target_compile_definitions(GENERIC_G473MBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473MBTX" + "BOARD_NAME=\"GENERIC_G473MBTX\"" + "BOARD_ID=GENERIC_G473MBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473MBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473MBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473MBTX INTERFACE + "LINKER:--default-script=${GENERIC_G473MBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473MBTX_MCU} +) +target_link_libraries(GENERIC_G473MBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473MBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473MBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473MBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473MBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473MBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473MBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473MBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473MBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473MBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473MBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473MBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473MBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473MBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473MBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473MBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473MBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473MBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473MBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473MBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473MBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473MCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G473MCTX_MAXSIZE 262144) +set(GENERIC_G473MCTX_MAXDATASIZE 131072) +set(GENERIC_G473MCTX_MCU cortex-m4) +set(GENERIC_G473MCTX_FPCONF "-") +add_library(GENERIC_G473MCTX INTERFACE) +target_compile_options(GENERIC_G473MCTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473MCTX_MCU} +) +target_compile_definitions(GENERIC_G473MCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473MCTX" + "BOARD_NAME=\"GENERIC_G473MCTX\"" + "BOARD_ID=GENERIC_G473MCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473MCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473MCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473MCTX INTERFACE + "LINKER:--default-script=${GENERIC_G473MCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473MCTX_MCU} +) +target_link_libraries(GENERIC_G473MCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473MCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473MCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473MCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473MCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473MCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473MCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473MCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473MCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473MCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473MCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473MCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473MCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473MCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473MCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473MCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473MCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473MCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473MCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473MCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473MCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G473METX_MAXSIZE 524288) +set(GENERIC_G473METX_MAXDATASIZE 131072) +set(GENERIC_G473METX_MCU cortex-m4) +set(GENERIC_G473METX_FPCONF "-") +add_library(GENERIC_G473METX INTERFACE) +target_compile_options(GENERIC_G473METX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473METX_MCU} +) +target_compile_definitions(GENERIC_G473METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473METX" + "BOARD_NAME=\"GENERIC_G473METX\"" + "BOARD_ID=GENERIC_G473METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473METX INTERFACE + "LINKER:--default-script=${GENERIC_G473METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473METX_MCU} +) +target_link_libraries(GENERIC_G473METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473METX_serial_none INTERFACE) +target_compile_options(GENERIC_G473METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473METX_usb_none INTERFACE) +target_compile_options(GENERIC_G473METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473PBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473PBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G473PBIX_MAXSIZE 131072) +set(GENERIC_G473PBIX_MAXDATASIZE 131072) +set(GENERIC_G473PBIX_MCU cortex-m4) +set(GENERIC_G473PBIX_FPCONF "-") +add_library(GENERIC_G473PBIX INTERFACE) +target_compile_options(GENERIC_G473PBIX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473PBIX_MCU} +) +target_compile_definitions(GENERIC_G473PBIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473PBIX" + "BOARD_NAME=\"GENERIC_G473PBIX\"" + "BOARD_ID=GENERIC_G473PBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473PBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473PBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473PBIX INTERFACE + "LINKER:--default-script=${GENERIC_G473PBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473PBIX_MCU} +) +target_link_libraries(GENERIC_G473PBIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473PBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473PBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473PBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473PBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G473PBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473PBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473PBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473PBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473PBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473PBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473PBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473PBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G473PBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473PBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473PBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473PBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473PBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473PCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473PCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G473PCIX_MAXSIZE 262144) +set(GENERIC_G473PCIX_MAXDATASIZE 131072) +set(GENERIC_G473PCIX_MCU cortex-m4) +set(GENERIC_G473PCIX_FPCONF "-") +add_library(GENERIC_G473PCIX INTERFACE) +target_compile_options(GENERIC_G473PCIX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473PCIX_MCU} +) +target_compile_definitions(GENERIC_G473PCIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473PCIX" + "BOARD_NAME=\"GENERIC_G473PCIX\"" + "BOARD_ID=GENERIC_G473PCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473PCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473PCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473PCIX INTERFACE + "LINKER:--default-script=${GENERIC_G473PCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473PCIX_MCU} +) +target_link_libraries(GENERIC_G473PCIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473PCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473PCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473PCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473PCIX_serial_none INTERFACE) +target_compile_options(GENERIC_G473PCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473PCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473PCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473PCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473PCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473PCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473PCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473PCIX_usb_none INTERFACE) +target_compile_options(GENERIC_G473PCIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PCIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473PCIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PCIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473PCIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473PCIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473PCIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473PEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473PEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G473PEIX_MAXSIZE 524288) +set(GENERIC_G473PEIX_MAXDATASIZE 131072) +set(GENERIC_G473PEIX_MCU cortex-m4) +set(GENERIC_G473PEIX_FPCONF "-") +add_library(GENERIC_G473PEIX INTERFACE) +target_compile_options(GENERIC_G473PEIX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473PEIX_MCU} +) +target_compile_definitions(GENERIC_G473PEIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473PEIX" + "BOARD_NAME=\"GENERIC_G473PEIX\"" + "BOARD_ID=GENERIC_G473PEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473PEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473PEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473PEIX INTERFACE + "LINKER:--default-script=${GENERIC_G473PEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473PEIX_MCU} +) +target_link_libraries(GENERIC_G473PEIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473PEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473PEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473PEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473PEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G473PEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473PEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473PEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473PEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473PEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473PEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473PEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473PEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G473PEIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PEIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473PEIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473PEIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473PEIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473PEIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473PEIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473QBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473QBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G473QBTX_MAXSIZE 131072) +set(GENERIC_G473QBTX_MAXDATASIZE 131072) +set(GENERIC_G473QBTX_MCU cortex-m4) +set(GENERIC_G473QBTX_FPCONF "-") +add_library(GENERIC_G473QBTX INTERFACE) +target_compile_options(GENERIC_G473QBTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473QBTX_MCU} +) +target_compile_definitions(GENERIC_G473QBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473QBTX" + "BOARD_NAME=\"GENERIC_G473QBTX\"" + "BOARD_ID=GENERIC_G473QBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473QBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473QBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473QBTX INTERFACE + "LINKER:--default-script=${GENERIC_G473QBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473QBTX_MCU} +) +target_link_libraries(GENERIC_G473QBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473QBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473QBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473QBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473QBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473QBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473QBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473QBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473QBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473QBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473QBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473QBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473QBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473QBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473QBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473QBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473QBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473QBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473QCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473QCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G473QCTX_MAXSIZE 262144) +set(GENERIC_G473QCTX_MAXDATASIZE 131072) +set(GENERIC_G473QCTX_MCU cortex-m4) +set(GENERIC_G473QCTX_FPCONF "-") +add_library(GENERIC_G473QCTX INTERFACE) +target_compile_options(GENERIC_G473QCTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473QCTX_MCU} +) +target_compile_definitions(GENERIC_G473QCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473QCTX" + "BOARD_NAME=\"GENERIC_G473QCTX\"" + "BOARD_ID=GENERIC_G473QCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473QCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473QCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473QCTX INTERFACE + "LINKER:--default-script=${GENERIC_G473QCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473QCTX_MCU} +) +target_link_libraries(GENERIC_G473QCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473QCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473QCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473QCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473QCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473QCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473QCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473QCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473QCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473QCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473QCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473QCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473QCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473QCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473QCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473QCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473QCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473QCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473QETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473QETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G473QETX_MAXSIZE 524288) +set(GENERIC_G473QETX_MAXDATASIZE 131072) +set(GENERIC_G473QETX_MCU cortex-m4) +set(GENERIC_G473QETX_FPCONF "-") +add_library(GENERIC_G473QETX INTERFACE) +target_compile_options(GENERIC_G473QETX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473QETX_MCU} +) +target_compile_definitions(GENERIC_G473QETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473QETX" + "BOARD_NAME=\"GENERIC_G473QETX\"" + "BOARD_ID=GENERIC_G473QETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473QETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473QETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473QETX INTERFACE + "LINKER:--default-script=${GENERIC_G473QETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473QETX_MCU} +) +target_link_libraries(GENERIC_G473QETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473QETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473QETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473QETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473QETX_serial_none INTERFACE) +target_compile_options(GENERIC_G473QETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473QETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473QETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473QETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473QETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473QETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473QETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473QETX_usb_none INTERFACE) +target_compile_options(GENERIC_G473QETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473QETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473QETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473QETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473QETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473QETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G473RBTX_MAXSIZE 131072) +set(GENERIC_G473RBTX_MAXDATASIZE 131072) +set(GENERIC_G473RBTX_MCU cortex-m4) +set(GENERIC_G473RBTX_FPCONF "-") +add_library(GENERIC_G473RBTX INTERFACE) +target_compile_options(GENERIC_G473RBTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473RBTX_MCU} +) +target_compile_definitions(GENERIC_G473RBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473RBTX" + "BOARD_NAME=\"GENERIC_G473RBTX\"" + "BOARD_ID=GENERIC_G473RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G473RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473RBTX_MCU} +) +target_link_libraries(GENERIC_G473RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G473RCTX_MAXSIZE 262144) +set(GENERIC_G473RCTX_MAXDATASIZE 131072) +set(GENERIC_G473RCTX_MCU cortex-m4) +set(GENERIC_G473RCTX_FPCONF "-") +add_library(GENERIC_G473RCTX INTERFACE) +target_compile_options(GENERIC_G473RCTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473RCTX_MCU} +) +target_compile_definitions(GENERIC_G473RCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473RCTX" + "BOARD_NAME=\"GENERIC_G473RCTX\"" + "BOARD_ID=GENERIC_G473RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473RCTX INTERFACE + "LINKER:--default-script=${GENERIC_G473RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473RCTX_MCU} +) +target_link_libraries(GENERIC_G473RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G473RETX_MAXSIZE 524288) +set(GENERIC_G473RETX_MAXDATASIZE 131072) +set(GENERIC_G473RETX_MCU cortex-m4) +set(GENERIC_G473RETX_FPCONF "-") +add_library(GENERIC_G473RETX INTERFACE) +target_compile_options(GENERIC_G473RETX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473RETX_MCU} +) +target_compile_definitions(GENERIC_G473RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473RETX" + "BOARD_NAME=\"GENERIC_G473RETX\"" + "BOARD_ID=GENERIC_G473RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473RETX INTERFACE + "LINKER:--default-script=${GENERIC_G473RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473RETX_MCU} +) +target_link_libraries(GENERIC_G473RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G473RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G473RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473VBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G473VBHX_MAXSIZE 131072) +set(GENERIC_G473VBHX_MAXDATASIZE 131072) +set(GENERIC_G473VBHX_MCU cortex-m4) +set(GENERIC_G473VBHX_FPCONF "-") +add_library(GENERIC_G473VBHX INTERFACE) +target_compile_options(GENERIC_G473VBHX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VBHX_MCU} +) +target_compile_definitions(GENERIC_G473VBHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473VBHX" + "BOARD_NAME=\"GENERIC_G473VBHX\"" + "BOARD_ID=GENERIC_G473VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473VBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473VBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473VBHX INTERFACE + "LINKER:--default-script=${GENERIC_G473VBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VBHX_MCU} +) +target_link_libraries(GENERIC_G473VBHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473VBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473VBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473VBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473VBHX_serial_none INTERFACE) +target_compile_options(GENERIC_G473VBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473VBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473VBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473VBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473VBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473VBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473VBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473VBHX_usb_none INTERFACE) +target_compile_options(GENERIC_G473VBHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VBHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473VBHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VBHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473VBHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473VBHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473VBHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G473VBTX_MAXSIZE 131072) +set(GENERIC_G473VBTX_MAXDATASIZE 131072) +set(GENERIC_G473VBTX_MCU cortex-m4) +set(GENERIC_G473VBTX_FPCONF "-") +add_library(GENERIC_G473VBTX INTERFACE) +target_compile_options(GENERIC_G473VBTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VBTX_MCU} +) +target_compile_definitions(GENERIC_G473VBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473VBTX" + "BOARD_NAME=\"GENERIC_G473VBTX\"" + "BOARD_ID=GENERIC_G473VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473VBTX INTERFACE + "LINKER:--default-script=${GENERIC_G473VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VBTX_MCU} +) +target_link_libraries(GENERIC_G473VBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G473VCHX_MAXSIZE 262144) +set(GENERIC_G473VCHX_MAXDATASIZE 131072) +set(GENERIC_G473VCHX_MCU cortex-m4) +set(GENERIC_G473VCHX_FPCONF "-") +add_library(GENERIC_G473VCHX INTERFACE) +target_compile_options(GENERIC_G473VCHX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VCHX_MCU} +) +target_compile_definitions(GENERIC_G473VCHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473VCHX" + "BOARD_NAME=\"GENERIC_G473VCHX\"" + "BOARD_ID=GENERIC_G473VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473VCHX INTERFACE + "LINKER:--default-script=${GENERIC_G473VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VCHX_MCU} +) +target_link_libraries(GENERIC_G473VCHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_G473VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_G473VCHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VCHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473VCHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VCHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473VCHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473VCHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473VCHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G473VCTX_MAXSIZE 262144) +set(GENERIC_G473VCTX_MAXDATASIZE 131072) +set(GENERIC_G473VCTX_MCU cortex-m4) +set(GENERIC_G473VCTX_FPCONF "-") +add_library(GENERIC_G473VCTX INTERFACE) +target_compile_options(GENERIC_G473VCTX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VCTX_MCU} +) +target_compile_definitions(GENERIC_G473VCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473VCTX" + "BOARD_NAME=\"GENERIC_G473VCTX\"" + "BOARD_ID=GENERIC_G473VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473VCTX INTERFACE + "LINKER:--default-script=${GENERIC_G473VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VCTX_MCU} +) +target_link_libraries(GENERIC_G473VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G473VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G473VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473VEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G473VEHX_MAXSIZE 524288) +set(GENERIC_G473VEHX_MAXDATASIZE 131072) +set(GENERIC_G473VEHX_MCU cortex-m4) +set(GENERIC_G473VEHX_FPCONF "-") +add_library(GENERIC_G473VEHX INTERFACE) +target_compile_options(GENERIC_G473VEHX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VEHX_MCU} +) +target_compile_definitions(GENERIC_G473VEHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473VEHX" + "BOARD_NAME=\"GENERIC_G473VEHX\"" + "BOARD_ID=GENERIC_G473VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473VEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473VEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473VEHX INTERFACE + "LINKER:--default-script=${GENERIC_G473VEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VEHX_MCU} +) +target_link_libraries(GENERIC_G473VEHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473VEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473VEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473VEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473VEHX_serial_none INTERFACE) +target_compile_options(GENERIC_G473VEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473VEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473VEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473VEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473VEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473VEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473VEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473VEHX_usb_none INTERFACE) +target_compile_options(GENERIC_G473VEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473VEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473VEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473VEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473VEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G473VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G473VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G473VETX_MAXSIZE 524288) +set(GENERIC_G473VETX_MAXDATASIZE 131072) +set(GENERIC_G473VETX_MCU cortex-m4) +set(GENERIC_G473VETX_FPCONF "-") +add_library(GENERIC_G473VETX INTERFACE) +target_compile_options(GENERIC_G473VETX INTERFACE + "SHELL:-DSTM32G473xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VETX_MCU} +) +target_compile_definitions(GENERIC_G473VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G473VETX" + "BOARD_NAME=\"GENERIC_G473VETX\"" + "BOARD_ID=GENERIC_G473VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G473VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G473VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G473VETX INTERFACE + "LINKER:--default-script=${GENERIC_G473VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G473VETX_MCU} +) +target_link_libraries(GENERIC_G473VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G473VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G473VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G473VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G473VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G473VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G473VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G473VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G473VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G473VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G473VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G473VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G473VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G473VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G473VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G473VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G473VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G473VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G473VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G474CBTX_MAXSIZE 131072) +set(GENERIC_G474CBTX_MAXDATASIZE 131072) +set(GENERIC_G474CBTX_MCU cortex-m4) +set(GENERIC_G474CBTX_FPCONF "-") +add_library(GENERIC_G474CBTX INTERFACE) +target_compile_options(GENERIC_G474CBTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474CBTX_MCU} +) +target_compile_definitions(GENERIC_G474CBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474CBTX" + "BOARD_NAME=\"GENERIC_G474CBTX\"" + "BOARD_ID=GENERIC_G474CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474CBTX INTERFACE + "LINKER:--default-script=${GENERIC_G474CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474CBTX_MCU} +) +target_link_libraries(GENERIC_G474CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G474CCTX_MAXSIZE 262144) +set(GENERIC_G474CCTX_MAXDATASIZE 131072) +set(GENERIC_G474CCTX_MCU cortex-m4) +set(GENERIC_G474CCTX_FPCONF "-") +add_library(GENERIC_G474CCTX INTERFACE) +target_compile_options(GENERIC_G474CCTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474CCTX_MCU} +) +target_compile_definitions(GENERIC_G474CCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474CCTX" + "BOARD_NAME=\"GENERIC_G474CCTX\"" + "BOARD_ID=GENERIC_G474CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474CCTX INTERFACE + "LINKER:--default-script=${GENERIC_G474CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474CCTX_MCU} +) +target_link_libraries(GENERIC_G474CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G474CETX_MAXSIZE 524288) +set(GENERIC_G474CETX_MAXDATASIZE 131072) +set(GENERIC_G474CETX_MCU cortex-m4) +set(GENERIC_G474CETX_FPCONF "-") +add_library(GENERIC_G474CETX INTERFACE) +target_compile_options(GENERIC_G474CETX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474CETX_MCU} +) +target_compile_definitions(GENERIC_G474CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474CETX" + "BOARD_NAME=\"GENERIC_G474CETX\"" + "BOARD_ID=GENERIC_G474CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474CETX INTERFACE + "LINKER:--default-script=${GENERIC_G474CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474CETX_MCU} +) +target_link_libraries(GENERIC_G474CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G474CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G474CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474MBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474MBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G474MBTX_MAXSIZE 131072) +set(GENERIC_G474MBTX_MAXDATASIZE 131072) +set(GENERIC_G474MBTX_MCU cortex-m4) +set(GENERIC_G474MBTX_FPCONF "-") +add_library(GENERIC_G474MBTX INTERFACE) +target_compile_options(GENERIC_G474MBTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474MBTX_MCU} +) +target_compile_definitions(GENERIC_G474MBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474MBTX" + "BOARD_NAME=\"GENERIC_G474MBTX\"" + "BOARD_ID=GENERIC_G474MBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474MBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474MBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474MBTX INTERFACE + "LINKER:--default-script=${GENERIC_G474MBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474MBTX_MCU} +) +target_link_libraries(GENERIC_G474MBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474MBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474MBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474MBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474MBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474MBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474MBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474MBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474MBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474MBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474MBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474MBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474MBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474MBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474MBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474MBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474MBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474MBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474MBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474MBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474MBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474MCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G474MCTX_MAXSIZE 262144) +set(GENERIC_G474MCTX_MAXDATASIZE 131072) +set(GENERIC_G474MCTX_MCU cortex-m4) +set(GENERIC_G474MCTX_FPCONF "-") +add_library(GENERIC_G474MCTX INTERFACE) +target_compile_options(GENERIC_G474MCTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474MCTX_MCU} +) +target_compile_definitions(GENERIC_G474MCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474MCTX" + "BOARD_NAME=\"GENERIC_G474MCTX\"" + "BOARD_ID=GENERIC_G474MCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474MCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474MCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474MCTX INTERFACE + "LINKER:--default-script=${GENERIC_G474MCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474MCTX_MCU} +) +target_link_libraries(GENERIC_G474MCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474MCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474MCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474MCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474MCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474MCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474MCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474MCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474MCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474MCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474MCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474MCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474MCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474MCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474MCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474MCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474MCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474MCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474MCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474MCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474MCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G474METX_MAXSIZE 524288) +set(GENERIC_G474METX_MAXDATASIZE 131072) +set(GENERIC_G474METX_MCU cortex-m4) +set(GENERIC_G474METX_FPCONF "-") +add_library(GENERIC_G474METX INTERFACE) +target_compile_options(GENERIC_G474METX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474METX_MCU} +) +target_compile_definitions(GENERIC_G474METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474METX" + "BOARD_NAME=\"GENERIC_G474METX\"" + "BOARD_ID=GENERIC_G474METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474METX INTERFACE + "LINKER:--default-script=${GENERIC_G474METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474METX_MCU} +) +target_link_libraries(GENERIC_G474METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474METX_serial_none INTERFACE) +target_compile_options(GENERIC_G474METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474METX_usb_none INTERFACE) +target_compile_options(GENERIC_G474METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474PBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474PBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G474PBIX_MAXSIZE 131072) +set(GENERIC_G474PBIX_MAXDATASIZE 131072) +set(GENERIC_G474PBIX_MCU cortex-m4) +set(GENERIC_G474PBIX_FPCONF "-") +add_library(GENERIC_G474PBIX INTERFACE) +target_compile_options(GENERIC_G474PBIX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474PBIX_MCU} +) +target_compile_definitions(GENERIC_G474PBIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474PBIX" + "BOARD_NAME=\"GENERIC_G474PBIX\"" + "BOARD_ID=GENERIC_G474PBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474PBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474PBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474PBIX INTERFACE + "LINKER:--default-script=${GENERIC_G474PBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474PBIX_MCU} +) +target_link_libraries(GENERIC_G474PBIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474PBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474PBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474PBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474PBIX_serial_none INTERFACE) +target_compile_options(GENERIC_G474PBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474PBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474PBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474PBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474PBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474PBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474PBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474PBIX_usb_none INTERFACE) +target_compile_options(GENERIC_G474PBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474PBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474PBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474PBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474PBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474PCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474PCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G474PCIX_MAXSIZE 262144) +set(GENERIC_G474PCIX_MAXDATASIZE 131072) +set(GENERIC_G474PCIX_MCU cortex-m4) +set(GENERIC_G474PCIX_FPCONF "-") +add_library(GENERIC_G474PCIX INTERFACE) +target_compile_options(GENERIC_G474PCIX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474PCIX_MCU} +) +target_compile_definitions(GENERIC_G474PCIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474PCIX" + "BOARD_NAME=\"GENERIC_G474PCIX\"" + "BOARD_ID=GENERIC_G474PCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474PCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474PCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474PCIX INTERFACE + "LINKER:--default-script=${GENERIC_G474PCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474PCIX_MCU} +) +target_link_libraries(GENERIC_G474PCIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474PCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474PCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474PCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474PCIX_serial_none INTERFACE) +target_compile_options(GENERIC_G474PCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474PCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474PCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474PCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474PCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474PCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474PCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474PCIX_usb_none INTERFACE) +target_compile_options(GENERIC_G474PCIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PCIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474PCIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PCIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474PCIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474PCIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474PCIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474PEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474PEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G474PEIX_MAXSIZE 524288) +set(GENERIC_G474PEIX_MAXDATASIZE 131072) +set(GENERIC_G474PEIX_MCU cortex-m4) +set(GENERIC_G474PEIX_FPCONF "-") +add_library(GENERIC_G474PEIX INTERFACE) +target_compile_options(GENERIC_G474PEIX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474PEIX_MCU} +) +target_compile_definitions(GENERIC_G474PEIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474PEIX" + "BOARD_NAME=\"GENERIC_G474PEIX\"" + "BOARD_ID=GENERIC_G474PEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474PEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474PEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474PEIX INTERFACE + "LINKER:--default-script=${GENERIC_G474PEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474PEIX_MCU} +) +target_link_libraries(GENERIC_G474PEIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474PEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474PEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474PEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474PEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G474PEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474PEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474PEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474PEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474PEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474PEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474PEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474PEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G474PEIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PEIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474PEIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474PEIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474PEIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474PEIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474PEIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474QBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474QBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G474QBTX_MAXSIZE 131072) +set(GENERIC_G474QBTX_MAXDATASIZE 131072) +set(GENERIC_G474QBTX_MCU cortex-m4) +set(GENERIC_G474QBTX_FPCONF "-") +add_library(GENERIC_G474QBTX INTERFACE) +target_compile_options(GENERIC_G474QBTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474QBTX_MCU} +) +target_compile_definitions(GENERIC_G474QBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474QBTX" + "BOARD_NAME=\"GENERIC_G474QBTX\"" + "BOARD_ID=GENERIC_G474QBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474QBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474QBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474QBTX INTERFACE + "LINKER:--default-script=${GENERIC_G474QBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474QBTX_MCU} +) +target_link_libraries(GENERIC_G474QBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474QBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474QBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474QBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474QBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474QBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474QBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474QBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474QBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474QBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474QBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474QBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474QBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474QBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474QBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474QBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474QBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474QBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474QCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474QCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G474QCTX_MAXSIZE 262144) +set(GENERIC_G474QCTX_MAXDATASIZE 131072) +set(GENERIC_G474QCTX_MCU cortex-m4) +set(GENERIC_G474QCTX_FPCONF "-") +add_library(GENERIC_G474QCTX INTERFACE) +target_compile_options(GENERIC_G474QCTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474QCTX_MCU} +) +target_compile_definitions(GENERIC_G474QCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474QCTX" + "BOARD_NAME=\"GENERIC_G474QCTX\"" + "BOARD_ID=GENERIC_G474QCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474QCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474QCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474QCTX INTERFACE + "LINKER:--default-script=${GENERIC_G474QCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474QCTX_MCU} +) +target_link_libraries(GENERIC_G474QCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474QCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474QCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474QCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474QCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474QCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474QCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474QCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474QCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474QCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474QCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474QCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474QCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474QCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474QCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474QCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474QCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474QCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474QETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474QETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G474QETX_MAXSIZE 524288) +set(GENERIC_G474QETX_MAXDATASIZE 131072) +set(GENERIC_G474QETX_MCU cortex-m4) +set(GENERIC_G474QETX_FPCONF "-") +add_library(GENERIC_G474QETX INTERFACE) +target_compile_options(GENERIC_G474QETX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474QETX_MCU} +) +target_compile_definitions(GENERIC_G474QETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474QETX" + "BOARD_NAME=\"GENERIC_G474QETX\"" + "BOARD_ID=GENERIC_G474QETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474QETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474QETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474QETX INTERFACE + "LINKER:--default-script=${GENERIC_G474QETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474QETX_MCU} +) +target_link_libraries(GENERIC_G474QETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474QETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474QETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474QETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474QETX_serial_none INTERFACE) +target_compile_options(GENERIC_G474QETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474QETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474QETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474QETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474QETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474QETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474QETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474QETX_usb_none INTERFACE) +target_compile_options(GENERIC_G474QETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474QETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474QETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474QETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474QETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474QETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G474RBTX_MAXSIZE 131072) +set(GENERIC_G474RBTX_MAXDATASIZE 131072) +set(GENERIC_G474RBTX_MCU cortex-m4) +set(GENERIC_G474RBTX_FPCONF "-") +add_library(GENERIC_G474RBTX INTERFACE) +target_compile_options(GENERIC_G474RBTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474RBTX_MCU} +) +target_compile_definitions(GENERIC_G474RBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474RBTX" + "BOARD_NAME=\"GENERIC_G474RBTX\"" + "BOARD_ID=GENERIC_G474RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474RBTX INTERFACE + "LINKER:--default-script=${GENERIC_G474RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474RBTX_MCU} +) +target_link_libraries(GENERIC_G474RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G474RCTX_MAXSIZE 262144) +set(GENERIC_G474RCTX_MAXDATASIZE 131072) +set(GENERIC_G474RCTX_MCU cortex-m4) +set(GENERIC_G474RCTX_FPCONF "-") +add_library(GENERIC_G474RCTX INTERFACE) +target_compile_options(GENERIC_G474RCTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474RCTX_MCU} +) +target_compile_definitions(GENERIC_G474RCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474RCTX" + "BOARD_NAME=\"GENERIC_G474RCTX\"" + "BOARD_ID=GENERIC_G474RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474RCTX INTERFACE + "LINKER:--default-script=${GENERIC_G474RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474RCTX_MCU} +) +target_link_libraries(GENERIC_G474RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G474RETX_MAXSIZE 524288) +set(GENERIC_G474RETX_MAXDATASIZE 131072) +set(GENERIC_G474RETX_MCU cortex-m4) +set(GENERIC_G474RETX_FPCONF "-") +add_library(GENERIC_G474RETX INTERFACE) +target_compile_options(GENERIC_G474RETX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474RETX_MCU} +) +target_compile_definitions(GENERIC_G474RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474RETX" + "BOARD_NAME=\"GENERIC_G474RETX\"" + "BOARD_ID=GENERIC_G474RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474RETX INTERFACE + "LINKER:--default-script=${GENERIC_G474RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474RETX_MCU} +) +target_link_libraries(GENERIC_G474RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G474RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G474RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474VBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G474VBHX_MAXSIZE 131072) +set(GENERIC_G474VBHX_MAXDATASIZE 131072) +set(GENERIC_G474VBHX_MCU cortex-m4) +set(GENERIC_G474VBHX_FPCONF "-") +add_library(GENERIC_G474VBHX INTERFACE) +target_compile_options(GENERIC_G474VBHX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VBHX_MCU} +) +target_compile_definitions(GENERIC_G474VBHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474VBHX" + "BOARD_NAME=\"GENERIC_G474VBHX\"" + "BOARD_ID=GENERIC_G474VBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474VBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474VBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474VBHX INTERFACE + "LINKER:--default-script=${GENERIC_G474VBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VBHX_MCU} +) +target_link_libraries(GENERIC_G474VBHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474VBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474VBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474VBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474VBHX_serial_none INTERFACE) +target_compile_options(GENERIC_G474VBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474VBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474VBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474VBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474VBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474VBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474VBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474VBHX_usb_none INTERFACE) +target_compile_options(GENERIC_G474VBHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VBHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474VBHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VBHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474VBHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474VBHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474VBHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G474VBTX_MAXSIZE 131072) +set(GENERIC_G474VBTX_MAXDATASIZE 131072) +set(GENERIC_G474VBTX_MCU cortex-m4) +set(GENERIC_G474VBTX_FPCONF "-") +add_library(GENERIC_G474VBTX INTERFACE) +target_compile_options(GENERIC_G474VBTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VBTX_MCU} +) +target_compile_definitions(GENERIC_G474VBTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474VBTX" + "BOARD_NAME=\"GENERIC_G474VBTX\"" + "BOARD_ID=GENERIC_G474VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474VBTX INTERFACE + "LINKER:--default-script=${GENERIC_G474VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VBTX_MCU} +) +target_link_libraries(GENERIC_G474VBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474VCHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474VCHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G474VCHX_MAXSIZE 262144) +set(GENERIC_G474VCHX_MAXDATASIZE 131072) +set(GENERIC_G474VCHX_MCU cortex-m4) +set(GENERIC_G474VCHX_FPCONF "-") +add_library(GENERIC_G474VCHX INTERFACE) +target_compile_options(GENERIC_G474VCHX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VCHX_MCU} +) +target_compile_definitions(GENERIC_G474VCHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474VCHX" + "BOARD_NAME=\"GENERIC_G474VCHX\"" + "BOARD_ID=GENERIC_G474VCHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474VCHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474VCHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474VCHX INTERFACE + "LINKER:--default-script=${GENERIC_G474VCHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VCHX_MCU} +) +target_link_libraries(GENERIC_G474VCHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474VCHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474VCHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VCHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474VCHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474VCHX_serial_none INTERFACE) +target_compile_options(GENERIC_G474VCHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474VCHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474VCHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474VCHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474VCHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474VCHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474VCHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474VCHX_usb_none INTERFACE) +target_compile_options(GENERIC_G474VCHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VCHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474VCHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VCHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474VCHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474VCHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474VCHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G474VCTX_MAXSIZE 262144) +set(GENERIC_G474VCTX_MAXDATASIZE 131072) +set(GENERIC_G474VCTX_MCU cortex-m4) +set(GENERIC_G474VCTX_FPCONF "-") +add_library(GENERIC_G474VCTX INTERFACE) +target_compile_options(GENERIC_G474VCTX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VCTX_MCU} +) +target_compile_definitions(GENERIC_G474VCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474VCTX" + "BOARD_NAME=\"GENERIC_G474VCTX\"" + "BOARD_ID=GENERIC_G474VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474VCTX INTERFACE + "LINKER:--default-script=${GENERIC_G474VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VCTX_MCU} +) +target_link_libraries(GENERIC_G474VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G474VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G474VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474VEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G474VEHX_MAXSIZE 524288) +set(GENERIC_G474VEHX_MAXDATASIZE 131072) +set(GENERIC_G474VEHX_MCU cortex-m4) +set(GENERIC_G474VEHX_FPCONF "-") +add_library(GENERIC_G474VEHX INTERFACE) +target_compile_options(GENERIC_G474VEHX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VEHX_MCU} +) +target_compile_definitions(GENERIC_G474VEHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474VEHX" + "BOARD_NAME=\"GENERIC_G474VEHX\"" + "BOARD_ID=GENERIC_G474VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474VEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474VEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474VEHX INTERFACE + "LINKER:--default-script=${GENERIC_G474VEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VEHX_MCU} +) +target_link_libraries(GENERIC_G474VEHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474VEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474VEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474VEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474VEHX_serial_none INTERFACE) +target_compile_options(GENERIC_G474VEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474VEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474VEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474VEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474VEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474VEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474VEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474VEHX_usb_none INTERFACE) +target_compile_options(GENERIC_G474VEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474VEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474VEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474VEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474VEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G474VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G474VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G474VETX_MAXSIZE 524288) +set(GENERIC_G474VETX_MAXDATASIZE 131072) +set(GENERIC_G474VETX_MCU cortex-m4) +set(GENERIC_G474VETX_FPCONF "-") +add_library(GENERIC_G474VETX INTERFACE) +target_compile_options(GENERIC_G474VETX INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VETX_MCU} +) +target_compile_definitions(GENERIC_G474VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G474VETX" + "BOARD_NAME=\"GENERIC_G474VETX\"" + "BOARD_ID=GENERIC_G474VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G474VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G474VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G474VETX INTERFACE + "LINKER:--default-script=${GENERIC_G474VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G474VETX_MCU} +) +target_link_libraries(GENERIC_G474VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G474VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G474VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G474VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G474VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G474VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G474VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G474VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G474VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G474VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G474VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G474VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G474VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G474VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G474VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G474VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G474VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G474VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G474VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G483CETX_MAXSIZE 524288) +set(GENERIC_G483CETX_MAXDATASIZE 131072) +set(GENERIC_G483CETX_MCU cortex-m4) +set(GENERIC_G483CETX_FPCONF "-") +add_library(GENERIC_G483CETX INTERFACE) +target_compile_options(GENERIC_G483CETX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483CETX_MCU} +) +target_compile_definitions(GENERIC_G483CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483CETX" + "BOARD_NAME=\"GENERIC_G483CETX\"" + "BOARD_ID=GENERIC_G483CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483CETX INTERFACE + "LINKER:--default-script=${GENERIC_G483CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483CETX_MCU} +) +target_link_libraries(GENERIC_G483CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G483CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G483CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G483METX_MAXSIZE 524288) +set(GENERIC_G483METX_MAXDATASIZE 131072) +set(GENERIC_G483METX_MCU cortex-m4) +set(GENERIC_G483METX_FPCONF "-") +add_library(GENERIC_G483METX INTERFACE) +target_compile_options(GENERIC_G483METX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483METX_MCU} +) +target_compile_definitions(GENERIC_G483METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483METX" + "BOARD_NAME=\"GENERIC_G483METX\"" + "BOARD_ID=GENERIC_G483METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483METX INTERFACE + "LINKER:--default-script=${GENERIC_G483METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483METX_MCU} +) +target_link_libraries(GENERIC_G483METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483METX_serial_none INTERFACE) +target_compile_options(GENERIC_G483METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483METX_usb_none INTERFACE) +target_compile_options(GENERIC_G483METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483PEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483PEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G483PEIX_MAXSIZE 524288) +set(GENERIC_G483PEIX_MAXDATASIZE 131072) +set(GENERIC_G483PEIX_MCU cortex-m4) +set(GENERIC_G483PEIX_FPCONF "-") +add_library(GENERIC_G483PEIX INTERFACE) +target_compile_options(GENERIC_G483PEIX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483PEIX_MCU} +) +target_compile_definitions(GENERIC_G483PEIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483PEIX" + "BOARD_NAME=\"GENERIC_G483PEIX\"" + "BOARD_ID=GENERIC_G483PEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483PEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483PEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483PEIX INTERFACE + "LINKER:--default-script=${GENERIC_G483PEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483PEIX_MCU} +) +target_link_libraries(GENERIC_G483PEIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483PEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483PEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483PEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483PEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483PEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G483PEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483PEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483PEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483PEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483PEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483PEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483PEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483PEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G483PEIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483PEIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483PEIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483PEIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483PEIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483PEIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483PEIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483QETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483QETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G483QETX_MAXSIZE 524288) +set(GENERIC_G483QETX_MAXDATASIZE 131072) +set(GENERIC_G483QETX_MCU cortex-m4) +set(GENERIC_G483QETX_FPCONF "-") +add_library(GENERIC_G483QETX INTERFACE) +target_compile_options(GENERIC_G483QETX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483QETX_MCU} +) +target_compile_definitions(GENERIC_G483QETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483QETX" + "BOARD_NAME=\"GENERIC_G483QETX\"" + "BOARD_ID=GENERIC_G483QETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483QETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483QETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483QETX INTERFACE + "LINKER:--default-script=${GENERIC_G483QETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483QETX_MCU} +) +target_link_libraries(GENERIC_G483QETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483QETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483QETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483QETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483QETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483QETX_serial_none INTERFACE) +target_compile_options(GENERIC_G483QETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483QETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483QETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483QETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483QETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483QETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483QETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483QETX_usb_none INTERFACE) +target_compile_options(GENERIC_G483QETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483QETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483QETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483QETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483QETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483QETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483QETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G483RETX_MAXSIZE 524288) +set(GENERIC_G483RETX_MAXDATASIZE 131072) +set(GENERIC_G483RETX_MCU cortex-m4) +set(GENERIC_G483RETX_FPCONF "-") +add_library(GENERIC_G483RETX INTERFACE) +target_compile_options(GENERIC_G483RETX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483RETX_MCU} +) +target_compile_definitions(GENERIC_G483RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483RETX" + "BOARD_NAME=\"GENERIC_G483RETX\"" + "BOARD_ID=GENERIC_G483RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483RETX INTERFACE + "LINKER:--default-script=${GENERIC_G483RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483RETX_MCU} +) +target_link_libraries(GENERIC_G483RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G483RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G483RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483VEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G483VEHX_MAXSIZE 524288) +set(GENERIC_G483VEHX_MAXDATASIZE 131072) +set(GENERIC_G483VEHX_MCU cortex-m4) +set(GENERIC_G483VEHX_FPCONF "-") +add_library(GENERIC_G483VEHX INTERFACE) +target_compile_options(GENERIC_G483VEHX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483VEHX_MCU} +) +target_compile_definitions(GENERIC_G483VEHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483VEHX" + "BOARD_NAME=\"GENERIC_G483VEHX\"" + "BOARD_ID=GENERIC_G483VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483VEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483VEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483VEHX INTERFACE + "LINKER:--default-script=${GENERIC_G483VEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483VEHX_MCU} +) +target_link_libraries(GENERIC_G483VEHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483VEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483VEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483VEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483VEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483VEHX_serial_none INTERFACE) +target_compile_options(GENERIC_G483VEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483VEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483VEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483VEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483VEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483VEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483VEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483VEHX_usb_none INTERFACE) +target_compile_options(GENERIC_G483VEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483VEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483VEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483VEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483VEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483VEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483VEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G483VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G483VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G483VETX_MAXSIZE 524288) +set(GENERIC_G483VETX_MAXDATASIZE 131072) +set(GENERIC_G483VETX_MCU cortex-m4) +set(GENERIC_G483VETX_FPCONF "-") +add_library(GENERIC_G483VETX INTERFACE) +target_compile_options(GENERIC_G483VETX INTERFACE + "SHELL:-DSTM32G483xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483VETX_MCU} +) +target_compile_definitions(GENERIC_G483VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G483VETX" + "BOARD_NAME=\"GENERIC_G483VETX\"" + "BOARD_ID=GENERIC_G483VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G483VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G483VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G483VETX INTERFACE + "LINKER:--default-script=${GENERIC_G483VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G483VETX_MCU} +) +target_link_libraries(GENERIC_G483VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G483VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G483VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G483VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G483VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G483VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G483VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G483VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G483VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G483VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G483VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G483VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G483VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G483VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G483VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G483VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G483VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G483VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G483VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G483VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G483VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET") +set(GENERIC_G484CETX_MAXSIZE 524288) +set(GENERIC_G484CETX_MAXDATASIZE 131072) +set(GENERIC_G484CETX_MCU cortex-m4) +set(GENERIC_G484CETX_FPCONF "-") +add_library(GENERIC_G484CETX INTERFACE) +target_compile_options(GENERIC_G484CETX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484CETX_MCU} +) +target_compile_definitions(GENERIC_G484CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484CETX" + "BOARD_NAME=\"GENERIC_G484CETX\"" + "BOARD_ID=GENERIC_G484CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484CETX INTERFACE + "LINKER:--default-script=${GENERIC_G484CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484CETX_MCU} +) +target_link_libraries(GENERIC_G484CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G484CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G484CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET") +set(GENERIC_G484METX_MAXSIZE 524288) +set(GENERIC_G484METX_MAXDATASIZE 131072) +set(GENERIC_G484METX_MCU cortex-m4) +set(GENERIC_G484METX_FPCONF "-") +add_library(GENERIC_G484METX INTERFACE) +target_compile_options(GENERIC_G484METX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484METX_MCU} +) +target_compile_definitions(GENERIC_G484METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484METX" + "BOARD_NAME=\"GENERIC_G484METX\"" + "BOARD_ID=GENERIC_G484METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484METX INTERFACE + "LINKER:--default-script=${GENERIC_G484METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484METX_MCU} +) +target_link_libraries(GENERIC_G484METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484METX_serial_none INTERFACE) +target_compile_options(GENERIC_G484METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484METX_usb_none INTERFACE) +target_compile_options(GENERIC_G484METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484PEIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484PEIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI") +set(GENERIC_G484PEIX_MAXSIZE 524288) +set(GENERIC_G484PEIX_MAXDATASIZE 131072) +set(GENERIC_G484PEIX_MCU cortex-m4) +set(GENERIC_G484PEIX_FPCONF "-") +add_library(GENERIC_G484PEIX INTERFACE) +target_compile_options(GENERIC_G484PEIX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484PEIX_MCU} +) +target_compile_definitions(GENERIC_G484PEIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484PEIX" + "BOARD_NAME=\"GENERIC_G484PEIX\"" + "BOARD_ID=GENERIC_G484PEIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484PEIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484PEIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484PEIX INTERFACE + "LINKER:--default-script=${GENERIC_G484PEIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484PEIX_MCU} +) +target_link_libraries(GENERIC_G484PEIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484PEIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484PEIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484PEIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484PEIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484PEIX_serial_none INTERFACE) +target_compile_options(GENERIC_G484PEIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484PEIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484PEIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484PEIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484PEIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484PEIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484PEIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484PEIX_usb_none INTERFACE) +target_compile_options(GENERIC_G484PEIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484PEIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484PEIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484PEIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484PEIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484PEIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484PEIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484QETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484QETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET") +set(GENERIC_G484QETX_MAXSIZE 524288) +set(GENERIC_G484QETX_MAXDATASIZE 131072) +set(GENERIC_G484QETX_MCU cortex-m4) +set(GENERIC_G484QETX_FPCONF "-") +add_library(GENERIC_G484QETX INTERFACE) +target_compile_options(GENERIC_G484QETX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484QETX_MCU} +) +target_compile_definitions(GENERIC_G484QETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484QETX" + "BOARD_NAME=\"GENERIC_G484QETX\"" + "BOARD_ID=GENERIC_G484QETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484QETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484QETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484QETX INTERFACE + "LINKER:--default-script=${GENERIC_G484QETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484QETX_MCU} +) +target_link_libraries(GENERIC_G484QETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484QETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484QETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484QETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484QETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484QETX_serial_none INTERFACE) +target_compile_options(GENERIC_G484QETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484QETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484QETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484QETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484QETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484QETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484QETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484QETX_usb_none INTERFACE) +target_compile_options(GENERIC_G484QETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484QETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484QETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484QETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484QETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484QETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484QETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(GENERIC_G484RETX_MAXSIZE 524288) +set(GENERIC_G484RETX_MAXDATASIZE 131072) +set(GENERIC_G484RETX_MCU cortex-m4) +set(GENERIC_G484RETX_FPCONF "-") +add_library(GENERIC_G484RETX INTERFACE) +target_compile_options(GENERIC_G484RETX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484RETX_MCU} +) +target_compile_definitions(GENERIC_G484RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484RETX" + "BOARD_NAME=\"GENERIC_G484RETX\"" + "BOARD_ID=GENERIC_G484RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484RETX INTERFACE + "LINKER:--default-script=${GENERIC_G484RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484RETX_MCU} +) +target_link_libraries(GENERIC_G484RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G484RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G484RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484VEHX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G484VEHX_MAXSIZE 524288) +set(GENERIC_G484VEHX_MAXDATASIZE 131072) +set(GENERIC_G484VEHX_MCU cortex-m4) +set(GENERIC_G484VEHX_FPCONF "-") +add_library(GENERIC_G484VEHX INTERFACE) +target_compile_options(GENERIC_G484VEHX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484VEHX_MCU} +) +target_compile_definitions(GENERIC_G484VEHX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484VEHX" + "BOARD_NAME=\"GENERIC_G484VEHX\"" + "BOARD_ID=GENERIC_G484VEHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484VEHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484VEHX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484VEHX INTERFACE + "LINKER:--default-script=${GENERIC_G484VEHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484VEHX_MCU} +) +target_link_libraries(GENERIC_G484VEHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484VEHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484VEHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484VEHX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484VEHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484VEHX_serial_none INTERFACE) +target_compile_options(GENERIC_G484VEHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484VEHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484VEHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484VEHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484VEHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484VEHX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484VEHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484VEHX_usb_none INTERFACE) +target_compile_options(GENERIC_G484VEHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484VEHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484VEHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484VEHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484VEHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484VEHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484VEHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G484VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G484VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)") +set(GENERIC_G484VETX_MAXSIZE 524288) +set(GENERIC_G484VETX_MAXDATASIZE 131072) +set(GENERIC_G484VETX_MCU cortex-m4) +set(GENERIC_G484VETX_FPCONF "-") +add_library(GENERIC_G484VETX INTERFACE) +target_compile_options(GENERIC_G484VETX INTERFACE + "SHELL:-DSTM32G484xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484VETX_MCU} +) +target_compile_definitions(GENERIC_G484VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G484VETX" + "BOARD_NAME=\"GENERIC_G484VETX\"" + "BOARD_ID=GENERIC_G484VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G484VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G484VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G484VETX INTERFACE + "LINKER:--default-script=${GENERIC_G484VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G484VETX_MCU} +) +target_link_libraries(GENERIC_G484VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G484VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G484VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G484VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G484VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G484VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G484VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G484VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G484VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G484VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G484VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G484VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G484VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G484VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G484VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G484VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G484VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G484VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G484VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G484VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G484VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491C(C-E)T_G4A1CET") +set(GENERIC_G491CCTX_MAXSIZE 262144) +set(GENERIC_G491CCTX_MAXDATASIZE 131072) +set(GENERIC_G491CCTX_MCU cortex-m4) +set(GENERIC_G491CCTX_FPCONF "-") +add_library(GENERIC_G491CCTX INTERFACE) +target_compile_options(GENERIC_G491CCTX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491CCTX_MCU} +) +target_compile_definitions(GENERIC_G491CCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491CCTX" + "BOARD_NAME=\"GENERIC_G491CCTX\"" + "BOARD_ID=GENERIC_G491CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491CCTX INTERFACE + "LINKER:--default-script=${GENERIC_G491CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491CCTX_MCU} +) +target_link_libraries(GENERIC_G491CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G491CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G491CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491C(C-E)T_G4A1CET") +set(GENERIC_G491CETX_MAXSIZE 524288) +set(GENERIC_G491CETX_MAXDATASIZE 131072) +set(GENERIC_G491CETX_MCU cortex-m4) +set(GENERIC_G491CETX_FPCONF "-") +add_library(GENERIC_G491CETX INTERFACE) +target_compile_options(GENERIC_G491CETX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491CETX_MCU} +) +target_compile_definitions(GENERIC_G491CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491CETX" + "BOARD_NAME=\"GENERIC_G491CETX\"" + "BOARD_ID=GENERIC_G491CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491CETX INTERFACE + "LINKER:--default-script=${GENERIC_G491CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491CETX_MCU} +) +target_link_libraries(GENERIC_G491CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G491CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G491CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491KCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491KCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491K(C-E)U_G4A1KEU") +set(GENERIC_G491KCUX_MAXSIZE 262144) +set(GENERIC_G491KCUX_MAXDATASIZE 131072) +set(GENERIC_G491KCUX_MCU cortex-m4) +set(GENERIC_G491KCUX_FPCONF "-") +add_library(GENERIC_G491KCUX INTERFACE) +target_compile_options(GENERIC_G491KCUX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491KCUX_MCU} +) +target_compile_definitions(GENERIC_G491KCUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491KCUX" + "BOARD_NAME=\"GENERIC_G491KCUX\"" + "BOARD_ID=GENERIC_G491KCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491KCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491KCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491KCUX INTERFACE + "LINKER:--default-script=${GENERIC_G491KCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491KCUX_MCU} +) +target_link_libraries(GENERIC_G491KCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491KCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491KCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491KCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491KCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491KCUX_serial_none INTERFACE) +target_compile_options(GENERIC_G491KCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491KCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491KCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491KCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491KCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491KCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491KCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491KCUX_usb_none INTERFACE) +target_compile_options(GENERIC_G491KCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491KCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491KCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491KCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491KCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491KCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491KCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491KEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491KEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491K(C-E)U_G4A1KEU") +set(GENERIC_G491KEUX_MAXSIZE 524288) +set(GENERIC_G491KEUX_MAXDATASIZE 131072) +set(GENERIC_G491KEUX_MCU cortex-m4) +set(GENERIC_G491KEUX_FPCONF "-") +add_library(GENERIC_G491KEUX INTERFACE) +target_compile_options(GENERIC_G491KEUX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491KEUX_MCU} +) +target_compile_definitions(GENERIC_G491KEUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491KEUX" + "BOARD_NAME=\"GENERIC_G491KEUX\"" + "BOARD_ID=GENERIC_G491KEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491KEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491KEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491KEUX INTERFACE + "LINKER:--default-script=${GENERIC_G491KEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491KEUX_MCU} +) +target_link_libraries(GENERIC_G491KEUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491KEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491KEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491KEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491KEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491KEUX_serial_none INTERFACE) +target_compile_options(GENERIC_G491KEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491KEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491KEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491KEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491KEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491KEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491KEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491KEUX_usb_none INTERFACE) +target_compile_options(GENERIC_G491KEUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491KEUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491KEUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491KEUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491KEUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491KEUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491KEUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491MCSX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491MCSX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)") +set(GENERIC_G491MCSX_MAXSIZE 262144) +set(GENERIC_G491MCSX_MAXDATASIZE 131072) +set(GENERIC_G491MCSX_MCU cortex-m4) +set(GENERIC_G491MCSX_FPCONF "-") +add_library(GENERIC_G491MCSX INTERFACE) +target_compile_options(GENERIC_G491MCSX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491MCSX_MCU} +) +target_compile_definitions(GENERIC_G491MCSX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491MCSX" + "BOARD_NAME=\"GENERIC_G491MCSX\"" + "BOARD_ID=GENERIC_G491MCSX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491MCSX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491MCSX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491MCSX INTERFACE + "LINKER:--default-script=${GENERIC_G491MCSX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491MCSX_MCU} +) +target_link_libraries(GENERIC_G491MCSX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491MCSX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491MCSX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MCSX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491MCSX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491MCSX_serial_none INTERFACE) +target_compile_options(GENERIC_G491MCSX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491MCSX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491MCSX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491MCSX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491MCSX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491MCSX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491MCSX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491MCSX_usb_none INTERFACE) +target_compile_options(GENERIC_G491MCSX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MCSX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491MCSX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MCSX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491MCSX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491MCSX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491MCSX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491MCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)") +set(GENERIC_G491MCTX_MAXSIZE 262144) +set(GENERIC_G491MCTX_MAXDATASIZE 131072) +set(GENERIC_G491MCTX_MCU cortex-m4) +set(GENERIC_G491MCTX_FPCONF "-") +add_library(GENERIC_G491MCTX INTERFACE) +target_compile_options(GENERIC_G491MCTX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491MCTX_MCU} +) +target_compile_definitions(GENERIC_G491MCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491MCTX" + "BOARD_NAME=\"GENERIC_G491MCTX\"" + "BOARD_ID=GENERIC_G491MCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491MCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491MCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491MCTX INTERFACE + "LINKER:--default-script=${GENERIC_G491MCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491MCTX_MCU} +) +target_link_libraries(GENERIC_G491MCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491MCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491MCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491MCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491MCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G491MCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491MCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491MCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491MCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491MCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491MCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491MCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491MCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G491MCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491MCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491MCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491MCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491MCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491MESX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491MESX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)") +set(GENERIC_G491MESX_MAXSIZE 524288) +set(GENERIC_G491MESX_MAXDATASIZE 131072) +set(GENERIC_G491MESX_MCU cortex-m4) +set(GENERIC_G491MESX_FPCONF "-") +add_library(GENERIC_G491MESX INTERFACE) +target_compile_options(GENERIC_G491MESX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491MESX_MCU} +) +target_compile_definitions(GENERIC_G491MESX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491MESX" + "BOARD_NAME=\"GENERIC_G491MESX\"" + "BOARD_ID=GENERIC_G491MESX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491MESX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491MESX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491MESX INTERFACE + "LINKER:--default-script=${GENERIC_G491MESX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491MESX_MCU} +) +target_link_libraries(GENERIC_G491MESX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491MESX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491MESX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MESX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491MESX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491MESX_serial_none INTERFACE) +target_compile_options(GENERIC_G491MESX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491MESX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491MESX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491MESX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491MESX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491MESX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491MESX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491MESX_usb_none INTERFACE) +target_compile_options(GENERIC_G491MESX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MESX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491MESX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491MESX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491MESX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491MESX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491MESX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)") +set(GENERIC_G491METX_MAXSIZE 524288) +set(GENERIC_G491METX_MAXDATASIZE 131072) +set(GENERIC_G491METX_MCU cortex-m4) +set(GENERIC_G491METX_FPCONF "-") +add_library(GENERIC_G491METX INTERFACE) +target_compile_options(GENERIC_G491METX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491METX_MCU} +) +target_compile_definitions(GENERIC_G491METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491METX" + "BOARD_NAME=\"GENERIC_G491METX\"" + "BOARD_ID=GENERIC_G491METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491METX INTERFACE + "LINKER:--default-script=${GENERIC_G491METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491METX_MCU} +) +target_link_libraries(GENERIC_G491METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491METX_serial_none INTERFACE) +target_compile_options(GENERIC_G491METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491METX_usb_none INTERFACE) +target_compile_options(GENERIC_G491METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491RCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491RCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G491RCIX_MAXSIZE 262144) +set(GENERIC_G491RCIX_MAXDATASIZE 131072) +set(GENERIC_G491RCIX_MCU cortex-m4) +set(GENERIC_G491RCIX_FPCONF "-") +add_library(GENERIC_G491RCIX INTERFACE) +target_compile_options(GENERIC_G491RCIX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491RCIX_MCU} +) +target_compile_definitions(GENERIC_G491RCIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491RCIX" + "BOARD_NAME=\"GENERIC_G491RCIX\"" + "BOARD_ID=GENERIC_G491RCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491RCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491RCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491RCIX INTERFACE + "LINKER:--default-script=${GENERIC_G491RCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491RCIX_MCU} +) +target_link_libraries(GENERIC_G491RCIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491RCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491RCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491RCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491RCIX_serial_none INTERFACE) +target_compile_options(GENERIC_G491RCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491RCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491RCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491RCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491RCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491RCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491RCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491RCIX_usb_none INTERFACE) +target_compile_options(GENERIC_G491RCIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RCIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491RCIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RCIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491RCIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491RCIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491RCIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G491RCTX_MAXSIZE 262144) +set(GENERIC_G491RCTX_MAXDATASIZE 131072) +set(GENERIC_G491RCTX_MCU cortex-m4) +set(GENERIC_G491RCTX_FPCONF "-") +add_library(GENERIC_G491RCTX INTERFACE) +target_compile_options(GENERIC_G491RCTX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491RCTX_MCU} +) +target_compile_definitions(GENERIC_G491RCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491RCTX" + "BOARD_NAME=\"GENERIC_G491RCTX\"" + "BOARD_ID=GENERIC_G491RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491RCTX INTERFACE + "LINKER:--default-script=${GENERIC_G491RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491RCTX_MCU} +) +target_link_libraries(GENERIC_G491RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G491RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G491RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491REIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491REIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G491REIX_MAXSIZE 524288) +set(GENERIC_G491REIX_MAXDATASIZE 131072) +set(GENERIC_G491REIX_MCU cortex-m4) +set(GENERIC_G491REIX_FPCONF "-") +add_library(GENERIC_G491REIX INTERFACE) +target_compile_options(GENERIC_G491REIX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491REIX_MCU} +) +target_compile_definitions(GENERIC_G491REIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491REIX" + "BOARD_NAME=\"GENERIC_G491REIX\"" + "BOARD_ID=GENERIC_G491REIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491REIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491REIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491REIX INTERFACE + "LINKER:--default-script=${GENERIC_G491REIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491REIX_MCU} +) +target_link_libraries(GENERIC_G491REIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491REIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491REIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491REIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491REIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491REIX_serial_none INTERFACE) +target_compile_options(GENERIC_G491REIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491REIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491REIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491REIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491REIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491REIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491REIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491REIX_usb_none INTERFACE) +target_compile_options(GENERIC_G491REIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491REIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491REIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491REIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491REIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491REIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491REIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G491RETX_MAXSIZE 524288) +set(GENERIC_G491RETX_MAXDATASIZE 131072) +set(GENERIC_G491RETX_MCU cortex-m4) +set(GENERIC_G491RETX_FPCONF "-") +add_library(GENERIC_G491RETX INTERFACE) +target_compile_options(GENERIC_G491RETX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491RETX_MCU} +) +target_compile_definitions(GENERIC_G491RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491RETX" + "BOARD_NAME=\"GENERIC_G491RETX\"" + "BOARD_ID=GENERIC_G491RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491RETX INTERFACE + "LINKER:--default-script=${GENERIC_G491RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491RETX_MCU} +) +target_link_libraries(GENERIC_G491RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G491RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G491RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G491REYX_MAXSIZE 524288) +set(GENERIC_G491REYX_MAXDATASIZE 131072) +set(GENERIC_G491REYX_MCU cortex-m4) +set(GENERIC_G491REYX_FPCONF "-") +add_library(GENERIC_G491REYX INTERFACE) +target_compile_options(GENERIC_G491REYX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491REYX_MCU} +) +target_compile_definitions(GENERIC_G491REYX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491REYX" + "BOARD_NAME=\"GENERIC_G491REYX\"" + "BOARD_ID=GENERIC_G491REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491REYX INTERFACE + "LINKER:--default-script=${GENERIC_G491REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491REYX_MCU} +) +target_link_libraries(GENERIC_G491REYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491REYX_serial_none INTERFACE) +target_compile_options(GENERIC_G491REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491REYX_usb_none INTERFACE) +target_compile_options(GENERIC_G491REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491V(C-E)T_G4A1VET") +set(GENERIC_G491VCTX_MAXSIZE 262144) +set(GENERIC_G491VCTX_MAXDATASIZE 131072) +set(GENERIC_G491VCTX_MCU cortex-m4) +set(GENERIC_G491VCTX_FPCONF "-") +add_library(GENERIC_G491VCTX INTERFACE) +target_compile_options(GENERIC_G491VCTX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491VCTX_MCU} +) +target_compile_definitions(GENERIC_G491VCTX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491VCTX" + "BOARD_NAME=\"GENERIC_G491VCTX\"" + "BOARD_ID=GENERIC_G491VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491VCTX INTERFACE + "LINKER:--default-script=${GENERIC_G491VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491VCTX_MCU} +) +target_link_libraries(GENERIC_G491VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_G491VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_G491VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G491VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G491VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491V(C-E)T_G4A1VET") +set(GENERIC_G491VETX_MAXSIZE 524288) +set(GENERIC_G491VETX_MAXDATASIZE 131072) +set(GENERIC_G491VETX_MCU cortex-m4) +set(GENERIC_G491VETX_FPCONF "-") +add_library(GENERIC_G491VETX INTERFACE) +target_compile_options(GENERIC_G491VETX INTERFACE + "SHELL:-DSTM32G491xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491VETX_MCU} +) +target_compile_definitions(GENERIC_G491VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G491VETX" + "BOARD_NAME=\"GENERIC_G491VETX\"" + "BOARD_ID=GENERIC_G491VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G491VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G491VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G491VETX INTERFACE + "LINKER:--default-script=${GENERIC_G491VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G491VETX_MCU} +) +target_link_libraries(GENERIC_G491VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G491VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G491VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G491VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G491VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G491VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G491VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G491VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G491VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G491VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G491VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G491VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G491VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G491VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G491VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G491VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G491VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G491VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G491VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G491VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G491VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1CETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491C(C-E)T_G4A1CET") +set(GENERIC_G4A1CETX_MAXSIZE 524288) +set(GENERIC_G4A1CETX_MAXDATASIZE 131072) +set(GENERIC_G4A1CETX_MCU cortex-m4) +set(GENERIC_G4A1CETX_FPCONF "-") +add_library(GENERIC_G4A1CETX INTERFACE) +target_compile_options(GENERIC_G4A1CETX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1CETX_MCU} +) +target_compile_definitions(GENERIC_G4A1CETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1CETX" + "BOARD_NAME=\"GENERIC_G4A1CETX\"" + "BOARD_ID=GENERIC_G4A1CETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1CETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1CETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1CETX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1CETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1CETX_MCU} +) +target_link_libraries(GENERIC_G4A1CETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1CETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1CETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1CETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1CETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1CETX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1CETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1CETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1CETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1CETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1CETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1CETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1CETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1CETX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1CETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1CETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1CETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1CETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1CETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1CETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1CETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1KEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1KEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491K(C-E)U_G4A1KEU") +set(GENERIC_G4A1KEUX_MAXSIZE 524288) +set(GENERIC_G4A1KEUX_MAXDATASIZE 131072) +set(GENERIC_G4A1KEUX_MCU cortex-m4) +set(GENERIC_G4A1KEUX_FPCONF "-") +add_library(GENERIC_G4A1KEUX INTERFACE) +target_compile_options(GENERIC_G4A1KEUX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1KEUX_MCU} +) +target_compile_definitions(GENERIC_G4A1KEUX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1KEUX" + "BOARD_NAME=\"GENERIC_G4A1KEUX\"" + "BOARD_ID=GENERIC_G4A1KEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1KEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1KEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1KEUX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1KEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1KEUX_MCU} +) +target_link_libraries(GENERIC_G4A1KEUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1KEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1KEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1KEUX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1KEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1KEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1KEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1KEUX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1KEUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1KEUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1KEUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1KEUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1MESX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1MESX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)") +set(GENERIC_G4A1MESX_MAXSIZE 524288) +set(GENERIC_G4A1MESX_MAXDATASIZE 131072) +set(GENERIC_G4A1MESX_MCU cortex-m4) +set(GENERIC_G4A1MESX_FPCONF "-") +add_library(GENERIC_G4A1MESX INTERFACE) +target_compile_options(GENERIC_G4A1MESX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1MESX_MCU} +) +target_compile_definitions(GENERIC_G4A1MESX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1MESX" + "BOARD_NAME=\"GENERIC_G4A1MESX\"" + "BOARD_ID=GENERIC_G4A1MESX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1MESX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1MESX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1MESX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1MESX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1MESX_MCU} +) +target_link_libraries(GENERIC_G4A1MESX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1MESX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1MESX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1MESX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1MESX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1MESX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1MESX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1MESX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1MESX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1MESX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1MESX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1MESX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1MESX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1MESX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1MESX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1MESX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1MESX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1MESX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1MESX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1MESX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1MESX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1METX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)") +set(GENERIC_G4A1METX_MAXSIZE 524288) +set(GENERIC_G4A1METX_MAXDATASIZE 131072) +set(GENERIC_G4A1METX_MCU cortex-m4) +set(GENERIC_G4A1METX_FPCONF "-") +add_library(GENERIC_G4A1METX INTERFACE) +target_compile_options(GENERIC_G4A1METX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1METX_MCU} +) +target_compile_definitions(GENERIC_G4A1METX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1METX" + "BOARD_NAME=\"GENERIC_G4A1METX\"" + "BOARD_ID=GENERIC_G4A1METX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1METX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1METX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1METX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1METX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1METX_MCU} +) +target_link_libraries(GENERIC_G4A1METX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1METX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1METX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1METX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1METX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1METX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1METX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1METX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1METX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1METX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1METX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1METX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1METX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1METX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1METX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1METX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1METX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1METX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1METX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1METX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1METX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1REIX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1REIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G4A1REIX_MAXSIZE 524288) +set(GENERIC_G4A1REIX_MAXDATASIZE 131072) +set(GENERIC_G4A1REIX_MCU cortex-m4) +set(GENERIC_G4A1REIX_FPCONF "-") +add_library(GENERIC_G4A1REIX INTERFACE) +target_compile_options(GENERIC_G4A1REIX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1REIX_MCU} +) +target_compile_definitions(GENERIC_G4A1REIX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1REIX" + "BOARD_NAME=\"GENERIC_G4A1REIX\"" + "BOARD_ID=GENERIC_G4A1REIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1REIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1REIX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1REIX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1REIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1REIX_MCU} +) +target_link_libraries(GENERIC_G4A1REIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1REIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1REIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1REIX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1REIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1REIX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1REIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1REIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1REIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1REIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1REIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1REIX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1REIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1REIX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1REIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1REIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1REIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1REIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1REIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1REIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1REIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G4A1RETX_MAXSIZE 524288) +set(GENERIC_G4A1RETX_MAXDATASIZE 131072) +set(GENERIC_G4A1RETX_MCU cortex-m4) +set(GENERIC_G4A1RETX_FPCONF "-") +add_library(GENERIC_G4A1RETX INTERFACE) +target_compile_options(GENERIC_G4A1RETX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1RETX_MCU} +) +target_compile_definitions(GENERIC_G4A1RETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1RETX" + "BOARD_NAME=\"GENERIC_G4A1RETX\"" + "BOARD_ID=GENERIC_G4A1RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1RETX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1RETX_MCU} +) +target_link_libraries(GENERIC_G4A1RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1RETX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1RETX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)") +set(GENERIC_G4A1REYX_MAXSIZE 524288) +set(GENERIC_G4A1REYX_MAXDATASIZE 131072) +set(GENERIC_G4A1REYX_MCU cortex-m4) +set(GENERIC_G4A1REYX_FPCONF "-") +add_library(GENERIC_G4A1REYX INTERFACE) +target_compile_options(GENERIC_G4A1REYX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1REYX_MCU} +) +target_compile_definitions(GENERIC_G4A1REYX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1REYX" + "BOARD_NAME=\"GENERIC_G4A1REYX\"" + "BOARD_ID=GENERIC_G4A1REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1REYX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1REYX_MCU} +) +target_link_libraries(GENERIC_G4A1REYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1REYX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1REYX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_G4A1VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_G4A1VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491V(C-E)T_G4A1VET") +set(GENERIC_G4A1VETX_MAXSIZE 524288) +set(GENERIC_G4A1VETX_MAXDATASIZE 131072) +set(GENERIC_G4A1VETX_MCU cortex-m4) +set(GENERIC_G4A1VETX_FPCONF "-") +add_library(GENERIC_G4A1VETX INTERFACE) +target_compile_options(GENERIC_G4A1VETX INTERFACE + "SHELL:-DSTM32G4A1xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1VETX_MCU} +) +target_compile_definitions(GENERIC_G4A1VETX INTERFACE + "STM32G4xx" + "ARDUINO_GENERIC_G4A1VETX" + "BOARD_NAME=\"GENERIC_G4A1VETX\"" + "BOARD_ID=GENERIC_G4A1VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_G4A1VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${GENERIC_G4A1VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_G4A1VETX INTERFACE + "LINKER:--default-script=${GENERIC_G4A1VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_G4A1VETX_MCU} +) +target_link_libraries(GENERIC_G4A1VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_G4A1VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_G4A1VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_G4A1VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_G4A1VETX_serial_none INTERFACE) +target_compile_options(GENERIC_G4A1VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_G4A1VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_G4A1VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_G4A1VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_G4A1VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_G4A1VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_G4A1VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_G4A1VETX_usb_none INTERFACE) +target_compile_options(GENERIC_G4A1VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_G4A1VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_G4A1VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_G4A1VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_G4A1VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_G4A1VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H723ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_H723ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT") +set(GENERIC_H723ZETX_MAXSIZE 524288) +set(GENERIC_H723ZETX_MAXDATASIZE 327680) +set(GENERIC_H723ZETX_MCU cortex-m7) +set(GENERIC_H723ZETX_FPCONF "-") +add_library(GENERIC_H723ZETX INTERFACE) +target_compile_options(GENERIC_H723ZETX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H723xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H723ZETX_MCU} +) +target_compile_definitions(GENERIC_H723ZETX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H723ZETX" + "BOARD_NAME=\"GENERIC_H723ZETX\"" + "BOARD_ID=GENERIC_H723ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H723ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H723ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_H723ZETX INTERFACE + "LINKER:--default-script=${GENERIC_H723ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H723ZETX_MCU} +) +target_link_libraries(GENERIC_H723ZETX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H723ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H723ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H723ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_H723ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H723ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_H723ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H723ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H723ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H723ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H723ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H723ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_H723ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H723ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_H723ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H723ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H723ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H723ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H723ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H723ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H723ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H723ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H723ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT") +set(GENERIC_H723ZGTX_MAXSIZE 1048576) +set(GENERIC_H723ZGTX_MAXDATASIZE 327680) +set(GENERIC_H723ZGTX_MCU cortex-m7) +set(GENERIC_H723ZGTX_FPCONF "-") +add_library(GENERIC_H723ZGTX INTERFACE) +target_compile_options(GENERIC_H723ZGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H723xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H723ZGTX_MCU} +) +target_compile_definitions(GENERIC_H723ZGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H723ZGTX" + "BOARD_NAME=\"GENERIC_H723ZGTX\"" + "BOARD_ID=GENERIC_H723ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H723ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H723ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H723ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_H723ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H723ZGTX_MCU} +) +target_link_libraries(GENERIC_H723ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H723ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H723ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H723ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H723ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H723ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H723ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H723ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H723ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H723ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H723ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H723ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H723ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H723ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H723ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H723ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H723ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H723ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H723ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H723ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H723ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H730ZBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H730ZBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT") +set(GENERIC_H730ZBTX_MAXSIZE 131072) +set(GENERIC_H730ZBTX_MAXDATASIZE 327680) +set(GENERIC_H730ZBTX_MCU cortex-m7) +set(GENERIC_H730ZBTX_FPCONF "-") +add_library(GENERIC_H730ZBTX INTERFACE) +target_compile_options(GENERIC_H730ZBTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H730xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H730ZBTX_MCU} +) +target_compile_definitions(GENERIC_H730ZBTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H730ZBTX" + "BOARD_NAME=\"GENERIC_H730ZBTX\"" + "BOARD_ID=GENERIC_H730ZBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H730ZBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H730ZBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H730ZBTX INTERFACE + "LINKER:--default-script=${GENERIC_H730ZBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H730ZBTX_MCU} +) +target_link_libraries(GENERIC_H730ZBTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H730ZBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H730ZBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H730ZBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H730ZBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H730ZBTX_serial_none INTERFACE) +target_compile_options(GENERIC_H730ZBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H730ZBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H730ZBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H730ZBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H730ZBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H730ZBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H730ZBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H730ZBTX_usb_none INTERFACE) +target_compile_options(GENERIC_H730ZBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H730ZBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H730ZBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H730ZBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H730ZBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H730ZBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H730ZBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H733ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H733ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT") +set(GENERIC_H733ZGTX_MAXSIZE 1048576) +set(GENERIC_H733ZGTX_MAXDATASIZE 327680) +set(GENERIC_H733ZGTX_MCU cortex-m7) +set(GENERIC_H733ZGTX_FPCONF "-") +add_library(GENERIC_H733ZGTX INTERFACE) +target_compile_options(GENERIC_H733ZGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H733xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H733ZGTX_MCU} +) +target_compile_definitions(GENERIC_H733ZGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H733ZGTX" + "BOARD_NAME=\"GENERIC_H733ZGTX\"" + "BOARD_ID=GENERIC_H733ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H733ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H733ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H733ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_H733ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H733ZGTX_MCU} +) +target_link_libraries(GENERIC_H733ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H733ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H733ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H733ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H733ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H733ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H733ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H733ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H733ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H733ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H733ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H733ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H733ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H733ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H733ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H733ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H733ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H733ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H733ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H733ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H733ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742IGKX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742IGKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H742IGKX_MAXSIZE 1048576) +set(GENERIC_H742IGKX_MAXDATASIZE 524288) +set(GENERIC_H742IGKX_MCU cortex-m7) +set(GENERIC_H742IGKX_FPCONF "-") +add_library(GENERIC_H742IGKX INTERFACE) +target_compile_options(GENERIC_H742IGKX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IGKX_MCU} +) +target_compile_definitions(GENERIC_H742IGKX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742IGKX" + "BOARD_NAME=\"GENERIC_H742IGKX\"" + "BOARD_ID=GENERIC_H742IGKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742IGKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742IGKX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742IGKX INTERFACE + "LINKER:--default-script=${GENERIC_H742IGKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IGKX_MCU} +) +target_link_libraries(GENERIC_H742IGKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742IGKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742IGKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IGKX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742IGKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742IGKX_serial_none INTERFACE) +target_compile_options(GENERIC_H742IGKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742IGKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742IGKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742IGKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742IGKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742IGKX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742IGKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742IGKX_usb_none INTERFACE) +target_compile_options(GENERIC_H742IGKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IGKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742IGKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IGKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742IGKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742IGKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742IGKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H742IGTX_MAXSIZE 1048576) +set(GENERIC_H742IGTX_MAXDATASIZE 524288) +set(GENERIC_H742IGTX_MCU cortex-m7) +set(GENERIC_H742IGTX_FPCONF "-") +add_library(GENERIC_H742IGTX INTERFACE) +target_compile_options(GENERIC_H742IGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IGTX_MCU} +) +target_compile_definitions(GENERIC_H742IGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742IGTX" + "BOARD_NAME=\"GENERIC_H742IGTX\"" + "BOARD_ID=GENERIC_H742IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742IGTX INTERFACE + "LINKER:--default-script=${GENERIC_H742IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IGTX_MCU} +) +target_link_libraries(GENERIC_H742IGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H742IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H742IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742IIKX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742IIKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H742IIKX_MAXSIZE 2097152) +set(GENERIC_H742IIKX_MAXDATASIZE 524288) +set(GENERIC_H742IIKX_MCU cortex-m7) +set(GENERIC_H742IIKX_FPCONF "-") +add_library(GENERIC_H742IIKX INTERFACE) +target_compile_options(GENERIC_H742IIKX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IIKX_MCU} +) +target_compile_definitions(GENERIC_H742IIKX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742IIKX" + "BOARD_NAME=\"GENERIC_H742IIKX\"" + "BOARD_ID=GENERIC_H742IIKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742IIKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742IIKX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742IIKX INTERFACE + "LINKER:--default-script=${GENERIC_H742IIKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IIKX_MCU} +) +target_link_libraries(GENERIC_H742IIKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742IIKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742IIKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IIKX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742IIKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742IIKX_serial_none INTERFACE) +target_compile_options(GENERIC_H742IIKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742IIKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742IIKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742IIKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742IIKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742IIKX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742IIKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742IIKX_usb_none INTERFACE) +target_compile_options(GENERIC_H742IIKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IIKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742IIKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IIKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742IIKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742IIKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742IIKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H742IITX_MAXSIZE 2097152) +set(GENERIC_H742IITX_MAXDATASIZE 524288) +set(GENERIC_H742IITX_MCU cortex-m7) +set(GENERIC_H742IITX_FPCONF "-") +add_library(GENERIC_H742IITX INTERFACE) +target_compile_options(GENERIC_H742IITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IITX_MCU} +) +target_compile_definitions(GENERIC_H742IITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742IITX" + "BOARD_NAME=\"GENERIC_H742IITX\"" + "BOARD_ID=GENERIC_H742IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742IITX INTERFACE + "LINKER:--default-script=${GENERIC_H742IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742IITX_MCU} +) +target_link_libraries(GENERIC_H742IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742IITX_serial_none INTERFACE) +target_compile_options(GENERIC_H742IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742IITX_usb_none INTERFACE) +target_compile_options(GENERIC_H742IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742VGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742VGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H742VGHX_MAXSIZE 1048576) +set(GENERIC_H742VGHX_MAXDATASIZE 524288) +set(GENERIC_H742VGHX_MCU cortex-m7) +set(GENERIC_H742VGHX_FPCONF "-") +add_library(GENERIC_H742VGHX INTERFACE) +target_compile_options(GENERIC_H742VGHX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VGHX_MCU} +) +target_compile_definitions(GENERIC_H742VGHX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742VGHX" + "BOARD_NAME=\"GENERIC_H742VGHX\"" + "BOARD_ID=GENERIC_H742VGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742VGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742VGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742VGHX INTERFACE + "LINKER:--default-script=${GENERIC_H742VGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VGHX_MCU} +) +target_link_libraries(GENERIC_H742VGHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742VGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742VGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742VGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742VGHX_serial_none INTERFACE) +target_compile_options(GENERIC_H742VGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742VGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742VGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742VGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742VGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742VGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742VGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742VGHX_usb_none INTERFACE) +target_compile_options(GENERIC_H742VGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742VGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742VGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742VGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742VGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H742VGTX_MAXSIZE 1048576) +set(GENERIC_H742VGTX_MAXDATASIZE 524288) +set(GENERIC_H742VGTX_MCU cortex-m7) +set(GENERIC_H742VGTX_FPCONF "-") +add_library(GENERIC_H742VGTX INTERFACE) +target_compile_options(GENERIC_H742VGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VGTX_MCU} +) +target_compile_definitions(GENERIC_H742VGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742VGTX" + "BOARD_NAME=\"GENERIC_H742VGTX\"" + "BOARD_ID=GENERIC_H742VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742VGTX INTERFACE + "LINKER:--default-script=${GENERIC_H742VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VGTX_MCU} +) +target_link_libraries(GENERIC_H742VGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H742VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H742VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742VIHX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742VIHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H742VIHX_MAXSIZE 2097152) +set(GENERIC_H742VIHX_MAXDATASIZE 524288) +set(GENERIC_H742VIHX_MCU cortex-m7) +set(GENERIC_H742VIHX_FPCONF "-") +add_library(GENERIC_H742VIHX INTERFACE) +target_compile_options(GENERIC_H742VIHX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VIHX_MCU} +) +target_compile_definitions(GENERIC_H742VIHX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742VIHX" + "BOARD_NAME=\"GENERIC_H742VIHX\"" + "BOARD_ID=GENERIC_H742VIHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742VIHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742VIHX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742VIHX INTERFACE + "LINKER:--default-script=${GENERIC_H742VIHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VIHX_MCU} +) +target_link_libraries(GENERIC_H742VIHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742VIHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742VIHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VIHX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742VIHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742VIHX_serial_none INTERFACE) +target_compile_options(GENERIC_H742VIHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742VIHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742VIHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742VIHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742VIHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742VIHX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742VIHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742VIHX_usb_none INTERFACE) +target_compile_options(GENERIC_H742VIHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VIHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742VIHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VIHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742VIHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742VIHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742VIHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H742VITX_MAXSIZE 2097152) +set(GENERIC_H742VITX_MAXDATASIZE 524288) +set(GENERIC_H742VITX_MCU cortex-m7) +set(GENERIC_H742VITX_FPCONF "-") +add_library(GENERIC_H742VITX INTERFACE) +target_compile_options(GENERIC_H742VITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VITX_MCU} +) +target_compile_definitions(GENERIC_H742VITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742VITX" + "BOARD_NAME=\"GENERIC_H742VITX\"" + "BOARD_ID=GENERIC_H742VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742VITX INTERFACE + "LINKER:--default-script=${GENERIC_H742VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742VITX_MCU} +) +target_link_libraries(GENERIC_H742VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742VITX_serial_none INTERFACE) +target_compile_options(GENERIC_H742VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742VITX_usb_none INTERFACE) +target_compile_options(GENERIC_H742VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H742ZGTX_MAXSIZE 1048576) +set(GENERIC_H742ZGTX_MAXDATASIZE 524288) +set(GENERIC_H742ZGTX_MCU cortex-m7) +set(GENERIC_H742ZGTX_FPCONF "-") +add_library(GENERIC_H742ZGTX INTERFACE) +target_compile_options(GENERIC_H742ZGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742ZGTX_MCU} +) +target_compile_definitions(GENERIC_H742ZGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742ZGTX" + "BOARD_NAME=\"GENERIC_H742ZGTX\"" + "BOARD_ID=GENERIC_H742ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_H742ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742ZGTX_MCU} +) +target_link_libraries(GENERIC_H742ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H742ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H742ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H742ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H742ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H742ZITX_MAXSIZE 2097152) +set(GENERIC_H742ZITX_MAXDATASIZE 524288) +set(GENERIC_H742ZITX_MCU cortex-m7) +set(GENERIC_H742ZITX_FPCONF "-") +add_library(GENERIC_H742ZITX INTERFACE) +target_compile_options(GENERIC_H742ZITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H742xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742ZITX_MCU} +) +target_compile_definitions(GENERIC_H742ZITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H742ZITX" + "BOARD_NAME=\"GENERIC_H742ZITX\"" + "BOARD_ID=GENERIC_H742ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H742ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H742ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H742ZITX INTERFACE + "LINKER:--default-script=${GENERIC_H742ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H742ZITX_MCU} +) +target_link_libraries(GENERIC_H742ZITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H742ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H742ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H742ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H742ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H742ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_H742ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H742ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H742ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H742ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H742ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H742ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H742ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H742ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_H742ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H742ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H742ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H742ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H742ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H742ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H742ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743IGKX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743IGKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H743IGKX_MAXSIZE 1048576) +set(GENERIC_H743IGKX_MAXDATASIZE 524288) +set(GENERIC_H743IGKX_MCU cortex-m7) +set(GENERIC_H743IGKX_FPCONF "-") +add_library(GENERIC_H743IGKX INTERFACE) +target_compile_options(GENERIC_H743IGKX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IGKX_MCU} +) +target_compile_definitions(GENERIC_H743IGKX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743IGKX" + "BOARD_NAME=\"GENERIC_H743IGKX\"" + "BOARD_ID=GENERIC_H743IGKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743IGKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743IGKX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743IGKX INTERFACE + "LINKER:--default-script=${GENERIC_H743IGKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IGKX_MCU} +) +target_link_libraries(GENERIC_H743IGKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743IGKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743IGKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IGKX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743IGKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743IGKX_serial_none INTERFACE) +target_compile_options(GENERIC_H743IGKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743IGKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743IGKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743IGKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743IGKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743IGKX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743IGKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743IGKX_usb_none INTERFACE) +target_compile_options(GENERIC_H743IGKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IGKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743IGKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IGKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743IGKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743IGKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743IGKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H743IGTX_MAXSIZE 1048576) +set(GENERIC_H743IGTX_MAXDATASIZE 524288) +set(GENERIC_H743IGTX_MCU cortex-m7) +set(GENERIC_H743IGTX_FPCONF "-") +add_library(GENERIC_H743IGTX INTERFACE) +target_compile_options(GENERIC_H743IGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IGTX_MCU} +) +target_compile_definitions(GENERIC_H743IGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743IGTX" + "BOARD_NAME=\"GENERIC_H743IGTX\"" + "BOARD_ID=GENERIC_H743IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743IGTX INTERFACE + "LINKER:--default-script=${GENERIC_H743IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IGTX_MCU} +) +target_link_libraries(GENERIC_H743IGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H743IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H743IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743IIKX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743IIKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H743IIKX_MAXSIZE 2097152) +set(GENERIC_H743IIKX_MAXDATASIZE 524288) +set(GENERIC_H743IIKX_MCU cortex-m7) +set(GENERIC_H743IIKX_FPCONF "-") +add_library(GENERIC_H743IIKX INTERFACE) +target_compile_options(GENERIC_H743IIKX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IIKX_MCU} +) +target_compile_definitions(GENERIC_H743IIKX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743IIKX" + "BOARD_NAME=\"GENERIC_H743IIKX\"" + "BOARD_ID=GENERIC_H743IIKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743IIKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743IIKX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743IIKX INTERFACE + "LINKER:--default-script=${GENERIC_H743IIKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IIKX_MCU} +) +target_link_libraries(GENERIC_H743IIKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743IIKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743IIKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IIKX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743IIKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743IIKX_serial_none INTERFACE) +target_compile_options(GENERIC_H743IIKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743IIKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743IIKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743IIKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743IIKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743IIKX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743IIKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743IIKX_usb_none INTERFACE) +target_compile_options(GENERIC_H743IIKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IIKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743IIKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IIKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743IIKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743IIKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743IIKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H743IITX_MAXSIZE 2097152) +set(GENERIC_H743IITX_MAXDATASIZE 524288) +set(GENERIC_H743IITX_MCU cortex-m7) +set(GENERIC_H743IITX_FPCONF "-") +add_library(GENERIC_H743IITX INTERFACE) +target_compile_options(GENERIC_H743IITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IITX_MCU} +) +target_compile_definitions(GENERIC_H743IITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743IITX" + "BOARD_NAME=\"GENERIC_H743IITX\"" + "BOARD_ID=GENERIC_H743IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743IITX INTERFACE + "LINKER:--default-script=${GENERIC_H743IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743IITX_MCU} +) +target_link_libraries(GENERIC_H743IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743IITX_serial_none INTERFACE) +target_compile_options(GENERIC_H743IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743IITX_usb_none INTERFACE) +target_compile_options(GENERIC_H743IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743VGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743VGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H743VGHX_MAXSIZE 1048576) +set(GENERIC_H743VGHX_MAXDATASIZE 524288) +set(GENERIC_H743VGHX_MCU cortex-m7) +set(GENERIC_H743VGHX_FPCONF "-") +add_library(GENERIC_H743VGHX INTERFACE) +target_compile_options(GENERIC_H743VGHX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VGHX_MCU} +) +target_compile_definitions(GENERIC_H743VGHX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743VGHX" + "BOARD_NAME=\"GENERIC_H743VGHX\"" + "BOARD_ID=GENERIC_H743VGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743VGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743VGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743VGHX INTERFACE + "LINKER:--default-script=${GENERIC_H743VGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VGHX_MCU} +) +target_link_libraries(GENERIC_H743VGHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743VGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743VGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743VGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743VGHX_serial_none INTERFACE) +target_compile_options(GENERIC_H743VGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743VGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743VGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743VGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743VGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743VGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743VGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743VGHX_usb_none INTERFACE) +target_compile_options(GENERIC_H743VGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743VGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743VGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743VGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743VGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H743VGTX_MAXSIZE 1048576) +set(GENERIC_H743VGTX_MAXDATASIZE 524288) +set(GENERIC_H743VGTX_MCU cortex-m7) +set(GENERIC_H743VGTX_FPCONF "-") +add_library(GENERIC_H743VGTX INTERFACE) +target_compile_options(GENERIC_H743VGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VGTX_MCU} +) +target_compile_definitions(GENERIC_H743VGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743VGTX" + "BOARD_NAME=\"GENERIC_H743VGTX\"" + "BOARD_ID=GENERIC_H743VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743VGTX INTERFACE + "LINKER:--default-script=${GENERIC_H743VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VGTX_MCU} +) +target_link_libraries(GENERIC_H743VGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H743VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H743VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743VIHX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743VIHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H743VIHX_MAXSIZE 2097152) +set(GENERIC_H743VIHX_MAXDATASIZE 524288) +set(GENERIC_H743VIHX_MCU cortex-m7) +set(GENERIC_H743VIHX_FPCONF "-") +add_library(GENERIC_H743VIHX INTERFACE) +target_compile_options(GENERIC_H743VIHX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VIHX_MCU} +) +target_compile_definitions(GENERIC_H743VIHX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743VIHX" + "BOARD_NAME=\"GENERIC_H743VIHX\"" + "BOARD_ID=GENERIC_H743VIHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743VIHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743VIHX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743VIHX INTERFACE + "LINKER:--default-script=${GENERIC_H743VIHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VIHX_MCU} +) +target_link_libraries(GENERIC_H743VIHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743VIHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743VIHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VIHX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743VIHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743VIHX_serial_none INTERFACE) +target_compile_options(GENERIC_H743VIHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743VIHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743VIHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743VIHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743VIHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743VIHX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743VIHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743VIHX_usb_none INTERFACE) +target_compile_options(GENERIC_H743VIHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VIHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743VIHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VIHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743VIHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743VIHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743VIHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H743VITX_MAXSIZE 2097152) +set(GENERIC_H743VITX_MAXDATASIZE 524288) +set(GENERIC_H743VITX_MCU cortex-m7) +set(GENERIC_H743VITX_FPCONF "-") +add_library(GENERIC_H743VITX INTERFACE) +target_compile_options(GENERIC_H743VITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VITX_MCU} +) +target_compile_definitions(GENERIC_H743VITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743VITX" + "BOARD_NAME=\"GENERIC_H743VITX\"" + "BOARD_ID=GENERIC_H743VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743VITX INTERFACE + "LINKER:--default-script=${GENERIC_H743VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743VITX_MCU} +) +target_link_libraries(GENERIC_H743VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743VITX_serial_none INTERFACE) +target_compile_options(GENERIC_H743VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743VITX_usb_none INTERFACE) +target_compile_options(GENERIC_H743VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H743ZGTX_MAXSIZE 1048576) +set(GENERIC_H743ZGTX_MAXDATASIZE 524288) +set(GENERIC_H743ZGTX_MCU cortex-m7) +set(GENERIC_H743ZGTX_FPCONF "-") +add_library(GENERIC_H743ZGTX INTERFACE) +target_compile_options(GENERIC_H743ZGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743ZGTX_MCU} +) +target_compile_definitions(GENERIC_H743ZGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743ZGTX" + "BOARD_NAME=\"GENERIC_H743ZGTX\"" + "BOARD_ID=GENERIC_H743ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_H743ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743ZGTX_MCU} +) +target_link_libraries(GENERIC_H743ZGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H743ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H743ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H743ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H743ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H743ZITX_MAXSIZE 2097152) +set(GENERIC_H743ZITX_MAXDATASIZE 524288) +set(GENERIC_H743ZITX_MCU cortex-m7) +set(GENERIC_H743ZITX_FPCONF "-") +add_library(GENERIC_H743ZITX INTERFACE) +target_compile_options(GENERIC_H743ZITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743ZITX_MCU} +) +target_compile_definitions(GENERIC_H743ZITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H743ZITX" + "BOARD_NAME=\"GENERIC_H743ZITX\"" + "BOARD_ID=GENERIC_H743ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H743ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H743ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H743ZITX INTERFACE + "LINKER:--default-script=${GENERIC_H743ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H743ZITX_MCU} +) +target_link_libraries(GENERIC_H743ZITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H743ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H743ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H743ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H743ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H743ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_H743ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H743ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H743ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H743ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H743ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H743ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H743ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H743ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_H743ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H743ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H743ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H743ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H743ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H743ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H743ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H747AGIX +# ----------------------------------------------------------------------------- + +set(GENERIC_H747AGIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H747AGIX_MAXSIZE 1048576) +set(GENERIC_H747AGIX_MAXDATASIZE 524288) +set(GENERIC_H747AGIX_MCU cortex-m7) +set(GENERIC_H747AGIX_FPCONF "-") +add_library(GENERIC_H747AGIX INTERFACE) +target_compile_options(GENERIC_H747AGIX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747AGIX_MCU} +) +target_compile_definitions(GENERIC_H747AGIX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H747AGIX" + "BOARD_NAME=\"GENERIC_H747AGIX\"" + "BOARD_ID=GENERIC_H747AGIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H747AGIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H747AGIX_VARIANT_PATH} +) + +target_link_options(GENERIC_H747AGIX INTERFACE + "LINKER:--default-script=${GENERIC_H747AGIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747AGIX_MCU} +) +target_link_libraries(GENERIC_H747AGIX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H747AGIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H747AGIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H747AGIX_serial_generic INTERFACE) +target_compile_options(GENERIC_H747AGIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H747AGIX_serial_none INTERFACE) +target_compile_options(GENERIC_H747AGIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H747AGIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H747AGIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H747AGIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H747AGIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H747AGIX_usb_HID INTERFACE) +target_compile_options(GENERIC_H747AGIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H747AGIX_usb_none INTERFACE) +target_compile_options(GENERIC_H747AGIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H747AGIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H747AGIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H747AGIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H747AGIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H747AGIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H747AGIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H747AIIX +# ----------------------------------------------------------------------------- + +set(GENERIC_H747AIIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H747AIIX_MAXSIZE 2097152) +set(GENERIC_H747AIIX_MAXDATASIZE 524288) +set(GENERIC_H747AIIX_MCU cortex-m7) +set(GENERIC_H747AIIX_FPCONF "-") +add_library(GENERIC_H747AIIX INTERFACE) +target_compile_options(GENERIC_H747AIIX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747AIIX_MCU} +) +target_compile_definitions(GENERIC_H747AIIX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H747AIIX" + "BOARD_NAME=\"GENERIC_H747AIIX\"" + "BOARD_ID=GENERIC_H747AIIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H747AIIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H747AIIX_VARIANT_PATH} +) + +target_link_options(GENERIC_H747AIIX INTERFACE + "LINKER:--default-script=${GENERIC_H747AIIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747AIIX_MCU} +) +target_link_libraries(GENERIC_H747AIIX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H747AIIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H747AIIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H747AIIX_serial_generic INTERFACE) +target_compile_options(GENERIC_H747AIIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H747AIIX_serial_none INTERFACE) +target_compile_options(GENERIC_H747AIIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H747AIIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H747AIIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H747AIIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H747AIIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H747AIIX_usb_HID INTERFACE) +target_compile_options(GENERIC_H747AIIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H747AIIX_usb_none INTERFACE) +target_compile_options(GENERIC_H747AIIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H747AIIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H747AIIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H747AIIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H747AIIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H747AIIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H747AIIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H747IGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H747IGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H747IGTX_MAXSIZE 1048576) +set(GENERIC_H747IGTX_MAXDATASIZE 524288) +set(GENERIC_H747IGTX_MCU cortex-m7) +set(GENERIC_H747IGTX_FPCONF "-") +add_library(GENERIC_H747IGTX INTERFACE) +target_compile_options(GENERIC_H747IGTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747IGTX_MCU} +) +target_compile_definitions(GENERIC_H747IGTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H747IGTX" + "BOARD_NAME=\"GENERIC_H747IGTX\"" + "BOARD_ID=GENERIC_H747IGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H747IGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H747IGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H747IGTX INTERFACE + "LINKER:--default-script=${GENERIC_H747IGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747IGTX_MCU} +) +target_link_libraries(GENERIC_H747IGTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H747IGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H747IGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H747IGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H747IGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H747IGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H747IGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H747IGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H747IGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H747IGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H747IGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H747IGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H747IGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H747IGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H747IGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H747IGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H747IGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H747IGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H747IGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H747IGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H747IGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H747IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H747IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H747IITX_MAXSIZE 2097152) +set(GENERIC_H747IITX_MAXDATASIZE 524288) +set(GENERIC_H747IITX_MCU cortex-m7) +set(GENERIC_H747IITX_FPCONF "-") +add_library(GENERIC_H747IITX INTERFACE) +target_compile_options(GENERIC_H747IITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H747xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747IITX_MCU} +) +target_compile_definitions(GENERIC_H747IITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H747IITX" + "BOARD_NAME=\"GENERIC_H747IITX\"" + "BOARD_ID=GENERIC_H747IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H747IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H747IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H747IITX INTERFACE + "LINKER:--default-script=${GENERIC_H747IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H747IITX_MCU} +) +target_link_libraries(GENERIC_H747IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H747IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H747IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H747IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H747IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H747IITX_serial_none INTERFACE) +target_compile_options(GENERIC_H747IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H747IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H747IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H747IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H747IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H747IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H747IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H747IITX_usb_none INTERFACE) +target_compile_options(GENERIC_H747IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H747IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H747IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H747IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H747IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H747IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H747IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H750IBKX +# ----------------------------------------------------------------------------- + +set(GENERIC_H750IBKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H750IBKX_MAXSIZE 131072) +set(GENERIC_H750IBKX_MAXDATASIZE 524288) +set(GENERIC_H750IBKX_MCU cortex-m7) +set(GENERIC_H750IBKX_FPCONF "-") +add_library(GENERIC_H750IBKX INTERFACE) +target_compile_options(GENERIC_H750IBKX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750IBKX_MCU} +) +target_compile_definitions(GENERIC_H750IBKX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H750IBKX" + "BOARD_NAME=\"GENERIC_H750IBKX\"" + "BOARD_ID=GENERIC_H750IBKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H750IBKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H750IBKX_VARIANT_PATH} +) + +target_link_options(GENERIC_H750IBKX INTERFACE + "LINKER:--default-script=${GENERIC_H750IBKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750IBKX_MCU} +) +target_link_libraries(GENERIC_H750IBKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H750IBKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H750IBKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H750IBKX_serial_generic INTERFACE) +target_compile_options(GENERIC_H750IBKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H750IBKX_serial_none INTERFACE) +target_compile_options(GENERIC_H750IBKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H750IBKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H750IBKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H750IBKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H750IBKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H750IBKX_usb_HID INTERFACE) +target_compile_options(GENERIC_H750IBKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H750IBKX_usb_none INTERFACE) +target_compile_options(GENERIC_H750IBKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H750IBKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H750IBKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H750IBKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H750IBKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H750IBKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H750IBKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H750IBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H750IBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H750IBTX_MAXSIZE 131072) +set(GENERIC_H750IBTX_MAXDATASIZE 524288) +set(GENERIC_H750IBTX_MCU cortex-m7) +set(GENERIC_H750IBTX_FPCONF "-") +add_library(GENERIC_H750IBTX INTERFACE) +target_compile_options(GENERIC_H750IBTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750IBTX_MCU} +) +target_compile_definitions(GENERIC_H750IBTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H750IBTX" + "BOARD_NAME=\"GENERIC_H750IBTX\"" + "BOARD_ID=GENERIC_H750IBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H750IBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H750IBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H750IBTX INTERFACE + "LINKER:--default-script=${GENERIC_H750IBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750IBTX_MCU} +) +target_link_libraries(GENERIC_H750IBTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H750IBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H750IBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H750IBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H750IBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H750IBTX_serial_none INTERFACE) +target_compile_options(GENERIC_H750IBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H750IBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H750IBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H750IBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H750IBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H750IBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H750IBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H750IBTX_usb_none INTERFACE) +target_compile_options(GENERIC_H750IBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H750IBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H750IBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H750IBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H750IBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H750IBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H750IBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H750VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H750VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H750VBTX_MAXSIZE 131072) +set(GENERIC_H750VBTX_MAXDATASIZE 524288) +set(GENERIC_H750VBTX_MCU cortex-m7) +set(GENERIC_H750VBTX_FPCONF "-") +add_library(GENERIC_H750VBTX INTERFACE) +target_compile_options(GENERIC_H750VBTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750VBTX_MCU} +) +target_compile_definitions(GENERIC_H750VBTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H750VBTX" + "BOARD_NAME=\"GENERIC_H750VBTX\"" + "BOARD_ID=GENERIC_H750VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H750VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H750VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H750VBTX INTERFACE + "LINKER:--default-script=${GENERIC_H750VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750VBTX_MCU} +) +target_link_libraries(GENERIC_H750VBTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H750VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H750VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H750VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H750VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H750VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_H750VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H750VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H750VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H750VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H750VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H750VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H750VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H750VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_H750VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H750VBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H750VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H750VBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H750VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H750VBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H750VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H750ZBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H750ZBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H750ZBTX_MAXSIZE 131072) +set(GENERIC_H750ZBTX_MAXDATASIZE 524288) +set(GENERIC_H750ZBTX_MCU cortex-m7) +set(GENERIC_H750ZBTX_FPCONF "-") +add_library(GENERIC_H750ZBTX INTERFACE) +target_compile_options(GENERIC_H750ZBTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750ZBTX_MCU} +) +target_compile_definitions(GENERIC_H750ZBTX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H750ZBTX" + "BOARD_NAME=\"GENERIC_H750ZBTX\"" + "BOARD_ID=GENERIC_H750ZBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H750ZBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H750ZBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H750ZBTX INTERFACE + "LINKER:--default-script=${GENERIC_H750ZBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H750ZBTX_MCU} +) +target_link_libraries(GENERIC_H750ZBTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H750ZBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H750ZBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H750ZBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H750ZBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H750ZBTX_serial_none INTERFACE) +target_compile_options(GENERIC_H750ZBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H750ZBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H750ZBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H750ZBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H750ZBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H750ZBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H750ZBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H750ZBTX_usb_none INTERFACE) +target_compile_options(GENERIC_H750ZBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H750ZBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H750ZBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H750ZBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H750ZBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H750ZBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H750ZBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H753IIKX +# ----------------------------------------------------------------------------- + +set(GENERIC_H753IIKX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H753IIKX_MAXSIZE 2097152) +set(GENERIC_H753IIKX_MAXDATASIZE 524288) +set(GENERIC_H753IIKX_MCU cortex-m7) +set(GENERIC_H753IIKX_FPCONF "-") +add_library(GENERIC_H753IIKX INTERFACE) +target_compile_options(GENERIC_H753IIKX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753IIKX_MCU} +) +target_compile_definitions(GENERIC_H753IIKX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H753IIKX" + "BOARD_NAME=\"GENERIC_H753IIKX\"" + "BOARD_ID=GENERIC_H753IIKX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H753IIKX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H753IIKX_VARIANT_PATH} +) + +target_link_options(GENERIC_H753IIKX INTERFACE + "LINKER:--default-script=${GENERIC_H753IIKX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753IIKX_MCU} +) +target_link_libraries(GENERIC_H753IIKX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H753IIKX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H753IIKX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H753IIKX_serial_generic INTERFACE) +target_compile_options(GENERIC_H753IIKX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H753IIKX_serial_none INTERFACE) +target_compile_options(GENERIC_H753IIKX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H753IIKX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H753IIKX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H753IIKX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H753IIKX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H753IIKX_usb_HID INTERFACE) +target_compile_options(GENERIC_H753IIKX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H753IIKX_usb_none INTERFACE) +target_compile_options(GENERIC_H753IIKX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H753IIKX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H753IIKX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H753IIKX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H753IIKX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H753IIKX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H753IIKX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H753IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H753IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)") +set(GENERIC_H753IITX_MAXSIZE 2097152) +set(GENERIC_H753IITX_MAXDATASIZE 524288) +set(GENERIC_H753IITX_MCU cortex-m7) +set(GENERIC_H753IITX_FPCONF "-") +add_library(GENERIC_H753IITX INTERFACE) +target_compile_options(GENERIC_H753IITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753IITX_MCU} +) +target_compile_definitions(GENERIC_H753IITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H753IITX" + "BOARD_NAME=\"GENERIC_H753IITX\"" + "BOARD_ID=GENERIC_H753IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H753IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H753IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H753IITX INTERFACE + "LINKER:--default-script=${GENERIC_H753IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753IITX_MCU} +) +target_link_libraries(GENERIC_H753IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H753IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H753IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H753IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H753IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H753IITX_serial_none INTERFACE) +target_compile_options(GENERIC_H753IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H753IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H753IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H753IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H753IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H753IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H753IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H753IITX_usb_none INTERFACE) +target_compile_options(GENERIC_H753IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H753IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H753IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H753IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H753IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H753IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H753IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H753VIHX +# ----------------------------------------------------------------------------- + +set(GENERIC_H753VIHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H753VIHX_MAXSIZE 2097152) +set(GENERIC_H753VIHX_MAXDATASIZE 524288) +set(GENERIC_H753VIHX_MCU cortex-m7) +set(GENERIC_H753VIHX_FPCONF "-") +add_library(GENERIC_H753VIHX INTERFACE) +target_compile_options(GENERIC_H753VIHX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753VIHX_MCU} +) +target_compile_definitions(GENERIC_H753VIHX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H753VIHX" + "BOARD_NAME=\"GENERIC_H753VIHX\"" + "BOARD_ID=GENERIC_H753VIHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H753VIHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H753VIHX_VARIANT_PATH} +) + +target_link_options(GENERIC_H753VIHX INTERFACE + "LINKER:--default-script=${GENERIC_H753VIHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753VIHX_MCU} +) +target_link_libraries(GENERIC_H753VIHX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H753VIHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H753VIHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H753VIHX_serial_generic INTERFACE) +target_compile_options(GENERIC_H753VIHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H753VIHX_serial_none INTERFACE) +target_compile_options(GENERIC_H753VIHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H753VIHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H753VIHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H753VIHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H753VIHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H753VIHX_usb_HID INTERFACE) +target_compile_options(GENERIC_H753VIHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H753VIHX_usb_none INTERFACE) +target_compile_options(GENERIC_H753VIHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H753VIHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H753VIHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H753VIHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H753VIHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H753VIHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H753VIHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H753VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H753VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(GENERIC_H753VITX_MAXSIZE 2097152) +set(GENERIC_H753VITX_MAXDATASIZE 524288) +set(GENERIC_H753VITX_MCU cortex-m7) +set(GENERIC_H753VITX_FPCONF "-") +add_library(GENERIC_H753VITX INTERFACE) +target_compile_options(GENERIC_H753VITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753VITX_MCU} +) +target_compile_definitions(GENERIC_H753VITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H753VITX" + "BOARD_NAME=\"GENERIC_H753VITX\"" + "BOARD_ID=GENERIC_H753VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H753VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H753VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H753VITX INTERFACE + "LINKER:--default-script=${GENERIC_H753VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753VITX_MCU} +) +target_link_libraries(GENERIC_H753VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H753VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H753VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H753VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H753VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H753VITX_serial_none INTERFACE) +target_compile_options(GENERIC_H753VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H753VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H753VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H753VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H753VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H753VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H753VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H753VITX_usb_none INTERFACE) +target_compile_options(GENERIC_H753VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H753VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H753VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H753VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H753VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H753VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H753VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H753ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H753ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H753ZITX_MAXSIZE 2097152) +set(GENERIC_H753ZITX_MAXDATASIZE 524288) +set(GENERIC_H753ZITX_MCU cortex-m7) +set(GENERIC_H753ZITX_FPCONF "-") +add_library(GENERIC_H753ZITX INTERFACE) +target_compile_options(GENERIC_H753ZITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H753xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753ZITX_MCU} +) +target_compile_definitions(GENERIC_H753ZITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H753ZITX" + "BOARD_NAME=\"GENERIC_H753ZITX\"" + "BOARD_ID=GENERIC_H753ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H753ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H753ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H753ZITX INTERFACE + "LINKER:--default-script=${GENERIC_H753ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H753ZITX_MCU} +) +target_link_libraries(GENERIC_H753ZITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H753ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H753ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H753ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H753ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H753ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_H753ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H753ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H753ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H753ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H753ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H753ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H753ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H753ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_H753ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H753ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H753ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H753ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H753ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H753ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H753ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H757AIIX +# ----------------------------------------------------------------------------- + +set(GENERIC_H757AIIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H757AIIX_MAXSIZE 2097152) +set(GENERIC_H757AIIX_MAXDATASIZE 524288) +set(GENERIC_H757AIIX_MCU cortex-m7) +set(GENERIC_H757AIIX_FPCONF "-") +add_library(GENERIC_H757AIIX INTERFACE) +target_compile_options(GENERIC_H757AIIX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H757xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H757AIIX_MCU} +) +target_compile_definitions(GENERIC_H757AIIX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H757AIIX" + "BOARD_NAME=\"GENERIC_H757AIIX\"" + "BOARD_ID=GENERIC_H757AIIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H757AIIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H757AIIX_VARIANT_PATH} +) + +target_link_options(GENERIC_H757AIIX INTERFACE + "LINKER:--default-script=${GENERIC_H757AIIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H757AIIX_MCU} +) +target_link_libraries(GENERIC_H757AIIX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H757AIIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H757AIIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H757AIIX_serial_generic INTERFACE) +target_compile_options(GENERIC_H757AIIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H757AIIX_serial_none INTERFACE) +target_compile_options(GENERIC_H757AIIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H757AIIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H757AIIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H757AIIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H757AIIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H757AIIX_usb_HID INTERFACE) +target_compile_options(GENERIC_H757AIIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H757AIIX_usb_none INTERFACE) +target_compile_options(GENERIC_H757AIIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H757AIIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H757AIIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H757AIIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H757AIIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H757AIIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H757AIIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H757IITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H757IITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(GENERIC_H757IITX_MAXSIZE 2097152) +set(GENERIC_H757IITX_MAXDATASIZE 524288) +set(GENERIC_H757IITX_MCU cortex-m7) +set(GENERIC_H757IITX_FPCONF "-") +add_library(GENERIC_H757IITX INTERFACE) +target_compile_options(GENERIC_H757IITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H757xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H757IITX_MCU} +) +target_compile_definitions(GENERIC_H757IITX INTERFACE + "STM32H7xx" + "ARDUINO_GENERIC_H757IITX" + "BOARD_NAME=\"GENERIC_H757IITX\"" + "BOARD_ID=GENERIC_H757IITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H757IITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${GENERIC_H757IITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H757IITX INTERFACE + "LINKER:--default-script=${GENERIC_H757IITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H757IITX_MCU} +) +target_link_libraries(GENERIC_H757IITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(GENERIC_H757IITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H757IITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H757IITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H757IITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H757IITX_serial_none INTERFACE) +target_compile_options(GENERIC_H757IITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H757IITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H757IITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H757IITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H757IITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H757IITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H757IITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H757IITX_usb_none INTERFACE) +target_compile_options(GENERIC_H757IITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H757IITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H757IITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H757IITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H757IITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H757IITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H757IITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L010C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L010C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010C6T") +set(GENERIC_L010C6TX_MAXSIZE 32768) +set(GENERIC_L010C6TX_MAXDATASIZE 8192) +set(GENERIC_L010C6TX_MCU cortex-m0plus) +set(GENERIC_L010C6TX_FPCONF "-") +add_library(GENERIC_L010C6TX INTERFACE) +target_compile_options(GENERIC_L010C6TX INTERFACE + "SHELL:-DSTM32L010x6 -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L010C6TX_MCU} +) +target_compile_definitions(GENERIC_L010C6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L010C6TX" + "BOARD_NAME=\"GENERIC_L010C6TX\"" + "BOARD_ID=GENERIC_L010C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L010C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L010C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L010C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L010C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L010C6TX_MCU} +) +target_link_libraries(GENERIC_L010C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L010C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L010C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L010C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L010C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L010C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L010C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L010C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L010C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L010C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L010C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L010C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L010C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L010C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L010C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L010F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L010F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P") +set(GENERIC_L010F4PX_MAXSIZE 16384) +set(GENERIC_L010F4PX_MAXDATASIZE 2048) +set(GENERIC_L010F4PX_MCU cortex-m0plus) +set(GENERIC_L010F4PX_FPCONF "-") +add_library(GENERIC_L010F4PX INTERFACE) +target_compile_options(GENERIC_L010F4PX INTERFACE + "SHELL:-DSTM32L010x4 -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L010F4PX_MCU} +) +target_compile_definitions(GENERIC_L010F4PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L010F4PX" + "BOARD_NAME=\"GENERIC_L010F4PX\"" + "BOARD_ID=GENERIC_L010F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L010F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L010F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L010F4PX INTERFACE + "LINKER:--default-script=${GENERIC_L010F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L010F4PX_MCU} +) +target_link_libraries(GENERIC_L010F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L010F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L010F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L010F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L010F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L010F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_L010F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L010F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L010F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L010F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L010F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L010F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L010F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L010F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_L010F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L010K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L010K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T") +set(GENERIC_L010K4TX_MAXSIZE 16384) +set(GENERIC_L010K4TX_MAXDATASIZE 2048) +set(GENERIC_L010K4TX_MCU cortex-m0plus) +set(GENERIC_L010K4TX_FPCONF "-") +add_library(GENERIC_L010K4TX INTERFACE) +target_compile_options(GENERIC_L010K4TX INTERFACE + "SHELL:-DSTM32L010x4 -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L010K4TX_MCU} +) +target_compile_definitions(GENERIC_L010K4TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L010K4TX" + "BOARD_NAME=\"GENERIC_L010K4TX\"" + "BOARD_ID=GENERIC_L010K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L010K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L010K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L010K4TX INTERFACE + "LINKER:--default-script=${GENERIC_L010K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L010K4TX_MCU} +) +target_link_libraries(GENERIC_L010K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L010K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L010K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L010K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L010K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L010K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_L010K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L010K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L010K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L010K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L010K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L010K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L010K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L010K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_L010K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L010R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L010R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010R8T") +set(GENERIC_L010R8TX_MAXSIZE 65536) +set(GENERIC_L010R8TX_MAXDATASIZE 8192) +set(GENERIC_L010R8TX_MCU cortex-m0plus) +set(GENERIC_L010R8TX_FPCONF "-") +add_library(GENERIC_L010R8TX INTERFACE) +target_compile_options(GENERIC_L010R8TX INTERFACE + "SHELL:-DSTM32L010x8 -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L010R8TX_MCU} +) +target_compile_definitions(GENERIC_L010R8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L010R8TX" + "BOARD_NAME=\"GENERIC_L010R8TX\"" + "BOARD_ID=GENERIC_L010R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L010R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L010R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L010R8TX INTERFACE + "LINKER:--default-script=${GENERIC_L010R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L010R8TX_MCU} +) +target_link_libraries(GENERIC_L010R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L010R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L010R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L010R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L010R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L010R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L010R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L010R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L010R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L010R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L010R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L010R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L010R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L010R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L010R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L010RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L010RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010RBT") +set(GENERIC_L010RBTX_MAXSIZE 131072) +set(GENERIC_L010RBTX_MAXDATASIZE 20480) +set(GENERIC_L010RBTX_MCU cortex-m0plus) +set(GENERIC_L010RBTX_FPCONF "-") +add_library(GENERIC_L010RBTX INTERFACE) +target_compile_options(GENERIC_L010RBTX INTERFACE + "SHELL:-DSTM32L010xB -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L010RBTX_MCU} +) +target_compile_definitions(GENERIC_L010RBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L010RBTX" + "BOARD_NAME=\"GENERIC_L010RBTX\"" + "BOARD_ID=GENERIC_L010RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L010RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L010RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L010RBTX INTERFACE + "LINKER:--default-script=${GENERIC_L010RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L010RBTX_MCU} +) +target_link_libraries(GENERIC_L010RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L010RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L010RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L010RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L010RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L010RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L010RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L010RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L010RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L010RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L010RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L010RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L010RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L010RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L010RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011D3PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011D3PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011D(3-4)P_L021D4P") +set(GENERIC_L011D3PX_MAXSIZE 8192) +set(GENERIC_L011D3PX_MAXDATASIZE 2048) +set(GENERIC_L011D3PX_MCU cortex-m0plus) +set(GENERIC_L011D3PX_FPCONF "-") +add_library(GENERIC_L011D3PX INTERFACE) +target_compile_options(GENERIC_L011D3PX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011D3PX_MCU} +) +target_compile_definitions(GENERIC_L011D3PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011D3PX" + "BOARD_NAME=\"GENERIC_L011D3PX\"" + "BOARD_ID=GENERIC_L011D3PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011D3PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011D3PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011D3PX INTERFACE + "LINKER:--default-script=${GENERIC_L011D3PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011D3PX_MCU} +) +target_link_libraries(GENERIC_L011D3PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011D3PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011D3PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011D3PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011D3PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011D3PX_serial_none INTERFACE) +target_compile_options(GENERIC_L011D3PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011D3PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011D3PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011D3PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011D3PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011D3PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011D3PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011D3PX_usb_none INTERFACE) +target_compile_options(GENERIC_L011D3PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011D4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011D4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011D(3-4)P_L021D4P") +set(GENERIC_L011D4PX_MAXSIZE 16384) +set(GENERIC_L011D4PX_MAXDATASIZE 2048) +set(GENERIC_L011D4PX_MCU cortex-m0plus) +set(GENERIC_L011D4PX_FPCONF "-") +add_library(GENERIC_L011D4PX INTERFACE) +target_compile_options(GENERIC_L011D4PX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011D4PX_MCU} +) +target_compile_definitions(GENERIC_L011D4PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011D4PX" + "BOARD_NAME=\"GENERIC_L011D4PX\"" + "BOARD_ID=GENERIC_L011D4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011D4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011D4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011D4PX INTERFACE + "LINKER:--default-script=${GENERIC_L011D4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011D4PX_MCU} +) +target_link_libraries(GENERIC_L011D4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011D4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011D4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011D4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011D4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011D4PX_serial_none INTERFACE) +target_compile_options(GENERIC_L011D4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011D4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011D4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011D4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011D4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011D4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011D4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011D4PX_usb_none INTERFACE) +target_compile_options(GENERIC_L011D4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011E3YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011E3YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011E(3-4)Y") +set(GENERIC_L011E3YX_MAXSIZE 8192) +set(GENERIC_L011E3YX_MAXDATASIZE 2048) +set(GENERIC_L011E3YX_MCU cortex-m0plus) +set(GENERIC_L011E3YX_FPCONF "-") +add_library(GENERIC_L011E3YX INTERFACE) +target_compile_options(GENERIC_L011E3YX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011E3YX_MCU} +) +target_compile_definitions(GENERIC_L011E3YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011E3YX" + "BOARD_NAME=\"GENERIC_L011E3YX\"" + "BOARD_ID=GENERIC_L011E3YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011E3YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011E3YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011E3YX INTERFACE + "LINKER:--default-script=${GENERIC_L011E3YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011E3YX_MCU} +) +target_link_libraries(GENERIC_L011E3YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011E3YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011E3YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011E3YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011E3YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011E3YX_serial_none INTERFACE) +target_compile_options(GENERIC_L011E3YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011E3YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011E3YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011E3YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011E3YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011E3YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011E3YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011E3YX_usb_none INTERFACE) +target_compile_options(GENERIC_L011E3YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011E4YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011E4YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011E(3-4)Y") +set(GENERIC_L011E4YX_MAXSIZE 16384) +set(GENERIC_L011E4YX_MAXDATASIZE 2048) +set(GENERIC_L011E4YX_MCU cortex-m0plus) +set(GENERIC_L011E4YX_FPCONF "-") +add_library(GENERIC_L011E4YX INTERFACE) +target_compile_options(GENERIC_L011E4YX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011E4YX_MCU} +) +target_compile_definitions(GENERIC_L011E4YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011E4YX" + "BOARD_NAME=\"GENERIC_L011E4YX\"" + "BOARD_ID=GENERIC_L011E4YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011E4YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011E4YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011E4YX INTERFACE + "LINKER:--default-script=${GENERIC_L011E4YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011E4YX_MCU} +) +target_link_libraries(GENERIC_L011E4YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011E4YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011E4YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011E4YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011E4YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011E4YX_serial_none INTERFACE) +target_compile_options(GENERIC_L011E4YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011E4YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011E4YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011E4YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011E4YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011E4YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011E4YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011E4YX_usb_none INTERFACE) +target_compile_options(GENERIC_L011E4YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011F3PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011F3PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P") +set(GENERIC_L011F3PX_MAXSIZE 8192) +set(GENERIC_L011F3PX_MAXDATASIZE 2048) +set(GENERIC_L011F3PX_MCU cortex-m0plus) +set(GENERIC_L011F3PX_FPCONF "-") +add_library(GENERIC_L011F3PX INTERFACE) +target_compile_options(GENERIC_L011F3PX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011F3PX_MCU} +) +target_compile_definitions(GENERIC_L011F3PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011F3PX" + "BOARD_NAME=\"GENERIC_L011F3PX\"" + "BOARD_ID=GENERIC_L011F3PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011F3PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011F3PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011F3PX INTERFACE + "LINKER:--default-script=${GENERIC_L011F3PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011F3PX_MCU} +) +target_link_libraries(GENERIC_L011F3PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011F3PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011F3PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011F3PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011F3PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011F3PX_serial_none INTERFACE) +target_compile_options(GENERIC_L011F3PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011F3PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011F3PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011F3PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011F3PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011F3PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011F3PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011F3PX_usb_none INTERFACE) +target_compile_options(GENERIC_L011F3PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011F3UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011F3UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011F(3-4)U_L021F4U") +set(GENERIC_L011F3UX_MAXSIZE 8192) +set(GENERIC_L011F3UX_MAXDATASIZE 2048) +set(GENERIC_L011F3UX_MCU cortex-m0plus) +set(GENERIC_L011F3UX_FPCONF "-") +add_library(GENERIC_L011F3UX INTERFACE) +target_compile_options(GENERIC_L011F3UX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011F3UX_MCU} +) +target_compile_definitions(GENERIC_L011F3UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011F3UX" + "BOARD_NAME=\"GENERIC_L011F3UX\"" + "BOARD_ID=GENERIC_L011F3UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011F3UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011F3UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011F3UX INTERFACE + "LINKER:--default-script=${GENERIC_L011F3UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011F3UX_MCU} +) +target_link_libraries(GENERIC_L011F3UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011F3UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011F3UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011F3UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011F3UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011F3UX_serial_none INTERFACE) +target_compile_options(GENERIC_L011F3UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011F3UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011F3UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011F3UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011F3UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011F3UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011F3UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011F3UX_usb_none INTERFACE) +target_compile_options(GENERIC_L011F3UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P") +set(GENERIC_L011F4PX_MAXSIZE 16384) +set(GENERIC_L011F4PX_MAXDATASIZE 2048) +set(GENERIC_L011F4PX_MCU cortex-m0plus) +set(GENERIC_L011F4PX_FPCONF "-") +add_library(GENERIC_L011F4PX INTERFACE) +target_compile_options(GENERIC_L011F4PX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011F4PX_MCU} +) +target_compile_definitions(GENERIC_L011F4PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011F4PX" + "BOARD_NAME=\"GENERIC_L011F4PX\"" + "BOARD_ID=GENERIC_L011F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011F4PX INTERFACE + "LINKER:--default-script=${GENERIC_L011F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011F4PX_MCU} +) +target_link_libraries(GENERIC_L011F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_L011F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_L011F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011F4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011F4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011F(3-4)U_L021F4U") +set(GENERIC_L011F4UX_MAXSIZE 16384) +set(GENERIC_L011F4UX_MAXDATASIZE 2048) +set(GENERIC_L011F4UX_MCU cortex-m0plus) +set(GENERIC_L011F4UX_FPCONF "-") +add_library(GENERIC_L011F4UX INTERFACE) +target_compile_options(GENERIC_L011F4UX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011F4UX_MCU} +) +target_compile_definitions(GENERIC_L011F4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011F4UX" + "BOARD_NAME=\"GENERIC_L011F4UX\"" + "BOARD_ID=GENERIC_L011F4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011F4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011F4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011F4UX INTERFACE + "LINKER:--default-script=${GENERIC_L011F4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011F4UX_MCU} +) +target_link_libraries(GENERIC_L011F4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011F4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011F4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011F4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011F4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011F4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L011F4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011F4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011F4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011F4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011F4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011F4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011F4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011F4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L011F4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011G3UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011G3UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011G(3-4)U_L021G4U") +set(GENERIC_L011G3UX_MAXSIZE 8192) +set(GENERIC_L011G3UX_MAXDATASIZE 2048) +set(GENERIC_L011G3UX_MCU cortex-m0plus) +set(GENERIC_L011G3UX_FPCONF "-") +add_library(GENERIC_L011G3UX INTERFACE) +target_compile_options(GENERIC_L011G3UX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011G3UX_MCU} +) +target_compile_definitions(GENERIC_L011G3UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011G3UX" + "BOARD_NAME=\"GENERIC_L011G3UX\"" + "BOARD_ID=GENERIC_L011G3UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011G3UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011G3UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011G3UX INTERFACE + "LINKER:--default-script=${GENERIC_L011G3UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011G3UX_MCU} +) +target_link_libraries(GENERIC_L011G3UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011G3UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011G3UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011G3UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011G3UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011G3UX_serial_none INTERFACE) +target_compile_options(GENERIC_L011G3UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011G3UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011G3UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011G3UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011G3UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011G3UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011G3UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011G3UX_usb_none INTERFACE) +target_compile_options(GENERIC_L011G3UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011G4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011G4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011G(3-4)U_L021G4U") +set(GENERIC_L011G4UX_MAXSIZE 16384) +set(GENERIC_L011G4UX_MAXDATASIZE 2048) +set(GENERIC_L011G4UX_MCU cortex-m0plus) +set(GENERIC_L011G4UX_FPCONF "-") +add_library(GENERIC_L011G4UX INTERFACE) +target_compile_options(GENERIC_L011G4UX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011G4UX_MCU} +) +target_compile_definitions(GENERIC_L011G4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011G4UX" + "BOARD_NAME=\"GENERIC_L011G4UX\"" + "BOARD_ID=GENERIC_L011G4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011G4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011G4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011G4UX INTERFACE + "LINKER:--default-script=${GENERIC_L011G4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011G4UX_MCU} +) +target_link_libraries(GENERIC_L011G4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011G4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011G4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011G4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011G4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011G4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L011G4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011G4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011G4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011G4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011G4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011G4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011G4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011G4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L011G4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011K3TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011K3TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T") +set(GENERIC_L011K3TX_MAXSIZE 8192) +set(GENERIC_L011K3TX_MAXDATASIZE 2048) +set(GENERIC_L011K3TX_MCU cortex-m0plus) +set(GENERIC_L011K3TX_FPCONF "-") +add_library(GENERIC_L011K3TX INTERFACE) +target_compile_options(GENERIC_L011K3TX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011K3TX_MCU} +) +target_compile_definitions(GENERIC_L011K3TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011K3TX" + "BOARD_NAME=\"GENERIC_L011K3TX\"" + "BOARD_ID=GENERIC_L011K3TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011K3TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011K3TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011K3TX INTERFACE + "LINKER:--default-script=${GENERIC_L011K3TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011K3TX_MCU} +) +target_link_libraries(GENERIC_L011K3TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011K3TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011K3TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011K3TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011K3TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011K3TX_serial_none INTERFACE) +target_compile_options(GENERIC_L011K3TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011K3TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011K3TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011K3TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011K3TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011K3TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011K3TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011K3TX_usb_none INTERFACE) +target_compile_options(GENERIC_L011K3TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011K3UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011K3UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011K(3-4)U_L021K4U") +set(GENERIC_L011K3UX_MAXSIZE 8192) +set(GENERIC_L011K3UX_MAXDATASIZE 2048) +set(GENERIC_L011K3UX_MCU cortex-m0plus) +set(GENERIC_L011K3UX_FPCONF "-") +add_library(GENERIC_L011K3UX INTERFACE) +target_compile_options(GENERIC_L011K3UX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011K3UX_MCU} +) +target_compile_definitions(GENERIC_L011K3UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011K3UX" + "BOARD_NAME=\"GENERIC_L011K3UX\"" + "BOARD_ID=GENERIC_L011K3UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011K3UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011K3UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011K3UX INTERFACE + "LINKER:--default-script=${GENERIC_L011K3UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=8192" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011K3UX_MCU} +) +target_link_libraries(GENERIC_L011K3UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011K3UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011K3UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011K3UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011K3UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011K3UX_serial_none INTERFACE) +target_compile_options(GENERIC_L011K3UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011K3UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011K3UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011K3UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011K3UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011K3UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011K3UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011K3UX_usb_none INTERFACE) +target_compile_options(GENERIC_L011K3UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T") +set(GENERIC_L011K4TX_MAXSIZE 16384) +set(GENERIC_L011K4TX_MAXDATASIZE 2048) +set(GENERIC_L011K4TX_MCU cortex-m0plus) +set(GENERIC_L011K4TX_FPCONF "-") +add_library(GENERIC_L011K4TX INTERFACE) +target_compile_options(GENERIC_L011K4TX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011K4TX_MCU} +) +target_compile_definitions(GENERIC_L011K4TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011K4TX" + "BOARD_NAME=\"GENERIC_L011K4TX\"" + "BOARD_ID=GENERIC_L011K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011K4TX INTERFACE + "LINKER:--default-script=${GENERIC_L011K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011K4TX_MCU} +) +target_link_libraries(GENERIC_L011K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_L011K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_L011K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L011K4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L011K4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011K(3-4)U_L021K4U") +set(GENERIC_L011K4UX_MAXSIZE 16384) +set(GENERIC_L011K4UX_MAXDATASIZE 2048) +set(GENERIC_L011K4UX_MCU cortex-m0plus) +set(GENERIC_L011K4UX_FPCONF "-") +add_library(GENERIC_L011K4UX INTERFACE) +target_compile_options(GENERIC_L011K4UX INTERFACE + "SHELL:-DSTM32L011xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L011K4UX_MCU} +) +target_compile_definitions(GENERIC_L011K4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L011K4UX" + "BOARD_NAME=\"GENERIC_L011K4UX\"" + "BOARD_ID=GENERIC_L011K4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L011K4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L011K4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L011K4UX INTERFACE + "LINKER:--default-script=${GENERIC_L011K4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L011K4UX_MCU} +) +target_link_libraries(GENERIC_L011K4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L011K4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L011K4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L011K4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L011K4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L011K4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L011K4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L011K4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L011K4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L011K4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L011K4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L011K4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L011K4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L011K4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L011K4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L021D4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L021D4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011D(3-4)P_L021D4P") +set(GENERIC_L021D4PX_MAXSIZE 16384) +set(GENERIC_L021D4PX_MAXDATASIZE 2048) +set(GENERIC_L021D4PX_MCU cortex-m0plus) +set(GENERIC_L021D4PX_FPCONF "-") +add_library(GENERIC_L021D4PX INTERFACE) +target_compile_options(GENERIC_L021D4PX INTERFACE + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L021D4PX_MCU} +) +target_compile_definitions(GENERIC_L021D4PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L021D4PX" + "BOARD_NAME=\"GENERIC_L021D4PX\"" + "BOARD_ID=GENERIC_L021D4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L021D4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L021D4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L021D4PX INTERFACE + "LINKER:--default-script=${GENERIC_L021D4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L021D4PX_MCU} +) +target_link_libraries(GENERIC_L021D4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L021D4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L021D4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L021D4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L021D4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L021D4PX_serial_none INTERFACE) +target_compile_options(GENERIC_L021D4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L021D4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L021D4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L021D4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L021D4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L021D4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L021D4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L021D4PX_usb_none INTERFACE) +target_compile_options(GENERIC_L021D4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L021F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L021F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P") +set(GENERIC_L021F4PX_MAXSIZE 16384) +set(GENERIC_L021F4PX_MAXDATASIZE 2048) +set(GENERIC_L021F4PX_MCU cortex-m0plus) +set(GENERIC_L021F4PX_FPCONF "-") +add_library(GENERIC_L021F4PX INTERFACE) +target_compile_options(GENERIC_L021F4PX INTERFACE + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L021F4PX_MCU} +) +target_compile_definitions(GENERIC_L021F4PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L021F4PX" + "BOARD_NAME=\"GENERIC_L021F4PX\"" + "BOARD_ID=GENERIC_L021F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L021F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L021F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L021F4PX INTERFACE + "LINKER:--default-script=${GENERIC_L021F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L021F4PX_MCU} +) +target_link_libraries(GENERIC_L021F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L021F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L021F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L021F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L021F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L021F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_L021F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L021F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L021F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L021F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L021F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L021F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L021F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L021F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_L021F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L021F4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L021F4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011F(3-4)U_L021F4U") +set(GENERIC_L021F4UX_MAXSIZE 16384) +set(GENERIC_L021F4UX_MAXDATASIZE 2048) +set(GENERIC_L021F4UX_MCU cortex-m0plus) +set(GENERIC_L021F4UX_FPCONF "-") +add_library(GENERIC_L021F4UX INTERFACE) +target_compile_options(GENERIC_L021F4UX INTERFACE + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L021F4UX_MCU} +) +target_compile_definitions(GENERIC_L021F4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L021F4UX" + "BOARD_NAME=\"GENERIC_L021F4UX\"" + "BOARD_ID=GENERIC_L021F4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L021F4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L021F4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L021F4UX INTERFACE + "LINKER:--default-script=${GENERIC_L021F4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L021F4UX_MCU} +) +target_link_libraries(GENERIC_L021F4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L021F4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L021F4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L021F4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L021F4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L021F4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L021F4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L021F4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L021F4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L021F4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L021F4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L021F4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L021F4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L021F4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L021F4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L021G4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L021G4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011G(3-4)U_L021G4U") +set(GENERIC_L021G4UX_MAXSIZE 16384) +set(GENERIC_L021G4UX_MAXDATASIZE 2048) +set(GENERIC_L021G4UX_MCU cortex-m0plus) +set(GENERIC_L021G4UX_FPCONF "-") +add_library(GENERIC_L021G4UX INTERFACE) +target_compile_options(GENERIC_L021G4UX INTERFACE + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L021G4UX_MCU} +) +target_compile_definitions(GENERIC_L021G4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L021G4UX" + "BOARD_NAME=\"GENERIC_L021G4UX\"" + "BOARD_ID=GENERIC_L021G4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L021G4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L021G4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L021G4UX INTERFACE + "LINKER:--default-script=${GENERIC_L021G4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L021G4UX_MCU} +) +target_link_libraries(GENERIC_L021G4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L021G4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L021G4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L021G4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L021G4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L021G4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L021G4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L021G4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L021G4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L021G4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L021G4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L021G4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L021G4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L021G4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L021G4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L021K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L021K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T") +set(GENERIC_L021K4TX_MAXSIZE 16384) +set(GENERIC_L021K4TX_MAXDATASIZE 2048) +set(GENERIC_L021K4TX_MCU cortex-m0plus) +set(GENERIC_L021K4TX_FPCONF "-") +add_library(GENERIC_L021K4TX INTERFACE) +target_compile_options(GENERIC_L021K4TX INTERFACE + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L021K4TX_MCU} +) +target_compile_definitions(GENERIC_L021K4TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L021K4TX" + "BOARD_NAME=\"GENERIC_L021K4TX\"" + "BOARD_ID=GENERIC_L021K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L021K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L021K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L021K4TX INTERFACE + "LINKER:--default-script=${GENERIC_L021K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L021K4TX_MCU} +) +target_link_libraries(GENERIC_L021K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L021K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L021K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L021K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L021K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L021K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_L021K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L021K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L021K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L021K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L021K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L021K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L021K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L021K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_L021K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L021K4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L021K4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L011K(3-4)U_L021K4U") +set(GENERIC_L021K4UX_MAXSIZE 16384) +set(GENERIC_L021K4UX_MAXDATASIZE 2048) +set(GENERIC_L021K4UX_MCU cortex-m0plus) +set(GENERIC_L021K4UX_FPCONF "-") +add_library(GENERIC_L021K4UX INTERFACE) +target_compile_options(GENERIC_L021K4UX INTERFACE + "SHELL:-DSTM32L021xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L021K4UX_MCU} +) +target_compile_definitions(GENERIC_L021K4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L021K4UX" + "BOARD_NAME=\"GENERIC_L021K4UX\"" + "BOARD_ID=GENERIC_L021K4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L021K4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L021K4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L021K4UX INTERFACE + "LINKER:--default-script=${GENERIC_L021K4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=2048" + "SHELL: " + -mcpu=${GENERIC_L021K4UX_MCU} +) +target_link_libraries(GENERIC_L021K4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L021K4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L021K4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L021K4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L021K4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L021K4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L021K4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L021K4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L021K4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L021K4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L021K4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L021K4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L021K4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L021K4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L021K4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L031C4TX_MAXSIZE 16384) +set(GENERIC_L031C4TX_MAXDATASIZE 8192) +set(GENERIC_L031C4TX_MCU cortex-m0plus) +set(GENERIC_L031C4TX_FPCONF "-") +add_library(GENERIC_L031C4TX INTERFACE) +target_compile_options(GENERIC_L031C4TX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031C4TX_MCU} +) +target_compile_definitions(GENERIC_L031C4TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031C4TX" + "BOARD_NAME=\"GENERIC_L031C4TX\"" + "BOARD_ID=GENERIC_L031C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031C4TX INTERFACE + "LINKER:--default-script=${GENERIC_L031C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031C4TX_MCU} +) +target_link_libraries(GENERIC_L031C4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_L031C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_L031C4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031C4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031C4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L031C4UX_MAXSIZE 16384) +set(GENERIC_L031C4UX_MAXDATASIZE 8192) +set(GENERIC_L031C4UX_MCU cortex-m0plus) +set(GENERIC_L031C4UX_FPCONF "-") +add_library(GENERIC_L031C4UX INTERFACE) +target_compile_options(GENERIC_L031C4UX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031C4UX_MCU} +) +target_compile_definitions(GENERIC_L031C4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031C4UX" + "BOARD_NAME=\"GENERIC_L031C4UX\"" + "BOARD_ID=GENERIC_L031C4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031C4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031C4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031C4UX INTERFACE + "LINKER:--default-script=${GENERIC_L031C4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031C4UX_MCU} +) +target_link_libraries(GENERIC_L031C4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031C4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031C4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031C4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031C4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031C4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L031C4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031C4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031C4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031C4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031C4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031C4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031C4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031C4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L031C4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L031C6TX_MAXSIZE 32768) +set(GENERIC_L031C6TX_MAXDATASIZE 8192) +set(GENERIC_L031C6TX_MCU cortex-m0plus) +set(GENERIC_L031C6TX_FPCONF "-") +add_library(GENERIC_L031C6TX INTERFACE) +target_compile_options(GENERIC_L031C6TX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031C6TX_MCU} +) +target_compile_definitions(GENERIC_L031C6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031C6TX" + "BOARD_NAME=\"GENERIC_L031C6TX\"" + "BOARD_ID=GENERIC_L031C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L031C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031C6TX_MCU} +) +target_link_libraries(GENERIC_L031C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L031C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L031C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L031C6UX_MAXSIZE 32768) +set(GENERIC_L031C6UX_MAXDATASIZE 8192) +set(GENERIC_L031C6UX_MCU cortex-m0plus) +set(GENERIC_L031C6UX_FPCONF "-") +add_library(GENERIC_L031C6UX INTERFACE) +target_compile_options(GENERIC_L031C6UX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031C6UX_MCU} +) +target_compile_definitions(GENERIC_L031C6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031C6UX" + "BOARD_NAME=\"GENERIC_L031C6UX\"" + "BOARD_ID=GENERIC_L031C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L031C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031C6UX_MCU} +) +target_link_libraries(GENERIC_L031C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L031C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L031C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031E4YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031E4YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031E(4-6)Y_L041E6Y") +set(GENERIC_L031E4YX_MAXSIZE 16384) +set(GENERIC_L031E4YX_MAXDATASIZE 8192) +set(GENERIC_L031E4YX_MCU cortex-m0plus) +set(GENERIC_L031E4YX_FPCONF "-") +add_library(GENERIC_L031E4YX INTERFACE) +target_compile_options(GENERIC_L031E4YX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031E4YX_MCU} +) +target_compile_definitions(GENERIC_L031E4YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031E4YX" + "BOARD_NAME=\"GENERIC_L031E4YX\"" + "BOARD_ID=GENERIC_L031E4YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031E4YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031E4YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031E4YX INTERFACE + "LINKER:--default-script=${GENERIC_L031E4YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031E4YX_MCU} +) +target_link_libraries(GENERIC_L031E4YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031E4YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031E4YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031E4YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031E4YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031E4YX_serial_none INTERFACE) +target_compile_options(GENERIC_L031E4YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031E4YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031E4YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031E4YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031E4YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031E4YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031E4YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031E4YX_usb_none INTERFACE) +target_compile_options(GENERIC_L031E4YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031E6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031E6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031E(4-6)Y_L041E6Y") +set(GENERIC_L031E6YX_MAXSIZE 32768) +set(GENERIC_L031E6YX_MAXDATASIZE 8192) +set(GENERIC_L031E6YX_MCU cortex-m0plus) +set(GENERIC_L031E6YX_FPCONF "-") +add_library(GENERIC_L031E6YX INTERFACE) +target_compile_options(GENERIC_L031E6YX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031E6YX_MCU} +) +target_compile_definitions(GENERIC_L031E6YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031E6YX" + "BOARD_NAME=\"GENERIC_L031E6YX\"" + "BOARD_ID=GENERIC_L031E6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031E6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031E6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031E6YX INTERFACE + "LINKER:--default-script=${GENERIC_L031E6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031E6YX_MCU} +) +target_link_libraries(GENERIC_L031E6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031E6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031E6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031E6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031E6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031E6YX_serial_none INTERFACE) +target_compile_options(GENERIC_L031E6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031E6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031E6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031E6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031E6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031E6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031E6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031E6YX_usb_none INTERFACE) +target_compile_options(GENERIC_L031E6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031F4PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031F4PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031F(4-6)P_L041F6P") +set(GENERIC_L031F4PX_MAXSIZE 16384) +set(GENERIC_L031F4PX_MAXDATASIZE 8192) +set(GENERIC_L031F4PX_MCU cortex-m0plus) +set(GENERIC_L031F4PX_FPCONF "-") +add_library(GENERIC_L031F4PX INTERFACE) +target_compile_options(GENERIC_L031F4PX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031F4PX_MCU} +) +target_compile_definitions(GENERIC_L031F4PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031F4PX" + "BOARD_NAME=\"GENERIC_L031F4PX\"" + "BOARD_ID=GENERIC_L031F4PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031F4PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031F4PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031F4PX INTERFACE + "LINKER:--default-script=${GENERIC_L031F4PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031F4PX_MCU} +) +target_link_libraries(GENERIC_L031F4PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031F4PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031F4PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031F4PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031F4PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031F4PX_serial_none INTERFACE) +target_compile_options(GENERIC_L031F4PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031F4PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031F4PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031F4PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031F4PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031F4PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031F4PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031F4PX_usb_none INTERFACE) +target_compile_options(GENERIC_L031F4PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031F(4-6)P_L041F6P") +set(GENERIC_L031F6PX_MAXSIZE 32768) +set(GENERIC_L031F6PX_MAXDATASIZE 8192) +set(GENERIC_L031F6PX_MCU cortex-m0plus) +set(GENERIC_L031F6PX_FPCONF "-") +add_library(GENERIC_L031F6PX INTERFACE) +target_compile_options(GENERIC_L031F6PX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031F6PX_MCU} +) +target_compile_definitions(GENERIC_L031F6PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031F6PX" + "BOARD_NAME=\"GENERIC_L031F6PX\"" + "BOARD_ID=GENERIC_L031F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031F6PX INTERFACE + "LINKER:--default-script=${GENERIC_L031F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031F6PX_MCU} +) +target_link_libraries(GENERIC_L031F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_L031F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_L031F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031G4UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031G4UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031G(4-6)U_L041G6U") +set(GENERIC_L031G4UX_MAXSIZE 16384) +set(GENERIC_L031G4UX_MAXDATASIZE 8192) +set(GENERIC_L031G4UX_MCU cortex-m0plus) +set(GENERIC_L031G4UX_FPCONF "-") +add_library(GENERIC_L031G4UX INTERFACE) +target_compile_options(GENERIC_L031G4UX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031G4UX_MCU} +) +target_compile_definitions(GENERIC_L031G4UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031G4UX" + "BOARD_NAME=\"GENERIC_L031G4UX\"" + "BOARD_ID=GENERIC_L031G4UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031G4UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031G4UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031G4UX INTERFACE + "LINKER:--default-script=${GENERIC_L031G4UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031G4UX_MCU} +) +target_link_libraries(GENERIC_L031G4UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031G4UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031G4UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031G4UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031G4UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031G4UX_serial_none INTERFACE) +target_compile_options(GENERIC_L031G4UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031G4UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031G4UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031G4UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031G4UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031G4UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031G4UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031G4UX_usb_none INTERFACE) +target_compile_options(GENERIC_L031G4UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031G(4-6)U_L041G6U") +set(GENERIC_L031G6UX_MAXSIZE 32768) +set(GENERIC_L031G6UX_MAXDATASIZE 8192) +set(GENERIC_L031G6UX_MCU cortex-m0plus) +set(GENERIC_L031G6UX_FPCONF "-") +add_library(GENERIC_L031G6UX INTERFACE) +target_compile_options(GENERIC_L031G6UX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031G6UX_MCU} +) +target_compile_definitions(GENERIC_L031G6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031G6UX" + "BOARD_NAME=\"GENERIC_L031G6UX\"" + "BOARD_ID=GENERIC_L031G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031G6UX INTERFACE + "LINKER:--default-script=${GENERIC_L031G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031G6UX_MCU} +) +target_link_libraries(GENERIC_L031G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L031G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L031G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031K4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031K4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031K(4-6)T_L041K6T") +set(GENERIC_L031K4TX_MAXSIZE 16384) +set(GENERIC_L031K4TX_MAXDATASIZE 8192) +set(GENERIC_L031K4TX_MCU cortex-m0plus) +set(GENERIC_L031K4TX_FPCONF "-") +add_library(GENERIC_L031K4TX INTERFACE) +target_compile_options(GENERIC_L031K4TX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031K4TX_MCU} +) +target_compile_definitions(GENERIC_L031K4TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031K4TX" + "BOARD_NAME=\"GENERIC_L031K4TX\"" + "BOARD_ID=GENERIC_L031K4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031K4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031K4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031K4TX INTERFACE + "LINKER:--default-script=${GENERIC_L031K4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031K4TX_MCU} +) +target_link_libraries(GENERIC_L031K4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031K4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031K4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031K4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031K4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031K4TX_serial_none INTERFACE) +target_compile_options(GENERIC_L031K4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031K4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031K4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031K4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031K4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031K4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031K4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031K4TX_usb_none INTERFACE) +target_compile_options(GENERIC_L031K4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L031K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L031K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031K(4-6)T_L041K6T") +set(GENERIC_L031K6TX_MAXSIZE 32768) +set(GENERIC_L031K6TX_MAXDATASIZE 8192) +set(GENERIC_L031K6TX_MCU cortex-m0plus) +set(GENERIC_L031K6TX_FPCONF "-") +add_library(GENERIC_L031K6TX INTERFACE) +target_compile_options(GENERIC_L031K6TX INTERFACE + "SHELL:-DSTM32L031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L031K6TX_MCU} +) +target_compile_definitions(GENERIC_L031K6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L031K6TX" + "BOARD_NAME=\"GENERIC_L031K6TX\"" + "BOARD_ID=GENERIC_L031K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L031K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L031K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L031K6TX INTERFACE + "LINKER:--default-script=${GENERIC_L031K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L031K6TX_MCU} +) +target_link_libraries(GENERIC_L031K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L031K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L031K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L031K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L031K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L031K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L031K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L031K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L031K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L031K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L031K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L031K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L031K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L031K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L031K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041C4TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041C4TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L041C4TX_MAXSIZE 16384) +set(GENERIC_L041C4TX_MAXDATASIZE 8192) +set(GENERIC_L041C4TX_MCU cortex-m0plus) +set(GENERIC_L041C4TX_FPCONF "-") +add_library(GENERIC_L041C4TX INTERFACE) +target_compile_options(GENERIC_L041C4TX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041C4TX_MCU} +) +target_compile_definitions(GENERIC_L041C4TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041C4TX" + "BOARD_NAME=\"GENERIC_L041C4TX\"" + "BOARD_ID=GENERIC_L041C4TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041C4TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041C4TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041C4TX INTERFACE + "LINKER:--default-script=${GENERIC_L041C4TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=16384" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041C4TX_MCU} +) +target_link_libraries(GENERIC_L041C4TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041C4TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041C4TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041C4TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041C4TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041C4TX_serial_none INTERFACE) +target_compile_options(GENERIC_L041C4TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041C4TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041C4TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041C4TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041C4TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041C4TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041C4TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041C4TX_usb_none INTERFACE) +target_compile_options(GENERIC_L041C4TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L041C6TX_MAXSIZE 32768) +set(GENERIC_L041C6TX_MAXDATASIZE 8192) +set(GENERIC_L041C6TX_MCU cortex-m0plus) +set(GENERIC_L041C6TX_FPCONF "-") +add_library(GENERIC_L041C6TX INTERFACE) +target_compile_options(GENERIC_L041C6TX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041C6TX_MCU} +) +target_compile_definitions(GENERIC_L041C6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041C6TX" + "BOARD_NAME=\"GENERIC_L041C6TX\"" + "BOARD_ID=GENERIC_L041C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L041C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041C6TX_MCU} +) +target_link_libraries(GENERIC_L041C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L041C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L041C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)") +set(GENERIC_L041C6UX_MAXSIZE 32768) +set(GENERIC_L041C6UX_MAXDATASIZE 8192) +set(GENERIC_L041C6UX_MCU cortex-m0plus) +set(GENERIC_L041C6UX_FPCONF "-") +add_library(GENERIC_L041C6UX INTERFACE) +target_compile_options(GENERIC_L041C6UX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041C6UX_MCU} +) +target_compile_definitions(GENERIC_L041C6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041C6UX" + "BOARD_NAME=\"GENERIC_L041C6UX\"" + "BOARD_ID=GENERIC_L041C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L041C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041C6UX_MCU} +) +target_link_libraries(GENERIC_L041C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L041C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L041C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041E6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041E6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031E(4-6)Y_L041E6Y") +set(GENERIC_L041E6YX_MAXSIZE 32768) +set(GENERIC_L041E6YX_MAXDATASIZE 8192) +set(GENERIC_L041E6YX_MCU cortex-m0plus) +set(GENERIC_L041E6YX_FPCONF "-") +add_library(GENERIC_L041E6YX INTERFACE) +target_compile_options(GENERIC_L041E6YX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041E6YX_MCU} +) +target_compile_definitions(GENERIC_L041E6YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041E6YX" + "BOARD_NAME=\"GENERIC_L041E6YX\"" + "BOARD_ID=GENERIC_L041E6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041E6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041E6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041E6YX INTERFACE + "LINKER:--default-script=${GENERIC_L041E6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041E6YX_MCU} +) +target_link_libraries(GENERIC_L041E6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041E6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041E6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041E6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041E6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041E6YX_serial_none INTERFACE) +target_compile_options(GENERIC_L041E6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041E6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041E6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041E6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041E6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041E6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041E6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041E6YX_usb_none INTERFACE) +target_compile_options(GENERIC_L041E6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041F6PX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041F6PX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031F(4-6)P_L041F6P") +set(GENERIC_L041F6PX_MAXSIZE 32768) +set(GENERIC_L041F6PX_MAXDATASIZE 8192) +set(GENERIC_L041F6PX_MCU cortex-m0plus) +set(GENERIC_L041F6PX_FPCONF "-") +add_library(GENERIC_L041F6PX INTERFACE) +target_compile_options(GENERIC_L041F6PX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041F6PX_MCU} +) +target_compile_definitions(GENERIC_L041F6PX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041F6PX" + "BOARD_NAME=\"GENERIC_L041F6PX\"" + "BOARD_ID=GENERIC_L041F6PX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041F6PX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041F6PX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041F6PX INTERFACE + "LINKER:--default-script=${GENERIC_L041F6PX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041F6PX_MCU} +) +target_link_libraries(GENERIC_L041F6PX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041F6PX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041F6PX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041F6PX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041F6PX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041F6PX_serial_none INTERFACE) +target_compile_options(GENERIC_L041F6PX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041F6PX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041F6PX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041F6PX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041F6PX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041F6PX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041F6PX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041F6PX_usb_none INTERFACE) +target_compile_options(GENERIC_L041F6PX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041G6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041G6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031G(4-6)U_L041G6U") +set(GENERIC_L041G6UX_MAXSIZE 32768) +set(GENERIC_L041G6UX_MAXDATASIZE 8192) +set(GENERIC_L041G6UX_MCU cortex-m0plus) +set(GENERIC_L041G6UX_FPCONF "-") +add_library(GENERIC_L041G6UX INTERFACE) +target_compile_options(GENERIC_L041G6UX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041G6UX_MCU} +) +target_compile_definitions(GENERIC_L041G6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041G6UX" + "BOARD_NAME=\"GENERIC_L041G6UX\"" + "BOARD_ID=GENERIC_L041G6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041G6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041G6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041G6UX INTERFACE + "LINKER:--default-script=${GENERIC_L041G6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041G6UX_MCU} +) +target_link_libraries(GENERIC_L041G6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041G6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041G6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041G6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041G6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041G6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L041G6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041G6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041G6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041G6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041G6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041G6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041G6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041G6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L041G6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L041K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L041K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031K(4-6)T_L041K6T") +set(GENERIC_L041K6TX_MAXSIZE 32768) +set(GENERIC_L041K6TX_MAXDATASIZE 8192) +set(GENERIC_L041K6TX_MCU cortex-m0plus) +set(GENERIC_L041K6TX_FPCONF "-") +add_library(GENERIC_L041K6TX INTERFACE) +target_compile_options(GENERIC_L041K6TX INTERFACE + "SHELL:-DSTM32L041xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L041K6TX_MCU} +) +target_compile_definitions(GENERIC_L041K6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L041K6TX" + "BOARD_NAME=\"GENERIC_L041K6TX\"" + "BOARD_ID=GENERIC_L041K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L041K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L041K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L041K6TX INTERFACE + "LINKER:--default-script=${GENERIC_L041K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L041K6TX_MCU} +) +target_link_libraries(GENERIC_L041K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L041K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L041K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L041K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L041K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L041K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L041K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L041K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L041K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L041K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L041K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L041K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L041K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L041K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L041K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L051C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L051C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L051C(6-8)(T-U)") +set(GENERIC_L051C6TX_MAXSIZE 32768) +set(GENERIC_L051C6TX_MAXDATASIZE 8192) +set(GENERIC_L051C6TX_MCU cortex-m0plus) +set(GENERIC_L051C6TX_FPCONF "-") +add_library(GENERIC_L051C6TX INTERFACE) +target_compile_options(GENERIC_L051C6TX INTERFACE + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L051C6TX_MCU} +) +target_compile_definitions(GENERIC_L051C6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L051C6TX" + "BOARD_NAME=\"GENERIC_L051C6TX\"" + "BOARD_ID=GENERIC_L051C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L051C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L051C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L051C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L051C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L051C6TX_MCU} +) +target_link_libraries(GENERIC_L051C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L051C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L051C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L051C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L051C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L051C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L051C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L051C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L051C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L051C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L051C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L051C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L051C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L051C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L051C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L051C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L051C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L051C(6-8)(T-U)") +set(GENERIC_L051C6UX_MAXSIZE 32768) +set(GENERIC_L051C6UX_MAXDATASIZE 8192) +set(GENERIC_L051C6UX_MCU cortex-m0plus) +set(GENERIC_L051C6UX_FPCONF "-") +add_library(GENERIC_L051C6UX INTERFACE) +target_compile_options(GENERIC_L051C6UX INTERFACE + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L051C6UX_MCU} +) +target_compile_definitions(GENERIC_L051C6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L051C6UX" + "BOARD_NAME=\"GENERIC_L051C6UX\"" + "BOARD_ID=GENERIC_L051C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L051C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L051C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L051C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L051C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L051C6UX_MCU} +) +target_link_libraries(GENERIC_L051C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L051C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L051C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L051C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L051C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L051C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L051C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L051C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L051C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L051C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L051C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L051C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L051C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L051C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L051C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L051C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L051C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L051C(6-8)(T-U)") +set(GENERIC_L051C8TX_MAXSIZE 65536) +set(GENERIC_L051C8TX_MAXDATASIZE 8192) +set(GENERIC_L051C8TX_MCU cortex-m0plus) +set(GENERIC_L051C8TX_FPCONF "-") +add_library(GENERIC_L051C8TX INTERFACE) +target_compile_options(GENERIC_L051C8TX INTERFACE + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L051C8TX_MCU} +) +target_compile_definitions(GENERIC_L051C8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L051C8TX" + "BOARD_NAME=\"GENERIC_L051C8TX\"" + "BOARD_ID=GENERIC_L051C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L051C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L051C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L051C8TX INTERFACE + "LINKER:--default-script=${GENERIC_L051C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L051C8TX_MCU} +) +target_link_libraries(GENERIC_L051C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L051C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L051C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L051C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L051C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L051C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L051C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L051C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L051C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L051C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L051C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L051C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L051C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L051C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L051C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L051C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L051C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L051C(6-8)(T-U)") +set(GENERIC_L051C8UX_MAXSIZE 65536) +set(GENERIC_L051C8UX_MAXDATASIZE 8192) +set(GENERIC_L051C8UX_MCU cortex-m0plus) +set(GENERIC_L051C8UX_FPCONF "-") +add_library(GENERIC_L051C8UX INTERFACE) +target_compile_options(GENERIC_L051C8UX INTERFACE + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L051C8UX_MCU} +) +target_compile_definitions(GENERIC_L051C8UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L051C8UX" + "BOARD_NAME=\"GENERIC_L051C8UX\"" + "BOARD_ID=GENERIC_L051C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L051C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L051C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L051C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L051C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L051C8UX_MCU} +) +target_link_libraries(GENERIC_L051C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L051C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L051C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L051C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L051C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L051C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L051C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L051C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L051C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L051C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L051C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L051C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L051C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L051C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L051C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L052C6TX_MAXSIZE 32768) +set(GENERIC_L052C6TX_MAXDATASIZE 8192) +set(GENERIC_L052C6TX_MCU cortex-m0plus) +set(GENERIC_L052C6TX_FPCONF "-") +add_library(GENERIC_L052C6TX INTERFACE) +target_compile_options(GENERIC_L052C6TX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052C6TX_MCU} +) +target_compile_definitions(GENERIC_L052C6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052C6TX" + "BOARD_NAME=\"GENERIC_L052C6TX\"" + "BOARD_ID=GENERIC_L052C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L052C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052C6TX_MCU} +) +target_link_libraries(GENERIC_L052C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L052C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L052C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L052C6UX_MAXSIZE 32768) +set(GENERIC_L052C6UX_MAXDATASIZE 8192) +set(GENERIC_L052C6UX_MCU cortex-m0plus) +set(GENERIC_L052C6UX_FPCONF "-") +add_library(GENERIC_L052C6UX INTERFACE) +target_compile_options(GENERIC_L052C6UX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052C6UX_MCU} +) +target_compile_definitions(GENERIC_L052C6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052C6UX" + "BOARD_NAME=\"GENERIC_L052C6UX\"" + "BOARD_ID=GENERIC_L052C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L052C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052C6UX_MCU} +) +target_link_libraries(GENERIC_L052C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L052C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L052C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L052C8TX_MAXSIZE 65536) +set(GENERIC_L052C8TX_MAXDATASIZE 8192) +set(GENERIC_L052C8TX_MCU cortex-m0plus) +set(GENERIC_L052C8TX_FPCONF "-") +add_library(GENERIC_L052C8TX INTERFACE) +target_compile_options(GENERIC_L052C8TX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052C8TX_MCU} +) +target_compile_definitions(GENERIC_L052C8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052C8TX" + "BOARD_NAME=\"GENERIC_L052C8TX\"" + "BOARD_ID=GENERIC_L052C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052C8TX INTERFACE + "LINKER:--default-script=${GENERIC_L052C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052C8TX_MCU} +) +target_link_libraries(GENERIC_L052C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L052C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L052C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L052C8UX_MAXSIZE 65536) +set(GENERIC_L052C8UX_MAXDATASIZE 8192) +set(GENERIC_L052C8UX_MCU cortex-m0plus) +set(GENERIC_L052C8UX_FPCONF "-") +add_library(GENERIC_L052C8UX INTERFACE) +target_compile_options(GENERIC_L052C8UX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052C8UX_MCU} +) +target_compile_definitions(GENERIC_L052C8UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052C8UX" + "BOARD_NAME=\"GENERIC_L052C8UX\"" + "BOARD_ID=GENERIC_L052C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L052C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052C8UX_MCU} +) +target_link_libraries(GENERIC_L052C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L052C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L052C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052K6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052K6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052K(6-8)T_L062K8T") +set(GENERIC_L052K6TX_MAXSIZE 32768) +set(GENERIC_L052K6TX_MAXDATASIZE 8192) +set(GENERIC_L052K6TX_MCU cortex-m0plus) +set(GENERIC_L052K6TX_FPCONF "-") +add_library(GENERIC_L052K6TX INTERFACE) +target_compile_options(GENERIC_L052K6TX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052K6TX_MCU} +) +target_compile_definitions(GENERIC_L052K6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052K6TX" + "BOARD_NAME=\"GENERIC_L052K6TX\"" + "BOARD_ID=GENERIC_L052K6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052K6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052K6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052K6TX INTERFACE + "LINKER:--default-script=${GENERIC_L052K6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052K6TX_MCU} +) +target_link_libraries(GENERIC_L052K6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052K6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052K6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052K6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052K6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052K6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L052K6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052K6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052K6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052K6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052K6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052K6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052K6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052K6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L052K6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052K(6-8)T_L062K8T") +set(GENERIC_L052K8TX_MAXSIZE 65536) +set(GENERIC_L052K8TX_MAXDATASIZE 8192) +set(GENERIC_L052K8TX_MCU cortex-m0plus) +set(GENERIC_L052K8TX_FPCONF "-") +add_library(GENERIC_L052K8TX INTERFACE) +target_compile_options(GENERIC_L052K8TX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052K8TX_MCU} +) +target_compile_definitions(GENERIC_L052K8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052K8TX" + "BOARD_NAME=\"GENERIC_L052K8TX\"" + "BOARD_ID=GENERIC_L052K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052K8TX INTERFACE + "LINKER:--default-script=${GENERIC_L052K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052K8TX_MCU} +) +target_link_libraries(GENERIC_L052K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L052K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L052K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052R6HX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052R6HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H") +set(GENERIC_L052R6HX_MAXSIZE 32768) +set(GENERIC_L052R6HX_MAXDATASIZE 8192) +set(GENERIC_L052R6HX_MCU cortex-m0plus) +set(GENERIC_L052R6HX_FPCONF "-") +add_library(GENERIC_L052R6HX INTERFACE) +target_compile_options(GENERIC_L052R6HX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052R6HX_MCU} +) +target_compile_definitions(GENERIC_L052R6HX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052R6HX" + "BOARD_NAME=\"GENERIC_L052R6HX\"" + "BOARD_ID=GENERIC_L052R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052R6HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052R6HX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052R6HX INTERFACE + "LINKER:--default-script=${GENERIC_L052R6HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052R6HX_MCU} +) +target_link_libraries(GENERIC_L052R6HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052R6HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052R6HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052R6HX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052R6HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052R6HX_serial_none INTERFACE) +target_compile_options(GENERIC_L052R6HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052R6HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052R6HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052R6HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052R6HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052R6HX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052R6HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052R6HX_usb_none INTERFACE) +target_compile_options(GENERIC_L052R6HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T") +set(GENERIC_L052R6TX_MAXSIZE 32768) +set(GENERIC_L052R6TX_MAXDATASIZE 8192) +set(GENERIC_L052R6TX_MCU cortex-m0plus) +set(GENERIC_L052R6TX_FPCONF "-") +add_library(GENERIC_L052R6TX INTERFACE) +target_compile_options(GENERIC_L052R6TX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052R6TX_MCU} +) +target_compile_definitions(GENERIC_L052R6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052R6TX" + "BOARD_NAME=\"GENERIC_L052R6TX\"" + "BOARD_ID=GENERIC_L052R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052R6TX INTERFACE + "LINKER:--default-script=${GENERIC_L052R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052R6TX_MCU} +) +target_link_libraries(GENERIC_L052R6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L052R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L052R6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052R8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052R8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H") +set(GENERIC_L052R8HX_MAXSIZE 65536) +set(GENERIC_L052R8HX_MAXDATASIZE 8192) +set(GENERIC_L052R8HX_MCU cortex-m0plus) +set(GENERIC_L052R8HX_FPCONF "-") +add_library(GENERIC_L052R8HX INTERFACE) +target_compile_options(GENERIC_L052R8HX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052R8HX_MCU} +) +target_compile_definitions(GENERIC_L052R8HX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052R8HX" + "BOARD_NAME=\"GENERIC_L052R8HX\"" + "BOARD_ID=GENERIC_L052R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052R8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052R8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052R8HX INTERFACE + "LINKER:--default-script=${GENERIC_L052R8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052R8HX_MCU} +) +target_link_libraries(GENERIC_L052R8HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052R8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052R8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052R8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052R8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052R8HX_serial_none INTERFACE) +target_compile_options(GENERIC_L052R8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052R8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052R8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052R8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052R8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052R8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052R8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052R8HX_usb_none INTERFACE) +target_compile_options(GENERIC_L052R8HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T") +set(GENERIC_L052R8TX_MAXSIZE 65536) +set(GENERIC_L052R8TX_MAXDATASIZE 8192) +set(GENERIC_L052R8TX_MCU cortex-m0plus) +set(GENERIC_L052R8TX_FPCONF "-") +add_library(GENERIC_L052R8TX INTERFACE) +target_compile_options(GENERIC_L052R8TX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052R8TX_MCU} +) +target_compile_definitions(GENERIC_L052R8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052R8TX" + "BOARD_NAME=\"GENERIC_L052R8TX\"" + "BOARD_ID=GENERIC_L052R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052R8TX INTERFACE + "LINKER:--default-script=${GENERIC_L052R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052R8TX_MCU} +) +target_link_libraries(GENERIC_L052R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L052R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L052R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052T6YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052T6YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052T6Y_L052T8(F-Y)") +set(GENERIC_L052T6YX_MAXSIZE 32768) +set(GENERIC_L052T6YX_MAXDATASIZE 8192) +set(GENERIC_L052T6YX_MCU cortex-m0plus) +set(GENERIC_L052T6YX_FPCONF "-") +add_library(GENERIC_L052T6YX INTERFACE) +target_compile_options(GENERIC_L052T6YX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052T6YX_MCU} +) +target_compile_definitions(GENERIC_L052T6YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052T6YX" + "BOARD_NAME=\"GENERIC_L052T6YX\"" + "BOARD_ID=GENERIC_L052T6YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052T6YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052T6YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052T6YX INTERFACE + "LINKER:--default-script=${GENERIC_L052T6YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052T6YX_MCU} +) +target_link_libraries(GENERIC_L052T6YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052T6YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052T6YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052T6YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052T6YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052T6YX_serial_none INTERFACE) +target_compile_options(GENERIC_L052T6YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052T6YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052T6YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052T6YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052T6YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052T6YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052T6YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052T6YX_usb_none INTERFACE) +target_compile_options(GENERIC_L052T6YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052T8FX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052T8FX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052T6Y_L052T8(F-Y)") +set(GENERIC_L052T8FX_MAXSIZE 65536) +set(GENERIC_L052T8FX_MAXDATASIZE 8192) +set(GENERIC_L052T8FX_MCU cortex-m0plus) +set(GENERIC_L052T8FX_FPCONF "-") +add_library(GENERIC_L052T8FX INTERFACE) +target_compile_options(GENERIC_L052T8FX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052T8FX_MCU} +) +target_compile_definitions(GENERIC_L052T8FX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052T8FX" + "BOARD_NAME=\"GENERIC_L052T8FX\"" + "BOARD_ID=GENERIC_L052T8FX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052T8FX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052T8FX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052T8FX INTERFACE + "LINKER:--default-script=${GENERIC_L052T8FX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052T8FX_MCU} +) +target_link_libraries(GENERIC_L052T8FX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052T8FX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052T8FX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052T8FX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052T8FX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052T8FX_serial_none INTERFACE) +target_compile_options(GENERIC_L052T8FX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052T8FX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052T8FX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052T8FX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052T8FX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052T8FX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052T8FX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052T8FX_usb_none INTERFACE) +target_compile_options(GENERIC_L052T8FX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L052T8YX +# ----------------------------------------------------------------------------- + +set(GENERIC_L052T8YX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052T6Y_L052T8(F-Y)") +set(GENERIC_L052T8YX_MAXSIZE 65536) +set(GENERIC_L052T8YX_MAXDATASIZE 8192) +set(GENERIC_L052T8YX_MCU cortex-m0plus) +set(GENERIC_L052T8YX_FPCONF "-") +add_library(GENERIC_L052T8YX INTERFACE) +target_compile_options(GENERIC_L052T8YX INTERFACE + "SHELL:-DSTM32L052xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L052T8YX_MCU} +) +target_compile_definitions(GENERIC_L052T8YX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L052T8YX" + "BOARD_NAME=\"GENERIC_L052T8YX\"" + "BOARD_ID=GENERIC_L052T8YX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L052T8YX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L052T8YX_VARIANT_PATH} +) + +target_link_options(GENERIC_L052T8YX INTERFACE + "LINKER:--default-script=${GENERIC_L052T8YX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L052T8YX_MCU} +) +target_link_libraries(GENERIC_L052T8YX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L052T8YX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L052T8YX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L052T8YX_serial_generic INTERFACE) +target_compile_options(GENERIC_L052T8YX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L052T8YX_serial_none INTERFACE) +target_compile_options(GENERIC_L052T8YX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L052T8YX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L052T8YX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L052T8YX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L052T8YX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L052T8YX_usb_HID INTERFACE) +target_compile_options(GENERIC_L052T8YX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L052T8YX_usb_none INTERFACE) +target_compile_options(GENERIC_L052T8YX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L053C6TX_MAXSIZE 32768) +set(GENERIC_L053C6TX_MAXDATASIZE 8192) +set(GENERIC_L053C6TX_MCU cortex-m0plus) +set(GENERIC_L053C6TX_FPCONF "-") +add_library(GENERIC_L053C6TX INTERFACE) +target_compile_options(GENERIC_L053C6TX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053C6TX_MCU} +) +target_compile_definitions(GENERIC_L053C6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053C6TX" + "BOARD_NAME=\"GENERIC_L053C6TX\"" + "BOARD_ID=GENERIC_L053C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L053C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053C6TX_MCU} +) +target_link_libraries(GENERIC_L053C6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L053C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L053C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L053C6UX_MAXSIZE 32768) +set(GENERIC_L053C6UX_MAXDATASIZE 8192) +set(GENERIC_L053C6UX_MCU cortex-m0plus) +set(GENERIC_L053C6UX_FPCONF "-") +add_library(GENERIC_L053C6UX INTERFACE) +target_compile_options(GENERIC_L053C6UX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053C6UX_MCU} +) +target_compile_definitions(GENERIC_L053C6UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053C6UX" + "BOARD_NAME=\"GENERIC_L053C6UX\"" + "BOARD_ID=GENERIC_L053C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L053C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053C6UX_MCU} +) +target_link_libraries(GENERIC_L053C6UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L053C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L053C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L053C8TX_MAXSIZE 65536) +set(GENERIC_L053C8TX_MAXDATASIZE 8192) +set(GENERIC_L053C8TX_MCU cortex-m0plus) +set(GENERIC_L053C8TX_FPCONF "-") +add_library(GENERIC_L053C8TX INTERFACE) +target_compile_options(GENERIC_L053C8TX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053C8TX_MCU} +) +target_compile_definitions(GENERIC_L053C8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053C8TX" + "BOARD_NAME=\"GENERIC_L053C8TX\"" + "BOARD_ID=GENERIC_L053C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053C8TX INTERFACE + "LINKER:--default-script=${GENERIC_L053C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053C8TX_MCU} +) +target_link_libraries(GENERIC_L053C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L053C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L053C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L053C8UX_MAXSIZE 65536) +set(GENERIC_L053C8UX_MAXDATASIZE 8192) +set(GENERIC_L053C8UX_MCU cortex-m0plus) +set(GENERIC_L053C8UX_FPCONF "-") +add_library(GENERIC_L053C8UX INTERFACE) +target_compile_options(GENERIC_L053C8UX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053C8UX_MCU} +) +target_compile_definitions(GENERIC_L053C8UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053C8UX" + "BOARD_NAME=\"GENERIC_L053C8UX\"" + "BOARD_ID=GENERIC_L053C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L053C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053C8UX_MCU} +) +target_link_libraries(GENERIC_L053C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L053C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L053C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053R6HX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053R6HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H") +set(GENERIC_L053R6HX_MAXSIZE 32768) +set(GENERIC_L053R6HX_MAXDATASIZE 8192) +set(GENERIC_L053R6HX_MCU cortex-m0plus) +set(GENERIC_L053R6HX_FPCONF "-") +add_library(GENERIC_L053R6HX INTERFACE) +target_compile_options(GENERIC_L053R6HX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053R6HX_MCU} +) +target_compile_definitions(GENERIC_L053R6HX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053R6HX" + "BOARD_NAME=\"GENERIC_L053R6HX\"" + "BOARD_ID=GENERIC_L053R6HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053R6HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053R6HX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053R6HX INTERFACE + "LINKER:--default-script=${GENERIC_L053R6HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053R6HX_MCU} +) +target_link_libraries(GENERIC_L053R6HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053R6HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053R6HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053R6HX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053R6HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053R6HX_serial_none INTERFACE) +target_compile_options(GENERIC_L053R6HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053R6HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053R6HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053R6HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053R6HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053R6HX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053R6HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053R6HX_usb_none INTERFACE) +target_compile_options(GENERIC_L053R6HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053R6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053R6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T") +set(GENERIC_L053R6TX_MAXSIZE 32768) +set(GENERIC_L053R6TX_MAXDATASIZE 8192) +set(GENERIC_L053R6TX_MCU cortex-m0plus) +set(GENERIC_L053R6TX_FPCONF "-") +add_library(GENERIC_L053R6TX INTERFACE) +target_compile_options(GENERIC_L053R6TX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053R6TX_MCU} +) +target_compile_definitions(GENERIC_L053R6TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053R6TX" + "BOARD_NAME=\"GENERIC_L053R6TX\"" + "BOARD_ID=GENERIC_L053R6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053R6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053R6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053R6TX INTERFACE + "LINKER:--default-script=${GENERIC_L053R6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053R6TX_MCU} +) +target_link_libraries(GENERIC_L053R6TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053R6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053R6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053R6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053R6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053R6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L053R6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053R6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053R6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053R6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053R6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053R6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053R6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053R6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L053R6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053R8HX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053R8HX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H") +set(GENERIC_L053R8HX_MAXSIZE 65536) +set(GENERIC_L053R8HX_MAXDATASIZE 8192) +set(GENERIC_L053R8HX_MCU cortex-m0plus) +set(GENERIC_L053R8HX_FPCONF "-") +add_library(GENERIC_L053R8HX INTERFACE) +target_compile_options(GENERIC_L053R8HX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053R8HX_MCU} +) +target_compile_definitions(GENERIC_L053R8HX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053R8HX" + "BOARD_NAME=\"GENERIC_L053R8HX\"" + "BOARD_ID=GENERIC_L053R8HX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053R8HX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053R8HX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053R8HX INTERFACE + "LINKER:--default-script=${GENERIC_L053R8HX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053R8HX_MCU} +) +target_link_libraries(GENERIC_L053R8HX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053R8HX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053R8HX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053R8HX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053R8HX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053R8HX_serial_none INTERFACE) +target_compile_options(GENERIC_L053R8HX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053R8HX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053R8HX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053R8HX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053R8HX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053R8HX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053R8HX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053R8HX_usb_none INTERFACE) +target_compile_options(GENERIC_L053R8HX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L053R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L053R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T") +set(GENERIC_L053R8TX_MAXSIZE 65536) +set(GENERIC_L053R8TX_MAXDATASIZE 8192) +set(GENERIC_L053R8TX_MCU cortex-m0plus) +set(GENERIC_L053R8TX_FPCONF "-") +add_library(GENERIC_L053R8TX INTERFACE) +target_compile_options(GENERIC_L053R8TX INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L053R8TX_MCU} +) +target_compile_definitions(GENERIC_L053R8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L053R8TX" + "BOARD_NAME=\"GENERIC_L053R8TX\"" + "BOARD_ID=GENERIC_L053R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L053R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L053R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L053R8TX INTERFACE + "LINKER:--default-script=${GENERIC_L053R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L053R8TX_MCU} +) +target_link_libraries(GENERIC_L053R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L053R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L053R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L053R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L053R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L053R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L053R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L053R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L053R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L053R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L053R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L053R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L053R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L053R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L053R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L062C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L062C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L062C8UX_MAXSIZE 65536) +set(GENERIC_L062C8UX_MAXDATASIZE 8192) +set(GENERIC_L062C8UX_MCU cortex-m0plus) +set(GENERIC_L062C8UX_FPCONF "-") +add_library(GENERIC_L062C8UX INTERFACE) +target_compile_options(GENERIC_L062C8UX INTERFACE + "SHELL:-DSTM32L062xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L062C8UX_MCU} +) +target_compile_definitions(GENERIC_L062C8UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L062C8UX" + "BOARD_NAME=\"GENERIC_L062C8UX\"" + "BOARD_ID=GENERIC_L062C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L062C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L062C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L062C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L062C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L062C8UX_MCU} +) +target_link_libraries(GENERIC_L062C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L062C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L062C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L062C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L062C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L062C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L062C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L062C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L062C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L062C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L062C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L062C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L062C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L062C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L062C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L062K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L062K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052K(6-8)T_L062K8T") +set(GENERIC_L062K8TX_MAXSIZE 65536) +set(GENERIC_L062K8TX_MAXDATASIZE 8192) +set(GENERIC_L062K8TX_MCU cortex-m0plus) +set(GENERIC_L062K8TX_FPCONF "-") +add_library(GENERIC_L062K8TX INTERFACE) +target_compile_options(GENERIC_L062K8TX INTERFACE + "SHELL:-DSTM32L062xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L062K8TX_MCU} +) +target_compile_definitions(GENERIC_L062K8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L062K8TX" + "BOARD_NAME=\"GENERIC_L062K8TX\"" + "BOARD_ID=GENERIC_L062K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L062K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L062K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L062K8TX INTERFACE + "LINKER:--default-script=${GENERIC_L062K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L062K8TX_MCU} +) +target_link_libraries(GENERIC_L062K8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L062K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L062K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L062K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L062K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L062K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L062K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L062K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L062K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L062K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L062K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L062K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L062K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L062K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L062K8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L063C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L063C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L063C8TX_MAXSIZE 65536) +set(GENERIC_L063C8TX_MAXDATASIZE 8192) +set(GENERIC_L063C8TX_MCU cortex-m0plus) +set(GENERIC_L063C8TX_FPCONF "-") +add_library(GENERIC_L063C8TX INTERFACE) +target_compile_options(GENERIC_L063C8TX INTERFACE + "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L063C8TX_MCU} +) +target_compile_definitions(GENERIC_L063C8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L063C8TX" + "BOARD_NAME=\"GENERIC_L063C8TX\"" + "BOARD_ID=GENERIC_L063C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L063C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L063C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L063C8TX INTERFACE + "LINKER:--default-script=${GENERIC_L063C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L063C8TX_MCU} +) +target_link_libraries(GENERIC_L063C8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L063C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L063C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L063C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L063C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L063C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L063C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L063C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L063C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L063C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L063C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L063C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L063C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L063C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L063C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L063C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L063C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)") +set(GENERIC_L063C8UX_MAXSIZE 65536) +set(GENERIC_L063C8UX_MAXDATASIZE 8192) +set(GENERIC_L063C8UX_MCU cortex-m0plus) +set(GENERIC_L063C8UX_FPCONF "-") +add_library(GENERIC_L063C8UX INTERFACE) +target_compile_options(GENERIC_L063C8UX INTERFACE + "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L063C8UX_MCU} +) +target_compile_definitions(GENERIC_L063C8UX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L063C8UX" + "BOARD_NAME=\"GENERIC_L063C8UX\"" + "BOARD_ID=GENERIC_L063C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L063C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L063C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L063C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L063C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L063C8UX_MCU} +) +target_link_libraries(GENERIC_L063C8UX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L063C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L063C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L063C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L063C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L063C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L063C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L063C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L063C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L063C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L063C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L063C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L063C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L063C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L063C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L063R8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L063R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T") +set(GENERIC_L063R8TX_MAXSIZE 65536) +set(GENERIC_L063R8TX_MAXDATASIZE 8192) +set(GENERIC_L063R8TX_MCU cortex-m0plus) +set(GENERIC_L063R8TX_FPCONF "-") +add_library(GENERIC_L063R8TX INTERFACE) +target_compile_options(GENERIC_L063R8TX INTERFACE + "SHELL:-DSTM32L063xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L063R8TX_MCU} +) +target_compile_definitions(GENERIC_L063R8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L063R8TX" + "BOARD_NAME=\"GENERIC_L063R8TX\"" + "BOARD_ID=GENERIC_L063R8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L063R8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L063R8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L063R8TX INTERFACE + "LINKER:--default-script=${GENERIC_L063R8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${GENERIC_L063R8TX_MCU} +) +target_link_libraries(GENERIC_L063R8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L063R8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L063R8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L063R8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L063R8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L063R8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L063R8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L063R8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L063R8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L063R8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L063R8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L063R8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L063R8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L063R8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L063R8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L072CBTX_MAXSIZE 131072) +set(GENERIC_L072CBTX_MAXDATASIZE 20480) +set(GENERIC_L072CBTX_MCU cortex-m0plus) +set(GENERIC_L072CBTX_FPCONF "-") +add_library(GENERIC_L072CBTX INTERFACE) +target_compile_options(GENERIC_L072CBTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CBTX_MCU} +) +target_compile_definitions(GENERIC_L072CBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CBTX" + "BOARD_NAME=\"GENERIC_L072CBTX\"" + "BOARD_ID=GENERIC_L072CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L072CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CBTX_MCU} +) +target_link_libraries(GENERIC_L072CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L072CBUX_MAXSIZE 131072) +set(GENERIC_L072CBUX_MAXDATASIZE 20480) +set(GENERIC_L072CBUX_MCU cortex-m0plus) +set(GENERIC_L072CBUX_FPCONF "-") +add_library(GENERIC_L072CBUX INTERFACE) +target_compile_options(GENERIC_L072CBUX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CBUX_MCU} +) +target_compile_definitions(GENERIC_L072CBUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CBUX" + "BOARD_NAME=\"GENERIC_L072CBUX\"" + "BOARD_ID=GENERIC_L072CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CBUX INTERFACE + "LINKER:--default-script=${GENERIC_L072CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CBUX_MCU} +) +target_link_libraries(GENERIC_L072CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY") +set(GENERIC_L072CBYX_MAXSIZE 131072) +set(GENERIC_L072CBYX_MAXDATASIZE 20480) +set(GENERIC_L072CBYX_MCU cortex-m0plus) +set(GENERIC_L072CBYX_FPCONF "-") +add_library(GENERIC_L072CBYX INTERFACE) +target_compile_options(GENERIC_L072CBYX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CBYX_MCU} +) +target_compile_definitions(GENERIC_L072CBYX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CBYX" + "BOARD_NAME=\"GENERIC_L072CBYX\"" + "BOARD_ID=GENERIC_L072CBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CBYX INTERFACE + "LINKER:--default-script=${GENERIC_L072CBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CBYX_MCU} +) +target_link_libraries(GENERIC_L072CBYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CBYX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CBYX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CBYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CZEX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CZEX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY") +set(GENERIC_L072CZEX_MAXSIZE 196608) +set(GENERIC_L072CZEX_MAXDATASIZE 20480) +set(GENERIC_L072CZEX_MCU cortex-m0plus) +set(GENERIC_L072CZEX_FPCONF "-") +add_library(GENERIC_L072CZEX INTERFACE) +target_compile_options(GENERIC_L072CZEX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CZEX_MCU} +) +target_compile_definitions(GENERIC_L072CZEX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CZEX" + "BOARD_NAME=\"GENERIC_L072CZEX\"" + "BOARD_ID=GENERIC_L072CZEX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CZEX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CZEX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CZEX INTERFACE + "LINKER:--default-script=${GENERIC_L072CZEX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CZEX_MCU} +) +target_link_libraries(GENERIC_L072CZEX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CZEX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CZEX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CZEX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CZEX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CZEX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CZEX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CZEX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CZEX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CZEX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CZEX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CZEX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CZEX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CZEX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CZEX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L072CZTX_MAXSIZE 196608) +set(GENERIC_L072CZTX_MAXDATASIZE 20480) +set(GENERIC_L072CZTX_MCU cortex-m0plus) +set(GENERIC_L072CZTX_FPCONF "-") +add_library(GENERIC_L072CZTX INTERFACE) +target_compile_options(GENERIC_L072CZTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CZTX_MCU} +) +target_compile_definitions(GENERIC_L072CZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CZTX" + "BOARD_NAME=\"GENERIC_L072CZTX\"" + "BOARD_ID=GENERIC_L072CZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CZTX INTERFACE + "LINKER:--default-script=${GENERIC_L072CZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CZTX_MCU} +) +target_link_libraries(GENERIC_L072CZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CZUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CZUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L072CZUX_MAXSIZE 196608) +set(GENERIC_L072CZUX_MAXDATASIZE 20480) +set(GENERIC_L072CZUX_MCU cortex-m0plus) +set(GENERIC_L072CZUX_FPCONF "-") +add_library(GENERIC_L072CZUX INTERFACE) +target_compile_options(GENERIC_L072CZUX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CZUX_MCU} +) +target_compile_definitions(GENERIC_L072CZUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CZUX" + "BOARD_NAME=\"GENERIC_L072CZUX\"" + "BOARD_ID=GENERIC_L072CZUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CZUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CZUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CZUX INTERFACE + "LINKER:--default-script=${GENERIC_L072CZUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CZUX_MCU} +) +target_link_libraries(GENERIC_L072CZUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CZUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CZUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CZUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CZUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CZUX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CZUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CZUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CZUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CZUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CZUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CZUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CZUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CZUX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CZUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072CZYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072CZYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY") +set(GENERIC_L072CZYX_MAXSIZE 196608) +set(GENERIC_L072CZYX_MAXDATASIZE 20480) +set(GENERIC_L072CZYX_MCU cortex-m0plus) +set(GENERIC_L072CZYX_FPCONF "-") +add_library(GENERIC_L072CZYX INTERFACE) +target_compile_options(GENERIC_L072CZYX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072CZYX_MCU} +) +target_compile_definitions(GENERIC_L072CZYX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072CZYX" + "BOARD_NAME=\"GENERIC_L072CZYX\"" + "BOARD_ID=GENERIC_L072CZYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072CZYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072CZYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072CZYX INTERFACE + "LINKER:--default-script=${GENERIC_L072CZYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072CZYX_MCU} +) +target_link_libraries(GENERIC_L072CZYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072CZYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072CZYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072CZYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072CZYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072CZYX_serial_none INTERFACE) +target_compile_options(GENERIC_L072CZYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072CZYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072CZYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072CZYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072CZYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072CZYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072CZYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072CZYX_usb_none INTERFACE) +target_compile_options(GENERIC_L072CZYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T") +set(GENERIC_L072KBTX_MAXSIZE 131072) +set(GENERIC_L072KBTX_MAXDATASIZE 20480) +set(GENERIC_L072KBTX_MCU cortex-m0plus) +set(GENERIC_L072KBTX_FPCONF "-") +add_library(GENERIC_L072KBTX INTERFACE) +target_compile_options(GENERIC_L072KBTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072KBTX_MCU} +) +target_compile_definitions(GENERIC_L072KBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072KBTX" + "BOARD_NAME=\"GENERIC_L072KBTX\"" + "BOARD_ID=GENERIC_L072KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072KBTX INTERFACE + "LINKER:--default-script=${GENERIC_L072KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072KBTX_MCU} +) +target_link_libraries(GENERIC_L072KBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072KBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U") +set(GENERIC_L072KBUX_MAXSIZE 131072) +set(GENERIC_L072KBUX_MAXDATASIZE 20480) +set(GENERIC_L072KBUX_MCU cortex-m0plus) +set(GENERIC_L072KBUX_FPCONF "-") +add_library(GENERIC_L072KBUX INTERFACE) +target_compile_options(GENERIC_L072KBUX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072KBUX_MCU} +) +target_compile_definitions(GENERIC_L072KBUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072KBUX" + "BOARD_NAME=\"GENERIC_L072KBUX\"" + "BOARD_ID=GENERIC_L072KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072KBUX INTERFACE + "LINKER:--default-script=${GENERIC_L072KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072KBUX_MCU} +) +target_link_libraries(GENERIC_L072KBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L072KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L072KBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072KZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072KZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T") +set(GENERIC_L072KZTX_MAXSIZE 196608) +set(GENERIC_L072KZTX_MAXDATASIZE 20480) +set(GENERIC_L072KZTX_MCU cortex-m0plus) +set(GENERIC_L072KZTX_FPCONF "-") +add_library(GENERIC_L072KZTX INTERFACE) +target_compile_options(GENERIC_L072KZTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072KZTX_MCU} +) +target_compile_definitions(GENERIC_L072KZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072KZTX" + "BOARD_NAME=\"GENERIC_L072KZTX\"" + "BOARD_ID=GENERIC_L072KZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072KZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072KZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072KZTX INTERFACE + "LINKER:--default-script=${GENERIC_L072KZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072KZTX_MCU} +) +target_link_libraries(GENERIC_L072KZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072KZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072KZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072KZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072KZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072KZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072KZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072KZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072KZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072KZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072KZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072KZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072KZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072KZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072KZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072KZUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072KZUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U") +set(GENERIC_L072KZUX_MAXSIZE 196608) +set(GENERIC_L072KZUX_MAXDATASIZE 20480) +set(GENERIC_L072KZUX_MCU cortex-m0plus) +set(GENERIC_L072KZUX_FPCONF "-") +add_library(GENERIC_L072KZUX INTERFACE) +target_compile_options(GENERIC_L072KZUX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072KZUX_MCU} +) +target_compile_definitions(GENERIC_L072KZUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072KZUX" + "BOARD_NAME=\"GENERIC_L072KZUX\"" + "BOARD_ID=GENERIC_L072KZUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072KZUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072KZUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072KZUX INTERFACE + "LINKER:--default-script=${GENERIC_L072KZUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072KZUX_MCU} +) +target_link_libraries(GENERIC_L072KZUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072KZUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072KZUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072KZUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072KZUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072KZUX_serial_none INTERFACE) +target_compile_options(GENERIC_L072KZUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072KZUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072KZUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072KZUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072KZUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072KZUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072KZUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072KZUX_usb_none INTERFACE) +target_compile_options(GENERIC_L072KZUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072RBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072RBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L072RBHX_MAXSIZE 131072) +set(GENERIC_L072RBHX_MAXDATASIZE 20480) +set(GENERIC_L072RBHX_MCU cortex-m0plus) +set(GENERIC_L072RBHX_FPCONF "-") +add_library(GENERIC_L072RBHX INTERFACE) +target_compile_options(GENERIC_L072RBHX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072RBHX_MCU} +) +target_compile_definitions(GENERIC_L072RBHX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072RBHX" + "BOARD_NAME=\"GENERIC_L072RBHX\"" + "BOARD_ID=GENERIC_L072RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072RBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072RBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072RBHX INTERFACE + "LINKER:--default-script=${GENERIC_L072RBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072RBHX_MCU} +) +target_link_libraries(GENERIC_L072RBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072RBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072RBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072RBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072RBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072RBHX_serial_none INTERFACE) +target_compile_options(GENERIC_L072RBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072RBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072RBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072RBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072RBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072RBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072RBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072RBHX_usb_none INTERFACE) +target_compile_options(GENERIC_L072RBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L072RBIX_MAXSIZE 131072) +set(GENERIC_L072RBIX_MAXDATASIZE 20480) +set(GENERIC_L072RBIX_MCU cortex-m0plus) +set(GENERIC_L072RBIX_FPCONF "-") +add_library(GENERIC_L072RBIX INTERFACE) +target_compile_options(GENERIC_L072RBIX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072RBIX_MCU} +) +target_compile_definitions(GENERIC_L072RBIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072RBIX" + "BOARD_NAME=\"GENERIC_L072RBIX\"" + "BOARD_ID=GENERIC_L072RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072RBIX INTERFACE + "LINKER:--default-script=${GENERIC_L072RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072RBIX_MCU} +) +target_link_libraries(GENERIC_L072RBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_L072RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_L072RBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(GENERIC_L072RBTX_MAXSIZE 131072) +set(GENERIC_L072RBTX_MAXDATASIZE 20480) +set(GENERIC_L072RBTX_MCU cortex-m0plus) +set(GENERIC_L072RBTX_FPCONF "-") +add_library(GENERIC_L072RBTX INTERFACE) +target_compile_options(GENERIC_L072RBTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072RBTX_MCU} +) +target_compile_definitions(GENERIC_L072RBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072RBTX" + "BOARD_NAME=\"GENERIC_L072RBTX\"" + "BOARD_ID=GENERIC_L072RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072RBTX INTERFACE + "LINKER:--default-script=${GENERIC_L072RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072RBTX_MCU} +) +target_link_libraries(GENERIC_L072RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072RZHX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072RZHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L072RZHX_MAXSIZE 196608) +set(GENERIC_L072RZHX_MAXDATASIZE 20480) +set(GENERIC_L072RZHX_MCU cortex-m0plus) +set(GENERIC_L072RZHX_FPCONF "-") +add_library(GENERIC_L072RZHX INTERFACE) +target_compile_options(GENERIC_L072RZHX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072RZHX_MCU} +) +target_compile_definitions(GENERIC_L072RZHX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072RZHX" + "BOARD_NAME=\"GENERIC_L072RZHX\"" + "BOARD_ID=GENERIC_L072RZHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072RZHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072RZHX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072RZHX INTERFACE + "LINKER:--default-script=${GENERIC_L072RZHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072RZHX_MCU} +) +target_link_libraries(GENERIC_L072RZHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072RZHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072RZHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072RZHX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072RZHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072RZHX_serial_none INTERFACE) +target_compile_options(GENERIC_L072RZHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072RZHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072RZHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072RZHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072RZHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072RZHX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072RZHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072RZHX_usb_none INTERFACE) +target_compile_options(GENERIC_L072RZHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072RZIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072RZIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L072RZIX_MAXSIZE 196608) +set(GENERIC_L072RZIX_MAXDATASIZE 20480) +set(GENERIC_L072RZIX_MCU cortex-m0plus) +set(GENERIC_L072RZIX_FPCONF "-") +add_library(GENERIC_L072RZIX INTERFACE) +target_compile_options(GENERIC_L072RZIX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072RZIX_MCU} +) +target_compile_definitions(GENERIC_L072RZIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072RZIX" + "BOARD_NAME=\"GENERIC_L072RZIX\"" + "BOARD_ID=GENERIC_L072RZIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072RZIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072RZIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072RZIX INTERFACE + "LINKER:--default-script=${GENERIC_L072RZIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072RZIX_MCU} +) +target_link_libraries(GENERIC_L072RZIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072RZIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072RZIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072RZIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072RZIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072RZIX_serial_none INTERFACE) +target_compile_options(GENERIC_L072RZIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072RZIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072RZIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072RZIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072RZIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072RZIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072RZIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072RZIX_usb_none INTERFACE) +target_compile_options(GENERIC_L072RZIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072RZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072RZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(GENERIC_L072RZTX_MAXSIZE 196608) +set(GENERIC_L072RZTX_MAXDATASIZE 20480) +set(GENERIC_L072RZTX_MCU cortex-m0plus) +set(GENERIC_L072RZTX_FPCONF "-") +add_library(GENERIC_L072RZTX INTERFACE) +target_compile_options(GENERIC_L072RZTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072RZTX_MCU} +) +target_compile_definitions(GENERIC_L072RZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072RZTX" + "BOARD_NAME=\"GENERIC_L072RZTX\"" + "BOARD_ID=GENERIC_L072RZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072RZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072RZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072RZTX INTERFACE + "LINKER:--default-script=${GENERIC_L072RZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072RZTX_MCU} +) +target_link_libraries(GENERIC_L072RZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072RZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072RZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072RZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072RZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072RZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072RZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072RZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072RZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072RZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072RZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072RZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072RZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072RZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072RZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072V8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072V8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L072V8IX_MAXSIZE 65536) +set(GENERIC_L072V8IX_MAXDATASIZE 20480) +set(GENERIC_L072V8IX_MCU cortex-m0plus) +set(GENERIC_L072V8IX_FPCONF "-") +add_library(GENERIC_L072V8IX INTERFACE) +target_compile_options(GENERIC_L072V8IX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072V8IX_MCU} +) +target_compile_definitions(GENERIC_L072V8IX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072V8IX" + "BOARD_NAME=\"GENERIC_L072V8IX\"" + "BOARD_ID=GENERIC_L072V8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072V8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072V8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072V8IX INTERFACE + "LINKER:--default-script=${GENERIC_L072V8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072V8IX_MCU} +) +target_link_libraries(GENERIC_L072V8IX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072V8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072V8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072V8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072V8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072V8IX_serial_none INTERFACE) +target_compile_options(GENERIC_L072V8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072V8IX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072V8IX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072V8IX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072V8IX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072V8IX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072V8IX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072V8IX_usb_none INTERFACE) +target_compile_options(GENERIC_L072V8IX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L072V8TX_MAXSIZE 65536) +set(GENERIC_L072V8TX_MAXDATASIZE 20480) +set(GENERIC_L072V8TX_MCU cortex-m0plus) +set(GENERIC_L072V8TX_FPCONF "-") +add_library(GENERIC_L072V8TX INTERFACE) +target_compile_options(GENERIC_L072V8TX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072V8TX_MCU} +) +target_compile_definitions(GENERIC_L072V8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072V8TX" + "BOARD_NAME=\"GENERIC_L072V8TX\"" + "BOARD_ID=GENERIC_L072V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072V8TX INTERFACE + "LINKER:--default-script=${GENERIC_L072V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072V8TX_MCU} +) +target_link_libraries(GENERIC_L072V8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L072V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L072V8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072VBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072VBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L072VBIX_MAXSIZE 131072) +set(GENERIC_L072VBIX_MAXDATASIZE 20480) +set(GENERIC_L072VBIX_MCU cortex-m0plus) +set(GENERIC_L072VBIX_FPCONF "-") +add_library(GENERIC_L072VBIX INTERFACE) +target_compile_options(GENERIC_L072VBIX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072VBIX_MCU} +) +target_compile_definitions(GENERIC_L072VBIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072VBIX" + "BOARD_NAME=\"GENERIC_L072VBIX\"" + "BOARD_ID=GENERIC_L072VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072VBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072VBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072VBIX INTERFACE + "LINKER:--default-script=${GENERIC_L072VBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072VBIX_MCU} +) +target_link_libraries(GENERIC_L072VBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072VBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072VBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072VBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072VBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072VBIX_serial_none INTERFACE) +target_compile_options(GENERIC_L072VBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072VBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072VBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072VBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072VBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072VBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072VBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072VBIX_usb_none INTERFACE) +target_compile_options(GENERIC_L072VBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L072VBTX_MAXSIZE 131072) +set(GENERIC_L072VBTX_MAXDATASIZE 20480) +set(GENERIC_L072VBTX_MCU cortex-m0plus) +set(GENERIC_L072VBTX_FPCONF "-") +add_library(GENERIC_L072VBTX INTERFACE) +target_compile_options(GENERIC_L072VBTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072VBTX_MCU} +) +target_compile_definitions(GENERIC_L072VBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072VBTX" + "BOARD_NAME=\"GENERIC_L072VBTX\"" + "BOARD_ID=GENERIC_L072VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072VBTX INTERFACE + "LINKER:--default-script=${GENERIC_L072VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072VBTX_MCU} +) +target_link_libraries(GENERIC_L072VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072VZIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072VZIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L072VZIX_MAXSIZE 196608) +set(GENERIC_L072VZIX_MAXDATASIZE 20480) +set(GENERIC_L072VZIX_MCU cortex-m0plus) +set(GENERIC_L072VZIX_FPCONF "-") +add_library(GENERIC_L072VZIX INTERFACE) +target_compile_options(GENERIC_L072VZIX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072VZIX_MCU} +) +target_compile_definitions(GENERIC_L072VZIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072VZIX" + "BOARD_NAME=\"GENERIC_L072VZIX\"" + "BOARD_ID=GENERIC_L072VZIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072VZIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072VZIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072VZIX INTERFACE + "LINKER:--default-script=${GENERIC_L072VZIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072VZIX_MCU} +) +target_link_libraries(GENERIC_L072VZIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072VZIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072VZIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072VZIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072VZIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072VZIX_serial_none INTERFACE) +target_compile_options(GENERIC_L072VZIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072VZIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072VZIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072VZIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072VZIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072VZIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072VZIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072VZIX_usb_none INTERFACE) +target_compile_options(GENERIC_L072VZIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L072VZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L072VZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L072VZTX_MAXSIZE 196608) +set(GENERIC_L072VZTX_MAXDATASIZE 20480) +set(GENERIC_L072VZTX_MCU cortex-m0plus) +set(GENERIC_L072VZTX_FPCONF "-") +add_library(GENERIC_L072VZTX INTERFACE) +target_compile_options(GENERIC_L072VZTX INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L072VZTX_MCU} +) +target_compile_definitions(GENERIC_L072VZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L072VZTX" + "BOARD_NAME=\"GENERIC_L072VZTX\"" + "BOARD_ID=GENERIC_L072VZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L072VZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L072VZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L072VZTX INTERFACE + "LINKER:--default-script=${GENERIC_L072VZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L072VZTX_MCU} +) +target_link_libraries(GENERIC_L072VZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L072VZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L072VZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L072VZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L072VZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L072VZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L072VZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L072VZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L072VZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L072VZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L072VZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L072VZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L072VZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L072VZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L072VZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L073CBTX_MAXSIZE 131072) +set(GENERIC_L073CBTX_MAXDATASIZE 20480) +set(GENERIC_L073CBTX_MCU cortex-m0plus) +set(GENERIC_L073CBTX_FPCONF "-") +add_library(GENERIC_L073CBTX INTERFACE) +target_compile_options(GENERIC_L073CBTX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073CBTX_MCU} +) +target_compile_definitions(GENERIC_L073CBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073CBTX" + "BOARD_NAME=\"GENERIC_L073CBTX\"" + "BOARD_ID=GENERIC_L073CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L073CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073CBTX_MCU} +) +target_link_libraries(GENERIC_L073CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L073CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L073CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L073CBUX_MAXSIZE 131072) +set(GENERIC_L073CBUX_MAXDATASIZE 20480) +set(GENERIC_L073CBUX_MCU cortex-m0plus) +set(GENERIC_L073CBUX_FPCONF "-") +add_library(GENERIC_L073CBUX INTERFACE) +target_compile_options(GENERIC_L073CBUX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073CBUX_MCU} +) +target_compile_definitions(GENERIC_L073CBUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073CBUX" + "BOARD_NAME=\"GENERIC_L073CBUX\"" + "BOARD_ID=GENERIC_L073CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073CBUX INTERFACE + "LINKER:--default-script=${GENERIC_L073CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073CBUX_MCU} +) +target_link_libraries(GENERIC_L073CBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L073CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L073CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073CZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073CZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L073CZTX_MAXSIZE 196608) +set(GENERIC_L073CZTX_MAXDATASIZE 20480) +set(GENERIC_L073CZTX_MCU cortex-m0plus) +set(GENERIC_L073CZTX_FPCONF "-") +add_library(GENERIC_L073CZTX INTERFACE) +target_compile_options(GENERIC_L073CZTX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073CZTX_MCU} +) +target_compile_definitions(GENERIC_L073CZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073CZTX" + "BOARD_NAME=\"GENERIC_L073CZTX\"" + "BOARD_ID=GENERIC_L073CZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073CZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073CZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073CZTX INTERFACE + "LINKER:--default-script=${GENERIC_L073CZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073CZTX_MCU} +) +target_link_libraries(GENERIC_L073CZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073CZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073CZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073CZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073CZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073CZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L073CZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073CZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073CZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073CZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073CZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073CZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073CZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073CZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L073CZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073CZUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073CZUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L073CZUX_MAXSIZE 196608) +set(GENERIC_L073CZUX_MAXDATASIZE 20480) +set(GENERIC_L073CZUX_MCU cortex-m0plus) +set(GENERIC_L073CZUX_FPCONF "-") +add_library(GENERIC_L073CZUX INTERFACE) +target_compile_options(GENERIC_L073CZUX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073CZUX_MCU} +) +target_compile_definitions(GENERIC_L073CZUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073CZUX" + "BOARD_NAME=\"GENERIC_L073CZUX\"" + "BOARD_ID=GENERIC_L073CZUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073CZUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073CZUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073CZUX INTERFACE + "LINKER:--default-script=${GENERIC_L073CZUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073CZUX_MCU} +) +target_link_libraries(GENERIC_L073CZUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073CZUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073CZUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073CZUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073CZUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073CZUX_serial_none INTERFACE) +target_compile_options(GENERIC_L073CZUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073CZUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073CZUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073CZUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073CZUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073CZUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073CZUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073CZUX_usb_none INTERFACE) +target_compile_options(GENERIC_L073CZUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073CZYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073CZYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY") +set(GENERIC_L073CZYX_MAXSIZE 196608) +set(GENERIC_L073CZYX_MAXDATASIZE 20480) +set(GENERIC_L073CZYX_MCU cortex-m0plus) +set(GENERIC_L073CZYX_FPCONF "-") +add_library(GENERIC_L073CZYX INTERFACE) +target_compile_options(GENERIC_L073CZYX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073CZYX_MCU} +) +target_compile_definitions(GENERIC_L073CZYX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073CZYX" + "BOARD_NAME=\"GENERIC_L073CZYX\"" + "BOARD_ID=GENERIC_L073CZYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073CZYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073CZYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073CZYX INTERFACE + "LINKER:--default-script=${GENERIC_L073CZYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073CZYX_MCU} +) +target_link_libraries(GENERIC_L073CZYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073CZYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073CZYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073CZYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073CZYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073CZYX_serial_none INTERFACE) +target_compile_options(GENERIC_L073CZYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073CZYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073CZYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073CZYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073CZYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073CZYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073CZYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073CZYX_usb_none INTERFACE) +target_compile_options(GENERIC_L073CZYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073RBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073RBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L073RBHX_MAXSIZE 131072) +set(GENERIC_L073RBHX_MAXDATASIZE 20480) +set(GENERIC_L073RBHX_MCU cortex-m0plus) +set(GENERIC_L073RBHX_FPCONF "-") +add_library(GENERIC_L073RBHX INTERFACE) +target_compile_options(GENERIC_L073RBHX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073RBHX_MCU} +) +target_compile_definitions(GENERIC_L073RBHX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073RBHX" + "BOARD_NAME=\"GENERIC_L073RBHX\"" + "BOARD_ID=GENERIC_L073RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073RBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073RBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073RBHX INTERFACE + "LINKER:--default-script=${GENERIC_L073RBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073RBHX_MCU} +) +target_link_libraries(GENERIC_L073RBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073RBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073RBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073RBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073RBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073RBHX_serial_none INTERFACE) +target_compile_options(GENERIC_L073RBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073RBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073RBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073RBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073RBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073RBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073RBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073RBHX_usb_none INTERFACE) +target_compile_options(GENERIC_L073RBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(GENERIC_L073RBTX_MAXSIZE 131072) +set(GENERIC_L073RBTX_MAXDATASIZE 20480) +set(GENERIC_L073RBTX_MCU cortex-m0plus) +set(GENERIC_L073RBTX_FPCONF "-") +add_library(GENERIC_L073RBTX INTERFACE) +target_compile_options(GENERIC_L073RBTX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073RBTX_MCU} +) +target_compile_definitions(GENERIC_L073RBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073RBTX" + "BOARD_NAME=\"GENERIC_L073RBTX\"" + "BOARD_ID=GENERIC_L073RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073RBTX INTERFACE + "LINKER:--default-script=${GENERIC_L073RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073RBTX_MCU} +) +target_link_libraries(GENERIC_L073RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L073RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L073RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073RZHX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073RZHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L073RZHX_MAXSIZE 196608) +set(GENERIC_L073RZHX_MAXDATASIZE 20480) +set(GENERIC_L073RZHX_MCU cortex-m0plus) +set(GENERIC_L073RZHX_FPCONF "-") +add_library(GENERIC_L073RZHX INTERFACE) +target_compile_options(GENERIC_L073RZHX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073RZHX_MCU} +) +target_compile_definitions(GENERIC_L073RZHX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073RZHX" + "BOARD_NAME=\"GENERIC_L073RZHX\"" + "BOARD_ID=GENERIC_L073RZHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073RZHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073RZHX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073RZHX INTERFACE + "LINKER:--default-script=${GENERIC_L073RZHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073RZHX_MCU} +) +target_link_libraries(GENERIC_L073RZHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073RZHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073RZHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073RZHX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073RZHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073RZHX_serial_none INTERFACE) +target_compile_options(GENERIC_L073RZHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073RZHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073RZHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073RZHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073RZHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073RZHX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073RZHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073RZHX_usb_none INTERFACE) +target_compile_options(GENERIC_L073RZHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073RZIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073RZIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L073RZIX_MAXSIZE 196608) +set(GENERIC_L073RZIX_MAXDATASIZE 20480) +set(GENERIC_L073RZIX_MCU cortex-m0plus) +set(GENERIC_L073RZIX_FPCONF "-") +add_library(GENERIC_L073RZIX INTERFACE) +target_compile_options(GENERIC_L073RZIX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073RZIX_MCU} +) +target_compile_definitions(GENERIC_L073RZIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073RZIX" + "BOARD_NAME=\"GENERIC_L073RZIX\"" + "BOARD_ID=GENERIC_L073RZIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073RZIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073RZIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073RZIX INTERFACE + "LINKER:--default-script=${GENERIC_L073RZIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073RZIX_MCU} +) +target_link_libraries(GENERIC_L073RZIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073RZIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073RZIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073RZIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073RZIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073RZIX_serial_none INTERFACE) +target_compile_options(GENERIC_L073RZIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073RZIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073RZIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073RZIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073RZIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073RZIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073RZIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073RZIX_usb_none INTERFACE) +target_compile_options(GENERIC_L073RZIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073RZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073RZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(GENERIC_L073RZTX_MAXSIZE 196608) +set(GENERIC_L073RZTX_MAXDATASIZE 20480) +set(GENERIC_L073RZTX_MCU cortex-m0plus) +set(GENERIC_L073RZTX_FPCONF "-") +add_library(GENERIC_L073RZTX INTERFACE) +target_compile_options(GENERIC_L073RZTX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073RZTX_MCU} +) +target_compile_definitions(GENERIC_L073RZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073RZTX" + "BOARD_NAME=\"GENERIC_L073RZTX\"" + "BOARD_ID=GENERIC_L073RZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073RZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073RZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073RZTX INTERFACE + "LINKER:--default-script=${GENERIC_L073RZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073RZTX_MCU} +) +target_link_libraries(GENERIC_L073RZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073RZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073RZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073RZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073RZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073RZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L073RZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073RZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073RZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073RZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073RZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073RZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073RZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073RZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L073RZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073V8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073V8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L073V8IX_MAXSIZE 65536) +set(GENERIC_L073V8IX_MAXDATASIZE 20480) +set(GENERIC_L073V8IX_MCU cortex-m0plus) +set(GENERIC_L073V8IX_FPCONF "-") +add_library(GENERIC_L073V8IX INTERFACE) +target_compile_options(GENERIC_L073V8IX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073V8IX_MCU} +) +target_compile_definitions(GENERIC_L073V8IX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073V8IX" + "BOARD_NAME=\"GENERIC_L073V8IX\"" + "BOARD_ID=GENERIC_L073V8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073V8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073V8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073V8IX INTERFACE + "LINKER:--default-script=${GENERIC_L073V8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073V8IX_MCU} +) +target_link_libraries(GENERIC_L073V8IX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073V8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073V8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073V8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073V8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073V8IX_serial_none INTERFACE) +target_compile_options(GENERIC_L073V8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073V8IX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073V8IX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073V8IX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073V8IX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073V8IX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073V8IX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073V8IX_usb_none INTERFACE) +target_compile_options(GENERIC_L073V8IX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L073V8TX_MAXSIZE 65536) +set(GENERIC_L073V8TX_MAXDATASIZE 20480) +set(GENERIC_L073V8TX_MCU cortex-m0plus) +set(GENERIC_L073V8TX_FPCONF "-") +add_library(GENERIC_L073V8TX INTERFACE) +target_compile_options(GENERIC_L073V8TX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073V8TX_MCU} +) +target_compile_definitions(GENERIC_L073V8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073V8TX" + "BOARD_NAME=\"GENERIC_L073V8TX\"" + "BOARD_ID=GENERIC_L073V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073V8TX INTERFACE + "LINKER:--default-script=${GENERIC_L073V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073V8TX_MCU} +) +target_link_libraries(GENERIC_L073V8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L073V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L073V8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073VBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073VBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L073VBIX_MAXSIZE 131072) +set(GENERIC_L073VBIX_MAXDATASIZE 20480) +set(GENERIC_L073VBIX_MCU cortex-m0plus) +set(GENERIC_L073VBIX_FPCONF "-") +add_library(GENERIC_L073VBIX INTERFACE) +target_compile_options(GENERIC_L073VBIX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073VBIX_MCU} +) +target_compile_definitions(GENERIC_L073VBIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073VBIX" + "BOARD_NAME=\"GENERIC_L073VBIX\"" + "BOARD_ID=GENERIC_L073VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073VBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073VBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073VBIX INTERFACE + "LINKER:--default-script=${GENERIC_L073VBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073VBIX_MCU} +) +target_link_libraries(GENERIC_L073VBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073VBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073VBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073VBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073VBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073VBIX_serial_none INTERFACE) +target_compile_options(GENERIC_L073VBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073VBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073VBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073VBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073VBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073VBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073VBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073VBIX_usb_none INTERFACE) +target_compile_options(GENERIC_L073VBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L073VBTX_MAXSIZE 131072) +set(GENERIC_L073VBTX_MAXDATASIZE 20480) +set(GENERIC_L073VBTX_MCU cortex-m0plus) +set(GENERIC_L073VBTX_FPCONF "-") +add_library(GENERIC_L073VBTX INTERFACE) +target_compile_options(GENERIC_L073VBTX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073VBTX_MCU} +) +target_compile_definitions(GENERIC_L073VBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073VBTX" + "BOARD_NAME=\"GENERIC_L073VBTX\"" + "BOARD_ID=GENERIC_L073VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073VBTX INTERFACE + "LINKER:--default-script=${GENERIC_L073VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073VBTX_MCU} +) +target_link_libraries(GENERIC_L073VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L073VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L073VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073VZIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073VZIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L073VZIX_MAXSIZE 196608) +set(GENERIC_L073VZIX_MAXDATASIZE 20480) +set(GENERIC_L073VZIX_MCU cortex-m0plus) +set(GENERIC_L073VZIX_FPCONF "-") +add_library(GENERIC_L073VZIX INTERFACE) +target_compile_options(GENERIC_L073VZIX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073VZIX_MCU} +) +target_compile_definitions(GENERIC_L073VZIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073VZIX" + "BOARD_NAME=\"GENERIC_L073VZIX\"" + "BOARD_ID=GENERIC_L073VZIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073VZIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073VZIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073VZIX INTERFACE + "LINKER:--default-script=${GENERIC_L073VZIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073VZIX_MCU} +) +target_link_libraries(GENERIC_L073VZIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073VZIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073VZIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073VZIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073VZIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073VZIX_serial_none INTERFACE) +target_compile_options(GENERIC_L073VZIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073VZIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073VZIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073VZIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073VZIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073VZIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073VZIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073VZIX_usb_none INTERFACE) +target_compile_options(GENERIC_L073VZIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L073VZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L073VZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L073VZTX_MAXSIZE 196608) +set(GENERIC_L073VZTX_MAXDATASIZE 20480) +set(GENERIC_L073VZTX_MCU cortex-m0plus) +set(GENERIC_L073VZTX_FPCONF "-") +add_library(GENERIC_L073VZTX INTERFACE) +target_compile_options(GENERIC_L073VZTX INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L073VZTX_MCU} +) +target_compile_definitions(GENERIC_L073VZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L073VZTX" + "BOARD_NAME=\"GENERIC_L073VZTX\"" + "BOARD_ID=GENERIC_L073VZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L073VZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L073VZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L073VZTX INTERFACE + "LINKER:--default-script=${GENERIC_L073VZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L073VZTX_MCU} +) +target_link_libraries(GENERIC_L073VZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L073VZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L073VZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L073VZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L073VZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L073VZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L073VZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L073VZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L073VZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L073VZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L073VZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L073VZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L073VZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L073VZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L073VZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L082CZUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L082CZUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L082CZUX_MAXSIZE 196608) +set(GENERIC_L082CZUX_MAXDATASIZE 20480) +set(GENERIC_L082CZUX_MCU cortex-m0plus) +set(GENERIC_L082CZUX_FPCONF "-") +add_library(GENERIC_L082CZUX INTERFACE) +target_compile_options(GENERIC_L082CZUX INTERFACE + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L082CZUX_MCU} +) +target_compile_definitions(GENERIC_L082CZUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L082CZUX" + "BOARD_NAME=\"GENERIC_L082CZUX\"" + "BOARD_ID=GENERIC_L082CZUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L082CZUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L082CZUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L082CZUX INTERFACE + "LINKER:--default-script=${GENERIC_L082CZUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L082CZUX_MCU} +) +target_link_libraries(GENERIC_L082CZUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L082CZUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L082CZUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L082CZUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L082CZUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L082CZUX_serial_none INTERFACE) +target_compile_options(GENERIC_L082CZUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L082CZUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L082CZUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L082CZUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L082CZUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L082CZUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L082CZUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L082CZUX_usb_none INTERFACE) +target_compile_options(GENERIC_L082CZUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L082CZYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L082CZYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY") +set(GENERIC_L082CZYX_MAXSIZE 196608) +set(GENERIC_L082CZYX_MAXDATASIZE 20480) +set(GENERIC_L082CZYX_MCU cortex-m0plus) +set(GENERIC_L082CZYX_FPCONF "-") +add_library(GENERIC_L082CZYX INTERFACE) +target_compile_options(GENERIC_L082CZYX INTERFACE + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L082CZYX_MCU} +) +target_compile_definitions(GENERIC_L082CZYX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L082CZYX" + "BOARD_NAME=\"GENERIC_L082CZYX\"" + "BOARD_ID=GENERIC_L082CZYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L082CZYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L082CZYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L082CZYX INTERFACE + "LINKER:--default-script=${GENERIC_L082CZYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L082CZYX_MCU} +) +target_link_libraries(GENERIC_L082CZYX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L082CZYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L082CZYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L082CZYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L082CZYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L082CZYX_serial_none INTERFACE) +target_compile_options(GENERIC_L082CZYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L082CZYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L082CZYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L082CZYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L082CZYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L082CZYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L082CZYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L082CZYX_usb_none INTERFACE) +target_compile_options(GENERIC_L082CZYX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L082KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L082KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T") +set(GENERIC_L082KBTX_MAXSIZE 131072) +set(GENERIC_L082KBTX_MAXDATASIZE 20480) +set(GENERIC_L082KBTX_MCU cortex-m0plus) +set(GENERIC_L082KBTX_FPCONF "-") +add_library(GENERIC_L082KBTX INTERFACE) +target_compile_options(GENERIC_L082KBTX INTERFACE + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L082KBTX_MCU} +) +target_compile_definitions(GENERIC_L082KBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L082KBTX" + "BOARD_NAME=\"GENERIC_L082KBTX\"" + "BOARD_ID=GENERIC_L082KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L082KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L082KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L082KBTX INTERFACE + "LINKER:--default-script=${GENERIC_L082KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L082KBTX_MCU} +) +target_link_libraries(GENERIC_L082KBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L082KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L082KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L082KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L082KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L082KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L082KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L082KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L082KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L082KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L082KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L082KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L082KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L082KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L082KBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L082KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L082KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U") +set(GENERIC_L082KBUX_MAXSIZE 131072) +set(GENERIC_L082KBUX_MAXDATASIZE 20480) +set(GENERIC_L082KBUX_MCU cortex-m0plus) +set(GENERIC_L082KBUX_FPCONF "-") +add_library(GENERIC_L082KBUX INTERFACE) +target_compile_options(GENERIC_L082KBUX INTERFACE + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L082KBUX_MCU} +) +target_compile_definitions(GENERIC_L082KBUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L082KBUX" + "BOARD_NAME=\"GENERIC_L082KBUX\"" + "BOARD_ID=GENERIC_L082KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L082KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L082KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L082KBUX INTERFACE + "LINKER:--default-script=${GENERIC_L082KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L082KBUX_MCU} +) +target_link_libraries(GENERIC_L082KBUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L082KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L082KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L082KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L082KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L082KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L082KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L082KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L082KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L082KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L082KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L082KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L082KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L082KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L082KBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L082KZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L082KZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T") +set(GENERIC_L082KZTX_MAXSIZE 196608) +set(GENERIC_L082KZTX_MAXDATASIZE 20480) +set(GENERIC_L082KZTX_MCU cortex-m0plus) +set(GENERIC_L082KZTX_FPCONF "-") +add_library(GENERIC_L082KZTX INTERFACE) +target_compile_options(GENERIC_L082KZTX INTERFACE + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L082KZTX_MCU} +) +target_compile_definitions(GENERIC_L082KZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L082KZTX" + "BOARD_NAME=\"GENERIC_L082KZTX\"" + "BOARD_ID=GENERIC_L082KZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L082KZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L082KZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L082KZTX INTERFACE + "LINKER:--default-script=${GENERIC_L082KZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L082KZTX_MCU} +) +target_link_libraries(GENERIC_L082KZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L082KZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L082KZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L082KZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L082KZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L082KZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L082KZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L082KZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L082KZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L082KZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L082KZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L082KZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L082KZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L082KZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L082KZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L082KZUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L082KZUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U") +set(GENERIC_L082KZUX_MAXSIZE 196608) +set(GENERIC_L082KZUX_MAXDATASIZE 20480) +set(GENERIC_L082KZUX_MCU cortex-m0plus) +set(GENERIC_L082KZUX_FPCONF "-") +add_library(GENERIC_L082KZUX INTERFACE) +target_compile_options(GENERIC_L082KZUX INTERFACE + "SHELL:-DSTM32L082xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L082KZUX_MCU} +) +target_compile_definitions(GENERIC_L082KZUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L082KZUX" + "BOARD_NAME=\"GENERIC_L082KZUX\"" + "BOARD_ID=GENERIC_L082KZUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L082KZUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L082KZUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L082KZUX INTERFACE + "LINKER:--default-script=${GENERIC_L082KZUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L082KZUX_MCU} +) +target_link_libraries(GENERIC_L082KZUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L082KZUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L082KZUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L082KZUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L082KZUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L082KZUX_serial_none INTERFACE) +target_compile_options(GENERIC_L082KZUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L082KZUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L082KZUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L082KZUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L082KZUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L082KZUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L082KZUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L082KZUX_usb_none INTERFACE) +target_compile_options(GENERIC_L082KZUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L083CBTX_MAXSIZE 131072) +set(GENERIC_L083CBTX_MAXDATASIZE 20480) +set(GENERIC_L083CBTX_MCU cortex-m0plus) +set(GENERIC_L083CBTX_FPCONF "-") +add_library(GENERIC_L083CBTX INTERFACE) +target_compile_options(GENERIC_L083CBTX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083CBTX_MCU} +) +target_compile_definitions(GENERIC_L083CBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083CBTX" + "BOARD_NAME=\"GENERIC_L083CBTX\"" + "BOARD_ID=GENERIC_L083CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L083CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083CBTX_MCU} +) +target_link_libraries(GENERIC_L083CBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L083CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L083CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083CZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083CZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L083CZTX_MAXSIZE 196608) +set(GENERIC_L083CZTX_MAXDATASIZE 20480) +set(GENERIC_L083CZTX_MCU cortex-m0plus) +set(GENERIC_L083CZTX_FPCONF "-") +add_library(GENERIC_L083CZTX INTERFACE) +target_compile_options(GENERIC_L083CZTX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083CZTX_MCU} +) +target_compile_definitions(GENERIC_L083CZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083CZTX" + "BOARD_NAME=\"GENERIC_L083CZTX\"" + "BOARD_ID=GENERIC_L083CZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083CZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083CZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083CZTX INTERFACE + "LINKER:--default-script=${GENERIC_L083CZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083CZTX_MCU} +) +target_link_libraries(GENERIC_L083CZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083CZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083CZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083CZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083CZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083CZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L083CZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083CZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083CZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083CZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083CZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083CZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083CZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083CZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L083CZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083CZUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083CZUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)") +set(GENERIC_L083CZUX_MAXSIZE 196608) +set(GENERIC_L083CZUX_MAXDATASIZE 20480) +set(GENERIC_L083CZUX_MCU cortex-m0plus) +set(GENERIC_L083CZUX_FPCONF "-") +add_library(GENERIC_L083CZUX INTERFACE) +target_compile_options(GENERIC_L083CZUX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083CZUX_MCU} +) +target_compile_definitions(GENERIC_L083CZUX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083CZUX" + "BOARD_NAME=\"GENERIC_L083CZUX\"" + "BOARD_ID=GENERIC_L083CZUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083CZUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083CZUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083CZUX INTERFACE + "LINKER:--default-script=${GENERIC_L083CZUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083CZUX_MCU} +) +target_link_libraries(GENERIC_L083CZUX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083CZUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083CZUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083CZUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083CZUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083CZUX_serial_none INTERFACE) +target_compile_options(GENERIC_L083CZUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083CZUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083CZUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083CZUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083CZUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083CZUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083CZUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083CZUX_usb_none INTERFACE) +target_compile_options(GENERIC_L083CZUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083RBHX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083RBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L083RBHX_MAXSIZE 131072) +set(GENERIC_L083RBHX_MAXDATASIZE 20480) +set(GENERIC_L083RBHX_MCU cortex-m0plus) +set(GENERIC_L083RBHX_FPCONF "-") +add_library(GENERIC_L083RBHX INTERFACE) +target_compile_options(GENERIC_L083RBHX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083RBHX_MCU} +) +target_compile_definitions(GENERIC_L083RBHX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083RBHX" + "BOARD_NAME=\"GENERIC_L083RBHX\"" + "BOARD_ID=GENERIC_L083RBHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083RBHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083RBHX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083RBHX INTERFACE + "LINKER:--default-script=${GENERIC_L083RBHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083RBHX_MCU} +) +target_link_libraries(GENERIC_L083RBHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083RBHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083RBHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083RBHX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083RBHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083RBHX_serial_none INTERFACE) +target_compile_options(GENERIC_L083RBHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083RBHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083RBHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083RBHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083RBHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083RBHX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083RBHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083RBHX_usb_none INTERFACE) +target_compile_options(GENERIC_L083RBHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(GENERIC_L083RBTX_MAXSIZE 131072) +set(GENERIC_L083RBTX_MAXDATASIZE 20480) +set(GENERIC_L083RBTX_MCU cortex-m0plus) +set(GENERIC_L083RBTX_FPCONF "-") +add_library(GENERIC_L083RBTX INTERFACE) +target_compile_options(GENERIC_L083RBTX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083RBTX_MCU} +) +target_compile_definitions(GENERIC_L083RBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083RBTX" + "BOARD_NAME=\"GENERIC_L083RBTX\"" + "BOARD_ID=GENERIC_L083RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083RBTX INTERFACE + "LINKER:--default-script=${GENERIC_L083RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083RBTX_MCU} +) +target_link_libraries(GENERIC_L083RBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L083RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L083RBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083RZHX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083RZHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H") +set(GENERIC_L083RZHX_MAXSIZE 196608) +set(GENERIC_L083RZHX_MAXDATASIZE 20480) +set(GENERIC_L083RZHX_MCU cortex-m0plus) +set(GENERIC_L083RZHX_FPCONF "-") +add_library(GENERIC_L083RZHX INTERFACE) +target_compile_options(GENERIC_L083RZHX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083RZHX_MCU} +) +target_compile_definitions(GENERIC_L083RZHX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083RZHX" + "BOARD_NAME=\"GENERIC_L083RZHX\"" + "BOARD_ID=GENERIC_L083RZHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083RZHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083RZHX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083RZHX INTERFACE + "LINKER:--default-script=${GENERIC_L083RZHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083RZHX_MCU} +) +target_link_libraries(GENERIC_L083RZHX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083RZHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083RZHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083RZHX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083RZHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083RZHX_serial_none INTERFACE) +target_compile_options(GENERIC_L083RZHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083RZHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083RZHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083RZHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083RZHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083RZHX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083RZHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083RZHX_usb_none INTERFACE) +target_compile_options(GENERIC_L083RZHX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083RZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083RZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(GENERIC_L083RZTX_MAXSIZE 196608) +set(GENERIC_L083RZTX_MAXDATASIZE 20480) +set(GENERIC_L083RZTX_MCU cortex-m0plus) +set(GENERIC_L083RZTX_FPCONF "-") +add_library(GENERIC_L083RZTX INTERFACE) +target_compile_options(GENERIC_L083RZTX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083RZTX_MCU} +) +target_compile_definitions(GENERIC_L083RZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083RZTX" + "BOARD_NAME=\"GENERIC_L083RZTX\"" + "BOARD_ID=GENERIC_L083RZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083RZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083RZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083RZTX INTERFACE + "LINKER:--default-script=${GENERIC_L083RZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083RZTX_MCU} +) +target_link_libraries(GENERIC_L083RZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083RZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083RZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083RZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083RZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083RZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L083RZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083RZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083RZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083RZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083RZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083RZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083RZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083RZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L083RZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083V8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083V8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L083V8IX_MAXSIZE 65536) +set(GENERIC_L083V8IX_MAXDATASIZE 20480) +set(GENERIC_L083V8IX_MCU cortex-m0plus) +set(GENERIC_L083V8IX_FPCONF "-") +add_library(GENERIC_L083V8IX INTERFACE) +target_compile_options(GENERIC_L083V8IX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083V8IX_MCU} +) +target_compile_definitions(GENERIC_L083V8IX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083V8IX" + "BOARD_NAME=\"GENERIC_L083V8IX\"" + "BOARD_ID=GENERIC_L083V8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083V8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083V8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083V8IX INTERFACE + "LINKER:--default-script=${GENERIC_L083V8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083V8IX_MCU} +) +target_link_libraries(GENERIC_L083V8IX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083V8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083V8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083V8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083V8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083V8IX_serial_none INTERFACE) +target_compile_options(GENERIC_L083V8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083V8IX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083V8IX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083V8IX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083V8IX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083V8IX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083V8IX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083V8IX_usb_none INTERFACE) +target_compile_options(GENERIC_L083V8IX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083V8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083V8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L083V8TX_MAXSIZE 65536) +set(GENERIC_L083V8TX_MAXDATASIZE 20480) +set(GENERIC_L083V8TX_MCU cortex-m0plus) +set(GENERIC_L083V8TX_FPCONF "-") +add_library(GENERIC_L083V8TX INTERFACE) +target_compile_options(GENERIC_L083V8TX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083V8TX_MCU} +) +target_compile_definitions(GENERIC_L083V8TX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083V8TX" + "BOARD_NAME=\"GENERIC_L083V8TX\"" + "BOARD_ID=GENERIC_L083V8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083V8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083V8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083V8TX INTERFACE + "LINKER:--default-script=${GENERIC_L083V8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083V8TX_MCU} +) +target_link_libraries(GENERIC_L083V8TX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083V8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083V8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083V8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083V8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083V8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L083V8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083V8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083V8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083V8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083V8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083V8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083V8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083V8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L083V8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083VBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083VBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L083VBIX_MAXSIZE 131072) +set(GENERIC_L083VBIX_MAXDATASIZE 20480) +set(GENERIC_L083VBIX_MCU cortex-m0plus) +set(GENERIC_L083VBIX_FPCONF "-") +add_library(GENERIC_L083VBIX INTERFACE) +target_compile_options(GENERIC_L083VBIX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083VBIX_MCU} +) +target_compile_definitions(GENERIC_L083VBIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083VBIX" + "BOARD_NAME=\"GENERIC_L083VBIX\"" + "BOARD_ID=GENERIC_L083VBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083VBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083VBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083VBIX INTERFACE + "LINKER:--default-script=${GENERIC_L083VBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083VBIX_MCU} +) +target_link_libraries(GENERIC_L083VBIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083VBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083VBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083VBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083VBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083VBIX_serial_none INTERFACE) +target_compile_options(GENERIC_L083VBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083VBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083VBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083VBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083VBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083VBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083VBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083VBIX_usb_none INTERFACE) +target_compile_options(GENERIC_L083VBIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083VBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L083VBTX_MAXSIZE 131072) +set(GENERIC_L083VBTX_MAXDATASIZE 20480) +set(GENERIC_L083VBTX_MCU cortex-m0plus) +set(GENERIC_L083VBTX_FPCONF "-") +add_library(GENERIC_L083VBTX INTERFACE) +target_compile_options(GENERIC_L083VBTX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083VBTX_MCU} +) +target_compile_definitions(GENERIC_L083VBTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083VBTX" + "BOARD_NAME=\"GENERIC_L083VBTX\"" + "BOARD_ID=GENERIC_L083VBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083VBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083VBTX INTERFACE + "LINKER:--default-script=${GENERIC_L083VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083VBTX_MCU} +) +target_link_libraries(GENERIC_L083VBTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083VBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083VBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083VBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L083VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083VBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083VBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083VBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083VBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L083VBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083VZIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083VZIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L083VZIX_MAXSIZE 196608) +set(GENERIC_L083VZIX_MAXDATASIZE 20480) +set(GENERIC_L083VZIX_MCU cortex-m0plus) +set(GENERIC_L083VZIX_FPCONF "-") +add_library(GENERIC_L083VZIX INTERFACE) +target_compile_options(GENERIC_L083VZIX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083VZIX_MCU} +) +target_compile_definitions(GENERIC_L083VZIX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083VZIX" + "BOARD_NAME=\"GENERIC_L083VZIX\"" + "BOARD_ID=GENERIC_L083VZIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083VZIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083VZIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083VZIX INTERFACE + "LINKER:--default-script=${GENERIC_L083VZIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083VZIX_MCU} +) +target_link_libraries(GENERIC_L083VZIX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083VZIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083VZIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083VZIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083VZIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083VZIX_serial_none INTERFACE) +target_compile_options(GENERIC_L083VZIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083VZIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083VZIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083VZIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083VZIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083VZIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083VZIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083VZIX_usb_none INTERFACE) +target_compile_options(GENERIC_L083VZIX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L083VZTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L083VZTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)") +set(GENERIC_L083VZTX_MAXSIZE 196608) +set(GENERIC_L083VZTX_MAXDATASIZE 20480) +set(GENERIC_L083VZTX_MCU cortex-m0plus) +set(GENERIC_L083VZTX_FPCONF "-") +add_library(GENERIC_L083VZTX INTERFACE) +target_compile_options(GENERIC_L083VZTX INTERFACE + "SHELL:-DSTM32L083xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L083VZTX_MCU} +) +target_compile_definitions(GENERIC_L083VZTX INTERFACE + "STM32L0xx" + "ARDUINO_GENERIC_L083VZTX" + "BOARD_NAME=\"GENERIC_L083VZTX\"" + "BOARD_ID=GENERIC_L083VZTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L083VZTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${GENERIC_L083VZTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L083VZTX INTERFACE + "LINKER:--default-script=${GENERIC_L083VZTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_L083VZTX_MCU} +) +target_link_libraries(GENERIC_L083VZTX INTERFACE + arm_cortexM0l_math +) + +add_library(GENERIC_L083VZTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L083VZTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L083VZTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L083VZTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L083VZTX_serial_none INTERFACE) +target_compile_options(GENERIC_L083VZTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L083VZTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L083VZTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L083VZTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L083VZTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L083VZTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L083VZTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L083VZTX_usb_none INTERFACE) +target_compile_options(GENERIC_L083VZTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L100C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L100C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L100C6UX_MAXSIZE 32768) +set(GENERIC_L100C6UX_MAXDATASIZE 4096) +set(GENERIC_L100C6UX_MCU cortex-m3) +set(GENERIC_L100C6UX_FPCONF "-") +add_library(GENERIC_L100C6UX INTERFACE) +target_compile_options(GENERIC_L100C6UX INTERFACE + "SHELL:-DSTM32L100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L100C6UX_MCU} +) +target_compile_definitions(GENERIC_L100C6UX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L100C6UX" + "BOARD_NAME=\"GENERIC_L100C6UX\"" + "BOARD_ID=GENERIC_L100C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L100C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L100C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L100C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L100C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${GENERIC_L100C6UX_MCU} +) +target_link_libraries(GENERIC_L100C6UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L100C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L100C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L100C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L100C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L100C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L100C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L100C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L100C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L100C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L100C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L100C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L100C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L100C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L100C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L100C6UXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L100C6UXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L100C6UXA_MAXSIZE 32768) +set(GENERIC_L100C6UXA_MAXDATASIZE 10240) +set(GENERIC_L100C6UXA_MCU cortex-m3) +set(GENERIC_L100C6UXA_FPCONF "-") +add_library(GENERIC_L100C6UXA INTERFACE) +target_compile_options(GENERIC_L100C6UXA INTERFACE + "SHELL:-DSTM32L100xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L100C6UXA_MCU} +) +target_compile_definitions(GENERIC_L100C6UXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L100C6UXA" + "BOARD_NAME=\"GENERIC_L100C6UXA\"" + "BOARD_ID=GENERIC_L100C6UXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L100C6UXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L100C6UXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L100C6UXA INTERFACE + "LINKER:--default-script=${GENERIC_L100C6UXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L100C6UXA_MCU} +) +target_link_libraries(GENERIC_L100C6UXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L100C6UXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L100C6UXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L100C6UXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L100C6UXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L100C6UXA_serial_none INTERFACE) +target_compile_options(GENERIC_L100C6UXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L100C6UXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L100C6UXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L100C6UXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L100C6UXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L100C6UXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L100C6UXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L100C6UXA_usb_none INTERFACE) +target_compile_options(GENERIC_L100C6UXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C6TX_MAXSIZE 32768) +set(GENERIC_L151C6TX_MAXDATASIZE 10240) +set(GENERIC_L151C6TX_MCU cortex-m3) +set(GENERIC_L151C6TX_FPCONF "-") +add_library(GENERIC_L151C6TX INTERFACE) +target_compile_options(GENERIC_L151C6TX INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C6TX_MCU} +) +target_compile_definitions(GENERIC_L151C6TX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C6TX" + "BOARD_NAME=\"GENERIC_L151C6TX\"" + "BOARD_ID=GENERIC_L151C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L151C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L151C6TX_MCU} +) +target_link_libraries(GENERIC_L151C6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L151C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L151C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C6TXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C6TXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C6TXA_MAXSIZE 32768) +set(GENERIC_L151C6TXA_MAXDATASIZE 16384) +set(GENERIC_L151C6TXA_MCU cortex-m3) +set(GENERIC_L151C6TXA_FPCONF "-") +add_library(GENERIC_L151C6TXA INTERFACE) +target_compile_options(GENERIC_L151C6TXA INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C6TXA_MCU} +) +target_compile_definitions(GENERIC_L151C6TXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C6TXA" + "BOARD_NAME=\"GENERIC_L151C6TXA\"" + "BOARD_ID=GENERIC_L151C6TXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C6TXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C6TXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C6TXA INTERFACE + "LINKER:--default-script=${GENERIC_L151C6TXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L151C6TXA_MCU} +) +target_link_libraries(GENERIC_L151C6TXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C6TXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C6TXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C6TXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C6TXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C6TXA_serial_none INTERFACE) +target_compile_options(GENERIC_L151C6TXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C6TXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C6TXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C6TXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C6TXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C6TXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C6TXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C6TXA_usb_none INTERFACE) +target_compile_options(GENERIC_L151C6TXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C6UX_MAXSIZE 32768) +set(GENERIC_L151C6UX_MAXDATASIZE 10240) +set(GENERIC_L151C6UX_MCU cortex-m3) +set(GENERIC_L151C6UX_FPCONF "-") +add_library(GENERIC_L151C6UX INTERFACE) +target_compile_options(GENERIC_L151C6UX INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C6UX_MCU} +) +target_compile_definitions(GENERIC_L151C6UX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C6UX" + "BOARD_NAME=\"GENERIC_L151C6UX\"" + "BOARD_ID=GENERIC_L151C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L151C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L151C6UX_MCU} +) +target_link_libraries(GENERIC_L151C6UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L151C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L151C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C6UXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C6UXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C6UXA_MAXSIZE 32768) +set(GENERIC_L151C6UXA_MAXDATASIZE 16384) +set(GENERIC_L151C6UXA_MCU cortex-m3) +set(GENERIC_L151C6UXA_FPCONF "-") +add_library(GENERIC_L151C6UXA INTERFACE) +target_compile_options(GENERIC_L151C6UXA INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C6UXA_MCU} +) +target_compile_definitions(GENERIC_L151C6UXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C6UXA" + "BOARD_NAME=\"GENERIC_L151C6UXA\"" + "BOARD_ID=GENERIC_L151C6UXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C6UXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C6UXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C6UXA INTERFACE + "LINKER:--default-script=${GENERIC_L151C6UXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L151C6UXA_MCU} +) +target_link_libraries(GENERIC_L151C6UXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C6UXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C6UXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C6UXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C6UXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C6UXA_serial_none INTERFACE) +target_compile_options(GENERIC_L151C6UXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C6UXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C6UXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C6UXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C6UXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C6UXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C6UXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C6UXA_usb_none INTERFACE) +target_compile_options(GENERIC_L151C6UXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C8TX_MAXSIZE 65536) +set(GENERIC_L151C8TX_MAXDATASIZE 10240) +set(GENERIC_L151C8TX_MCU cortex-m3) +set(GENERIC_L151C8TX_FPCONF "-") +add_library(GENERIC_L151C8TX INTERFACE) +target_compile_options(GENERIC_L151C8TX INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C8TX_MCU} +) +target_compile_definitions(GENERIC_L151C8TX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C8TX" + "BOARD_NAME=\"GENERIC_L151C8TX\"" + "BOARD_ID=GENERIC_L151C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C8TX INTERFACE + "LINKER:--default-script=${GENERIC_L151C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L151C8TX_MCU} +) +target_link_libraries(GENERIC_L151C8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L151C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L151C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C8TXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C8TXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C8TXA_MAXSIZE 65536) +set(GENERIC_L151C8TXA_MAXDATASIZE 32768) +set(GENERIC_L151C8TXA_MCU cortex-m3) +set(GENERIC_L151C8TXA_FPCONF "-") +add_library(GENERIC_L151C8TXA INTERFACE) +target_compile_options(GENERIC_L151C8TXA INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C8TXA_MCU} +) +target_compile_definitions(GENERIC_L151C8TXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C8TXA" + "BOARD_NAME=\"GENERIC_L151C8TXA\"" + "BOARD_ID=GENERIC_L151C8TXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C8TXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C8TXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C8TXA INTERFACE + "LINKER:--default-script=${GENERIC_L151C8TXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L151C8TXA_MCU} +) +target_link_libraries(GENERIC_L151C8TXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C8TXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C8TXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C8TXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C8TXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C8TXA_serial_none INTERFACE) +target_compile_options(GENERIC_L151C8TXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C8TXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C8TXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C8TXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C8TXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C8TXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C8TXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C8TXA_usb_none INTERFACE) +target_compile_options(GENERIC_L151C8TXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C8UX_MAXSIZE 65536) +set(GENERIC_L151C8UX_MAXDATASIZE 10240) +set(GENERIC_L151C8UX_MCU cortex-m3) +set(GENERIC_L151C8UX_FPCONF "-") +add_library(GENERIC_L151C8UX INTERFACE) +target_compile_options(GENERIC_L151C8UX INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C8UX_MCU} +) +target_compile_definitions(GENERIC_L151C8UX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C8UX" + "BOARD_NAME=\"GENERIC_L151C8UX\"" + "BOARD_ID=GENERIC_L151C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L151C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L151C8UX_MCU} +) +target_link_libraries(GENERIC_L151C8UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L151C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L151C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151C8UXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L151C8UXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151C8UXA_MAXSIZE 65536) +set(GENERIC_L151C8UXA_MAXDATASIZE 32768) +set(GENERIC_L151C8UXA_MCU cortex-m3) +set(GENERIC_L151C8UXA_FPCONF "-") +add_library(GENERIC_L151C8UXA INTERFACE) +target_compile_options(GENERIC_L151C8UXA INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151C8UXA_MCU} +) +target_compile_definitions(GENERIC_L151C8UXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151C8UXA" + "BOARD_NAME=\"GENERIC_L151C8UXA\"" + "BOARD_ID=GENERIC_L151C8UXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151C8UXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151C8UXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L151C8UXA INTERFACE + "LINKER:--default-script=${GENERIC_L151C8UXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L151C8UXA_MCU} +) +target_link_libraries(GENERIC_L151C8UXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151C8UXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151C8UXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151C8UXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L151C8UXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151C8UXA_serial_none INTERFACE) +target_compile_options(GENERIC_L151C8UXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151C8UXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151C8UXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151C8UXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151C8UXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151C8UXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L151C8UXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151C8UXA_usb_none INTERFACE) +target_compile_options(GENERIC_L151C8UXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151CBTX_MAXSIZE 131072) +set(GENERIC_L151CBTX_MAXDATASIZE 16384) +set(GENERIC_L151CBTX_MCU cortex-m3) +set(GENERIC_L151CBTX_FPCONF "-") +add_library(GENERIC_L151CBTX INTERFACE) +target_compile_options(GENERIC_L151CBTX INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151CBTX_MCU} +) +target_compile_definitions(GENERIC_L151CBTX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151CBTX" + "BOARD_NAME=\"GENERIC_L151CBTX\"" + "BOARD_ID=GENERIC_L151CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L151CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L151CBTX_MCU} +) +target_link_libraries(GENERIC_L151CBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L151CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L151CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151CBTXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L151CBTXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151CBTXA_MAXSIZE 131072) +set(GENERIC_L151CBTXA_MAXDATASIZE 32768) +set(GENERIC_L151CBTXA_MCU cortex-m3) +set(GENERIC_L151CBTXA_FPCONF "-") +add_library(GENERIC_L151CBTXA INTERFACE) +target_compile_options(GENERIC_L151CBTXA INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151CBTXA_MCU} +) +target_compile_definitions(GENERIC_L151CBTXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151CBTXA" + "BOARD_NAME=\"GENERIC_L151CBTXA\"" + "BOARD_ID=GENERIC_L151CBTXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151CBTXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151CBTXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L151CBTXA INTERFACE + "LINKER:--default-script=${GENERIC_L151CBTXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L151CBTXA_MCU} +) +target_link_libraries(GENERIC_L151CBTXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151CBTXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151CBTXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151CBTXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L151CBTXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151CBTXA_serial_none INTERFACE) +target_compile_options(GENERIC_L151CBTXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151CBTXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151CBTXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151CBTXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151CBTXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151CBTXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L151CBTXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151CBTXA_usb_none INTERFACE) +target_compile_options(GENERIC_L151CBTXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151CBUX_MAXSIZE 131072) +set(GENERIC_L151CBUX_MAXDATASIZE 16384) +set(GENERIC_L151CBUX_MCU cortex-m3) +set(GENERIC_L151CBUX_FPCONF "-") +add_library(GENERIC_L151CBUX INTERFACE) +target_compile_options(GENERIC_L151CBUX INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151CBUX_MCU} +) +target_compile_definitions(GENERIC_L151CBUX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151CBUX" + "BOARD_NAME=\"GENERIC_L151CBUX\"" + "BOARD_ID=GENERIC_L151CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151CBUX INTERFACE + "LINKER:--default-script=${GENERIC_L151CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L151CBUX_MCU} +) +target_link_libraries(GENERIC_L151CBUX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L151CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L151CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151CBUXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L151CBUXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L151CBUXA_MAXSIZE 131072) +set(GENERIC_L151CBUXA_MAXDATASIZE 32768) +set(GENERIC_L151CBUXA_MCU cortex-m3) +set(GENERIC_L151CBUXA_FPCONF "-") +add_library(GENERIC_L151CBUXA INTERFACE) +target_compile_options(GENERIC_L151CBUXA INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151CBUXA_MCU} +) +target_compile_definitions(GENERIC_L151CBUXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151CBUXA" + "BOARD_NAME=\"GENERIC_L151CBUXA\"" + "BOARD_ID=GENERIC_L151CBUXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151CBUXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151CBUXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L151CBUXA INTERFACE + "LINKER:--default-script=${GENERIC_L151CBUXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L151CBUXA_MCU} +) +target_link_libraries(GENERIC_L151CBUXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151CBUXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151CBUXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151CBUXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L151CBUXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151CBUXA_serial_none INTERFACE) +target_compile_options(GENERIC_L151CBUXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151CBUXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151CBUXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151CBUXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151CBUXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151CBUXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L151CBUXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151CBUXA_usb_none INTERFACE) +target_compile_options(GENERIC_L151CBUXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L151RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L151RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L151RET_L152RET_L162RET") +set(GENERIC_L151RETX_MAXSIZE 524288) +set(GENERIC_L151RETX_MAXDATASIZE 81920) +set(GENERIC_L151RETX_MCU cortex-m3) +set(GENERIC_L151RETX_FPCONF "-") +add_library(GENERIC_L151RETX INTERFACE) +target_compile_options(GENERIC_L151RETX INTERFACE + "SHELL:-DSTM32L151xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L151RETX_MCU} +) +target_compile_definitions(GENERIC_L151RETX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L151RETX" + "BOARD_NAME=\"GENERIC_L151RETX\"" + "BOARD_ID=GENERIC_L151RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L151RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L151RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L151RETX INTERFACE + "LINKER:--default-script=${GENERIC_L151RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=81920" + "SHELL: " + -mcpu=${GENERIC_L151RETX_MCU} +) +target_link_libraries(GENERIC_L151RETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L151RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L151RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L151RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L151RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L151RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L151RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L151RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L151RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L151RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L151RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L151RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L151RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L151RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L151RETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C6TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C6TX_MAXSIZE 32768) +set(GENERIC_L152C6TX_MAXDATASIZE 10240) +set(GENERIC_L152C6TX_MCU cortex-m3) +set(GENERIC_L152C6TX_FPCONF "-") +add_library(GENERIC_L152C6TX INTERFACE) +target_compile_options(GENERIC_L152C6TX INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C6TX_MCU} +) +target_compile_definitions(GENERIC_L152C6TX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C6TX" + "BOARD_NAME=\"GENERIC_L152C6TX\"" + "BOARD_ID=GENERIC_L152C6TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C6TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C6TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C6TX INTERFACE + "LINKER:--default-script=${GENERIC_L152C6TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L152C6TX_MCU} +) +target_link_libraries(GENERIC_L152C6TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C6TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C6TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C6TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C6TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C6TX_serial_none INTERFACE) +target_compile_options(GENERIC_L152C6TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C6TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C6TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C6TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C6TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C6TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C6TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C6TX_usb_none INTERFACE) +target_compile_options(GENERIC_L152C6TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C6TXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C6TXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C6TXA_MAXSIZE 32768) +set(GENERIC_L152C6TXA_MAXDATASIZE 16384) +set(GENERIC_L152C6TXA_MCU cortex-m3) +set(GENERIC_L152C6TXA_FPCONF "-") +add_library(GENERIC_L152C6TXA INTERFACE) +target_compile_options(GENERIC_L152C6TXA INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C6TXA_MCU} +) +target_compile_definitions(GENERIC_L152C6TXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C6TXA" + "BOARD_NAME=\"GENERIC_L152C6TXA\"" + "BOARD_ID=GENERIC_L152C6TXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C6TXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C6TXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C6TXA INTERFACE + "LINKER:--default-script=${GENERIC_L152C6TXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L152C6TXA_MCU} +) +target_link_libraries(GENERIC_L152C6TXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C6TXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C6TXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C6TXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C6TXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C6TXA_serial_none INTERFACE) +target_compile_options(GENERIC_L152C6TXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C6TXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C6TXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C6TXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C6TXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C6TXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C6TXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C6TXA_usb_none INTERFACE) +target_compile_options(GENERIC_L152C6TXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C6UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C6UX_MAXSIZE 32768) +set(GENERIC_L152C6UX_MAXDATASIZE 10240) +set(GENERIC_L152C6UX_MCU cortex-m3) +set(GENERIC_L152C6UX_FPCONF "-") +add_library(GENERIC_L152C6UX INTERFACE) +target_compile_options(GENERIC_L152C6UX INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C6UX_MCU} +) +target_compile_definitions(GENERIC_L152C6UX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C6UX" + "BOARD_NAME=\"GENERIC_L152C6UX\"" + "BOARD_ID=GENERIC_L152C6UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C6UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C6UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C6UX INTERFACE + "LINKER:--default-script=${GENERIC_L152C6UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L152C6UX_MCU} +) +target_link_libraries(GENERIC_L152C6UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C6UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C6UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C6UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C6UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C6UX_serial_none INTERFACE) +target_compile_options(GENERIC_L152C6UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C6UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C6UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C6UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C6UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C6UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C6UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C6UX_usb_none INTERFACE) +target_compile_options(GENERIC_L152C6UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C6UXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C6UXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C6UXA_MAXSIZE 32768) +set(GENERIC_L152C6UXA_MAXDATASIZE 16384) +set(GENERIC_L152C6UXA_MCU cortex-m3) +set(GENERIC_L152C6UXA_FPCONF "-") +add_library(GENERIC_L152C6UXA INTERFACE) +target_compile_options(GENERIC_L152C6UXA INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C6UXA_MCU} +) +target_compile_definitions(GENERIC_L152C6UXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C6UXA" + "BOARD_NAME=\"GENERIC_L152C6UXA\"" + "BOARD_ID=GENERIC_L152C6UXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C6UXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C6UXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C6UXA INTERFACE + "LINKER:--default-script=${GENERIC_L152C6UXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L152C6UXA_MCU} +) +target_link_libraries(GENERIC_L152C6UXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C6UXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C6UXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C6UXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C6UXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C6UXA_serial_none INTERFACE) +target_compile_options(GENERIC_L152C6UXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C6UXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C6UXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C6UXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C6UXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C6UXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C6UXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C6UXA_usb_none INTERFACE) +target_compile_options(GENERIC_L152C6UXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C8TX_MAXSIZE 65536) +set(GENERIC_L152C8TX_MAXDATASIZE 10240) +set(GENERIC_L152C8TX_MCU cortex-m3) +set(GENERIC_L152C8TX_FPCONF "-") +add_library(GENERIC_L152C8TX INTERFACE) +target_compile_options(GENERIC_L152C8TX INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C8TX_MCU} +) +target_compile_definitions(GENERIC_L152C8TX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C8TX" + "BOARD_NAME=\"GENERIC_L152C8TX\"" + "BOARD_ID=GENERIC_L152C8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C8TX INTERFACE + "LINKER:--default-script=${GENERIC_L152C8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L152C8TX_MCU} +) +target_link_libraries(GENERIC_L152C8TX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L152C8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L152C8TX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C8TXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C8TXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C8TXA_MAXSIZE 65536) +set(GENERIC_L152C8TXA_MAXDATASIZE 32768) +set(GENERIC_L152C8TXA_MCU cortex-m3) +set(GENERIC_L152C8TXA_FPCONF "-") +add_library(GENERIC_L152C8TXA INTERFACE) +target_compile_options(GENERIC_L152C8TXA INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C8TXA_MCU} +) +target_compile_definitions(GENERIC_L152C8TXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C8TXA" + "BOARD_NAME=\"GENERIC_L152C8TXA\"" + "BOARD_ID=GENERIC_L152C8TXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C8TXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C8TXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C8TXA INTERFACE + "LINKER:--default-script=${GENERIC_L152C8TXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L152C8TXA_MCU} +) +target_link_libraries(GENERIC_L152C8TXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C8TXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C8TXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C8TXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C8TXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C8TXA_serial_none INTERFACE) +target_compile_options(GENERIC_L152C8TXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C8TXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C8TXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C8TXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C8TXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C8TXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C8TXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C8TXA_usb_none INTERFACE) +target_compile_options(GENERIC_L152C8TXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C8UX_MAXSIZE 65536) +set(GENERIC_L152C8UX_MAXDATASIZE 10240) +set(GENERIC_L152C8UX_MCU cortex-m3) +set(GENERIC_L152C8UX_FPCONF "-") +add_library(GENERIC_L152C8UX INTERFACE) +target_compile_options(GENERIC_L152C8UX INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C8UX_MCU} +) +target_compile_definitions(GENERIC_L152C8UX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C8UX" + "BOARD_NAME=\"GENERIC_L152C8UX\"" + "BOARD_ID=GENERIC_L152C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C8UX INTERFACE + "LINKER:--default-script=${GENERIC_L152C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=10240" + "SHELL: " + -mcpu=${GENERIC_L152C8UX_MCU} +) +target_link_libraries(GENERIC_L152C8UX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L152C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L152C8UX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152C8UXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L152C8UXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152C8UXA_MAXSIZE 65536) +set(GENERIC_L152C8UXA_MAXDATASIZE 32768) +set(GENERIC_L152C8UXA_MCU cortex-m3) +set(GENERIC_L152C8UXA_FPCONF "-") +add_library(GENERIC_L152C8UXA INTERFACE) +target_compile_options(GENERIC_L152C8UXA INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152C8UXA_MCU} +) +target_compile_definitions(GENERIC_L152C8UXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152C8UXA" + "BOARD_NAME=\"GENERIC_L152C8UXA\"" + "BOARD_ID=GENERIC_L152C8UXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152C8UXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152C8UXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L152C8UXA INTERFACE + "LINKER:--default-script=${GENERIC_L152C8UXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L152C8UXA_MCU} +) +target_link_libraries(GENERIC_L152C8UXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152C8UXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152C8UXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152C8UXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L152C8UXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152C8UXA_serial_none INTERFACE) +target_compile_options(GENERIC_L152C8UXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152C8UXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152C8UXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152C8UXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152C8UXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152C8UXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L152C8UXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152C8UXA_usb_none INTERFACE) +target_compile_options(GENERIC_L152C8UXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152CBTX_MAXSIZE 131072) +set(GENERIC_L152CBTX_MAXDATASIZE 16384) +set(GENERIC_L152CBTX_MCU cortex-m3) +set(GENERIC_L152CBTX_FPCONF "-") +add_library(GENERIC_L152CBTX INTERFACE) +target_compile_options(GENERIC_L152CBTX INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152CBTX_MCU} +) +target_compile_definitions(GENERIC_L152CBTX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152CBTX" + "BOARD_NAME=\"GENERIC_L152CBTX\"" + "BOARD_ID=GENERIC_L152CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L152CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L152CBTX_MCU} +) +target_link_libraries(GENERIC_L152CBTX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L152CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L152CBTX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152CBTXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L152CBTXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152CBTXA_MAXSIZE 131072) +set(GENERIC_L152CBTXA_MAXDATASIZE 32768) +set(GENERIC_L152CBTXA_MCU cortex-m3) +set(GENERIC_L152CBTXA_FPCONF "-") +add_library(GENERIC_L152CBTXA INTERFACE) +target_compile_options(GENERIC_L152CBTXA INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152CBTXA_MCU} +) +target_compile_definitions(GENERIC_L152CBTXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152CBTXA" + "BOARD_NAME=\"GENERIC_L152CBTXA\"" + "BOARD_ID=GENERIC_L152CBTXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152CBTXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152CBTXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L152CBTXA INTERFACE + "LINKER:--default-script=${GENERIC_L152CBTXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L152CBTXA_MCU} +) +target_link_libraries(GENERIC_L152CBTXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152CBTXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152CBTXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152CBTXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L152CBTXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152CBTXA_serial_none INTERFACE) +target_compile_options(GENERIC_L152CBTXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152CBTXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152CBTXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152CBTXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152CBTXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152CBTXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L152CBTXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152CBTXA_usb_none INTERFACE) +target_compile_options(GENERIC_L152CBTXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152CBUX_MAXSIZE 131072) +set(GENERIC_L152CBUX_MAXDATASIZE 16384) +set(GENERIC_L152CBUX_MCU cortex-m3) +set(GENERIC_L152CBUX_FPCONF "-") +add_library(GENERIC_L152CBUX INTERFACE) +target_compile_options(GENERIC_L152CBUX INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152CBUX_MCU} +) +target_compile_definitions(GENERIC_L152CBUX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152CBUX" + "BOARD_NAME=\"GENERIC_L152CBUX\"" + "BOARD_ID=GENERIC_L152CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152CBUX INTERFACE + "LINKER:--default-script=${GENERIC_L152CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${GENERIC_L152CBUX_MCU} +) +target_link_libraries(GENERIC_L152CBUX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L152CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L152CBUX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152CBUXA +# ----------------------------------------------------------------------------- + +set(GENERIC_L152CBUXA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(GENERIC_L152CBUXA_MAXSIZE 131072) +set(GENERIC_L152CBUXA_MAXDATASIZE 32768) +set(GENERIC_L152CBUXA_MCU cortex-m3) +set(GENERIC_L152CBUXA_FPCONF "-") +add_library(GENERIC_L152CBUXA INTERFACE) +target_compile_options(GENERIC_L152CBUXA INTERFACE + "SHELL:-DSTM32L152xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152CBUXA_MCU} +) +target_compile_definitions(GENERIC_L152CBUXA INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152CBUXA" + "BOARD_NAME=\"GENERIC_L152CBUXA\"" + "BOARD_ID=GENERIC_L152CBUXA" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152CBUXA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152CBUXA_VARIANT_PATH} +) + +target_link_options(GENERIC_L152CBUXA INTERFACE + "LINKER:--default-script=${GENERIC_L152CBUXA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${GENERIC_L152CBUXA_MCU} +) +target_link_libraries(GENERIC_L152CBUXA INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152CBUXA_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152CBUXA_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152CBUXA_serial_generic INTERFACE) +target_compile_options(GENERIC_L152CBUXA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152CBUXA_serial_none INTERFACE) +target_compile_options(GENERIC_L152CBUXA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152CBUXA_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152CBUXA_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152CBUXA_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152CBUXA_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152CBUXA_usb_HID INTERFACE) +target_compile_options(GENERIC_L152CBUXA_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152CBUXA_usb_none INTERFACE) +target_compile_options(GENERIC_L152CBUXA_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L152RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L152RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L151RET_L152RET_L162RET") +set(GENERIC_L152RETX_MAXSIZE 524288) +set(GENERIC_L152RETX_MAXDATASIZE 81920) +set(GENERIC_L152RETX_MCU cortex-m3) +set(GENERIC_L152RETX_FPCONF "-") +add_library(GENERIC_L152RETX INTERFACE) +target_compile_options(GENERIC_L152RETX INTERFACE + "SHELL:-DSTM32L152xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L152RETX_MCU} +) +target_compile_definitions(GENERIC_L152RETX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L152RETX" + "BOARD_NAME=\"GENERIC_L152RETX\"" + "BOARD_ID=GENERIC_L152RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L152RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L152RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L152RETX INTERFACE + "LINKER:--default-script=${GENERIC_L152RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=81920" + "SHELL: " + -mcpu=${GENERIC_L152RETX_MCU} +) +target_link_libraries(GENERIC_L152RETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L152RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L152RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L152RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L152RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L152RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L152RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L152RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L152RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L152RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L152RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L152RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L152RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L152RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L152RETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L162RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L162RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L151RET_L152RET_L162RET") +set(GENERIC_L162RETX_MAXSIZE 524288) +set(GENERIC_L162RETX_MAXDATASIZE 81920) +set(GENERIC_L162RETX_MCU cortex-m3) +set(GENERIC_L162RETX_FPCONF "-") +add_library(GENERIC_L162RETX INTERFACE) +target_compile_options(GENERIC_L162RETX INTERFACE + "SHELL:-DSTM32L162xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_L162RETX_MCU} +) +target_compile_definitions(GENERIC_L162RETX INTERFACE + "STM32L1xx" + "ARDUINO_GENERIC_L162RETX" + "BOARD_NAME=\"GENERIC_L162RETX\"" + "BOARD_ID=GENERIC_L162RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L162RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${GENERIC_L162RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L162RETX INTERFACE + "LINKER:--default-script=${GENERIC_L162RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=81920" + "SHELL: " + -mcpu=${GENERIC_L162RETX_MCU} +) +target_link_libraries(GENERIC_L162RETX INTERFACE + arm_cortexM3l_math +) + +add_library(GENERIC_L162RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L162RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L162RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L162RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L162RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L162RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L162RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L162RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L162RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L162RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L162RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L162RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L162RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L162RETX_usb_none INTERFACE + "SHELL:" +) + +# GENERIC_L412K8TX +# ----------------------------------------------------------------------------- + +set(GENERIC_L412K8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(GENERIC_L412K8TX_MAXSIZE 65536) +set(GENERIC_L412K8TX_MAXDATASIZE 40960) +set(GENERIC_L412K8TX_MCU cortex-m4) +set(GENERIC_L412K8TX_FPCONF "-") +add_library(GENERIC_L412K8TX INTERFACE) +target_compile_options(GENERIC_L412K8TX INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412K8TX_MCU} +) +target_compile_definitions(GENERIC_L412K8TX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L412K8TX" + "BOARD_NAME=\"GENERIC_L412K8TX\"" + "BOARD_ID=GENERIC_L412K8TX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L412K8TX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L412K8TX_VARIANT_PATH} +) + +target_link_options(GENERIC_L412K8TX INTERFACE + "LINKER:--default-script=${GENERIC_L412K8TX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412K8TX_MCU} +) +target_link_libraries(GENERIC_L412K8TX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L412K8TX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L412K8TX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L412K8TX_serial_generic INTERFACE) +target_compile_options(GENERIC_L412K8TX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L412K8TX_serial_none INTERFACE) +target_compile_options(GENERIC_L412K8TX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L412K8TX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L412K8TX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L412K8TX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L412K8TX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L412K8TX_usb_HID INTERFACE) +target_compile_options(GENERIC_L412K8TX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L412K8TX_usb_none INTERFACE) +target_compile_options(GENERIC_L412K8TX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L412K8TX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L412K8TX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L412K8TX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L412K8TX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L412K8TX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L412K8TX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L412K8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_L412K8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(GENERIC_L412K8UX_MAXSIZE 65536) +set(GENERIC_L412K8UX_MAXDATASIZE 40960) +set(GENERIC_L412K8UX_MCU cortex-m4) +set(GENERIC_L412K8UX_FPCONF "-") +add_library(GENERIC_L412K8UX INTERFACE) +target_compile_options(GENERIC_L412K8UX INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412K8UX_MCU} +) +target_compile_definitions(GENERIC_L412K8UX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L412K8UX" + "BOARD_NAME=\"GENERIC_L412K8UX\"" + "BOARD_ID=GENERIC_L412K8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L412K8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L412K8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_L412K8UX INTERFACE + "LINKER:--default-script=${GENERIC_L412K8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412K8UX_MCU} +) +target_link_libraries(GENERIC_L412K8UX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L412K8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L412K8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L412K8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_L412K8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L412K8UX_serial_none INTERFACE) +target_compile_options(GENERIC_L412K8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L412K8UX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L412K8UX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L412K8UX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L412K8UX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L412K8UX_usb_HID INTERFACE) +target_compile_options(GENERIC_L412K8UX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L412K8UX_usb_none INTERFACE) +target_compile_options(GENERIC_L412K8UX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L412K8UX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L412K8UX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L412K8UX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L412K8UX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L412K8UX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L412K8UX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L412KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L412KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(GENERIC_L412KBTX_MAXSIZE 131072) +set(GENERIC_L412KBTX_MAXDATASIZE 40960) +set(GENERIC_L412KBTX_MCU cortex-m4) +set(GENERIC_L412KBTX_FPCONF "-") +add_library(GENERIC_L412KBTX INTERFACE) +target_compile_options(GENERIC_L412KBTX INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412KBTX_MCU} +) +target_compile_definitions(GENERIC_L412KBTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L412KBTX" + "BOARD_NAME=\"GENERIC_L412KBTX\"" + "BOARD_ID=GENERIC_L412KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L412KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L412KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L412KBTX INTERFACE + "LINKER:--default-script=${GENERIC_L412KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412KBTX_MCU} +) +target_link_libraries(GENERIC_L412KBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L412KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L412KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L412KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L412KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L412KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L412KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L412KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L412KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L412KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L412KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L412KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L412KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L412KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L412KBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L412KBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L412KBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L412KBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L412KBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L412KBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L412KBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L412KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L412KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(GENERIC_L412KBUX_MAXSIZE 131072) +set(GENERIC_L412KBUX_MAXDATASIZE 40960) +set(GENERIC_L412KBUX_MCU cortex-m4) +set(GENERIC_L412KBUX_FPCONF "-") +add_library(GENERIC_L412KBUX INTERFACE) +target_compile_options(GENERIC_L412KBUX INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412KBUX_MCU} +) +target_compile_definitions(GENERIC_L412KBUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L412KBUX" + "BOARD_NAME=\"GENERIC_L412KBUX\"" + "BOARD_ID=GENERIC_L412KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L412KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L412KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L412KBUX INTERFACE + "LINKER:--default-script=${GENERIC_L412KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L412KBUX_MCU} +) +target_link_libraries(GENERIC_L412KBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L412KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L412KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L412KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L412KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L412KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L412KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L412KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L412KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L412KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L412KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L412KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L412KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L412KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L412KBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L412KBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L412KBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L412KBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L412KBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L412KBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L412KBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L422KBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L422KBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(GENERIC_L422KBTX_MAXSIZE 131072) +set(GENERIC_L422KBTX_MAXDATASIZE 40960) +set(GENERIC_L422KBTX_MCU cortex-m4) +set(GENERIC_L422KBTX_FPCONF "-") +add_library(GENERIC_L422KBTX INTERFACE) +target_compile_options(GENERIC_L422KBTX INTERFACE + "SHELL:-DSTM32L422xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L422KBTX_MCU} +) +target_compile_definitions(GENERIC_L422KBTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L422KBTX" + "BOARD_NAME=\"GENERIC_L422KBTX\"" + "BOARD_ID=GENERIC_L422KBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L422KBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L422KBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L422KBTX INTERFACE + "LINKER:--default-script=${GENERIC_L422KBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L422KBTX_MCU} +) +target_link_libraries(GENERIC_L422KBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L422KBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L422KBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L422KBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L422KBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L422KBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L422KBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L422KBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L422KBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L422KBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L422KBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L422KBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L422KBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L422KBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L422KBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L422KBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L422KBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L422KBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L422KBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L422KBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L422KBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L422KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L422KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(GENERIC_L422KBUX_MAXSIZE 131072) +set(GENERIC_L422KBUX_MAXDATASIZE 40960) +set(GENERIC_L422KBUX_MCU cortex-m4) +set(GENERIC_L422KBUX_FPCONF "-") +add_library(GENERIC_L422KBUX INTERFACE) +target_compile_options(GENERIC_L422KBUX INTERFACE + "SHELL:-DSTM32L422xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L422KBUX_MCU} +) +target_compile_definitions(GENERIC_L422KBUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L422KBUX" + "BOARD_NAME=\"GENERIC_L422KBUX\"" + "BOARD_ID=GENERIC_L422KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L422KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L422KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L422KBUX INTERFACE + "LINKER:--default-script=${GENERIC_L422KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L422KBUX_MCU} +) +target_link_libraries(GENERIC_L422KBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L422KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L422KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L422KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L422KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L422KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L422KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L422KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L422KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L422KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L422KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L422KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L422KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L422KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L422KBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L422KBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L422KBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L422KBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L422KBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L422KBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L422KBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431RBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431RBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431R(B-C)(I-T-Y)") +set(GENERIC_L431RBIX_MAXSIZE 131072) +set(GENERIC_L431RBIX_MAXDATASIZE 65536) +set(GENERIC_L431RBIX_MCU cortex-m4) +set(GENERIC_L431RBIX_FPCONF "-") +add_library(GENERIC_L431RBIX INTERFACE) +target_compile_options(GENERIC_L431RBIX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RBIX_MCU} +) +target_compile_definitions(GENERIC_L431RBIX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431RBIX" + "BOARD_NAME=\"GENERIC_L431RBIX\"" + "BOARD_ID=GENERIC_L431RBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431RBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431RBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431RBIX INTERFACE + "LINKER:--default-script=${GENERIC_L431RBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RBIX_MCU} +) +target_link_libraries(GENERIC_L431RBIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L431RBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431RBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431RBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431RBIX_serial_none INTERFACE) +target_compile_options(GENERIC_L431RBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431RBIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431RBIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431RBIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431RBIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431RBIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431RBIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431RBIX_usb_none INTERFACE) +target_compile_options(GENERIC_L431RBIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431RBIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431RBIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431RBIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431RBIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431RBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431R(B-C)(I-T-Y)") +set(GENERIC_L431RBTX_MAXSIZE 131072) +set(GENERIC_L431RBTX_MAXDATASIZE 65536) +set(GENERIC_L431RBTX_MCU cortex-m4) +set(GENERIC_L431RBTX_FPCONF "-") +add_library(GENERIC_L431RBTX INTERFACE) +target_compile_options(GENERIC_L431RBTX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RBTX_MCU} +) +target_compile_definitions(GENERIC_L431RBTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431RBTX" + "BOARD_NAME=\"GENERIC_L431RBTX\"" + "BOARD_ID=GENERIC_L431RBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431RBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431RBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431RBTX INTERFACE + "LINKER:--default-script=${GENERIC_L431RBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RBTX_MCU} +) +target_link_libraries(GENERIC_L431RBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L431RBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431RBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431RBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431RBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L431RBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431RBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431RBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431RBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431RBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431RBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431RBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431RBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L431RBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431RBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431RBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431RBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431RBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431RBYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431RBYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431R(B-C)(I-T-Y)") +set(GENERIC_L431RBYX_MAXSIZE 131072) +set(GENERIC_L431RBYX_MAXDATASIZE 65536) +set(GENERIC_L431RBYX_MCU cortex-m4) +set(GENERIC_L431RBYX_FPCONF "-") +add_library(GENERIC_L431RBYX INTERFACE) +target_compile_options(GENERIC_L431RBYX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RBYX_MCU} +) +target_compile_definitions(GENERIC_L431RBYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431RBYX" + "BOARD_NAME=\"GENERIC_L431RBYX\"" + "BOARD_ID=GENERIC_L431RBYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431RBYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431RBYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431RBYX INTERFACE + "LINKER:--default-script=${GENERIC_L431RBYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RBYX_MCU} +) +target_link_libraries(GENERIC_L431RBYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L431RBYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431RBYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431RBYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431RBYX_serial_none INTERFACE) +target_compile_options(GENERIC_L431RBYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431RBYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431RBYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431RBYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431RBYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431RBYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431RBYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431RBYX_usb_none INTERFACE) +target_compile_options(GENERIC_L431RBYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431RBYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RBYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431RBYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431RBYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431RBYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431RCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431RCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431R(B-C)(I-T-Y)") +set(GENERIC_L431RCIX_MAXSIZE 262144) +set(GENERIC_L431RCIX_MAXDATASIZE 65536) +set(GENERIC_L431RCIX_MCU cortex-m4) +set(GENERIC_L431RCIX_FPCONF "-") +add_library(GENERIC_L431RCIX INTERFACE) +target_compile_options(GENERIC_L431RCIX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RCIX_MCU} +) +target_compile_definitions(GENERIC_L431RCIX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431RCIX" + "BOARD_NAME=\"GENERIC_L431RCIX\"" + "BOARD_ID=GENERIC_L431RCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431RCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431RCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431RCIX INTERFACE + "LINKER:--default-script=${GENERIC_L431RCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RCIX_MCU} +) +target_link_libraries(GENERIC_L431RCIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L431RCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431RCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431RCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431RCIX_serial_none INTERFACE) +target_compile_options(GENERIC_L431RCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431RCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431RCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431RCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431RCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431RCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431RCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431RCIX_usb_none INTERFACE) +target_compile_options(GENERIC_L431RCIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431RCIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431RCIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431RCIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431RCIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431R(B-C)(I-T-Y)") +set(GENERIC_L431RCTX_MAXSIZE 262144) +set(GENERIC_L431RCTX_MAXDATASIZE 65536) +set(GENERIC_L431RCTX_MCU cortex-m4) +set(GENERIC_L431RCTX_FPCONF "-") +add_library(GENERIC_L431RCTX INTERFACE) +target_compile_options(GENERIC_L431RCTX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RCTX_MCU} +) +target_compile_definitions(GENERIC_L431RCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431RCTX" + "BOARD_NAME=\"GENERIC_L431RCTX\"" + "BOARD_ID=GENERIC_L431RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431RCTX INTERFACE + "LINKER:--default-script=${GENERIC_L431RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RCTX_MCU} +) +target_link_libraries(GENERIC_L431RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L431RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L431RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L431RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431RCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431RCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431R(B-C)(I-T-Y)") +set(GENERIC_L431RCYX_MAXSIZE 262144) +set(GENERIC_L431RCYX_MAXDATASIZE 65536) +set(GENERIC_L431RCYX_MCU cortex-m4) +set(GENERIC_L431RCYX_FPCONF "-") +add_library(GENERIC_L431RCYX INTERFACE) +target_compile_options(GENERIC_L431RCYX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RCYX_MCU} +) +target_compile_definitions(GENERIC_L431RCYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431RCYX" + "BOARD_NAME=\"GENERIC_L431RCYX\"" + "BOARD_ID=GENERIC_L431RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431RCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431RCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431RCYX INTERFACE + "LINKER:--default-script=${GENERIC_L431RCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431RCYX_MCU} +) +target_link_libraries(GENERIC_L431RCYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L431RCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431RCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431RCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431RCYX_serial_none INTERFACE) +target_compile_options(GENERIC_L431RCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431RCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431RCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431RCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431RCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431RCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431RCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431RCYX_usb_none INTERFACE) +target_compile_options(GENERIC_L431RCYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431RCYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431RCYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431RCYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431RCYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431RCYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L432KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L432KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L432K(B-C)U_L442KCU") +set(GENERIC_L432KBUX_MAXSIZE 131072) +set(GENERIC_L432KBUX_MAXDATASIZE 65536) +set(GENERIC_L432KBUX_MCU cortex-m4) +set(GENERIC_L432KBUX_FPCONF "-") +add_library(GENERIC_L432KBUX INTERFACE) +target_compile_options(GENERIC_L432KBUX INTERFACE + "SHELL:-DSTM32L432xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L432KBUX_MCU} +) +target_compile_definitions(GENERIC_L432KBUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L432KBUX" + "BOARD_NAME=\"GENERIC_L432KBUX\"" + "BOARD_ID=GENERIC_L432KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L432KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L432KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L432KBUX INTERFACE + "LINKER:--default-script=${GENERIC_L432KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L432KBUX_MCU} +) +target_link_libraries(GENERIC_L432KBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L432KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L432KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L432KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L432KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L432KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L432KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L432KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L432KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L432KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L432KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L432KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L432KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L432KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L432KBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L432KBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L432KBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L432KBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L432KBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L432KBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L432KBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L432KCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L432KCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L432K(B-C)U_L442KCU") +set(GENERIC_L432KCUX_MAXSIZE 262144) +set(GENERIC_L432KCUX_MAXDATASIZE 65536) +set(GENERIC_L432KCUX_MCU cortex-m4) +set(GENERIC_L432KCUX_FPCONF "-") +add_library(GENERIC_L432KCUX INTERFACE) +target_compile_options(GENERIC_L432KCUX INTERFACE + "SHELL:-DSTM32L432xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L432KCUX_MCU} +) +target_compile_definitions(GENERIC_L432KCUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L432KCUX" + "BOARD_NAME=\"GENERIC_L432KCUX\"" + "BOARD_ID=GENERIC_L432KCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L432KCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L432KCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L432KCUX INTERFACE + "LINKER:--default-script=${GENERIC_L432KCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L432KCUX_MCU} +) +target_link_libraries(GENERIC_L432KCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L432KCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L432KCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L432KCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L432KCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L432KCUX_serial_none INTERFACE) +target_compile_options(GENERIC_L432KCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L432KCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L432KCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L432KCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L432KCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L432KCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L432KCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L432KCUX_usb_none INTERFACE) +target_compile_options(GENERIC_L432KCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L432KCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L432KCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L432KCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L432KCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L432KCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L432KCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L433CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L433CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)") +set(GENERIC_L433CBTX_MAXSIZE 131072) +set(GENERIC_L433CBTX_MAXDATASIZE 65536) +set(GENERIC_L433CBTX_MCU cortex-m4) +set(GENERIC_L433CBTX_FPCONF "-") +add_library(GENERIC_L433CBTX INTERFACE) +target_compile_options(GENERIC_L433CBTX INTERFACE + "SHELL:-DSTM32L433xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CBTX_MCU} +) +target_compile_definitions(GENERIC_L433CBTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L433CBTX" + "BOARD_NAME=\"GENERIC_L433CBTX\"" + "BOARD_ID=GENERIC_L433CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L433CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L433CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L433CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L433CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CBTX_MCU} +) +target_link_libraries(GENERIC_L433CBTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L433CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L433CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L433CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L433CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L433CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L433CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L433CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L433CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L433CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L433CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L433CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L433CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L433CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L433CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L433CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L433CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L433CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L433CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L433CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)") +set(GENERIC_L433CBUX_MAXSIZE 131072) +set(GENERIC_L433CBUX_MAXDATASIZE 65536) +set(GENERIC_L433CBUX_MCU cortex-m4) +set(GENERIC_L433CBUX_FPCONF "-") +add_library(GENERIC_L433CBUX INTERFACE) +target_compile_options(GENERIC_L433CBUX INTERFACE + "SHELL:-DSTM32L433xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CBUX_MCU} +) +target_compile_definitions(GENERIC_L433CBUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L433CBUX" + "BOARD_NAME=\"GENERIC_L433CBUX\"" + "BOARD_ID=GENERIC_L433CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L433CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L433CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L433CBUX INTERFACE + "LINKER:--default-script=${GENERIC_L433CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CBUX_MCU} +) +target_link_libraries(GENERIC_L433CBUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L433CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L433CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L433CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L433CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L433CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L433CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L433CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L433CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L433CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L433CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L433CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L433CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L433CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L433CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L433CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L433CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L433CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L433CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L433CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)") +set(GENERIC_L433CCTX_MAXSIZE 262144) +set(GENERIC_L433CCTX_MAXDATASIZE 65536) +set(GENERIC_L433CCTX_MCU cortex-m4) +set(GENERIC_L433CCTX_FPCONF "-") +add_library(GENERIC_L433CCTX INTERFACE) +target_compile_options(GENERIC_L433CCTX INTERFACE + "SHELL:-DSTM32L433xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CCTX_MCU} +) +target_compile_definitions(GENERIC_L433CCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L433CCTX" + "BOARD_NAME=\"GENERIC_L433CCTX\"" + "BOARD_ID=GENERIC_L433CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L433CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L433CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L433CCTX INTERFACE + "LINKER:--default-script=${GENERIC_L433CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CCTX_MCU} +) +target_link_libraries(GENERIC_L433CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L433CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L433CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L433CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L433CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L433CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L433CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L433CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L433CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L433CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L433CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L433CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L433CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L433CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L433CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L433CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L433CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L433CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L433CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L433CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)") +set(GENERIC_L433CCUX_MAXSIZE 262144) +set(GENERIC_L433CCUX_MAXDATASIZE 65536) +set(GENERIC_L433CCUX_MCU cortex-m4) +set(GENERIC_L433CCUX_FPCONF "-") +add_library(GENERIC_L433CCUX INTERFACE) +target_compile_options(GENERIC_L433CCUX INTERFACE + "SHELL:-DSTM32L433xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CCUX_MCU} +) +target_compile_definitions(GENERIC_L433CCUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L433CCUX" + "BOARD_NAME=\"GENERIC_L433CCUX\"" + "BOARD_ID=GENERIC_L433CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L433CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L433CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L433CCUX INTERFACE + "LINKER:--default-script=${GENERIC_L433CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433CCUX_MCU} +) +target_link_libraries(GENERIC_L433CCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L433CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L433CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L433CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L433CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_L433CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L433CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L433CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L433CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L433CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L433CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L433CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L433CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_L433CCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L433CCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L433CCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L433CCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L433CCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L433CCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L433RCTXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L433RCTXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433RCTxP") +set(GENERIC_L433RCTXP_MAXSIZE 262144) +set(GENERIC_L433RCTXP_MAXDATASIZE 65536) +set(GENERIC_L433RCTXP_MCU cortex-m4) +set(GENERIC_L433RCTXP_FPCONF "-") +add_library(GENERIC_L433RCTXP INTERFACE) +target_compile_options(GENERIC_L433RCTXP INTERFACE + "SHELL:-DSTM32L433xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433RCTXP_MCU} +) +target_compile_definitions(GENERIC_L433RCTXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L433RCTXP" + "BOARD_NAME=\"GENERIC_L433RCTXP\"" + "BOARD_ID=GENERIC_L433RCTXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L433RCTXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L433RCTXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L433RCTXP INTERFACE + "LINKER:--default-script=${GENERIC_L433RCTXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L433RCTXP_MCU} +) +target_link_libraries(GENERIC_L433RCTXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L433RCTXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L433RCTXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L433RCTXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L433RCTXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L433RCTXP_serial_none INTERFACE) +target_compile_options(GENERIC_L433RCTXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L433RCTXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L433RCTXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L433RCTXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L433RCTXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L433RCTXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L433RCTXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L433RCTXP_usb_none INTERFACE) +target_compile_options(GENERIC_L433RCTXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L433RCTXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L433RCTXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L433RCTXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L433RCTXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L433RCTXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L433RCTXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L442KCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L442KCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L432K(B-C)U_L442KCU") +set(GENERIC_L442KCUX_MAXSIZE 262144) +set(GENERIC_L442KCUX_MAXDATASIZE 65536) +set(GENERIC_L442KCUX_MCU cortex-m4) +set(GENERIC_L442KCUX_FPCONF "-") +add_library(GENERIC_L442KCUX INTERFACE) +target_compile_options(GENERIC_L442KCUX INTERFACE + "SHELL:-DSTM32L442xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L442KCUX_MCU} +) +target_compile_definitions(GENERIC_L442KCUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L442KCUX" + "BOARD_NAME=\"GENERIC_L442KCUX\"" + "BOARD_ID=GENERIC_L442KCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L442KCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L442KCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L442KCUX INTERFACE + "LINKER:--default-script=${GENERIC_L442KCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L442KCUX_MCU} +) +target_link_libraries(GENERIC_L442KCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L442KCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L442KCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L442KCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L442KCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L442KCUX_serial_none INTERFACE) +target_compile_options(GENERIC_L442KCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L442KCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L442KCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L442KCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L442KCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L442KCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L442KCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L442KCUX_usb_none INTERFACE) +target_compile_options(GENERIC_L442KCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L442KCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L442KCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L442KCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L442KCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L442KCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L442KCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L443CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L443CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)") +set(GENERIC_L443CCTX_MAXSIZE 262144) +set(GENERIC_L443CCTX_MAXDATASIZE 65536) +set(GENERIC_L443CCTX_MCU cortex-m4) +set(GENERIC_L443CCTX_FPCONF "-") +add_library(GENERIC_L443CCTX INTERFACE) +target_compile_options(GENERIC_L443CCTX INTERFACE + "SHELL:-DSTM32L443xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L443CCTX_MCU} +) +target_compile_definitions(GENERIC_L443CCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L443CCTX" + "BOARD_NAME=\"GENERIC_L443CCTX\"" + "BOARD_ID=GENERIC_L443CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L443CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L443CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L443CCTX INTERFACE + "LINKER:--default-script=${GENERIC_L443CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L443CCTX_MCU} +) +target_link_libraries(GENERIC_L443CCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L443CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L443CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L443CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L443CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L443CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L443CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L443CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L443CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L443CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L443CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L443CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L443CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L443CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L443CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L443CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L443CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L443CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L443CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L443CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L443CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L443CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L443CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)") +set(GENERIC_L443CCUX_MAXSIZE 262144) +set(GENERIC_L443CCUX_MAXDATASIZE 65536) +set(GENERIC_L443CCUX_MCU cortex-m4) +set(GENERIC_L443CCUX_FPCONF "-") +add_library(GENERIC_L443CCUX INTERFACE) +target_compile_options(GENERIC_L443CCUX INTERFACE + "SHELL:-DSTM32L443xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L443CCUX_MCU} +) +target_compile_definitions(GENERIC_L443CCUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L443CCUX" + "BOARD_NAME=\"GENERIC_L443CCUX\"" + "BOARD_ID=GENERIC_L443CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L443CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L443CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L443CCUX INTERFACE + "LINKER:--default-script=${GENERIC_L443CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L443CCUX_MCU} +) +target_link_libraries(GENERIC_L443CCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L443CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L443CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L443CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L443CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L443CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_L443CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L443CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L443CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L443CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L443CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L443CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L443CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L443CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_L443CCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L443CCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L443CCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L443CCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L443CCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L443CCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L443CCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452RCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L452RCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L452RCIX_MAXSIZE 262144) +set(GENERIC_L452RCIX_MAXDATASIZE 163840) +set(GENERIC_L452RCIX_MCU cortex-m4) +set(GENERIC_L452RCIX_FPCONF "-") +add_library(GENERIC_L452RCIX INTERFACE) +target_compile_options(GENERIC_L452RCIX INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RCIX_MCU} +) +target_compile_definitions(GENERIC_L452RCIX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452RCIX" + "BOARD_NAME=\"GENERIC_L452RCIX\"" + "BOARD_ID=GENERIC_L452RCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452RCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452RCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L452RCIX INTERFACE + "LINKER:--default-script=${GENERIC_L452RCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RCIX_MCU} +) +target_link_libraries(GENERIC_L452RCIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452RCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452RCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L452RCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452RCIX_serial_none INTERFACE) +target_compile_options(GENERIC_L452RCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452RCIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452RCIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452RCIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452RCIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452RCIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L452RCIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452RCIX_usb_none INTERFACE) +target_compile_options(GENERIC_L452RCIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452RCIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452RCIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452RCIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452RCIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L452RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L452RCTX_MAXSIZE 262144) +set(GENERIC_L452RCTX_MAXDATASIZE 163840) +set(GENERIC_L452RCTX_MCU cortex-m4) +set(GENERIC_L452RCTX_FPCONF "-") +add_library(GENERIC_L452RCTX INTERFACE) +target_compile_options(GENERIC_L452RCTX INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RCTX_MCU} +) +target_compile_definitions(GENERIC_L452RCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452RCTX" + "BOARD_NAME=\"GENERIC_L452RCTX\"" + "BOARD_ID=GENERIC_L452RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L452RCTX INTERFACE + "LINKER:--default-script=${GENERIC_L452RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RCTX_MCU} +) +target_link_libraries(GENERIC_L452RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L452RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L452RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L452RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L452RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452RCYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L452RCYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L452RCYX_MAXSIZE 262144) +set(GENERIC_L452RCYX_MAXDATASIZE 163840) +set(GENERIC_L452RCYX_MCU cortex-m4) +set(GENERIC_L452RCYX_FPCONF "-") +add_library(GENERIC_L452RCYX INTERFACE) +target_compile_options(GENERIC_L452RCYX INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RCYX_MCU} +) +target_compile_definitions(GENERIC_L452RCYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452RCYX" + "BOARD_NAME=\"GENERIC_L452RCYX\"" + "BOARD_ID=GENERIC_L452RCYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452RCYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452RCYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L452RCYX INTERFACE + "LINKER:--default-script=${GENERIC_L452RCYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RCYX_MCU} +) +target_link_libraries(GENERIC_L452RCYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452RCYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452RCYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L452RCYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452RCYX_serial_none INTERFACE) +target_compile_options(GENERIC_L452RCYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452RCYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452RCYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452RCYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452RCYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452RCYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L452RCYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452RCYX_usb_none INTERFACE) +target_compile_options(GENERIC_L452RCYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452RCYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RCYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452RCYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452RCYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452RCYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452REIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L452REIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L452REIX_MAXSIZE 524288) +set(GENERIC_L452REIX_MAXDATASIZE 163840) +set(GENERIC_L452REIX_MCU cortex-m4) +set(GENERIC_L452REIX_FPCONF "-") +add_library(GENERIC_L452REIX INTERFACE) +target_compile_options(GENERIC_L452REIX INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452REIX_MCU} +) +target_compile_definitions(GENERIC_L452REIX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452REIX" + "BOARD_NAME=\"GENERIC_L452REIX\"" + "BOARD_ID=GENERIC_L452REIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452REIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452REIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L452REIX INTERFACE + "LINKER:--default-script=${GENERIC_L452REIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452REIX_MCU} +) +target_link_libraries(GENERIC_L452REIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452REIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452REIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452REIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L452REIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452REIX_serial_none INTERFACE) +target_compile_options(GENERIC_L452REIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452REIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452REIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452REIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452REIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452REIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L452REIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452REIX_usb_none INTERFACE) +target_compile_options(GENERIC_L452REIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452REIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452REIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452REIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452REIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452REIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452REIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L452RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L452RETX_MAXSIZE 524288) +set(GENERIC_L452RETX_MAXDATASIZE 163840) +set(GENERIC_L452RETX_MCU cortex-m4) +set(GENERIC_L452RETX_FPCONF "-") +add_library(GENERIC_L452RETX INTERFACE) +target_compile_options(GENERIC_L452RETX INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RETX_MCU} +) +target_compile_definitions(GENERIC_L452RETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452RETX" + "BOARD_NAME=\"GENERIC_L452RETX\"" + "BOARD_ID=GENERIC_L452RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L452RETX INTERFACE + "LINKER:--default-script=${GENERIC_L452RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RETX_MCU} +) +target_link_libraries(GENERIC_L452RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L452RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L452RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L452RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L452RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452RETXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L452RETXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RETxP") +set(GENERIC_L452RETXP_MAXSIZE 524288) +set(GENERIC_L452RETXP_MAXDATASIZE 163840) +set(GENERIC_L452RETXP_MCU cortex-m4) +set(GENERIC_L452RETXP_FPCONF "-") +add_library(GENERIC_L452RETXP INTERFACE) +target_compile_options(GENERIC_L452RETXP INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RETXP_MCU} +) +target_compile_definitions(GENERIC_L452RETXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452RETXP" + "BOARD_NAME=\"GENERIC_L452RETXP\"" + "BOARD_ID=GENERIC_L452RETXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452RETXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452RETXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L452RETXP INTERFACE + "LINKER:--default-script=${GENERIC_L452RETXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452RETXP_MCU} +) +target_link_libraries(GENERIC_L452RETXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452RETXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452RETXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RETXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L452RETXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452RETXP_serial_none INTERFACE) +target_compile_options(GENERIC_L452RETXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452RETXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452RETXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452RETXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452RETXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452RETXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L452RETXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452RETXP_usb_none INTERFACE) +target_compile_options(GENERIC_L452RETXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RETXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452RETXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452RETXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452RETXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452RETXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452RETXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L452REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L452REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L452REYX_MAXSIZE 524288) +set(GENERIC_L452REYX_MAXDATASIZE 163840) +set(GENERIC_L452REYX_MCU cortex-m4) +set(GENERIC_L452REYX_FPCONF "-") +add_library(GENERIC_L452REYX INTERFACE) +target_compile_options(GENERIC_L452REYX INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452REYX_MCU} +) +target_compile_definitions(GENERIC_L452REYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L452REYX" + "BOARD_NAME=\"GENERIC_L452REYX\"" + "BOARD_ID=GENERIC_L452REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L452REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L452REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L452REYX INTERFACE + "LINKER:--default-script=${GENERIC_L452REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L452REYX_MCU} +) +target_link_libraries(GENERIC_L452REYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L452REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L452REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L452REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L452REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L452REYX_serial_none INTERFACE) +target_compile_options(GENERIC_L452REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L452REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L452REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L452REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L452REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L452REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L452REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L452REYX_usb_none INTERFACE) +target_compile_options(GENERIC_L452REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L452REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L452REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L452REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L452REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L452REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L452REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L462REIX +# ----------------------------------------------------------------------------- + +set(GENERIC_L462REIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L462REIX_MAXSIZE 524288) +set(GENERIC_L462REIX_MAXDATASIZE 163840) +set(GENERIC_L462REIX_MCU cortex-m4) +set(GENERIC_L462REIX_FPCONF "-") +add_library(GENERIC_L462REIX INTERFACE) +target_compile_options(GENERIC_L462REIX INTERFACE + "SHELL:-DSTM32L462xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L462REIX_MCU} +) +target_compile_definitions(GENERIC_L462REIX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L462REIX" + "BOARD_NAME=\"GENERIC_L462REIX\"" + "BOARD_ID=GENERIC_L462REIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L462REIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L462REIX_VARIANT_PATH} +) + +target_link_options(GENERIC_L462REIX INTERFACE + "LINKER:--default-script=${GENERIC_L462REIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L462REIX_MCU} +) +target_link_libraries(GENERIC_L462REIX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L462REIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L462REIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L462REIX_serial_generic INTERFACE) +target_compile_options(GENERIC_L462REIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L462REIX_serial_none INTERFACE) +target_compile_options(GENERIC_L462REIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L462REIX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L462REIX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L462REIX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L462REIX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L462REIX_usb_HID INTERFACE) +target_compile_options(GENERIC_L462REIX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L462REIX_usb_none INTERFACE) +target_compile_options(GENERIC_L462REIX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L462REIX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L462REIX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L462REIX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L462REIX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L462REIX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L462REIX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L462RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L462RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L462RETX_MAXSIZE 524288) +set(GENERIC_L462RETX_MAXDATASIZE 163840) +set(GENERIC_L462RETX_MCU cortex-m4) +set(GENERIC_L462RETX_FPCONF "-") +add_library(GENERIC_L462RETX INTERFACE) +target_compile_options(GENERIC_L462RETX INTERFACE + "SHELL:-DSTM32L462xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L462RETX_MCU} +) +target_compile_definitions(GENERIC_L462RETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L462RETX" + "BOARD_NAME=\"GENERIC_L462RETX\"" + "BOARD_ID=GENERIC_L462RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L462RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L462RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L462RETX INTERFACE + "LINKER:--default-script=${GENERIC_L462RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L462RETX_MCU} +) +target_link_libraries(GENERIC_L462RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L462RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L462RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L462RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L462RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L462RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L462RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L462RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L462RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L462RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L462RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L462RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L462RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L462RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L462RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L462RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L462RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L462RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L462RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L462RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L462RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L462REYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L462REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(GENERIC_L462REYX_MAXSIZE 524288) +set(GENERIC_L462REYX_MAXDATASIZE 163840) +set(GENERIC_L462REYX_MCU cortex-m4) +set(GENERIC_L462REYX_FPCONF "-") +add_library(GENERIC_L462REYX INTERFACE) +target_compile_options(GENERIC_L462REYX INTERFACE + "SHELL:-DSTM32L462xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L462REYX_MCU} +) +target_compile_definitions(GENERIC_L462REYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L462REYX" + "BOARD_NAME=\"GENERIC_L462REYX\"" + "BOARD_ID=GENERIC_L462REYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L462REYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L462REYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L462REYX INTERFACE + "LINKER:--default-script=${GENERIC_L462REYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L462REYX_MCU} +) +target_link_libraries(GENERIC_L462REYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L462REYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L462REYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L462REYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L462REYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L462REYX_serial_none INTERFACE) +target_compile_options(GENERIC_L462REYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L462REYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L462REYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L462REYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L462REYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L462REYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L462REYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L462REYX_usb_none INTERFACE) +target_compile_options(GENERIC_L462REYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L462REYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L462REYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L462REYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L462REYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L462REYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L462REYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L475RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L475RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L475RCTX_MAXSIZE 262144) +set(GENERIC_L475RCTX_MAXDATASIZE 98304) +set(GENERIC_L475RCTX_MCU cortex-m4) +set(GENERIC_L475RCTX_FPCONF "-") +add_library(GENERIC_L475RCTX INTERFACE) +target_compile_options(GENERIC_L475RCTX INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475RCTX_MCU} +) +target_compile_definitions(GENERIC_L475RCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L475RCTX" + "BOARD_NAME=\"GENERIC_L475RCTX\"" + "BOARD_ID=GENERIC_L475RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L475RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L475RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L475RCTX INTERFACE + "LINKER:--default-script=${GENERIC_L475RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475RCTX_MCU} +) +target_link_libraries(GENERIC_L475RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L475RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L475RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L475RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L475RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L475RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L475RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L475RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L475RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L475RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L475RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L475RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L475RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L475RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L475RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L475RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L475RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L475RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L475RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L475RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L475RETX_MAXSIZE 524288) +set(GENERIC_L475RETX_MAXDATASIZE 98304) +set(GENERIC_L475RETX_MCU cortex-m4) +set(GENERIC_L475RETX_FPCONF "-") +add_library(GENERIC_L475RETX INTERFACE) +target_compile_options(GENERIC_L475RETX INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475RETX_MCU} +) +target_compile_definitions(GENERIC_L475RETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L475RETX" + "BOARD_NAME=\"GENERIC_L475RETX\"" + "BOARD_ID=GENERIC_L475RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L475RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L475RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L475RETX INTERFACE + "LINKER:--default-script=${GENERIC_L475RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475RETX_MCU} +) +target_link_libraries(GENERIC_L475RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L475RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L475RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L475RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L475RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L475RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L475RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L475RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L475RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L475RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L475RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L475RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L475RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L475RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L475RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L475RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L475RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L475RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L475RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L475RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L475RGTX_MAXSIZE 1048576) +set(GENERIC_L475RGTX_MAXDATASIZE 98304) +set(GENERIC_L475RGTX_MCU cortex-m4) +set(GENERIC_L475RGTX_FPCONF "-") +add_library(GENERIC_L475RGTX INTERFACE) +target_compile_options(GENERIC_L475RGTX INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475RGTX_MCU} +) +target_compile_definitions(GENERIC_L475RGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L475RGTX" + "BOARD_NAME=\"GENERIC_L475RGTX\"" + "BOARD_ID=GENERIC_L475RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L475RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L475RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L475RGTX INTERFACE + "LINKER:--default-script=${GENERIC_L475RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475RGTX_MCU} +) +target_link_libraries(GENERIC_L475RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L475RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L475RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L475RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L475RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L475RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L475RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L475RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L475RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L475RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L475RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L475RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L475RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L475RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L475RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L475RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L475RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L475RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L475RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L475VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L475VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L475VCTX_MAXSIZE 262144) +set(GENERIC_L475VCTX_MAXDATASIZE 98304) +set(GENERIC_L475VCTX_MCU cortex-m4) +set(GENERIC_L475VCTX_FPCONF "-") +add_library(GENERIC_L475VCTX INTERFACE) +target_compile_options(GENERIC_L475VCTX INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475VCTX_MCU} +) +target_compile_definitions(GENERIC_L475VCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L475VCTX" + "BOARD_NAME=\"GENERIC_L475VCTX\"" + "BOARD_ID=GENERIC_L475VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L475VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L475VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L475VCTX INTERFACE + "LINKER:--default-script=${GENERIC_L475VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475VCTX_MCU} +) +target_link_libraries(GENERIC_L475VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L475VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L475VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L475VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L475VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L475VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L475VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L475VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L475VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L475VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L475VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L475VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L475VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L475VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L475VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L475VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L475VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L475VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L475VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L475VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L475VETX_MAXSIZE 524288) +set(GENERIC_L475VETX_MAXDATASIZE 98304) +set(GENERIC_L475VETX_MCU cortex-m4) +set(GENERIC_L475VETX_FPCONF "-") +add_library(GENERIC_L475VETX INTERFACE) +target_compile_options(GENERIC_L475VETX INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475VETX_MCU} +) +target_compile_definitions(GENERIC_L475VETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L475VETX" + "BOARD_NAME=\"GENERIC_L475VETX\"" + "BOARD_ID=GENERIC_L475VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L475VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L475VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L475VETX INTERFACE + "LINKER:--default-script=${GENERIC_L475VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475VETX_MCU} +) +target_link_libraries(GENERIC_L475VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L475VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L475VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L475VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L475VETX_serial_none INTERFACE) +target_compile_options(GENERIC_L475VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L475VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L475VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L475VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L475VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L475VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L475VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L475VETX_usb_none INTERFACE) +target_compile_options(GENERIC_L475VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L475VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L475VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L475VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L475VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L475VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L475VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L475VGTX_MAXSIZE 1048576) +set(GENERIC_L475VGTX_MAXDATASIZE 98304) +set(GENERIC_L475VGTX_MCU cortex-m4) +set(GENERIC_L475VGTX_FPCONF "-") +add_library(GENERIC_L475VGTX INTERFACE) +target_compile_options(GENERIC_L475VGTX INTERFACE + "SHELL:-DSTM32L475xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475VGTX_MCU} +) +target_compile_definitions(GENERIC_L475VGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L475VGTX" + "BOARD_NAME=\"GENERIC_L475VGTX\"" + "BOARD_ID=GENERIC_L475VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L475VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L475VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L475VGTX INTERFACE + "LINKER:--default-script=${GENERIC_L475VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L475VGTX_MCU} +) +target_link_libraries(GENERIC_L475VGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L475VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L475VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L475VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L475VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L475VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L475VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L475VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L475VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L475VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L475VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L475VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L475VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L475VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L475VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L475VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L475VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L475VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L475VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L476RCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L476RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L476RCTX_MAXSIZE 262144) +set(GENERIC_L476RCTX_MAXDATASIZE 98304) +set(GENERIC_L476RCTX_MCU cortex-m4) +set(GENERIC_L476RCTX_FPCONF "-") +add_library(GENERIC_L476RCTX INTERFACE) +target_compile_options(GENERIC_L476RCTX INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476RCTX_MCU} +) +target_compile_definitions(GENERIC_L476RCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L476RCTX" + "BOARD_NAME=\"GENERIC_L476RCTX\"" + "BOARD_ID=GENERIC_L476RCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L476RCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L476RCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L476RCTX INTERFACE + "LINKER:--default-script=${GENERIC_L476RCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476RCTX_MCU} +) +target_link_libraries(GENERIC_L476RCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L476RCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L476RCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L476RCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L476RCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L476RCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L476RCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L476RCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L476RCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L476RCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L476RCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L476RCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L476RCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L476RCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L476RCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L476RCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L476RCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L476RCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L476RETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L476RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L476RETX_MAXSIZE 524288) +set(GENERIC_L476RETX_MAXDATASIZE 98304) +set(GENERIC_L476RETX_MCU cortex-m4) +set(GENERIC_L476RETX_FPCONF "-") +add_library(GENERIC_L476RETX INTERFACE) +target_compile_options(GENERIC_L476RETX INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476RETX_MCU} +) +target_compile_definitions(GENERIC_L476RETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L476RETX" + "BOARD_NAME=\"GENERIC_L476RETX\"" + "BOARD_ID=GENERIC_L476RETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L476RETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L476RETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L476RETX INTERFACE + "LINKER:--default-script=${GENERIC_L476RETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476RETX_MCU} +) +target_link_libraries(GENERIC_L476RETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L476RETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L476RETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L476RETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L476RETX_serial_none INTERFACE) +target_compile_options(GENERIC_L476RETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L476RETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L476RETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L476RETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L476RETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L476RETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L476RETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L476RETX_usb_none INTERFACE) +target_compile_options(GENERIC_L476RETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L476RETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L476RETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L476RETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L476RETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L476RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L476RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L476RGTX_MAXSIZE 1048576) +set(GENERIC_L476RGTX_MAXDATASIZE 98304) +set(GENERIC_L476RGTX_MCU cortex-m4) +set(GENERIC_L476RGTX_FPCONF "-") +add_library(GENERIC_L476RGTX INTERFACE) +target_compile_options(GENERIC_L476RGTX INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476RGTX_MCU} +) +target_compile_definitions(GENERIC_L476RGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L476RGTX" + "BOARD_NAME=\"GENERIC_L476RGTX\"" + "BOARD_ID=GENERIC_L476RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L476RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L476RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L476RGTX INTERFACE + "LINKER:--default-script=${GENERIC_L476RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476RGTX_MCU} +) +target_link_libraries(GENERIC_L476RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L476RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L476RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L476RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L476RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L476RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L476RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L476RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L476RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L476RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L476RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L476RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L476RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L476RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L476RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L476RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L476RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L476RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L476RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L476VCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L476VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L476VCTX_MAXSIZE 262144) +set(GENERIC_L476VCTX_MAXDATASIZE 98304) +set(GENERIC_L476VCTX_MCU cortex-m4) +set(GENERIC_L476VCTX_FPCONF "-") +add_library(GENERIC_L476VCTX INTERFACE) +target_compile_options(GENERIC_L476VCTX INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476VCTX_MCU} +) +target_compile_definitions(GENERIC_L476VCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L476VCTX" + "BOARD_NAME=\"GENERIC_L476VCTX\"" + "BOARD_ID=GENERIC_L476VCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L476VCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L476VCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L476VCTX INTERFACE + "LINKER:--default-script=${GENERIC_L476VCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476VCTX_MCU} +) +target_link_libraries(GENERIC_L476VCTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L476VCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L476VCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L476VCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L476VCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L476VCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L476VCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L476VCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L476VCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L476VCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L476VCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L476VCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L476VCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L476VCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L476VCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L476VCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L476VCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L476VCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L476VETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L476VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L476VETX_MAXSIZE 524288) +set(GENERIC_L476VETX_MAXDATASIZE 98304) +set(GENERIC_L476VETX_MCU cortex-m4) +set(GENERIC_L476VETX_FPCONF "-") +add_library(GENERIC_L476VETX INTERFACE) +target_compile_options(GENERIC_L476VETX INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476VETX_MCU} +) +target_compile_definitions(GENERIC_L476VETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L476VETX" + "BOARD_NAME=\"GENERIC_L476VETX\"" + "BOARD_ID=GENERIC_L476VETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L476VETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L476VETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L476VETX INTERFACE + "LINKER:--default-script=${GENERIC_L476VETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476VETX_MCU} +) +target_link_libraries(GENERIC_L476VETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L476VETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L476VETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L476VETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L476VETX_serial_none INTERFACE) +target_compile_options(GENERIC_L476VETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L476VETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L476VETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L476VETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L476VETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L476VETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L476VETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L476VETX_usb_none INTERFACE) +target_compile_options(GENERIC_L476VETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L476VETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L476VETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L476VETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L476VETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L476VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L476VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L476VGTX_MAXSIZE 1048576) +set(GENERIC_L476VGTX_MAXDATASIZE 98304) +set(GENERIC_L476VGTX_MCU cortex-m4) +set(GENERIC_L476VGTX_FPCONF "-") +add_library(GENERIC_L476VGTX INTERFACE) +target_compile_options(GENERIC_L476VGTX INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476VGTX_MCU} +) +target_compile_definitions(GENERIC_L476VGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L476VGTX" + "BOARD_NAME=\"GENERIC_L476VGTX\"" + "BOARD_ID=GENERIC_L476VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L476VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L476VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L476VGTX INTERFACE + "LINKER:--default-script=${GENERIC_L476VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L476VGTX_MCU} +) +target_link_libraries(GENERIC_L476VGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L476VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L476VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L476VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L476VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L476VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L476VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L476VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L476VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L476VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L476VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L476VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L476VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L476VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L476VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L476VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L476VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L476VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L476VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L486RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L486RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(GENERIC_L486RGTX_MAXSIZE 1048576) +set(GENERIC_L486RGTX_MAXDATASIZE 98304) +set(GENERIC_L486RGTX_MCU cortex-m4) +set(GENERIC_L486RGTX_FPCONF "-") +add_library(GENERIC_L486RGTX INTERFACE) +target_compile_options(GENERIC_L486RGTX INTERFACE + "SHELL:-DSTM32L486xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L486RGTX_MCU} +) +target_compile_definitions(GENERIC_L486RGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L486RGTX" + "BOARD_NAME=\"GENERIC_L486RGTX\"" + "BOARD_ID=GENERIC_L486RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L486RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L486RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L486RGTX INTERFACE + "LINKER:--default-script=${GENERIC_L486RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L486RGTX_MCU} +) +target_link_libraries(GENERIC_L486RGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L486RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L486RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L486RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L486RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L486RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L486RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L486RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L486RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L486RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L486RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L486RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L486RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L486RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L486RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L486RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L486RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L486RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L486RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L486RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L486RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L486VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L486VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT") +set(GENERIC_L486VGTX_MAXSIZE 1048576) +set(GENERIC_L486VGTX_MAXDATASIZE 98304) +set(GENERIC_L486VGTX_MCU cortex-m4) +set(GENERIC_L486VGTX_FPCONF "-") +add_library(GENERIC_L486VGTX INTERFACE) +target_compile_options(GENERIC_L486VGTX INTERFACE + "SHELL:-DSTM32L486xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L486VGTX_MCU} +) +target_compile_definitions(GENERIC_L486VGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L486VGTX" + "BOARD_NAME=\"GENERIC_L486VGTX\"" + "BOARD_ID=GENERIC_L486VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L486VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L486VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L486VGTX INTERFACE + "LINKER:--default-script=${GENERIC_L486VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L486VGTX_MCU} +) +target_link_libraries(GENERIC_L486VGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L486VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L486VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L486VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L486VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L486VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L486VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L486VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L486VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L486VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L486VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L486VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L486VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L486VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L486VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L486VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L486VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L486VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L486VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L486VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L486VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L496ZETX +# ----------------------------------------------------------------------------- + +set(GENERIC_L496ZETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT") +set(GENERIC_L496ZETX_MAXSIZE 524288) +set(GENERIC_L496ZETX_MAXDATASIZE 327680) +set(GENERIC_L496ZETX_MCU cortex-m4) +set(GENERIC_L496ZETX_FPCONF "-") +add_library(GENERIC_L496ZETX INTERFACE) +target_compile_options(GENERIC_L496ZETX INTERFACE + "SHELL:-DSTM32L496xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L496ZETX_MCU} +) +target_compile_definitions(GENERIC_L496ZETX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L496ZETX" + "BOARD_NAME=\"GENERIC_L496ZETX\"" + "BOARD_ID=GENERIC_L496ZETX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L496ZETX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L496ZETX_VARIANT_PATH} +) + +target_link_options(GENERIC_L496ZETX INTERFACE + "LINKER:--default-script=${GENERIC_L496ZETX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L496ZETX_MCU} +) +target_link_libraries(GENERIC_L496ZETX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L496ZETX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L496ZETX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZETX_serial_generic INTERFACE) +target_compile_options(GENERIC_L496ZETX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L496ZETX_serial_none INTERFACE) +target_compile_options(GENERIC_L496ZETX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L496ZETX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L496ZETX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L496ZETX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L496ZETX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L496ZETX_usb_HID INTERFACE) +target_compile_options(GENERIC_L496ZETX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L496ZETX_usb_none INTERFACE) +target_compile_options(GENERIC_L496ZETX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZETX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L496ZETX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZETX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L496ZETX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L496ZETX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L496ZETX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L496ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L496ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT") +set(GENERIC_L496ZGTX_MAXSIZE 1048576) +set(GENERIC_L496ZGTX_MAXDATASIZE 327680) +set(GENERIC_L496ZGTX_MCU cortex-m4) +set(GENERIC_L496ZGTX_FPCONF "-") +add_library(GENERIC_L496ZGTX INTERFACE) +target_compile_options(GENERIC_L496ZGTX INTERFACE + "SHELL:-DSTM32L496xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L496ZGTX_MCU} +) +target_compile_definitions(GENERIC_L496ZGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L496ZGTX" + "BOARD_NAME=\"GENERIC_L496ZGTX\"" + "BOARD_ID=GENERIC_L496ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L496ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L496ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L496ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_L496ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L496ZGTX_MCU} +) +target_link_libraries(GENERIC_L496ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L496ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L496ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L496ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L496ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L496ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L496ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L496ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L496ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L496ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L496ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L496ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L496ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L496ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L496ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L496ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L496ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L496ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L496ZGTXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L496ZGTXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP") +set(GENERIC_L496ZGTXP_MAXSIZE 1048576) +set(GENERIC_L496ZGTXP_MAXDATASIZE 327680) +set(GENERIC_L496ZGTXP_MCU cortex-m4) +set(GENERIC_L496ZGTXP_FPCONF "-") +add_library(GENERIC_L496ZGTXP INTERFACE) +target_compile_options(GENERIC_L496ZGTXP INTERFACE + "SHELL:-DSTM32L496xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L496ZGTXP_MCU} +) +target_compile_definitions(GENERIC_L496ZGTXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L496ZGTXP" + "BOARD_NAME=\"GENERIC_L496ZGTXP\"" + "BOARD_ID=GENERIC_L496ZGTXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L496ZGTXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L496ZGTXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L496ZGTXP INTERFACE + "LINKER:--default-script=${GENERIC_L496ZGTXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L496ZGTXP_MCU} +) +target_link_libraries(GENERIC_L496ZGTXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L496ZGTXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZGTXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L496ZGTXP_serial_none INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L496ZGTXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L496ZGTXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L496ZGTXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L496ZGTXP_usb_none INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZGTXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L496ZGTXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L496ZGTXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L496ZGTXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4A6ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4A6ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT") +set(GENERIC_L4A6ZGTX_MAXSIZE 1048576) +set(GENERIC_L4A6ZGTX_MAXDATASIZE 327680) +set(GENERIC_L4A6ZGTX_MCU cortex-m4) +set(GENERIC_L4A6ZGTX_FPCONF "-") +add_library(GENERIC_L4A6ZGTX INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX INTERFACE + "SHELL:-DSTM32L4A6xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4A6ZGTX_MCU} +) +target_compile_definitions(GENERIC_L4A6ZGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4A6ZGTX" + "BOARD_NAME=\"GENERIC_L4A6ZGTX\"" + "BOARD_ID=GENERIC_L4A6ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4A6ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4A6ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4A6ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_L4A6ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4A6ZGTX_MCU} +) +target_link_libraries(GENERIC_L4A6ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4A6ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4A6ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4A6ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4A6ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4A6ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4A6ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4A6ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4A6ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4A6ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4A6ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4A6ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4A6ZGTXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L4A6ZGTXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP") +set(GENERIC_L4A6ZGTXP_MAXSIZE 1048576) +set(GENERIC_L4A6ZGTXP_MAXDATASIZE 327680) +set(GENERIC_L4A6ZGTXP_MCU cortex-m4) +set(GENERIC_L4A6ZGTXP_FPCONF "-") +add_library(GENERIC_L4A6ZGTXP INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP INTERFACE + "SHELL:-DSTM32L4A6xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4A6ZGTXP_MCU} +) +target_compile_definitions(GENERIC_L4A6ZGTXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4A6ZGTXP" + "BOARD_NAME=\"GENERIC_L4A6ZGTXP\"" + "BOARD_ID=GENERIC_L4A6ZGTXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4A6ZGTXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4A6ZGTXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L4A6ZGTXP INTERFACE + "LINKER:--default-script=${GENERIC_L4A6ZGTXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4A6ZGTXP_MCU} +) +target_link_libraries(GENERIC_L4A6ZGTXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4A6ZGTXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4A6ZGTXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4A6ZGTXP_serial_none INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4A6ZGTXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4A6ZGTXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4A6ZGTXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4A6ZGTXP_usb_none INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4A6ZGTXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4A6ZGTXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4A6ZGTXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4A6ZGTXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5VGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT") +set(GENERIC_L4R5VGTX_MAXSIZE 1048576) +set(GENERIC_L4R5VGTX_MAXDATASIZE 655360) +set(GENERIC_L4R5VGTX_MCU cortex-m4) +set(GENERIC_L4R5VGTX_FPCONF "-") +add_library(GENERIC_L4R5VGTX INTERFACE) +target_compile_options(GENERIC_L4R5VGTX INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5VGTX_MCU} +) +target_compile_definitions(GENERIC_L4R5VGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5VGTX" + "BOARD_NAME=\"GENERIC_L4R5VGTX\"" + "BOARD_ID=GENERIC_L4R5VGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5VGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5VGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5VGTX INTERFACE + "LINKER:--default-script=${GENERIC_L4R5VGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5VGTX_MCU} +) +target_link_libraries(GENERIC_L4R5VGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5VGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5VGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5VGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5VGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5VGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5VGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5VGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5VGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5VGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5VGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5VGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT") +set(GENERIC_L4R5VITX_MAXSIZE 2097152) +set(GENERIC_L4R5VITX_MAXDATASIZE 655360) +set(GENERIC_L4R5VITX_MCU cortex-m4) +set(GENERIC_L4R5VITX_FPCONF "-") +add_library(GENERIC_L4R5VITX INTERFACE) +target_compile_options(GENERIC_L4R5VITX INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5VITX_MCU} +) +target_compile_definitions(GENERIC_L4R5VITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5VITX" + "BOARD_NAME=\"GENERIC_L4R5VITX\"" + "BOARD_ID=GENERIC_L4R5VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5VITX INTERFACE + "LINKER:--default-script=${GENERIC_L4R5VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5VITX_MCU} +) +target_link_libraries(GENERIC_L4R5VITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5VITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5VITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5ZGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5ZGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT") +set(GENERIC_L4R5ZGTX_MAXSIZE 1048576) +set(GENERIC_L4R5ZGTX_MAXDATASIZE 655360) +set(GENERIC_L4R5ZGTX_MCU cortex-m4) +set(GENERIC_L4R5ZGTX_FPCONF "-") +add_library(GENERIC_L4R5ZGTX INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZGTX_MCU} +) +target_compile_definitions(GENERIC_L4R5ZGTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5ZGTX" + "BOARD_NAME=\"GENERIC_L4R5ZGTX\"" + "BOARD_ID=GENERIC_L4R5ZGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5ZGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5ZGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5ZGTX INTERFACE + "LINKER:--default-script=${GENERIC_L4R5ZGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZGTX_MCU} +) +target_link_libraries(GENERIC_L4R5ZGTX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5ZGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5ZGTX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5ZGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5ZGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5ZGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5ZGTX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5ZGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5ZGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5ZGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5ZGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(GENERIC_L4R5ZGYX_MAXSIZE 1048576) +set(GENERIC_L4R5ZGYX_MAXDATASIZE 655360) +set(GENERIC_L4R5ZGYX_MCU cortex-m4) +set(GENERIC_L4R5ZGYX_FPCONF "-") +add_library(GENERIC_L4R5ZGYX INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZGYX_MCU} +) +target_compile_definitions(GENERIC_L4R5ZGYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5ZGYX" + "BOARD_NAME=\"GENERIC_L4R5ZGYX\"" + "BOARD_ID=GENERIC_L4R5ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5ZGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5ZGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5ZGYX INTERFACE + "LINKER:--default-script=${GENERIC_L4R5ZGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZGYX_MCU} +) +target_link_libraries(GENERIC_L4R5ZGYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5ZGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5ZGYX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5ZGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5ZGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5ZGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5ZGYX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5ZGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5ZGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT") +set(GENERIC_L4R5ZITX_MAXSIZE 2097152) +set(GENERIC_L4R5ZITX_MAXDATASIZE 655360) +set(GENERIC_L4R5ZITX_MCU cortex-m4) +set(GENERIC_L4R5ZITX_FPCONF "-") +add_library(GENERIC_L4R5ZITX INTERFACE) +target_compile_options(GENERIC_L4R5ZITX INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZITX_MCU} +) +target_compile_definitions(GENERIC_L4R5ZITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5ZITX" + "BOARD_NAME=\"GENERIC_L4R5ZITX\"" + "BOARD_ID=GENERIC_L4R5ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5ZITX INTERFACE + "LINKER:--default-script=${GENERIC_L4R5ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZITX_MCU} +) +target_link_libraries(GENERIC_L4R5ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5ZITXP +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5ZITXP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5ZITxP") +set(GENERIC_L4R5ZITXP_MAXSIZE 2097152) +set(GENERIC_L4R5ZITXP_MAXDATASIZE 655360) +set(GENERIC_L4R5ZITXP_MCU cortex-m4) +set(GENERIC_L4R5ZITXP_FPCONF "-") +add_library(GENERIC_L4R5ZITXP INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZITXP_MCU} +) +target_compile_definitions(GENERIC_L4R5ZITXP INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5ZITXP" + "BOARD_NAME=\"GENERIC_L4R5ZITXP\"" + "BOARD_ID=GENERIC_L4R5ZITXP" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5ZITXP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5ZITXP_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5ZITXP INTERFACE + "LINKER:--default-script=${GENERIC_L4R5ZITXP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZITXP_MCU} +) +target_link_libraries(GENERIC_L4R5ZITXP INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5ZITXP_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZITXP_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5ZITXP_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5ZITXP_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5ZITXP_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5ZITXP_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5ZITXP_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZITXP_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZITXP_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5ZITXP_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5ZITXP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R5ZIYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R5ZIYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(GENERIC_L4R5ZIYX_MAXSIZE 2097152) +set(GENERIC_L4R5ZIYX_MAXDATASIZE 655360) +set(GENERIC_L4R5ZIYX_MCU cortex-m4) +set(GENERIC_L4R5ZIYX_FPCONF "-") +add_library(GENERIC_L4R5ZIYX INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZIYX_MCU} +) +target_compile_definitions(GENERIC_L4R5ZIYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R5ZIYX" + "BOARD_NAME=\"GENERIC_L4R5ZIYX\"" + "BOARD_ID=GENERIC_L4R5ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R5ZIYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R5ZIYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R5ZIYX INTERFACE + "LINKER:--default-script=${GENERIC_L4R5ZIYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R5ZIYX_MCU} +) +target_link_libraries(GENERIC_L4R5ZIYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R5ZIYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZIYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R5ZIYX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R5ZIYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R5ZIYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R5ZIYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R5ZIYX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZIYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R5ZIYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R5ZIYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R5ZIYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R7VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R7VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT") +set(GENERIC_L4R7VITX_MAXSIZE 2097152) +set(GENERIC_L4R7VITX_MAXDATASIZE 655360) +set(GENERIC_L4R7VITX_MCU cortex-m4) +set(GENERIC_L4R7VITX_FPCONF "-") +add_library(GENERIC_L4R7VITX INTERFACE) +target_compile_options(GENERIC_L4R7VITX INTERFACE + "SHELL:-DSTM32L4R7xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R7VITX_MCU} +) +target_compile_definitions(GENERIC_L4R7VITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R7VITX" + "BOARD_NAME=\"GENERIC_L4R7VITX\"" + "BOARD_ID=GENERIC_L4R7VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R7VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R7VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R7VITX INTERFACE + "LINKER:--default-script=${GENERIC_L4R7VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R7VITX_MCU} +) +target_link_libraries(GENERIC_L4R7VITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R7VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R7VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R7VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R7VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R7VITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R7VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R7VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R7VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R7VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R7VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R7VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R7VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R7VITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R7VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R7VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R7VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R7VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R7VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R7VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R7VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R7ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R7ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT") +set(GENERIC_L4R7ZITX_MAXSIZE 2097152) +set(GENERIC_L4R7ZITX_MAXDATASIZE 655360) +set(GENERIC_L4R7ZITX_MCU cortex-m4) +set(GENERIC_L4R7ZITX_FPCONF "-") +add_library(GENERIC_L4R7ZITX INTERFACE) +target_compile_options(GENERIC_L4R7ZITX INTERFACE + "SHELL:-DSTM32L4R7xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R7ZITX_MCU} +) +target_compile_definitions(GENERIC_L4R7ZITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R7ZITX" + "BOARD_NAME=\"GENERIC_L4R7ZITX\"" + "BOARD_ID=GENERIC_L4R7ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R7ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R7ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R7ZITX INTERFACE + "LINKER:--default-script=${GENERIC_L4R7ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R7ZITX_MCU} +) +target_link_libraries(GENERIC_L4R7ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R7ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R7ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R7ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R7ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R7ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R7ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R7ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R7ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R7ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R7ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R7ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R9ZGJX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R9ZGJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ") +set(GENERIC_L4R9ZGJX_MAXSIZE 1048576) +set(GENERIC_L4R9ZGJX_MAXDATASIZE 655360) +set(GENERIC_L4R9ZGJX_MCU cortex-m4) +set(GENERIC_L4R9ZGJX_FPCONF "-") +add_library(GENERIC_L4R9ZGJX INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX INTERFACE + "SHELL:-DSTM32L4R9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZGJX_MCU} +) +target_compile_definitions(GENERIC_L4R9ZGJX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R9ZGJX" + "BOARD_NAME=\"GENERIC_L4R9ZGJX\"" + "BOARD_ID=GENERIC_L4R9ZGJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R9ZGJX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R9ZGJX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R9ZGJX INTERFACE + "LINKER:--default-script=${GENERIC_L4R9ZGJX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZGJX_MCU} +) +target_link_libraries(GENERIC_L4R9ZGJX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R9ZGJX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZGJX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R9ZGJX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R9ZGJX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R9ZGJX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R9ZGJX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R9ZGJX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZGJX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZGJX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R9ZGJX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R9ZGJX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R9ZGYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R9ZGYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(GENERIC_L4R9ZGYX_MAXSIZE 1048576) +set(GENERIC_L4R9ZGYX_MAXDATASIZE 655360) +set(GENERIC_L4R9ZGYX_MCU cortex-m4) +set(GENERIC_L4R9ZGYX_FPCONF "-") +add_library(GENERIC_L4R9ZGYX INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX INTERFACE + "SHELL:-DSTM32L4R9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZGYX_MCU} +) +target_compile_definitions(GENERIC_L4R9ZGYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R9ZGYX" + "BOARD_NAME=\"GENERIC_L4R9ZGYX\"" + "BOARD_ID=GENERIC_L4R9ZGYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R9ZGYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R9ZGYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R9ZGYX INTERFACE + "LINKER:--default-script=${GENERIC_L4R9ZGYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZGYX_MCU} +) +target_link_libraries(GENERIC_L4R9ZGYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R9ZGYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZGYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R9ZGYX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R9ZGYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R9ZGYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R9ZGYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R9ZGYX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZGYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZGYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R9ZGYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R9ZGYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R9ZIJX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R9ZIJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ") +set(GENERIC_L4R9ZIJX_MAXSIZE 2097152) +set(GENERIC_L4R9ZIJX_MAXDATASIZE 655360) +set(GENERIC_L4R9ZIJX_MCU cortex-m4) +set(GENERIC_L4R9ZIJX_FPCONF "-") +add_library(GENERIC_L4R9ZIJX INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX INTERFACE + "SHELL:-DSTM32L4R9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZIJX_MCU} +) +target_compile_definitions(GENERIC_L4R9ZIJX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R9ZIJX" + "BOARD_NAME=\"GENERIC_L4R9ZIJX\"" + "BOARD_ID=GENERIC_L4R9ZIJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R9ZIJX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R9ZIJX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R9ZIJX INTERFACE + "LINKER:--default-script=${GENERIC_L4R9ZIJX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZIJX_MCU} +) +target_link_libraries(GENERIC_L4R9ZIJX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R9ZIJX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZIJX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R9ZIJX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R9ZIJX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R9ZIJX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R9ZIJX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R9ZIJX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZIJX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZIJX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R9ZIJX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R9ZIJX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4R9ZIYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4R9ZIYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(GENERIC_L4R9ZIYX_MAXSIZE 2097152) +set(GENERIC_L4R9ZIYX_MAXDATASIZE 655360) +set(GENERIC_L4R9ZIYX_MCU cortex-m4) +set(GENERIC_L4R9ZIYX_FPCONF "-") +add_library(GENERIC_L4R9ZIYX INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX INTERFACE + "SHELL:-DSTM32L4R9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZIYX_MCU} +) +target_compile_definitions(GENERIC_L4R9ZIYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4R9ZIYX" + "BOARD_NAME=\"GENERIC_L4R9ZIYX\"" + "BOARD_ID=GENERIC_L4R9ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4R9ZIYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4R9ZIYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4R9ZIYX INTERFACE + "LINKER:--default-script=${GENERIC_L4R9ZIYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4R9ZIYX_MCU} +) +target_link_libraries(GENERIC_L4R9ZIYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4R9ZIYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZIYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4R9ZIYX_serial_none INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4R9ZIYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4R9ZIYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4R9ZIYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4R9ZIYX_usb_none INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZIYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4R9ZIYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4R9ZIYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4R9ZIYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S5VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S5VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT") +set(GENERIC_L4S5VITX_MAXSIZE 2097152) +set(GENERIC_L4S5VITX_MAXDATASIZE 655360) +set(GENERIC_L4S5VITX_MCU cortex-m4) +set(GENERIC_L4S5VITX_FPCONF "-") +add_library(GENERIC_L4S5VITX INTERFACE) +target_compile_options(GENERIC_L4S5VITX INTERFACE + "SHELL:-DSTM32L4S5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S5VITX_MCU} +) +target_compile_definitions(GENERIC_L4S5VITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S5VITX" + "BOARD_NAME=\"GENERIC_L4S5VITX\"" + "BOARD_ID=GENERIC_L4S5VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S5VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S5VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S5VITX INTERFACE + "LINKER:--default-script=${GENERIC_L4S5VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S5VITX_MCU} +) +target_link_libraries(GENERIC_L4S5VITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S5VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S5VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S5VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S5VITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S5VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S5VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S5VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S5VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S5VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S5VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S5VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S5VITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S5VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S5VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S5VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S5VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S5VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S5ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S5ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT") +set(GENERIC_L4S5ZITX_MAXSIZE 2097152) +set(GENERIC_L4S5ZITX_MAXDATASIZE 655360) +set(GENERIC_L4S5ZITX_MCU cortex-m4) +set(GENERIC_L4S5ZITX_FPCONF "-") +add_library(GENERIC_L4S5ZITX INTERFACE) +target_compile_options(GENERIC_L4S5ZITX INTERFACE + "SHELL:-DSTM32L4S5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S5ZITX_MCU} +) +target_compile_definitions(GENERIC_L4S5ZITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S5ZITX" + "BOARD_NAME=\"GENERIC_L4S5ZITX\"" + "BOARD_ID=GENERIC_L4S5ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S5ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S5ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S5ZITX INTERFACE + "LINKER:--default-script=${GENERIC_L4S5ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S5ZITX_MCU} +) +target_link_libraries(GENERIC_L4S5ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S5ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S5ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S5ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S5ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S5ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S5ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S5ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S5ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S5ZIYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S5ZIYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(GENERIC_L4S5ZIYX_MAXSIZE 2097152) +set(GENERIC_L4S5ZIYX_MAXDATASIZE 655360) +set(GENERIC_L4S5ZIYX_MCU cortex-m4) +set(GENERIC_L4S5ZIYX_FPCONF "-") +add_library(GENERIC_L4S5ZIYX INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX INTERFACE + "SHELL:-DSTM32L4S5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S5ZIYX_MCU} +) +target_compile_definitions(GENERIC_L4S5ZIYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S5ZIYX" + "BOARD_NAME=\"GENERIC_L4S5ZIYX\"" + "BOARD_ID=GENERIC_L4S5ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S5ZIYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S5ZIYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S5ZIYX INTERFACE + "LINKER:--default-script=${GENERIC_L4S5ZIYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S5ZIYX_MCU} +) +target_link_libraries(GENERIC_L4S5ZIYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S5ZIYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5ZIYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S5ZIYX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S5ZIYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S5ZIYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S5ZIYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S5ZIYX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5ZIYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S5ZIYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S5ZIYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S5ZIYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S7VITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S7VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT") +set(GENERIC_L4S7VITX_MAXSIZE 2097152) +set(GENERIC_L4S7VITX_MAXDATASIZE 655360) +set(GENERIC_L4S7VITX_MCU cortex-m4) +set(GENERIC_L4S7VITX_FPCONF "-") +add_library(GENERIC_L4S7VITX INTERFACE) +target_compile_options(GENERIC_L4S7VITX INTERFACE + "SHELL:-DSTM32L4S7xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S7VITX_MCU} +) +target_compile_definitions(GENERIC_L4S7VITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S7VITX" + "BOARD_NAME=\"GENERIC_L4S7VITX\"" + "BOARD_ID=GENERIC_L4S7VITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S7VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S7VITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S7VITX INTERFACE + "LINKER:--default-script=${GENERIC_L4S7VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S7VITX_MCU} +) +target_link_libraries(GENERIC_L4S7VITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S7VITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S7VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S7VITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S7VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S7VITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S7VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S7VITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S7VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S7VITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S7VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S7VITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S7VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S7VITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S7VITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S7VITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S7VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S7VITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S7VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S7VITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S7VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S7ZITX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S7ZITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT") +set(GENERIC_L4S7ZITX_MAXSIZE 2097152) +set(GENERIC_L4S7ZITX_MAXDATASIZE 655360) +set(GENERIC_L4S7ZITX_MCU cortex-m4) +set(GENERIC_L4S7ZITX_FPCONF "-") +add_library(GENERIC_L4S7ZITX INTERFACE) +target_compile_options(GENERIC_L4S7ZITX INTERFACE + "SHELL:-DSTM32L4S7xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S7ZITX_MCU} +) +target_compile_definitions(GENERIC_L4S7ZITX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S7ZITX" + "BOARD_NAME=\"GENERIC_L4S7ZITX\"" + "BOARD_ID=GENERIC_L4S7ZITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S7ZITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S7ZITX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S7ZITX INTERFACE + "LINKER:--default-script=${GENERIC_L4S7ZITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S7ZITX_MCU} +) +target_link_libraries(GENERIC_L4S7ZITX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S7ZITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S7ZITX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S7ZITX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S7ZITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S7ZITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S7ZITX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S7ZITX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S7ZITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S7ZITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S7ZITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S7ZITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S9ZIJX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S9ZIJX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ") +set(GENERIC_L4S9ZIJX_MAXSIZE 2097152) +set(GENERIC_L4S9ZIJX_MAXDATASIZE 655360) +set(GENERIC_L4S9ZIJX_MCU cortex-m4) +set(GENERIC_L4S9ZIJX_FPCONF "-") +add_library(GENERIC_L4S9ZIJX INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX INTERFACE + "SHELL:-DSTM32L4S9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S9ZIJX_MCU} +) +target_compile_definitions(GENERIC_L4S9ZIJX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S9ZIJX" + "BOARD_NAME=\"GENERIC_L4S9ZIJX\"" + "BOARD_ID=GENERIC_L4S9ZIJX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S9ZIJX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S9ZIJX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S9ZIJX INTERFACE + "LINKER:--default-script=${GENERIC_L4S9ZIJX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S9ZIJX_MCU} +) +target_link_libraries(GENERIC_L4S9ZIJX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S9ZIJX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S9ZIJX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S9ZIJX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S9ZIJX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S9ZIJX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S9ZIJX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S9ZIJX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S9ZIJX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S9ZIJX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S9ZIJX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S9ZIJX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L4S9ZIYX +# ----------------------------------------------------------------------------- + +set(GENERIC_L4S9ZIYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(GENERIC_L4S9ZIYX_MAXSIZE 2097152) +set(GENERIC_L4S9ZIYX_MAXDATASIZE 655360) +set(GENERIC_L4S9ZIYX_MCU cortex-m4) +set(GENERIC_L4S9ZIYX_FPCONF "-") +add_library(GENERIC_L4S9ZIYX INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX INTERFACE + "SHELL:-DSTM32L4S9xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S9ZIYX_MCU} +) +target_compile_definitions(GENERIC_L4S9ZIYX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L4S9ZIYX" + "BOARD_NAME=\"GENERIC_L4S9ZIYX\"" + "BOARD_ID=GENERIC_L4S9ZIYX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L4S9ZIYX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L4S9ZIYX_VARIANT_PATH} +) + +target_link_options(GENERIC_L4S9ZIYX INTERFACE + "LINKER:--default-script=${GENERIC_L4S9ZIYX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L4S9ZIYX_MCU} +) +target_link_libraries(GENERIC_L4S9ZIYX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_L4S9ZIYX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S9ZIYX_serial_generic INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L4S9ZIYX_serial_none INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L4S9ZIYX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L4S9ZIYX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L4S9ZIYX_usb_HID INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L4S9ZIYX_usb_none INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S9ZIYX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L4S9ZIYX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L4S9ZIYX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L4S9ZIYX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L552ZCTXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_L552ZCTXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ") +set(GENERIC_L552ZCTXQ_MAXSIZE 262144) +set(GENERIC_L552ZCTXQ_MAXDATASIZE 196608) +set(GENERIC_L552ZCTXQ_MCU cortex-m33) +set(GENERIC_L552ZCTXQ_FPCONF "-") +add_library(GENERIC_L552ZCTXQ INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ INTERFACE + "SHELL:-DSTM32L552xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552ZCTXQ_MCU} +) +target_compile_definitions(GENERIC_L552ZCTXQ INTERFACE + "STM32L5xx" + "ARDUINO_GENERIC_L552ZCTXQ" + "BOARD_NAME=\"GENERIC_L552ZCTXQ\"" + "BOARD_ID=GENERIC_L552ZCTXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L552ZCTXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${GENERIC_L552ZCTXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_L552ZCTXQ INTERFACE + "LINKER:--default-script=${GENERIC_L552ZCTXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552ZCTXQ_MCU} +) +target_link_libraries(GENERIC_L552ZCTXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_L552ZCTXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L552ZCTXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L552ZCTXQ_serial_none INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L552ZCTXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L552ZCTXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L552ZCTXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L552ZCTXQ_usb_none INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L552ZCTXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L552ZCTXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L552ZCTXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L552ZCTXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L552ZETXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_L552ZETXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ") +set(GENERIC_L552ZETXQ_MAXSIZE 524288) +set(GENERIC_L552ZETXQ_MAXDATASIZE 196608) +set(GENERIC_L552ZETXQ_MCU cortex-m33) +set(GENERIC_L552ZETXQ_FPCONF "-") +add_library(GENERIC_L552ZETXQ INTERFACE) +target_compile_options(GENERIC_L552ZETXQ INTERFACE + "SHELL:-DSTM32L552xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552ZETXQ_MCU} +) +target_compile_definitions(GENERIC_L552ZETXQ INTERFACE + "STM32L5xx" + "ARDUINO_GENERIC_L552ZETXQ" + "BOARD_NAME=\"GENERIC_L552ZETXQ\"" + "BOARD_ID=GENERIC_L552ZETXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L552ZETXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${GENERIC_L552ZETXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_L552ZETXQ INTERFACE + "LINKER:--default-script=${GENERIC_L552ZETXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L552ZETXQ_MCU} +) +target_link_libraries(GENERIC_L552ZETXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_L552ZETXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L552ZETXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L552ZETXQ_serial_none INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L552ZETXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L552ZETXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L552ZETXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L552ZETXQ_usb_none INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L552ZETXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L552ZETXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L552ZETXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L552ZETXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L562ZETXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_L562ZETXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ") +set(GENERIC_L562ZETXQ_MAXSIZE 524288) +set(GENERIC_L562ZETXQ_MAXDATASIZE 196608) +set(GENERIC_L562ZETXQ_MCU cortex-m33) +set(GENERIC_L562ZETXQ_FPCONF "-") +add_library(GENERIC_L562ZETXQ INTERFACE) +target_compile_options(GENERIC_L562ZETXQ INTERFACE + "SHELL:-DSTM32L562xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L562ZETXQ_MCU} +) +target_compile_definitions(GENERIC_L562ZETXQ INTERFACE + "STM32L5xx" + "ARDUINO_GENERIC_L562ZETXQ" + "BOARD_NAME=\"GENERIC_L562ZETXQ\"" + "BOARD_ID=GENERIC_L562ZETXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L562ZETXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${GENERIC_L562ZETXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_L562ZETXQ INTERFACE + "LINKER:--default-script=${GENERIC_L562ZETXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L562ZETXQ_MCU} +) +target_link_libraries(GENERIC_L562ZETXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_L562ZETXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L562ZETXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L562ZETXQ_serial_none INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L562ZETXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L562ZETXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L562ZETXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L562ZETXQ_usb_none INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L562ZETXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L562ZETXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L562ZETXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L562ZETXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_NODE_SE_TTI +# ----------------------------------------------------------------------------- + +set(GENERIC_NODE_SE_TTI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_NODE_SE_TTI_MAXSIZE 262144) +set(GENERIC_NODE_SE_TTI_MAXDATASIZE 65536) +set(GENERIC_NODE_SE_TTI_MCU cortex-m4) +set(GENERIC_NODE_SE_TTI_FPCONF "-") +add_library(GENERIC_NODE_SE_TTI INTERFACE) +target_compile_options(GENERIC_NODE_SE_TTI INTERFACE + "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_NODE_SE_TTI_MCU} +) +target_compile_definitions(GENERIC_NODE_SE_TTI INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_NODE_SE_TTI" + "BOARD_NAME=\"GENERIC_NODE_SE_TTI\"" + "BOARD_ID=GENERIC_NODE_SE_TTI" + "VARIANT_H=\"variant_GENERIC_NODE_SE_TTI.h\"" +) +target_include_directories(GENERIC_NODE_SE_TTI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_NODE_SE_TTI_VARIANT_PATH} +) + +target_link_options(GENERIC_NODE_SE_TTI INTERFACE + "LINKER:--default-script=${GENERIC_NODE_SE_TTI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_NODE_SE_TTI_MCU} +) +target_link_libraries(GENERIC_NODE_SE_TTI INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_NODE_SE_TTI_serial_disabled INTERFACE) +target_compile_options(GENERIC_NODE_SE_TTI_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_NODE_SE_TTI_serial_generic INTERFACE) +target_compile_options(GENERIC_NODE_SE_TTI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_NODE_SE_TTI_serial_none INTERFACE) +target_compile_options(GENERIC_NODE_SE_TTI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_U575AGIXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U575AGIXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ") +set(GENERIC_U575AGIXQ_MAXSIZE 1048576) +set(GENERIC_U575AGIXQ_MAXDATASIZE 262144) +set(GENERIC_U575AGIXQ_MCU cortex-m33) +set(GENERIC_U575AGIXQ_FPCONF "-") +add_library(GENERIC_U575AGIXQ INTERFACE) +target_compile_options(GENERIC_U575AGIXQ INTERFACE + "SHELL:-DSTM32U575xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575AGIXQ_MCU} +) +target_compile_definitions(GENERIC_U575AGIXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U575AGIXQ" + "BOARD_NAME=\"GENERIC_U575AGIXQ\"" + "BOARD_ID=GENERIC_U575AGIXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U575AGIXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U575AGIXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U575AGIXQ INTERFACE + "LINKER:--default-script=${GENERIC_U575AGIXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575AGIXQ_MCU} +) +target_link_libraries(GENERIC_U575AGIXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_U575AGIXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U575AGIXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U575AGIXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U575AGIXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U575AGIXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U575AGIXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U575AGIXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U575AGIXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U575AGIXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U575AGIXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U575AGIXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U575AIIXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U575AIIXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ") +set(GENERIC_U575AIIXQ_MAXSIZE 2097152) +set(GENERIC_U575AIIXQ_MAXDATASIZE 262144) +set(GENERIC_U575AIIXQ_MCU cortex-m33) +set(GENERIC_U575AIIXQ_FPCONF "-") +add_library(GENERIC_U575AIIXQ INTERFACE) +target_compile_options(GENERIC_U575AIIXQ INTERFACE + "SHELL:-DSTM32U575xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575AIIXQ_MCU} +) +target_compile_definitions(GENERIC_U575AIIXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U575AIIXQ" + "BOARD_NAME=\"GENERIC_U575AIIXQ\"" + "BOARD_ID=GENERIC_U575AIIXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U575AIIXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U575AIIXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U575AIIXQ INTERFACE + "LINKER:--default-script=${GENERIC_U575AIIXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575AIIXQ_MCU} +) +target_link_libraries(GENERIC_U575AIIXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_U575AIIXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U575AIIXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U575AIIXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U575AIIXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U575AIIXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U575AIIXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U575AIIXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U575AIIXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U575AIIXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U575AIIXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U575AIIXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U575ZGTXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U575ZGTXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ") +set(GENERIC_U575ZGTXQ_MAXSIZE 1048576) +set(GENERIC_U575ZGTXQ_MAXDATASIZE 786432) +set(GENERIC_U575ZGTXQ_MCU cortex-m33) +set(GENERIC_U575ZGTXQ_FPCONF "-") +add_library(GENERIC_U575ZGTXQ INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ INTERFACE + "SHELL:-DSTM32U575xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575ZGTXQ_MCU} +) +target_compile_definitions(GENERIC_U575ZGTXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U575ZGTXQ" + "BOARD_NAME=\"GENERIC_U575ZGTXQ\"" + "BOARD_ID=GENERIC_U575ZGTXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U575ZGTXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U575ZGTXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U575ZGTXQ INTERFACE + "LINKER:--default-script=${GENERIC_U575ZGTXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=786432" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575ZGTXQ_MCU} +) +target_link_libraries(GENERIC_U575ZGTXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_U575ZGTXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U575ZGTXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U575ZGTXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U575ZGTXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U575ZGTXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U575ZGTXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U575ZGTXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U575ZGTXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U575ZGTXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U575ZGTXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U575ZGTXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U575ZITXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U575ZITXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ") +set(GENERIC_U575ZITXQ_MAXSIZE 2097152) +set(GENERIC_U575ZITXQ_MAXDATASIZE 786432) +set(GENERIC_U575ZITXQ_MCU cortex-m33) +set(GENERIC_U575ZITXQ_FPCONF "-") +add_library(GENERIC_U575ZITXQ INTERFACE) +target_compile_options(GENERIC_U575ZITXQ INTERFACE + "SHELL:-DSTM32U575xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575ZITXQ_MCU} +) +target_compile_definitions(GENERIC_U575ZITXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U575ZITXQ" + "BOARD_NAME=\"GENERIC_U575ZITXQ\"" + "BOARD_ID=GENERIC_U575ZITXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U575ZITXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U575ZITXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U575ZITXQ INTERFACE + "LINKER:--default-script=${GENERIC_U575ZITXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=786432" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U575ZITXQ_MCU} +) +target_link_libraries(GENERIC_U575ZITXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_U575ZITXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U575ZITXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U575ZITXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U575ZITXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U575ZITXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U575ZITXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U575ZITXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U575ZITXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U575ZITXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U575ZITXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U575ZITXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U585AIIXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U585AIIXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ") +set(GENERIC_U585AIIXQ_MAXSIZE 2097152) +set(GENERIC_U585AIIXQ_MAXDATASIZE 262144) +set(GENERIC_U585AIIXQ_MCU cortex-m33) +set(GENERIC_U585AIIXQ_FPCONF "-") +add_library(GENERIC_U585AIIXQ INTERFACE) +target_compile_options(GENERIC_U585AIIXQ INTERFACE + "SHELL:-DSTM32U585xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U585AIIXQ_MCU} +) +target_compile_definitions(GENERIC_U585AIIXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U585AIIXQ" + "BOARD_NAME=\"GENERIC_U585AIIXQ\"" + "BOARD_ID=GENERIC_U585AIIXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U585AIIXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U585AIIXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U585AIIXQ INTERFACE + "LINKER:--default-script=${GENERIC_U585AIIXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U585AIIXQ_MCU} +) +target_link_libraries(GENERIC_U585AIIXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_U585AIIXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U585AIIXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U585AIIXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U585AIIXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U585AIIXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U585AIIXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U585AIIXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U585AIIXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U585AIIXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U585AIIXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U585AIIXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_U585ZITXQ +# ----------------------------------------------------------------------------- + +set(GENERIC_U585ZITXQ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ") +set(GENERIC_U585ZITXQ_MAXSIZE 2097152) +set(GENERIC_U585ZITXQ_MAXDATASIZE 786432) +set(GENERIC_U585ZITXQ_MCU cortex-m33) +set(GENERIC_U585ZITXQ_FPCONF "-") +add_library(GENERIC_U585ZITXQ INTERFACE) +target_compile_options(GENERIC_U585ZITXQ INTERFACE + "SHELL:-DSTM32U585xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U585ZITXQ_MCU} +) +target_compile_definitions(GENERIC_U585ZITXQ INTERFACE + "STM32U5xx" + "ARDUINO_GENERIC_U585ZITXQ" + "BOARD_NAME=\"GENERIC_U585ZITXQ\"" + "BOARD_ID=GENERIC_U585ZITXQ" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_U585ZITXQ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${GENERIC_U585ZITXQ_VARIANT_PATH} +) + +target_link_options(GENERIC_U585ZITXQ INTERFACE + "LINKER:--default-script=${GENERIC_U585ZITXQ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=786432" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_U585ZITXQ_MCU} +) +target_link_libraries(GENERIC_U585ZITXQ INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(GENERIC_U585ZITXQ_serial_disabled INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_U585ZITXQ_serial_generic INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_U585ZITXQ_serial_none INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_U585ZITXQ_usb_CDC INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_U585ZITXQ_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_U585ZITXQ_usb_HID INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_U585ZITXQ_usb_none INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_U585ZITXQ_xusb_FS INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_U585ZITXQ_xusb_HS INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_U585ZITXQ_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_U585ZITXQ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB55CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB55CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U") +set(GENERIC_WB55CCUX_MAXSIZE 131072) +set(GENERIC_WB55CCUX_MAXDATASIZE 65536) +set(GENERIC_WB55CCUX_MCU cortex-m4) +set(GENERIC_WB55CCUX_FPCONF "-") +add_library(GENERIC_WB55CCUX INTERFACE) +target_compile_options(GENERIC_WB55CCUX INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55CCUX_MCU} +) +target_compile_definitions(GENERIC_WB55CCUX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB55CCUX" + "BOARD_NAME=\"GENERIC_WB55CCUX\"" + "BOARD_ID=GENERIC_WB55CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB55CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB55CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB55CCUX INTERFACE + "LINKER:--default-script=${GENERIC_WB55CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55CCUX_MCU} +) +target_link_libraries(GENERIC_WB55CCUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB55CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB55CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB55CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB55CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_WB55CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB55CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB55CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB55CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB55CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB55CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB55CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB55CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_WB55CCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB55CCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB55CCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB55CCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB55CCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB55CEUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB55CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U") +set(GENERIC_WB55CEUX_MAXSIZE 262144) +set(GENERIC_WB55CEUX_MAXDATASIZE 196608) +set(GENERIC_WB55CEUX_MCU cortex-m4) +set(GENERIC_WB55CEUX_FPCONF "-") +add_library(GENERIC_WB55CEUX INTERFACE) +target_compile_options(GENERIC_WB55CEUX INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55CEUX_MCU} +) +target_compile_definitions(GENERIC_WB55CEUX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB55CEUX" + "BOARD_NAME=\"GENERIC_WB55CEUX\"" + "BOARD_ID=GENERIC_WB55CEUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB55CEUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB55CEUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB55CEUX INTERFACE + "LINKER:--default-script=${GENERIC_WB55CEUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55CEUX_MCU} +) +target_link_libraries(GENERIC_WB55CEUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB55CEUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB55CEUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CEUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB55CEUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB55CEUX_serial_none INTERFACE) +target_compile_options(GENERIC_WB55CEUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB55CEUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB55CEUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB55CEUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB55CEUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB55CEUX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB55CEUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB55CEUX_usb_none INTERFACE) +target_compile_options(GENERIC_WB55CEUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CEUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB55CEUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CEUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB55CEUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB55CEUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB55CEUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB55CGUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB55CGUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U") +set(GENERIC_WB55CGUX_MAXSIZE 524288) +set(GENERIC_WB55CGUX_MAXDATASIZE 196608) +set(GENERIC_WB55CGUX_MCU cortex-m4) +set(GENERIC_WB55CGUX_FPCONF "-") +add_library(GENERIC_WB55CGUX INTERFACE) +target_compile_options(GENERIC_WB55CGUX INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55CGUX_MCU} +) +target_compile_definitions(GENERIC_WB55CGUX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB55CGUX" + "BOARD_NAME=\"GENERIC_WB55CGUX\"" + "BOARD_ID=GENERIC_WB55CGUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB55CGUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB55CGUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB55CGUX INTERFACE + "LINKER:--default-script=${GENERIC_WB55CGUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55CGUX_MCU} +) +target_link_libraries(GENERIC_WB55CGUX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB55CGUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB55CGUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CGUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB55CGUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB55CGUX_serial_none INTERFACE) +target_compile_options(GENERIC_WB55CGUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB55CGUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB55CGUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB55CGUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB55CGUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB55CGUX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB55CGUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB55CGUX_usb_none INTERFACE) +target_compile_options(GENERIC_WB55CGUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CGUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB55CGUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55CGUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB55CGUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB55CGUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB55CGUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB55RCVX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB55RCVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB55R(C-E-G)V") +set(GENERIC_WB55RCVX_MAXSIZE 131072) +set(GENERIC_WB55RCVX_MAXDATASIZE 65536) +set(GENERIC_WB55RCVX_MCU cortex-m4) +set(GENERIC_WB55RCVX_FPCONF "-") +add_library(GENERIC_WB55RCVX INTERFACE) +target_compile_options(GENERIC_WB55RCVX INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55RCVX_MCU} +) +target_compile_definitions(GENERIC_WB55RCVX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB55RCVX" + "BOARD_NAME=\"GENERIC_WB55RCVX\"" + "BOARD_ID=GENERIC_WB55RCVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB55RCVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB55RCVX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB55RCVX INTERFACE + "LINKER:--default-script=${GENERIC_WB55RCVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55RCVX_MCU} +) +target_link_libraries(GENERIC_WB55RCVX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB55RCVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB55RCVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55RCVX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB55RCVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB55RCVX_serial_none INTERFACE) +target_compile_options(GENERIC_WB55RCVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB55RCVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB55RCVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB55RCVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB55RCVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB55RCVX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB55RCVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB55RCVX_usb_none INTERFACE) +target_compile_options(GENERIC_WB55RCVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55RCVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB55RCVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55RCVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB55RCVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB55RCVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB55RCVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB55REVX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB55REVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB55R(C-E-G)V") +set(GENERIC_WB55REVX_MAXSIZE 262144) +set(GENERIC_WB55REVX_MAXDATASIZE 196608) +set(GENERIC_WB55REVX_MCU cortex-m4) +set(GENERIC_WB55REVX_FPCONF "-") +add_library(GENERIC_WB55REVX INTERFACE) +target_compile_options(GENERIC_WB55REVX INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55REVX_MCU} +) +target_compile_definitions(GENERIC_WB55REVX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB55REVX" + "BOARD_NAME=\"GENERIC_WB55REVX\"" + "BOARD_ID=GENERIC_WB55REVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB55REVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB55REVX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB55REVX INTERFACE + "LINKER:--default-script=${GENERIC_WB55REVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55REVX_MCU} +) +target_link_libraries(GENERIC_WB55REVX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB55REVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB55REVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55REVX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB55REVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB55REVX_serial_none INTERFACE) +target_compile_options(GENERIC_WB55REVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB55REVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB55REVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB55REVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB55REVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB55REVX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB55REVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB55REVX_usb_none INTERFACE) +target_compile_options(GENERIC_WB55REVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55REVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB55REVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55REVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB55REVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB55REVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB55REVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB55RGVX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB55RGVX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB55R(C-E-G)V") +set(GENERIC_WB55RGVX_MAXSIZE 524288) +set(GENERIC_WB55RGVX_MAXDATASIZE 196608) +set(GENERIC_WB55RGVX_MCU cortex-m4) +set(GENERIC_WB55RGVX_FPCONF "-") +add_library(GENERIC_WB55RGVX INTERFACE) +target_compile_options(GENERIC_WB55RGVX INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55RGVX_MCU} +) +target_compile_definitions(GENERIC_WB55RGVX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB55RGVX" + "BOARD_NAME=\"GENERIC_WB55RGVX\"" + "BOARD_ID=GENERIC_WB55RGVX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB55RGVX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB55RGVX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB55RGVX INTERFACE + "LINKER:--default-script=${GENERIC_WB55RGVX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB55RGVX_MCU} +) +target_link_libraries(GENERIC_WB55RGVX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB55RGVX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB55RGVX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55RGVX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB55RGVX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB55RGVX_serial_none INTERFACE) +target_compile_options(GENERIC_WB55RGVX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB55RGVX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB55RGVX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB55RGVX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB55RGVX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB55RGVX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB55RGVX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB55RGVX_usb_none INTERFACE) +target_compile_options(GENERIC_WB55RGVX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55RGVX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB55RGVX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB55RGVX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB55RGVX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB55RGVX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB55RGVX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WB5MMGHX +# ----------------------------------------------------------------------------- + +set(GENERIC_WB5MMGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB5MMGH") +set(GENERIC_WB5MMGHX_MAXSIZE 827392) +set(GENERIC_WB5MMGHX_MAXDATASIZE 196608) +set(GENERIC_WB5MMGHX_MCU cortex-m4) +set(GENERIC_WB5MMGHX_FPCONF "-") +add_library(GENERIC_WB5MMGHX INTERFACE) +target_compile_options(GENERIC_WB5MMGHX INTERFACE + "SHELL:-DSTM32WB5Mxx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB5MMGHX_MCU} +) +target_compile_definitions(GENERIC_WB5MMGHX INTERFACE + "STM32WBxx" + "ARDUINO_GENERIC_WB5MMGHX" + "BOARD_NAME=\"GENERIC_WB5MMGHX\"" + "BOARD_ID=GENERIC_WB5MMGHX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WB5MMGHX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${GENERIC_WB5MMGHX_VARIANT_PATH} +) + +target_link_options(GENERIC_WB5MMGHX INTERFACE + "LINKER:--default-script=${GENERIC_WB5MMGHX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=827392" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_WB5MMGHX_MCU} +) +target_link_libraries(GENERIC_WB5MMGHX INTERFACE + arm_cortexM4lf_math +) + +add_library(GENERIC_WB5MMGHX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WB5MMGHX_serial_generic INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WB5MMGHX_serial_none INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_WB5MMGHX_usb_CDC INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_WB5MMGHX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_WB5MMGHX_usb_HID INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_WB5MMGHX_usb_none INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_WB5MMGHX_xusb_FS INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_WB5MMGHX_xusb_HS INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_WB5MMGHX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_WB5MMGHX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_WL54CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WL54CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WL54CCUX_MAXSIZE 262144) +set(GENERIC_WL54CCUX_MAXDATASIZE 65536) +set(GENERIC_WL54CCUX_MCU cortex-m4) +set(GENERIC_WL54CCUX_FPCONF "-") +add_library(GENERIC_WL54CCUX INTERFACE) +target_compile_options(GENERIC_WL54CCUX INTERFACE + "SHELL:-DSTM32WL54xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WL54CCUX_MCU} +) +target_compile_definitions(GENERIC_WL54CCUX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WL54CCUX" + "BOARD_NAME=\"GENERIC_WL54CCUX\"" + "BOARD_ID=GENERIC_WL54CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WL54CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WL54CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WL54CCUX INTERFACE + "LINKER:--default-script=${GENERIC_WL54CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WL54CCUX_MCU} +) +target_link_libraries(GENERIC_WL54CCUX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WL54CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WL54CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WL54CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WL54CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WL54CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_WL54CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WL54JCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_WL54JCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WL54JCIX_MAXSIZE 262144) +set(GENERIC_WL54JCIX_MAXDATASIZE 65536) +set(GENERIC_WL54JCIX_MCU cortex-m4) +set(GENERIC_WL54JCIX_FPCONF "-") +add_library(GENERIC_WL54JCIX INTERFACE) +target_compile_options(GENERIC_WL54JCIX INTERFACE + "SHELL:-DSTM32WL54xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WL54JCIX_MCU} +) +target_compile_definitions(GENERIC_WL54JCIX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WL54JCIX" + "BOARD_NAME=\"GENERIC_WL54JCIX\"" + "BOARD_ID=GENERIC_WL54JCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WL54JCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WL54JCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_WL54JCIX INTERFACE + "LINKER:--default-script=${GENERIC_WL54JCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WL54JCIX_MCU} +) +target_link_libraries(GENERIC_WL54JCIX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WL54JCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WL54JCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WL54JCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_WL54JCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WL54JCIX_serial_none INTERFACE) +target_compile_options(GENERIC_WL54JCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WL55CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WL55CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WL55CCUX_MAXSIZE 262144) +set(GENERIC_WL55CCUX_MAXDATASIZE 65536) +set(GENERIC_WL55CCUX_MCU cortex-m4) +set(GENERIC_WL55CCUX_FPCONF "-") +add_library(GENERIC_WL55CCUX INTERFACE) +target_compile_options(GENERIC_WL55CCUX INTERFACE + "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WL55CCUX_MCU} +) +target_compile_definitions(GENERIC_WL55CCUX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WL55CCUX" + "BOARD_NAME=\"GENERIC_WL55CCUX\"" + "BOARD_ID=GENERIC_WL55CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WL55CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WL55CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WL55CCUX INTERFACE + "LINKER:--default-script=${GENERIC_WL55CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WL55CCUX_MCU} +) +target_link_libraries(GENERIC_WL55CCUX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WL55CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WL55CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WL55CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WL55CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WL55CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_WL55CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WL55JCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_WL55JCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WL55JCIX_MAXSIZE 262144) +set(GENERIC_WL55JCIX_MAXDATASIZE 65536) +set(GENERIC_WL55JCIX_MCU cortex-m4) +set(GENERIC_WL55JCIX_FPCONF "-") +add_library(GENERIC_WL55JCIX INTERFACE) +target_compile_options(GENERIC_WL55JCIX INTERFACE + "SHELL:-DSTM32WL55xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WL55JCIX_MCU} +) +target_compile_definitions(GENERIC_WL55JCIX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WL55JCIX" + "BOARD_NAME=\"GENERIC_WL55JCIX\"" + "BOARD_ID=GENERIC_WL55JCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WL55JCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WL55JCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_WL55JCIX INTERFACE + "LINKER:--default-script=${GENERIC_WL55JCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WL55JCIX_MCU} +) +target_link_libraries(GENERIC_WL55JCIX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WL55JCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WL55JCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WL55JCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_WL55JCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WL55JCIX_serial_none INTERFACE) +target_compile_options(GENERIC_WL55JCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE4C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE4C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WLE4C8UX_MAXSIZE 65536) +set(GENERIC_WLE4C8UX_MAXDATASIZE 20480) +set(GENERIC_WLE4C8UX_MCU cortex-m4) +set(GENERIC_WLE4C8UX_FPCONF "-") +add_library(GENERIC_WLE4C8UX INTERFACE) +target_compile_options(GENERIC_WLE4C8UX INTERFACE + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE4C8UX_MCU} +) +target_compile_definitions(GENERIC_WLE4C8UX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE4C8UX" + "BOARD_NAME=\"GENERIC_WLE4C8UX\"" + "BOARD_ID=GENERIC_WLE4C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE4C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE4C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE4C8UX INTERFACE + "LINKER:--default-script=${GENERIC_WLE4C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_WLE4C8UX_MCU} +) +target_link_libraries(GENERIC_WLE4C8UX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE4C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE4C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE4C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE4C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE4C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE4C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE4CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE4CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WLE4CBUX_MAXSIZE 131072) +set(GENERIC_WLE4CBUX_MAXDATASIZE 49152) +set(GENERIC_WLE4CBUX_MCU cortex-m4) +set(GENERIC_WLE4CBUX_FPCONF "-") +add_library(GENERIC_WLE4CBUX INTERFACE) +target_compile_options(GENERIC_WLE4CBUX INTERFACE + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE4CBUX_MCU} +) +target_compile_definitions(GENERIC_WLE4CBUX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE4CBUX" + "BOARD_NAME=\"GENERIC_WLE4CBUX\"" + "BOARD_ID=GENERIC_WLE4CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE4CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE4CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE4CBUX INTERFACE + "LINKER:--default-script=${GENERIC_WLE4CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_WLE4CBUX_MCU} +) +target_link_libraries(GENERIC_WLE4CBUX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE4CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE4CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE4CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE4CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE4CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE4CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE4CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE4CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WLE4CCUX_MAXSIZE 262144) +set(GENERIC_WLE4CCUX_MAXDATASIZE 65536) +set(GENERIC_WLE4CCUX_MCU cortex-m4) +set(GENERIC_WLE4CCUX_FPCONF "-") +add_library(GENERIC_WLE4CCUX INTERFACE) +target_compile_options(GENERIC_WLE4CCUX INTERFACE + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE4CCUX_MCU} +) +target_compile_definitions(GENERIC_WLE4CCUX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE4CCUX" + "BOARD_NAME=\"GENERIC_WLE4CCUX\"" + "BOARD_ID=GENERIC_WLE4CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE4CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE4CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE4CCUX INTERFACE + "LINKER:--default-script=${GENERIC_WLE4CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WLE4CCUX_MCU} +) +target_link_libraries(GENERIC_WLE4CCUX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE4CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE4CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE4CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE4CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE4CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE4CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE4J8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE4J8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WLE4J8IX_MAXSIZE 65536) +set(GENERIC_WLE4J8IX_MAXDATASIZE 20480) +set(GENERIC_WLE4J8IX_MCU cortex-m4) +set(GENERIC_WLE4J8IX_FPCONF "-") +add_library(GENERIC_WLE4J8IX INTERFACE) +target_compile_options(GENERIC_WLE4J8IX INTERFACE + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE4J8IX_MCU} +) +target_compile_definitions(GENERIC_WLE4J8IX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE4J8IX" + "BOARD_NAME=\"GENERIC_WLE4J8IX\"" + "BOARD_ID=GENERIC_WLE4J8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE4J8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE4J8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE4J8IX INTERFACE + "LINKER:--default-script=${GENERIC_WLE4J8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_WLE4J8IX_MCU} +) +target_link_libraries(GENERIC_WLE4J8IX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE4J8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE4J8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE4J8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE4J8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE4J8IX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE4J8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE4JBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE4JBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WLE4JBIX_MAXSIZE 131072) +set(GENERIC_WLE4JBIX_MAXDATASIZE 49152) +set(GENERIC_WLE4JBIX_MCU cortex-m4) +set(GENERIC_WLE4JBIX_FPCONF "-") +add_library(GENERIC_WLE4JBIX INTERFACE) +target_compile_options(GENERIC_WLE4JBIX INTERFACE + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE4JBIX_MCU} +) +target_compile_definitions(GENERIC_WLE4JBIX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE4JBIX" + "BOARD_NAME=\"GENERIC_WLE4JBIX\"" + "BOARD_ID=GENERIC_WLE4JBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE4JBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE4JBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE4JBIX INTERFACE + "LINKER:--default-script=${GENERIC_WLE4JBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_WLE4JBIX_MCU} +) +target_link_libraries(GENERIC_WLE4JBIX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE4JBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE4JBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE4JBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE4JBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE4JBIX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE4JBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE4JCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE4JCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WLE4JCIX_MAXSIZE 262144) +set(GENERIC_WLE4JCIX_MAXDATASIZE 65536) +set(GENERIC_WLE4JCIX_MCU cortex-m4) +set(GENERIC_WLE4JCIX_FPCONF "-") +add_library(GENERIC_WLE4JCIX INTERFACE) +target_compile_options(GENERIC_WLE4JCIX INTERFACE + "SHELL:-DSTM32WLE4xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE4JCIX_MCU} +) +target_compile_definitions(GENERIC_WLE4JCIX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE4JCIX" + "BOARD_NAME=\"GENERIC_WLE4JCIX\"" + "BOARD_ID=GENERIC_WLE4JCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE4JCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE4JCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE4JCIX INTERFACE + "LINKER:--default-script=${GENERIC_WLE4JCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WLE4JCIX_MCU} +) +target_link_libraries(GENERIC_WLE4JCIX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE4JCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE4JCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE4JCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE4JCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE4JCIX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE4JCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE5C8UX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE5C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WLE5C8UX_MAXSIZE 65536) +set(GENERIC_WLE5C8UX_MAXDATASIZE 20480) +set(GENERIC_WLE5C8UX_MCU cortex-m4) +set(GENERIC_WLE5C8UX_FPCONF "-") +add_library(GENERIC_WLE5C8UX INTERFACE) +target_compile_options(GENERIC_WLE5C8UX INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE5C8UX_MCU} +) +target_compile_definitions(GENERIC_WLE5C8UX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE5C8UX" + "BOARD_NAME=\"GENERIC_WLE5C8UX\"" + "BOARD_ID=GENERIC_WLE5C8UX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE5C8UX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE5C8UX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE5C8UX INTERFACE + "LINKER:--default-script=${GENERIC_WLE5C8UX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_WLE5C8UX_MCU} +) +target_link_libraries(GENERIC_WLE5C8UX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE5C8UX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE5C8UX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE5C8UX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE5C8UX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE5C8UX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE5C8UX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE5CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE5CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WLE5CBUX_MAXSIZE 131072) +set(GENERIC_WLE5CBUX_MAXDATASIZE 49152) +set(GENERIC_WLE5CBUX_MCU cortex-m4) +set(GENERIC_WLE5CBUX_FPCONF "-") +add_library(GENERIC_WLE5CBUX INTERFACE) +target_compile_options(GENERIC_WLE5CBUX INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE5CBUX_MCU} +) +target_compile_definitions(GENERIC_WLE5CBUX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE5CBUX" + "BOARD_NAME=\"GENERIC_WLE5CBUX\"" + "BOARD_ID=GENERIC_WLE5CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE5CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE5CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE5CBUX INTERFACE + "LINKER:--default-script=${GENERIC_WLE5CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_WLE5CBUX_MCU} +) +target_link_libraries(GENERIC_WLE5CBUX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE5CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE5CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE5CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE5CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE5CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE5CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE5CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE5CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(GENERIC_WLE5CCUX_MAXSIZE 262144) +set(GENERIC_WLE5CCUX_MAXDATASIZE 65536) +set(GENERIC_WLE5CCUX_MCU cortex-m4) +set(GENERIC_WLE5CCUX_FPCONF "-") +add_library(GENERIC_WLE5CCUX INTERFACE) +target_compile_options(GENERIC_WLE5CCUX INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE5CCUX_MCU} +) +target_compile_definitions(GENERIC_WLE5CCUX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE5CCUX" + "BOARD_NAME=\"GENERIC_WLE5CCUX\"" + "BOARD_ID=GENERIC_WLE5CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE5CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE5CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE5CCUX INTERFACE + "LINKER:--default-script=${GENERIC_WLE5CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WLE5CCUX_MCU} +) +target_link_libraries(GENERIC_WLE5CCUX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE5CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE5CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE5CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE5CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE5CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE5CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE5J8IX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE5J8IX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WLE5J8IX_MAXSIZE 65536) +set(GENERIC_WLE5J8IX_MAXDATASIZE 20480) +set(GENERIC_WLE5J8IX_MCU cortex-m4) +set(GENERIC_WLE5J8IX_FPCONF "-") +add_library(GENERIC_WLE5J8IX INTERFACE) +target_compile_options(GENERIC_WLE5J8IX INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE5J8IX_MCU} +) +target_compile_definitions(GENERIC_WLE5J8IX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE5J8IX" + "BOARD_NAME=\"GENERIC_WLE5J8IX\"" + "BOARD_ID=GENERIC_WLE5J8IX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE5J8IX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE5J8IX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE5J8IX INTERFACE + "LINKER:--default-script=${GENERIC_WLE5J8IX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${GENERIC_WLE5J8IX_MCU} +) +target_link_libraries(GENERIC_WLE5J8IX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE5J8IX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE5J8IX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE5J8IX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE5J8IX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE5J8IX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE5J8IX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE5JBIX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE5JBIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WLE5JBIX_MAXSIZE 131072) +set(GENERIC_WLE5JBIX_MAXDATASIZE 49152) +set(GENERIC_WLE5JBIX_MCU cortex-m4) +set(GENERIC_WLE5JBIX_FPCONF "-") +add_library(GENERIC_WLE5JBIX INTERFACE) +target_compile_options(GENERIC_WLE5JBIX INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE5JBIX_MCU} +) +target_compile_definitions(GENERIC_WLE5JBIX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE5JBIX" + "BOARD_NAME=\"GENERIC_WLE5JBIX\"" + "BOARD_ID=GENERIC_WLE5JBIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE5JBIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE5JBIX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE5JBIX INTERFACE + "LINKER:--default-script=${GENERIC_WLE5JBIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${GENERIC_WLE5JBIX_MCU} +) +target_link_libraries(GENERIC_WLE5JBIX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE5JBIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE5JBIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE5JBIX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE5JBIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE5JBIX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE5JBIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# GENERIC_WLE5JCIX +# ----------------------------------------------------------------------------- + +set(GENERIC_WLE5JCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(GENERIC_WLE5JCIX_MAXSIZE 262144) +set(GENERIC_WLE5JCIX_MAXDATASIZE 65536) +set(GENERIC_WLE5JCIX_MCU cortex-m4) +set(GENERIC_WLE5JCIX_FPCONF "-") +add_library(GENERIC_WLE5JCIX INTERFACE) +target_compile_options(GENERIC_WLE5JCIX INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${GENERIC_WLE5JCIX_MCU} +) +target_compile_definitions(GENERIC_WLE5JCIX INTERFACE + "STM32WLxx" + "ARDUINO_GENERIC_WLE5JCIX" + "BOARD_NAME=\"GENERIC_WLE5JCIX\"" + "BOARD_ID=GENERIC_WLE5JCIX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_WLE5JCIX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${GENERIC_WLE5JCIX_VARIANT_PATH} +) + +target_link_options(GENERIC_WLE5JCIX INTERFACE + "LINKER:--default-script=${GENERIC_WLE5JCIX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${GENERIC_WLE5JCIX_MCU} +) +target_link_libraries(GENERIC_WLE5JCIX INTERFACE + arm_cortexM4l_math +) + +add_library(GENERIC_WLE5JCIX_serial_disabled INTERFACE) +target_compile_options(GENERIC_WLE5JCIX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_WLE5JCIX_serial_generic INTERFACE) +target_compile_options(GENERIC_WLE5JCIX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_WLE5JCIX_serial_none INTERFACE) +target_compile_options(GENERIC_WLE5JCIX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# HY_TINYSTM103TB +# ----------------------------------------------------------------------------- + +set(HY_TINYSTM103TB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(HY_TINYSTM103TB_MAXSIZE 131072) +set(HY_TINYSTM103TB_MAXDATASIZE 20480) +set(HY_TINYSTM103TB_MCU cortex-m3) +set(HY_TINYSTM103TB_FPCONF "-") +add_library(HY_TINYSTM103TB INTERFACE) +target_compile_options(HY_TINYSTM103TB INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_MCU} +) +target_compile_definitions(HY_TINYSTM103TB INTERFACE + "STM32F1xx" + "ARDUINO_HY_TINYSTM103TB" + "BOARD_NAME=\"HY_TINYSTM103TB\"" + "BOARD_ID=HY_TINYSTM103TB" + "VARIANT_H=\"variant_HY_TINYSTM103TB.h\"" +) +target_include_directories(HY_TINYSTM103TB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${HY_TINYSTM103TB_VARIANT_PATH} +) + +target_link_options(HY_TINYSTM103TB INTERFACE + "LINKER:--default-script=${HY_TINYSTM103TB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_MCU} +) +target_link_libraries(HY_TINYSTM103TB INTERFACE + arm_cortexM3l_math +) + +add_library(HY_TINYSTM103TB_serial_disabled INTERFACE) +target_compile_options(HY_TINYSTM103TB_serial_disabled INTERFACE + "SHELL:" +) +add_library(HY_TINYSTM103TB_serial_generic INTERFACE) +target_compile_options(HY_TINYSTM103TB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(HY_TINYSTM103TB_serial_none INTERFACE) +target_compile_options(HY_TINYSTM103TB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(HY_TINYSTM103TB_usb_CDC INTERFACE) +target_compile_options(HY_TINYSTM103TB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(HY_TINYSTM103TB_usb_CDCgen INTERFACE) +target_compile_options(HY_TINYSTM103TB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(HY_TINYSTM103TB_usb_HID INTERFACE) +target_compile_options(HY_TINYSTM103TB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(HY_TINYSTM103TB_usb_none INTERFACE) +target_compile_options(HY_TINYSTM103TB_usb_none INTERFACE + "SHELL:" +) +add_library(HY_TINYSTM103TB_xusb_FS INTERFACE) +target_compile_options(HY_TINYSTM103TB_xusb_FS INTERFACE + "SHELL:" +) +add_library(HY_TINYSTM103TB_xusb_HS INTERFACE) +target_compile_options(HY_TINYSTM103TB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(HY_TINYSTM103TB_xusb_HSFS INTERFACE) +target_compile_options(HY_TINYSTM103TB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# HY_TINYSTM103TB_dfu2 +# ----------------------------------------------------------------------------- + +set(HY_TINYSTM103TB_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(HY_TINYSTM103TB_dfu2_MAXSIZE 131072) +set(HY_TINYSTM103TB_dfu2_MAXDATASIZE 20480) +set(HY_TINYSTM103TB_dfu2_MCU cortex-m3) +set(HY_TINYSTM103TB_dfu2_FPCONF "-") +add_library(HY_TINYSTM103TB_dfu2 INTERFACE) +target_compile_options(HY_TINYSTM103TB_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_dfu2_MCU} +) +target_compile_definitions(HY_TINYSTM103TB_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_HY_TINYSTM103TB" + "BOARD_NAME=\"HY_TINYSTM103TB\"" + "BOARD_ID=HY_TINYSTM103TB" + "VARIANT_H=\"variant_HY_TINYSTM103TB.h\"" +) +target_include_directories(HY_TINYSTM103TB_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${HY_TINYSTM103TB_dfu2_VARIANT_PATH} +) + +target_link_options(HY_TINYSTM103TB_dfu2 INTERFACE + "LINKER:--default-script=${HY_TINYSTM103TB_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_dfu2_MCU} +) +target_link_libraries(HY_TINYSTM103TB_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# HY_TINYSTM103TB_dfuo +# ----------------------------------------------------------------------------- + +set(HY_TINYSTM103TB_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(HY_TINYSTM103TB_dfuo_MAXSIZE 131072) +set(HY_TINYSTM103TB_dfuo_MAXDATASIZE 20480) +set(HY_TINYSTM103TB_dfuo_MCU cortex-m3) +set(HY_TINYSTM103TB_dfuo_FPCONF "-") +add_library(HY_TINYSTM103TB_dfuo INTERFACE) +target_compile_options(HY_TINYSTM103TB_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_dfuo_MCU} +) +target_compile_definitions(HY_TINYSTM103TB_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_HY_TINYSTM103TB" + "BOARD_NAME=\"HY_TINYSTM103TB\"" + "BOARD_ID=HY_TINYSTM103TB" + "VARIANT_H=\"variant_HY_TINYSTM103TB.h\"" +) +target_include_directories(HY_TINYSTM103TB_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${HY_TINYSTM103TB_dfuo_VARIANT_PATH} +) + +target_link_options(HY_TINYSTM103TB_dfuo INTERFACE + "LINKER:--default-script=${HY_TINYSTM103TB_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_dfuo_MCU} +) +target_link_libraries(HY_TINYSTM103TB_dfuo INTERFACE + arm_cortexM3l_math +) + + +# HY_TINYSTM103TB_hid +# ----------------------------------------------------------------------------- + +set(HY_TINYSTM103TB_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103T(8-B)U") +set(HY_TINYSTM103TB_hid_MAXSIZE 131072) +set(HY_TINYSTM103TB_hid_MAXDATASIZE 20480) +set(HY_TINYSTM103TB_hid_MCU cortex-m3) +set(HY_TINYSTM103TB_hid_FPCONF "-") +add_library(HY_TINYSTM103TB_hid INTERFACE) +target_compile_options(HY_TINYSTM103TB_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_hid_MCU} +) +target_compile_definitions(HY_TINYSTM103TB_hid INTERFACE + "STM32F1xx" + "ARDUINO_HY_TINYSTM103TB" + "BOARD_NAME=\"HY_TINYSTM103TB\"" + "BOARD_ID=HY_TINYSTM103TB" + "VARIANT_H=\"variant_HY_TINYSTM103TB.h\"" +) +target_include_directories(HY_TINYSTM103TB_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${HY_TINYSTM103TB_hid_VARIANT_PATH} +) + +target_link_options(HY_TINYSTM103TB_hid INTERFACE + "LINKER:--default-script=${HY_TINYSTM103TB_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${HY_TINYSTM103TB_hid_MCU} +) +target_link_libraries(HY_TINYSTM103TB_hid INTERFACE + arm_cortexM3l_math +) + + +# LEAFONY_AP03 +# ----------------------------------------------------------------------------- + +set(LEAFONY_AP03_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(LEAFONY_AP03_MAXSIZE 524288) +set(LEAFONY_AP03_MAXDATASIZE 163840) +set(LEAFONY_AP03_MCU cortex-m4) +set(LEAFONY_AP03_FPCONF "-") +add_library(LEAFONY_AP03 INTERFACE) +target_compile_options(LEAFONY_AP03 INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${LEAFONY_AP03_MCU} +) +target_compile_definitions(LEAFONY_AP03 INTERFACE + "STM32L4xx" + "ARDUINO_LEAFONY_AP03" + "BOARD_NAME=\"LEAFONY_AP03\"" + "BOARD_ID=LEAFONY_AP03" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(LEAFONY_AP03 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${LEAFONY_AP03_VARIANT_PATH} +) + +target_link_options(LEAFONY_AP03 INTERFACE + "LINKER:--default-script=${LEAFONY_AP03_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${LEAFONY_AP03_MCU} +) +target_link_libraries(LEAFONY_AP03 INTERFACE + arm_cortexM4lf_math +) + +add_library(LEAFONY_AP03_serial_disabled INTERFACE) +target_compile_options(LEAFONY_AP03_serial_disabled INTERFACE + "SHELL:" +) +add_library(LEAFONY_AP03_serial_generic INTERFACE) +target_compile_options(LEAFONY_AP03_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(LEAFONY_AP03_serial_none INTERFACE) +target_compile_options(LEAFONY_AP03_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(LEAFONY_AP03_usb_CDC INTERFACE) +target_compile_options(LEAFONY_AP03_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(LEAFONY_AP03_usb_CDCgen INTERFACE) +target_compile_options(LEAFONY_AP03_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(LEAFONY_AP03_usb_HID INTERFACE) +target_compile_options(LEAFONY_AP03_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(LEAFONY_AP03_usb_none INTERFACE) +target_compile_options(LEAFONY_AP03_usb_none INTERFACE + "SHELL:" +) +add_library(LEAFONY_AP03_xusb_FS INTERFACE) +target_compile_options(LEAFONY_AP03_xusb_FS INTERFACE + "SHELL:" +) +add_library(LEAFONY_AP03_xusb_HS INTERFACE) +target_compile_options(LEAFONY_AP03_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(LEAFONY_AP03_xusb_HSFS INTERFACE) +target_compile_options(LEAFONY_AP03_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# MALYANM200_F070CB +# ----------------------------------------------------------------------------- + +set(MALYANM200_F070CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F070CBT") +set(MALYANM200_F070CB_MAXSIZE 122880) +set(MALYANM200_F070CB_MAXDATASIZE 15168) +set(MALYANM200_F070CB_MCU cortex-m0) +set(MALYANM200_F070CB_FPCONF "-") +add_library(MALYANM200_F070CB INTERFACE) +target_compile_options(MALYANM200_F070CB INTERFACE + "SHELL:-DSTM32F070xB -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:-DCUSTOM_STARTUP_FILE" + "SHELL: " + -mcpu=${MALYANM200_F070CB_MCU} +) +target_compile_definitions(MALYANM200_F070CB INTERFACE + "STM32F0xx" + "ARDUINO_MALYANM200_F070CB" + "BOARD_NAME=\"MALYANM200_F070CB\"" + "BOARD_ID=MALYANM200_F070CB" + "VARIANT_H=\"variant_MALYANMx00_F070CB.h\"" +) +target_include_directories(MALYANM200_F070CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${MALYANM200_F070CB_VARIANT_PATH} +) + +target_link_options(MALYANM200_F070CB INTERFACE + "LINKER:--default-script=${MALYANM200_F070CB_VARIANT_PATH}/MALYANMx00_F070CB.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=122880" + "LINKER:--defsym=LD_MAX_DATA_SIZE=15168" + "SHELL: " + -mcpu=${MALYANM200_F070CB_MCU} +) +target_link_libraries(MALYANM200_F070CB INTERFACE + arm_cortexM0l_math +) + +add_library(MALYANM200_F070CB_serial_disabled INTERFACE) +target_compile_options(MALYANM200_F070CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(MALYANM200_F070CB_serial_generic INTERFACE) +target_compile_options(MALYANM200_F070CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(MALYANM200_F070CB_serial_none INTERFACE) +target_compile_options(MALYANM200_F070CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(MALYANM200_F070CB_usb_CDC INTERFACE) +target_compile_options(MALYANM200_F070CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(MALYANM200_F070CB_usb_CDCgen INTERFACE) +target_compile_options(MALYANM200_F070CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(MALYANM200_F070CB_usb_none INTERFACE) +target_compile_options(MALYANM200_F070CB_usb_none INTERFACE + "SHELL:" +) +add_library(MALYANM200_F070CB_xusb_FS INTERFACE) +target_compile_options(MALYANM200_F070CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(MALYANM200_F070CB_xusb_HS INTERFACE) +target_compile_options(MALYANM200_F070CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(MALYANM200_F070CB_xusb_HSFS INTERFACE) +target_compile_options(MALYANM200_F070CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# MALYANM200_F103CB +# ----------------------------------------------------------------------------- + +set(MALYANM200_F103CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(MALYANM200_F103CB_MAXSIZE 122880) +set(MALYANM200_F103CB_MAXDATASIZE 20480) +set(MALYANM200_F103CB_MCU cortex-m3) +set(MALYANM200_F103CB_FPCONF "-") +add_library(MALYANM200_F103CB INTERFACE) +target_compile_options(MALYANM200_F103CB INTERFACE + "SHELL:-DSTM32F103xB -DVECT_TAB_OFFSET=0x2000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:-DCUSTOM_STARTUP_FILE" + "SHELL: " + -mcpu=${MALYANM200_F103CB_MCU} +) +target_compile_definitions(MALYANM200_F103CB INTERFACE + "STM32F1xx" + "ARDUINO_MALYANM200_F103CB" + "BOARD_NAME=\"MALYANM200_F103CB\"" + "BOARD_ID=MALYANM200_F103CB" + "VARIANT_H=\"variant_MALYANM200_F103CB.h\"" +) +target_include_directories(MALYANM200_F103CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${MALYANM200_F103CB_VARIANT_PATH} +) + +target_link_options(MALYANM200_F103CB INTERFACE + "LINKER:--default-script=${MALYANM200_F103CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=122880" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${MALYANM200_F103CB_MCU} +) +target_link_libraries(MALYANM200_F103CB INTERFACE + arm_cortexM3l_math +) + +add_library(MALYANM200_F103CB_serial_disabled INTERFACE) +target_compile_options(MALYANM200_F103CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(MALYANM200_F103CB_serial_generic INTERFACE) +target_compile_options(MALYANM200_F103CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(MALYANM200_F103CB_serial_none INTERFACE) +target_compile_options(MALYANM200_F103CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(MALYANM200_F103CB_usb_CDC INTERFACE) +target_compile_options(MALYANM200_F103CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(MALYANM200_F103CB_usb_CDCgen INTERFACE) +target_compile_options(MALYANM200_F103CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(MALYANM200_F103CB_usb_none INTERFACE) +target_compile_options(MALYANM200_F103CB_usb_none INTERFACE + "SHELL:" +) +add_library(MALYANM200_F103CB_xusb_FS INTERFACE) +target_compile_options(MALYANM200_F103CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(MALYANM200_F103CB_xusb_HS INTERFACE) +target_compile_options(MALYANM200_F103CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(MALYANM200_F103CB_xusb_HSFS INTERFACE) +target_compile_options(MALYANM200_F103CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# MALYANM300_F070CB +# ----------------------------------------------------------------------------- + +set(MALYANM300_F070CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F070CBT") +set(MALYANM300_F070CB_MAXSIZE 122880) +set(MALYANM300_F070CB_MAXDATASIZE 15168) +set(MALYANM300_F070CB_MCU cortex-m0) +set(MALYANM300_F070CB_FPCONF "-") +add_library(MALYANM300_F070CB INTERFACE) +target_compile_options(MALYANM300_F070CB INTERFACE + "SHELL:-DSTM32F070xB -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:-DCUSTOM_STARTUP_FILE" + "SHELL: " + -mcpu=${MALYANM300_F070CB_MCU} +) +target_compile_definitions(MALYANM300_F070CB INTERFACE + "STM32F0xx" + "ARDUINO_MALYANM300_F070CB" + "BOARD_NAME=\"MALYANM300_F070CB\"" + "BOARD_ID=MALYANM300_F070CB" + "VARIANT_H=\"variant_MALYANMx00_F070CB.h\"" +) +target_include_directories(MALYANM300_F070CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${MALYANM300_F070CB_VARIANT_PATH} +) + +target_link_options(MALYANM300_F070CB INTERFACE + "LINKER:--default-script=${MALYANM300_F070CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=122880" + "LINKER:--defsym=LD_MAX_DATA_SIZE=15168" + "SHELL: " + -mcpu=${MALYANM300_F070CB_MCU} +) +target_link_libraries(MALYANM300_F070CB INTERFACE + arm_cortexM0l_math +) + +add_library(MALYANM300_F070CB_serial_disabled INTERFACE) +target_compile_options(MALYANM300_F070CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(MALYANM300_F070CB_serial_generic INTERFACE) +target_compile_options(MALYANM300_F070CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(MALYANM300_F070CB_serial_none INTERFACE) +target_compile_options(MALYANM300_F070CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(MALYANM300_F070CB_usb_CDC INTERFACE) +target_compile_options(MALYANM300_F070CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(MALYANM300_F070CB_usb_CDCgen INTERFACE) +target_compile_options(MALYANM300_F070CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(MALYANM300_F070CB_usb_none INTERFACE) +target_compile_options(MALYANM300_F070CB_usb_none INTERFACE + "SHELL:" +) +add_library(MALYANM300_F070CB_xusb_FS INTERFACE) +target_compile_options(MALYANM300_F070CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(MALYANM300_F070CB_xusb_HS INTERFACE) +target_compile_options(MALYANM300_F070CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(MALYANM300_F070CB_xusb_HSFS INTERFACE) +target_compile_options(MALYANM300_F070CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# MAPLEMINI_F103CB +# ----------------------------------------------------------------------------- + +set(MAPLEMINI_F103CB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(MAPLEMINI_F103CB_MAXSIZE 131072) +set(MAPLEMINI_F103CB_MAXDATASIZE 20480) +set(MAPLEMINI_F103CB_MCU cortex-m3) +set(MAPLEMINI_F103CB_FPCONF "-") +add_library(MAPLEMINI_F103CB INTERFACE) +target_compile_options(MAPLEMINI_F103CB INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_MCU} +) +target_compile_definitions(MAPLEMINI_F103CB INTERFACE + "STM32F1xx" + "ARDUINO_MAPLEMINI_F103CB" + "BOARD_NAME=\"MAPLEMINI_F103CB\"" + "BOARD_ID=MAPLEMINI_F103CB" + "VARIANT_H=\"variant_MAPLEMINI_F103CB.h\"" +) +target_include_directories(MAPLEMINI_F103CB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${MAPLEMINI_F103CB_VARIANT_PATH} +) + +target_link_options(MAPLEMINI_F103CB INTERFACE + "LINKER:--default-script=${MAPLEMINI_F103CB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_MCU} +) +target_link_libraries(MAPLEMINI_F103CB INTERFACE + arm_cortexM3l_math +) + +add_library(MAPLEMINI_F103CB_serial_disabled INTERFACE) +target_compile_options(MAPLEMINI_F103CB_serial_disabled INTERFACE + "SHELL:" +) +add_library(MAPLEMINI_F103CB_serial_generic INTERFACE) +target_compile_options(MAPLEMINI_F103CB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(MAPLEMINI_F103CB_serial_none INTERFACE) +target_compile_options(MAPLEMINI_F103CB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(MAPLEMINI_F103CB_usb_CDC INTERFACE) +target_compile_options(MAPLEMINI_F103CB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(MAPLEMINI_F103CB_usb_CDCgen INTERFACE) +target_compile_options(MAPLEMINI_F103CB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(MAPLEMINI_F103CB_usb_HID INTERFACE) +target_compile_options(MAPLEMINI_F103CB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(MAPLEMINI_F103CB_usb_none INTERFACE) +target_compile_options(MAPLEMINI_F103CB_usb_none INTERFACE + "SHELL:" +) +add_library(MAPLEMINI_F103CB_xusb_FS INTERFACE) +target_compile_options(MAPLEMINI_F103CB_xusb_FS INTERFACE + "SHELL:" +) +add_library(MAPLEMINI_F103CB_xusb_HS INTERFACE) +target_compile_options(MAPLEMINI_F103CB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(MAPLEMINI_F103CB_xusb_HSFS INTERFACE) +target_compile_options(MAPLEMINI_F103CB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# MAPLEMINI_F103CB_dfu2 +# ----------------------------------------------------------------------------- + +set(MAPLEMINI_F103CB_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(MAPLEMINI_F103CB_dfu2_MAXSIZE 131072) +set(MAPLEMINI_F103CB_dfu2_MAXDATASIZE 20480) +set(MAPLEMINI_F103CB_dfu2_MCU cortex-m3) +set(MAPLEMINI_F103CB_dfu2_FPCONF "-") +add_library(MAPLEMINI_F103CB_dfu2 INTERFACE) +target_compile_options(MAPLEMINI_F103CB_dfu2 INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_dfu2_MCU} +) +target_compile_definitions(MAPLEMINI_F103CB_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_MAPLEMINI_F103CB" + "BOARD_NAME=\"MAPLEMINI_F103CB\"" + "BOARD_ID=MAPLEMINI_F103CB" + "VARIANT_H=\"variant_MAPLEMINI_F103CB.h\"" +) +target_include_directories(MAPLEMINI_F103CB_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${MAPLEMINI_F103CB_dfu2_VARIANT_PATH} +) + +target_link_options(MAPLEMINI_F103CB_dfu2 INTERFACE + "LINKER:--default-script=${MAPLEMINI_F103CB_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_dfu2_MCU} +) +target_link_libraries(MAPLEMINI_F103CB_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# MAPLEMINI_F103CB_dfuo +# ----------------------------------------------------------------------------- + +set(MAPLEMINI_F103CB_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(MAPLEMINI_F103CB_dfuo_MAXSIZE 131072) +set(MAPLEMINI_F103CB_dfuo_MAXDATASIZE 20480) +set(MAPLEMINI_F103CB_dfuo_MCU cortex-m3) +set(MAPLEMINI_F103CB_dfuo_FPCONF "-") +add_library(MAPLEMINI_F103CB_dfuo INTERFACE) +target_compile_options(MAPLEMINI_F103CB_dfuo INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_dfuo_MCU} +) +target_compile_definitions(MAPLEMINI_F103CB_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_MAPLEMINI_F103CB" + "BOARD_NAME=\"MAPLEMINI_F103CB\"" + "BOARD_ID=MAPLEMINI_F103CB" + "VARIANT_H=\"variant_MAPLEMINI_F103CB.h\"" +) +target_include_directories(MAPLEMINI_F103CB_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${MAPLEMINI_F103CB_dfuo_VARIANT_PATH} +) + +target_link_options(MAPLEMINI_F103CB_dfuo INTERFACE + "LINKER:--default-script=${MAPLEMINI_F103CB_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_dfuo_MCU} +) +target_link_libraries(MAPLEMINI_F103CB_dfuo INTERFACE + arm_cortexM3l_math +) + + +# MAPLEMINI_F103CB_hid +# ----------------------------------------------------------------------------- + +set(MAPLEMINI_F103CB_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103C8T_F103CB(T-U)") +set(MAPLEMINI_F103CB_hid_MAXSIZE 131072) +set(MAPLEMINI_F103CB_hid_MAXDATASIZE 20480) +set(MAPLEMINI_F103CB_hid_MCU cortex-m3) +set(MAPLEMINI_F103CB_hid_FPCONF "-") +add_library(MAPLEMINI_F103CB_hid INTERFACE) +target_compile_options(MAPLEMINI_F103CB_hid INTERFACE + "SHELL:-DSTM32F103xB -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_hid_MCU} +) +target_compile_definitions(MAPLEMINI_F103CB_hid INTERFACE + "STM32F1xx" + "ARDUINO_MAPLEMINI_F103CB" + "BOARD_NAME=\"MAPLEMINI_F103CB\"" + "BOARD_ID=MAPLEMINI_F103CB" + "VARIANT_H=\"variant_MAPLEMINI_F103CB.h\"" +) +target_include_directories(MAPLEMINI_F103CB_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${MAPLEMINI_F103CB_hid_VARIANT_PATH} +) + +target_link_options(MAPLEMINI_F103CB_hid INTERFACE + "LINKER:--default-script=${MAPLEMINI_F103CB_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${MAPLEMINI_F103CB_hid_MCU} +) +target_link_libraries(MAPLEMINI_F103CB_hid INTERFACE + arm_cortexM3l_math +) + + +# MKR_SHARKY +# ----------------------------------------------------------------------------- + +set(MKR_SHARKY_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U") +set(MKR_SHARKY_MAXSIZE 262144) +set(MKR_SHARKY_MAXDATASIZE 196608) +set(MKR_SHARKY_MCU cortex-m4) +set(MKR_SHARKY_FPCONF "fpv4-sp-d16-hard") +add_library(MKR_SHARKY INTERFACE) +target_compile_options(MKR_SHARKY INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${MKR_SHARKY_MCU} +) +target_compile_definitions(MKR_SHARKY INTERFACE + "STM32WBxx" + "ARDUINO_MKR_SHARKY" + "BOARD_NAME=\"MKR_SHARKY\"" + "BOARD_ID=MKR_SHARKY" + "VARIANT_H=\"variant_MKR_SHARKY.h\"" +) +target_include_directories(MKR_SHARKY INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${MKR_SHARKY_VARIANT_PATH} +) + +target_link_options(MKR_SHARKY INTERFACE + "LINKER:--default-script=${MKR_SHARKY_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${MKR_SHARKY_MCU} +) +target_link_libraries(MKR_SHARKY INTERFACE + arm_cortexM4lf_math +) + +add_library(MKR_SHARKY_serial_disabled INTERFACE) +target_compile_options(MKR_SHARKY_serial_disabled INTERFACE + "SHELL:" +) +add_library(MKR_SHARKY_serial_generic INTERFACE) +target_compile_options(MKR_SHARKY_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(MKR_SHARKY_serial_none INTERFACE) +target_compile_options(MKR_SHARKY_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(MKR_SHARKY_usb_CDC INTERFACE) +target_compile_options(MKR_SHARKY_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(MKR_SHARKY_usb_CDCgen INTERFACE) +target_compile_options(MKR_SHARKY_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(MKR_SHARKY_usb_HID INTERFACE) +target_compile_options(MKR_SHARKY_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(MKR_SHARKY_usb_none INTERFACE) +target_compile_options(MKR_SHARKY_usb_none INTERFACE + "SHELL:" +) +add_library(MKR_SHARKY_xusb_FS INTERFACE) +target_compile_options(MKR_SHARKY_xusb_FS INTERFACE + "SHELL:" +) +add_library(MKR_SHARKY_xusb_HS INTERFACE) +target_compile_options(MKR_SHARKY_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(MKR_SHARKY_xusb_HSFS INTERFACE) +target_compile_options(MKR_SHARKY_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F030R8 +# ----------------------------------------------------------------------------- + +set(NUCLEO_F030R8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F030R8T") +set(NUCLEO_F030R8_MAXSIZE 65536) +set(NUCLEO_F030R8_MAXDATASIZE 8192) +set(NUCLEO_F030R8_MCU cortex-m0) +set(NUCLEO_F030R8_FPCONF "-") +add_library(NUCLEO_F030R8 INTERFACE) +target_compile_options(NUCLEO_F030R8 INTERFACE + "SHELL:-DSTM32F030x8 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F030R8_MCU} +) +target_compile_definitions(NUCLEO_F030R8 INTERFACE + "STM32F0xx" + "ARDUINO_NUCLEO_F030R8" + "BOARD_NAME=\"NUCLEO_F030R8\"" + "BOARD_ID=NUCLEO_F030R8" + "VARIANT_H=\"variant_NUCLEO_F030R8.h\"" +) +target_include_directories(NUCLEO_F030R8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${NUCLEO_F030R8_VARIANT_PATH} +) + +target_link_options(NUCLEO_F030R8 INTERFACE + "LINKER:--default-script=${NUCLEO_F030R8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${NUCLEO_F030R8_MCU} +) +target_link_libraries(NUCLEO_F030R8 INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_F030R8_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F030R8_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F030R8_serial_generic INTERFACE) +target_compile_options(NUCLEO_F030R8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F030R8_serial_none INTERFACE) +target_compile_options(NUCLEO_F030R8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F030R8_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F030R8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F030R8_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F030R8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F030R8_usb_HID INTERFACE) +target_compile_options(NUCLEO_F030R8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F030R8_usb_none INTERFACE) +target_compile_options(NUCLEO_F030R8_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F030R8_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F030R8_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F030R8_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F030R8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F030R8_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F030R8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F031K6 +# ----------------------------------------------------------------------------- + +set(NUCLEO_F031K6_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F031K6T") +set(NUCLEO_F031K6_MAXSIZE 32768) +set(NUCLEO_F031K6_MAXDATASIZE 4096) +set(NUCLEO_F031K6_MCU cortex-m0) +set(NUCLEO_F031K6_FPCONF "-") +add_library(NUCLEO_F031K6 INTERFACE) +target_compile_options(NUCLEO_F031K6 INTERFACE + "SHELL:-DSTM32F031x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F031K6_MCU} +) +target_compile_definitions(NUCLEO_F031K6 INTERFACE + "STM32F0xx" + "ARDUINO_NUCLEO_F031K6" + "BOARD_NAME=\"NUCLEO_F031K6\"" + "BOARD_ID=NUCLEO_F031K6" + "VARIANT_H=\"variant_NUCLEO_F031K6.h\"" +) +target_include_directories(NUCLEO_F031K6 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${NUCLEO_F031K6_VARIANT_PATH} +) + +target_link_options(NUCLEO_F031K6 INTERFACE + "LINKER:--default-script=${NUCLEO_F031K6_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=4096" + "SHELL: " + -mcpu=${NUCLEO_F031K6_MCU} +) +target_link_libraries(NUCLEO_F031K6 INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_F031K6_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F031K6_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F031K6_serial_generic INTERFACE) +target_compile_options(NUCLEO_F031K6_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F031K6_serial_none INTERFACE) +target_compile_options(NUCLEO_F031K6_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F031K6_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F031K6_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F031K6_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F031K6_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F031K6_usb_HID INTERFACE) +target_compile_options(NUCLEO_F031K6_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F031K6_usb_none INTERFACE) +target_compile_options(NUCLEO_F031K6_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F031K6_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F031K6_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F031K6_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F031K6_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F031K6_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F031K6_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F042K6 +# ----------------------------------------------------------------------------- + +set(NUCLEO_F042K6_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F042K(4-6)T") +set(NUCLEO_F042K6_MAXSIZE 32768) +set(NUCLEO_F042K6_MAXDATASIZE 6144) +set(NUCLEO_F042K6_MCU cortex-m0) +set(NUCLEO_F042K6_FPCONF "-") +add_library(NUCLEO_F042K6 INTERFACE) +target_compile_options(NUCLEO_F042K6 INTERFACE + "SHELL:-DSTM32F042x6 " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F042K6_MCU} +) +target_compile_definitions(NUCLEO_F042K6 INTERFACE + "STM32F0xx" + "ARDUINO_NUCLEO_F042K6" + "BOARD_NAME=\"NUCLEO_F042K6\"" + "BOARD_ID=NUCLEO_F042K6" + "VARIANT_H=\"variant_NUCLEO_F042K6.h\"" +) +target_include_directories(NUCLEO_F042K6 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${NUCLEO_F042K6_VARIANT_PATH} +) + +target_link_options(NUCLEO_F042K6 INTERFACE + "LINKER:--default-script=${NUCLEO_F042K6_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=6144" + "SHELL: " + -mcpu=${NUCLEO_F042K6_MCU} +) +target_link_libraries(NUCLEO_F042K6 INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_F042K6_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F042K6_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F042K6_serial_generic INTERFACE) +target_compile_options(NUCLEO_F042K6_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F042K6_serial_none INTERFACE) +target_compile_options(NUCLEO_F042K6_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F042K6_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F042K6_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F042K6_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F042K6_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F042K6_usb_HID INTERFACE) +target_compile_options(NUCLEO_F042K6_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F042K6_usb_none INTERFACE) +target_compile_options(NUCLEO_F042K6_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F042K6_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F042K6_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F042K6_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F042K6_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F042K6_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F042K6_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F070RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_F070RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F070RBT") +set(NUCLEO_F070RB_MAXSIZE 131072) +set(NUCLEO_F070RB_MAXDATASIZE 16384) +set(NUCLEO_F070RB_MCU cortex-m0) +set(NUCLEO_F070RB_FPCONF "-") +add_library(NUCLEO_F070RB INTERFACE) +target_compile_options(NUCLEO_F070RB INTERFACE + "SHELL:-DSTM32F070xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F070RB_MCU} +) +target_compile_definitions(NUCLEO_F070RB INTERFACE + "STM32F0xx" + "ARDUINO_NUCLEO_F070RB" + "BOARD_NAME=\"NUCLEO_F070RB\"" + "BOARD_ID=NUCLEO_F070RB" + "VARIANT_H=\"variant_NUCLEO_F070RB.h\"" +) +target_include_directories(NUCLEO_F070RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${NUCLEO_F070RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_F070RB INTERFACE + "LINKER:--default-script=${NUCLEO_F070RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${NUCLEO_F070RB_MCU} +) +target_link_libraries(NUCLEO_F070RB INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_F070RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F070RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F070RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_F070RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F070RB_serial_none INTERFACE) +target_compile_options(NUCLEO_F070RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F070RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F070RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F070RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F070RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F070RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_F070RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F070RB_usb_none INTERFACE) +target_compile_options(NUCLEO_F070RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F070RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F070RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F070RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F070RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F070RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F070RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F072RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_F072RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(NUCLEO_F072RB_MAXSIZE 131072) +set(NUCLEO_F072RB_MAXDATASIZE 16384) +set(NUCLEO_F072RB_MCU cortex-m0) +set(NUCLEO_F072RB_FPCONF "-") +add_library(NUCLEO_F072RB INTERFACE) +target_compile_options(NUCLEO_F072RB INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F072RB_MCU} +) +target_compile_definitions(NUCLEO_F072RB INTERFACE + "STM32F0xx" + "ARDUINO_NUCLEO_F072RB" + "BOARD_NAME=\"NUCLEO_F072RB\"" + "BOARD_ID=NUCLEO_F072RB" + "VARIANT_H=\"variant_NUCLEO_F072RB.h\"" +) +target_include_directories(NUCLEO_F072RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${NUCLEO_F072RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_F072RB INTERFACE + "LINKER:--default-script=${NUCLEO_F072RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${NUCLEO_F072RB_MCU} +) +target_link_libraries(NUCLEO_F072RB INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_F072RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F072RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F072RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_F072RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F072RB_serial_none INTERFACE) +target_compile_options(NUCLEO_F072RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F072RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F072RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F072RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F072RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F072RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_F072RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F072RB_usb_none INTERFACE) +target_compile_options(NUCLEO_F072RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F072RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F072RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F072RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F072RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F072RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F072RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F091RC +# ----------------------------------------------------------------------------- + +set(NUCLEO_F091RC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F091RBT_F091RC(H-T-Y)") +set(NUCLEO_F091RC_MAXSIZE 262144) +set(NUCLEO_F091RC_MAXDATASIZE 32768) +set(NUCLEO_F091RC_MCU cortex-m0) +set(NUCLEO_F091RC_FPCONF "-") +add_library(NUCLEO_F091RC INTERFACE) +target_compile_options(NUCLEO_F091RC INTERFACE + "SHELL:-DSTM32F091xC " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F091RC_MCU} +) +target_compile_definitions(NUCLEO_F091RC INTERFACE + "STM32F0xx" + "ARDUINO_NUCLEO_F091RC" + "BOARD_NAME=\"NUCLEO_F091RC\"" + "BOARD_ID=NUCLEO_F091RC" + "VARIANT_H=\"variant_NUCLEO_F091RC.h\"" +) +target_include_directories(NUCLEO_F091RC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${NUCLEO_F091RC_VARIANT_PATH} +) + +target_link_options(NUCLEO_F091RC INTERFACE + "LINKER:--default-script=${NUCLEO_F091RC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${NUCLEO_F091RC_MCU} +) +target_link_libraries(NUCLEO_F091RC INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_F091RC_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F091RC_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F091RC_serial_generic INTERFACE) +target_compile_options(NUCLEO_F091RC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F091RC_serial_none INTERFACE) +target_compile_options(NUCLEO_F091RC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F091RC_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F091RC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F091RC_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F091RC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F091RC_usb_HID INTERFACE) +target_compile_options(NUCLEO_F091RC_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F091RC_usb_none INTERFACE) +target_compile_options(NUCLEO_F091RC_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F091RC_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F091RC_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F091RC_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F091RC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F091RC_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F091RC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F103RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_F103RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(8-B)T") +set(NUCLEO_F103RB_MAXSIZE 131072) +set(NUCLEO_F103RB_MAXDATASIZE 20480) +set(NUCLEO_F103RB_MCU cortex-m3) +set(NUCLEO_F103RB_FPCONF "-") +add_library(NUCLEO_F103RB INTERFACE) +target_compile_options(NUCLEO_F103RB INTERFACE + "SHELL:-DSTM32F103xB " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F103RB_MCU} +) +target_compile_definitions(NUCLEO_F103RB INTERFACE + "STM32F1xx" + "ARDUINO_NUCLEO_F103RB" + "BOARD_NAME=\"NUCLEO_F103RB\"" + "BOARD_ID=NUCLEO_F103RB" + "VARIANT_H=\"variant_NUCLEO_F103RB.h\"" +) +target_include_directories(NUCLEO_F103RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${NUCLEO_F103RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_F103RB INTERFACE + "LINKER:--default-script=${NUCLEO_F103RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${NUCLEO_F103RB_MCU} +) +target_link_libraries(NUCLEO_F103RB INTERFACE + arm_cortexM3l_math +) + +add_library(NUCLEO_F103RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F103RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F103RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_F103RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F103RB_serial_none INTERFACE) +target_compile_options(NUCLEO_F103RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F103RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F103RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F103RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F103RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F103RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_F103RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F103RB_usb_none INTERFACE) +target_compile_options(NUCLEO_F103RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F103RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F103RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F103RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F103RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F103RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F103RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F207ZG +# ----------------------------------------------------------------------------- + +set(NUCLEO_F207ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T") +set(NUCLEO_F207ZG_MAXSIZE 1048576) +set(NUCLEO_F207ZG_MAXDATASIZE 131072) +set(NUCLEO_F207ZG_MCU cortex-m3) +set(NUCLEO_F207ZG_FPCONF "-") +add_library(NUCLEO_F207ZG INTERFACE) +target_compile_options(NUCLEO_F207ZG INTERFACE + "SHELL:-DSTM32F207xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F207ZG_MCU} +) +target_compile_definitions(NUCLEO_F207ZG INTERFACE + "STM32F2xx" + "ARDUINO_NUCLEO_F207ZG" + "BOARD_NAME=\"NUCLEO_F207ZG\"" + "BOARD_ID=NUCLEO_F207ZG" + "VARIANT_H=\"variant_NUCLEO_F207ZG.h\"" +) +target_include_directories(NUCLEO_F207ZG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F2xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F2xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/ + ${NUCLEO_F207ZG_VARIANT_PATH} +) + +target_link_options(NUCLEO_F207ZG INTERFACE + "LINKER:--default-script=${NUCLEO_F207ZG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL: " + -mcpu=${NUCLEO_F207ZG_MCU} +) +target_link_libraries(NUCLEO_F207ZG INTERFACE + arm_cortexM3l_math +) + +add_library(NUCLEO_F207ZG_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F207ZG_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F207ZG_serial_generic INTERFACE) +target_compile_options(NUCLEO_F207ZG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F207ZG_serial_none INTERFACE) +target_compile_options(NUCLEO_F207ZG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F207ZG_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F207ZG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F207ZG_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F207ZG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F207ZG_usb_HID INTERFACE) +target_compile_options(NUCLEO_F207ZG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F207ZG_usb_none INTERFACE) +target_compile_options(NUCLEO_F207ZG_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F207ZG_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F207ZG_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F207ZG_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F207ZG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F207ZG_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F207ZG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F302R8 +# ----------------------------------------------------------------------------- + +set(NUCLEO_F302R8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F302R(6-8)T") +set(NUCLEO_F302R8_MAXSIZE 65536) +set(NUCLEO_F302R8_MAXDATASIZE 16384) +set(NUCLEO_F302R8_MCU cortex-m4) +set(NUCLEO_F302R8_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F302R8 INTERFACE) +target_compile_options(NUCLEO_F302R8 INTERFACE + "SHELL:-DSTM32F302x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F302R8_MCU} +) +target_compile_definitions(NUCLEO_F302R8 INTERFACE + "STM32F3xx" + "ARDUINO_NUCLEO_F302R8" + "BOARD_NAME=\"NUCLEO_F302R8\"" + "BOARD_ID=NUCLEO_F302R8" + "VARIANT_H=\"variant_NUCLEO_F302R8.h\"" +) +target_include_directories(NUCLEO_F302R8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${NUCLEO_F302R8_VARIANT_PATH} +) + +target_link_options(NUCLEO_F302R8 INTERFACE + "LINKER:--default-script=${NUCLEO_F302R8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F302R8_MCU} +) +target_link_libraries(NUCLEO_F302R8 INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F302R8_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F302R8_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F302R8_serial_generic INTERFACE) +target_compile_options(NUCLEO_F302R8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F302R8_serial_none INTERFACE) +target_compile_options(NUCLEO_F302R8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F302R8_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F302R8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F302R8_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F302R8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F302R8_usb_HID INTERFACE) +target_compile_options(NUCLEO_F302R8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F302R8_usb_none INTERFACE) +target_compile_options(NUCLEO_F302R8_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F302R8_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F302R8_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F302R8_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F302R8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F302R8_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F302R8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F303K8 +# ----------------------------------------------------------------------------- + +set(NUCLEO_F303K8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T") +set(NUCLEO_F303K8_MAXSIZE 65536) +set(NUCLEO_F303K8_MAXDATASIZE 12288) +set(NUCLEO_F303K8_MCU cortex-m4) +set(NUCLEO_F303K8_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F303K8 INTERFACE) +target_compile_options(NUCLEO_F303K8 INTERFACE + "SHELL:-DSTM32F303x8 " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F303K8_MCU} +) +target_compile_definitions(NUCLEO_F303K8 INTERFACE + "STM32F3xx" + "ARDUINO_NUCLEO_F303K8" + "BOARD_NAME=\"NUCLEO_F303K8\"" + "BOARD_ID=NUCLEO_F303K8" + "VARIANT_H=\"variant_NUCLEO_F303K8.h\"" +) +target_include_directories(NUCLEO_F303K8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${NUCLEO_F303K8_VARIANT_PATH} +) + +target_link_options(NUCLEO_F303K8 INTERFACE + "LINKER:--default-script=${NUCLEO_F303K8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=12288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F303K8_MCU} +) +target_link_libraries(NUCLEO_F303K8 INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F303K8_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F303K8_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F303K8_serial_generic INTERFACE) +target_compile_options(NUCLEO_F303K8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F303K8_serial_none INTERFACE) +target_compile_options(NUCLEO_F303K8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F303K8_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F303K8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F303K8_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F303K8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F303K8_usb_HID INTERFACE) +target_compile_options(NUCLEO_F303K8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F303K8_usb_none INTERFACE) +target_compile_options(NUCLEO_F303K8_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F303K8_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F303K8_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F303K8_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F303K8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F303K8_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F303K8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F303RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_F303RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(D-E)T") +set(NUCLEO_F303RE_MAXSIZE 524288) +set(NUCLEO_F303RE_MAXDATASIZE 65536) +set(NUCLEO_F303RE_MCU cortex-m4) +set(NUCLEO_F303RE_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F303RE INTERFACE) +target_compile_options(NUCLEO_F303RE INTERFACE + "SHELL:-DSTM32F303xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F303RE_MCU} +) +target_compile_definitions(NUCLEO_F303RE INTERFACE + "STM32F3xx" + "ARDUINO_NUCLEO_F303RE" + "BOARD_NAME=\"NUCLEO_F303RE\"" + "BOARD_ID=NUCLEO_F303RE" + "VARIANT_H=\"variant_NUCLEO_F303RE.h\"" +) +target_include_directories(NUCLEO_F303RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${NUCLEO_F303RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_F303RE INTERFACE + "LINKER:--default-script=${NUCLEO_F303RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F303RE_MCU} +) +target_link_libraries(NUCLEO_F303RE INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F303RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F303RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F303RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_F303RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F303RE_serial_none INTERFACE) +target_compile_options(NUCLEO_F303RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F303RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F303RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F303RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F303RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F303RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_F303RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F303RE_usb_none INTERFACE) +target_compile_options(NUCLEO_F303RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F303RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F303RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F303RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F303RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F303RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F303RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F401RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_F401RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401R(B-C-D-E)T") +set(NUCLEO_F401RE_MAXSIZE 524288) +set(NUCLEO_F401RE_MAXDATASIZE 98304) +set(NUCLEO_F401RE_MCU cortex-m4) +set(NUCLEO_F401RE_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F401RE INTERFACE) +target_compile_options(NUCLEO_F401RE INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F401RE_MCU} +) +target_compile_definitions(NUCLEO_F401RE INTERFACE + "STM32F4xx" + "ARDUINO_NUCLEO_F401RE" + "BOARD_NAME=\"NUCLEO_F401RE\"" + "BOARD_ID=NUCLEO_F401RE" + "VARIANT_H=\"variant_NUCLEO_F401RE.h\"" +) +target_include_directories(NUCLEO_F401RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${NUCLEO_F401RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_F401RE INTERFACE + "LINKER:--default-script=${NUCLEO_F401RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F401RE_MCU} +) +target_link_libraries(NUCLEO_F401RE INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F401RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F401RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F401RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_F401RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F401RE_serial_none INTERFACE) +target_compile_options(NUCLEO_F401RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F401RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F401RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F401RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F401RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F401RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_F401RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F401RE_usb_none INTERFACE) +target_compile_options(NUCLEO_F401RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F401RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F401RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F401RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F401RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F401RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F401RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F411RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_F411RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T") +set(NUCLEO_F411RE_MAXSIZE 524288) +set(NUCLEO_F411RE_MAXDATASIZE 131072) +set(NUCLEO_F411RE_MCU cortex-m4) +set(NUCLEO_F411RE_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F411RE INTERFACE) +target_compile_options(NUCLEO_F411RE INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F411RE_MCU} +) +target_compile_definitions(NUCLEO_F411RE INTERFACE + "STM32F4xx" + "ARDUINO_NUCLEO_F411RE" + "BOARD_NAME=\"NUCLEO_F411RE\"" + "BOARD_ID=NUCLEO_F411RE" + "VARIANT_H=\"variant_NUCLEO_F411RE.h\"" +) +target_include_directories(NUCLEO_F411RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${NUCLEO_F411RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_F411RE INTERFACE + "LINKER:--default-script=${NUCLEO_F411RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F411RE_MCU} +) +target_link_libraries(NUCLEO_F411RE INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F411RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F411RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F411RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_F411RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F411RE_serial_none INTERFACE) +target_compile_options(NUCLEO_F411RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F411RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F411RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F411RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F411RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F411RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_F411RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F411RE_usb_none INTERFACE) +target_compile_options(NUCLEO_F411RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F411RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F411RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F411RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F411RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F411RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F411RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F413ZH +# ----------------------------------------------------------------------------- + +set(NUCLEO_F413ZH_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)") +set(NUCLEO_F413ZH_MAXSIZE 1572864) +set(NUCLEO_F413ZH_MAXDATASIZE 327680) +set(NUCLEO_F413ZH_MCU cortex-m4) +set(NUCLEO_F413ZH_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F413ZH INTERFACE) +target_compile_options(NUCLEO_F413ZH INTERFACE + "SHELL:-DSTM32F413xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F413ZH_MCU} +) +target_compile_definitions(NUCLEO_F413ZH INTERFACE + "STM32F4xx" + "ARDUINO_NUCLEO_F413ZH" + "BOARD_NAME=\"NUCLEO_F413ZH\"" + "BOARD_ID=NUCLEO_F413ZH" + "VARIANT_H=\"variant_NUCLEO_F413ZH.h\"" +) +target_include_directories(NUCLEO_F413ZH INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${NUCLEO_F413ZH_VARIANT_PATH} +) + +target_link_options(NUCLEO_F413ZH INTERFACE + "LINKER:--default-script=${NUCLEO_F413ZH_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1572864" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F413ZH_MCU} +) +target_link_libraries(NUCLEO_F413ZH INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F413ZH_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F413ZH_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F413ZH_serial_generic INTERFACE) +target_compile_options(NUCLEO_F413ZH_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F413ZH_serial_none INTERFACE) +target_compile_options(NUCLEO_F413ZH_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F413ZH_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F413ZH_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F413ZH_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F413ZH_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F413ZH_usb_HID INTERFACE) +target_compile_options(NUCLEO_F413ZH_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F413ZH_usb_none INTERFACE) +target_compile_options(NUCLEO_F413ZH_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F413ZH_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F413ZH_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F413ZH_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F413ZH_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F413ZH_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F413ZH_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F429ZI +# ----------------------------------------------------------------------------- + +set(NUCLEO_F429ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)") +set(NUCLEO_F429ZI_MAXSIZE 2097152) +set(NUCLEO_F429ZI_MAXDATASIZE 196608) +set(NUCLEO_F429ZI_MCU cortex-m4) +set(NUCLEO_F429ZI_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F429ZI INTERFACE) +target_compile_options(NUCLEO_F429ZI INTERFACE + "SHELL:-DSTM32F429xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F429ZI_MCU} +) +target_compile_definitions(NUCLEO_F429ZI INTERFACE + "STM32F4xx" + "ARDUINO_NUCLEO_F429ZI" + "BOARD_NAME=\"NUCLEO_F429ZI\"" + "BOARD_ID=NUCLEO_F429ZI" + "VARIANT_H=\"variant_NUCLEO_F429ZI.h\"" +) +target_include_directories(NUCLEO_F429ZI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${NUCLEO_F429ZI_VARIANT_PATH} +) + +target_link_options(NUCLEO_F429ZI INTERFACE + "LINKER:--default-script=${NUCLEO_F429ZI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F429ZI_MCU} +) +target_link_libraries(NUCLEO_F429ZI INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F429ZI_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F429ZI_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F429ZI_serial_generic INTERFACE) +target_compile_options(NUCLEO_F429ZI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F429ZI_serial_none INTERFACE) +target_compile_options(NUCLEO_F429ZI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F429ZI_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F429ZI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F429ZI_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F429ZI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F429ZI_usb_HID INTERFACE) +target_compile_options(NUCLEO_F429ZI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F429ZI_usb_none INTERFACE) +target_compile_options(NUCLEO_F429ZI_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F429ZI_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F429ZI_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F429ZI_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F429ZI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F429ZI_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F429ZI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F446RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_F446RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446R(C-E)T") +set(NUCLEO_F446RE_MAXSIZE 524288) +set(NUCLEO_F446RE_MAXDATASIZE 131072) +set(NUCLEO_F446RE_MCU cortex-m4) +set(NUCLEO_F446RE_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F446RE INTERFACE) +target_compile_options(NUCLEO_F446RE INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F446RE_MCU} +) +target_compile_definitions(NUCLEO_F446RE INTERFACE + "STM32F4xx" + "ARDUINO_NUCLEO_F446RE" + "BOARD_NAME=\"NUCLEO_F446RE\"" + "BOARD_ID=NUCLEO_F446RE" + "VARIANT_H=\"variant_NUCLEO_F446RE.h\"" +) +target_include_directories(NUCLEO_F446RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${NUCLEO_F446RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_F446RE INTERFACE + "LINKER:--default-script=${NUCLEO_F446RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F446RE_MCU} +) +target_link_libraries(NUCLEO_F446RE INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_F446RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F446RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F446RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_F446RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F446RE_serial_none INTERFACE) +target_compile_options(NUCLEO_F446RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F446RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F446RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F446RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F446RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F446RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_F446RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F446RE_usb_none INTERFACE) +target_compile_options(NUCLEO_F446RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F446RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F446RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F446RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F446RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F446RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F446RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F722ZE +# ----------------------------------------------------------------------------- + +set(NUCLEO_F722ZE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F722Z(C-E)T_F732ZET") +set(NUCLEO_F722ZE_MAXSIZE 524288) +set(NUCLEO_F722ZE_MAXDATASIZE 196608) +set(NUCLEO_F722ZE_MCU cortex-m7) +set(NUCLEO_F722ZE_FPCONF "-") +add_library(NUCLEO_F722ZE INTERFACE) +target_compile_options(NUCLEO_F722ZE INTERFACE + "SHELL:-DSTM32F722xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_F722ZE_MCU} +) +target_compile_definitions(NUCLEO_F722ZE INTERFACE + "STM32F7xx" + "ARDUINO_NUCLEO_F722ZE" + "BOARD_NAME=\"NUCLEO_F722ZE\"" + "BOARD_ID=NUCLEO_F722ZE" + "VARIANT_H=\"variant_NUCLEO_F722ZE.h\"" +) +target_include_directories(NUCLEO_F722ZE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${NUCLEO_F722ZE_VARIANT_PATH} +) + +target_link_options(NUCLEO_F722ZE INTERFACE + "LINKER:--default-script=${NUCLEO_F722ZE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL: " + -mcpu=${NUCLEO_F722ZE_MCU} +) +target_link_libraries(NUCLEO_F722ZE INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_F722ZE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F722ZE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F722ZE_serial_generic INTERFACE) +target_compile_options(NUCLEO_F722ZE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F722ZE_serial_none INTERFACE) +target_compile_options(NUCLEO_F722ZE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F722ZE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F722ZE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F722ZE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F722ZE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F722ZE_usb_HID INTERFACE) +target_compile_options(NUCLEO_F722ZE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F722ZE_usb_none INTERFACE) +target_compile_options(NUCLEO_F722ZE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F722ZE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F722ZE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F722ZE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F722ZE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F722ZE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F722ZE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F746ZG +# ----------------------------------------------------------------------------- + +set(NUCLEO_F746ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(NUCLEO_F746ZG_MAXSIZE 1048576) +set(NUCLEO_F746ZG_MAXDATASIZE 327680) +set(NUCLEO_F746ZG_MCU cortex-m7) +set(NUCLEO_F746ZG_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F746ZG INTERFACE) +target_compile_options(NUCLEO_F746ZG INTERFACE + "SHELL:-DSTM32F746xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F746ZG_MCU} +) +target_compile_definitions(NUCLEO_F746ZG INTERFACE + "STM32F7xx" + "ARDUINO_NUCLEO_F746ZG" + "BOARD_NAME=\"NUCLEO_F746ZG\"" + "BOARD_ID=NUCLEO_F746ZG" + "VARIANT_H=\"variant_NUCLEO_F7x6ZG.h\"" +) +target_include_directories(NUCLEO_F746ZG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${NUCLEO_F746ZG_VARIANT_PATH} +) + +target_link_options(NUCLEO_F746ZG INTERFACE + "LINKER:--default-script=${NUCLEO_F746ZG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F746ZG_MCU} +) +target_link_libraries(NUCLEO_F746ZG INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_F746ZG_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F746ZG_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F746ZG_serial_generic INTERFACE) +target_compile_options(NUCLEO_F746ZG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F746ZG_serial_none INTERFACE) +target_compile_options(NUCLEO_F746ZG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F746ZG_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F746ZG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F746ZG_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F746ZG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F746ZG_usb_HID INTERFACE) +target_compile_options(NUCLEO_F746ZG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F746ZG_usb_none INTERFACE) +target_compile_options(NUCLEO_F746ZG_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F746ZG_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F746ZG_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F746ZG_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F746ZG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F746ZG_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F746ZG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F756ZG +# ----------------------------------------------------------------------------- + +set(NUCLEO_F756ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)") +set(NUCLEO_F756ZG_MAXSIZE 1048576) +set(NUCLEO_F756ZG_MAXDATASIZE 327680) +set(NUCLEO_F756ZG_MCU cortex-m7) +set(NUCLEO_F756ZG_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F756ZG INTERFACE) +target_compile_options(NUCLEO_F756ZG INTERFACE + "SHELL:-DSTM32F756xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F756ZG_MCU} +) +target_compile_definitions(NUCLEO_F756ZG INTERFACE + "STM32F7xx" + "ARDUINO_NUCLEO_F756ZG" + "BOARD_NAME=\"NUCLEO_F756ZG\"" + "BOARD_ID=NUCLEO_F756ZG" + "VARIANT_H=\"variant_NUCLEO_F7x6ZG.h\"" +) +target_include_directories(NUCLEO_F756ZG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${NUCLEO_F756ZG_VARIANT_PATH} +) + +target_link_options(NUCLEO_F756ZG INTERFACE + "LINKER:--default-script=${NUCLEO_F756ZG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F756ZG_MCU} +) +target_link_libraries(NUCLEO_F756ZG INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_F756ZG_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F756ZG_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F756ZG_serial_generic INTERFACE) +target_compile_options(NUCLEO_F756ZG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F756ZG_serial_none INTERFACE) +target_compile_options(NUCLEO_F756ZG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F756ZG_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F756ZG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F756ZG_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F756ZG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F756ZG_usb_HID INTERFACE) +target_compile_options(NUCLEO_F756ZG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F756ZG_usb_none INTERFACE) +target_compile_options(NUCLEO_F756ZG_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F756ZG_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F756ZG_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F756ZG_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F756ZG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F756ZG_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F756ZG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_F767ZI +# ----------------------------------------------------------------------------- + +set(NUCLEO_F767ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT") +set(NUCLEO_F767ZI_MAXSIZE 2097152) +set(NUCLEO_F767ZI_MAXDATASIZE 524288) +set(NUCLEO_F767ZI_MCU cortex-m7) +set(NUCLEO_F767ZI_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_F767ZI INTERFACE) +target_compile_options(NUCLEO_F767ZI INTERFACE + "SHELL:-DSTM32F767xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F767ZI_MCU} +) +target_compile_definitions(NUCLEO_F767ZI INTERFACE + "STM32F7xx" + "ARDUINO_NUCLEO_F767ZI" + "BOARD_NAME=\"NUCLEO_F767ZI\"" + "BOARD_ID=NUCLEO_F767ZI" + "VARIANT_H=\"variant_NUCLEO_F767ZI.h\"" +) +target_include_directories(NUCLEO_F767ZI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${NUCLEO_F767ZI_VARIANT_PATH} +) + +target_link_options(NUCLEO_F767ZI INTERFACE + "LINKER:--default-script=${NUCLEO_F767ZI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_F767ZI_MCU} +) +target_link_libraries(NUCLEO_F767ZI INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_F767ZI_serial_disabled INTERFACE) +target_compile_options(NUCLEO_F767ZI_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_F767ZI_serial_generic INTERFACE) +target_compile_options(NUCLEO_F767ZI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_F767ZI_serial_none INTERFACE) +target_compile_options(NUCLEO_F767ZI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_F767ZI_usb_CDC INTERFACE) +target_compile_options(NUCLEO_F767ZI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_F767ZI_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_F767ZI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_F767ZI_usb_HID INTERFACE) +target_compile_options(NUCLEO_F767ZI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_F767ZI_usb_none INTERFACE) +target_compile_options(NUCLEO_F767ZI_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_F767ZI_xusb_FS INTERFACE) +target_compile_options(NUCLEO_F767ZI_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_F767ZI_xusb_HS INTERFACE) +target_compile_options(NUCLEO_F767ZI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_F767ZI_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_F767ZI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G031K8 +# ----------------------------------------------------------------------------- + +set(NUCLEO_G031K8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)") +set(NUCLEO_G031K8_MAXSIZE 65536) +set(NUCLEO_G031K8_MAXDATASIZE 8192) +set(NUCLEO_G031K8_MCU cortex-m0plus) +set(NUCLEO_G031K8_FPCONF "-") +add_library(NUCLEO_G031K8 INTERFACE) +target_compile_options(NUCLEO_G031K8 INTERFACE + "SHELL:-DSTM32G031xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_G031K8_MCU} +) +target_compile_definitions(NUCLEO_G031K8 INTERFACE + "STM32G0xx" + "ARDUINO_NUCLEO_G031K8" + "BOARD_NAME=\"NUCLEO_G031K8\"" + "BOARD_ID=NUCLEO_G031K8" + "VARIANT_H=\"variant_NUCLEO_G031K8.h\"" +) +target_include_directories(NUCLEO_G031K8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${NUCLEO_G031K8_VARIANT_PATH} +) + +target_link_options(NUCLEO_G031K8 INTERFACE + "LINKER:--default-script=${NUCLEO_G031K8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${NUCLEO_G031K8_MCU} +) +target_link_libraries(NUCLEO_G031K8 INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_G031K8_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G031K8_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G031K8_serial_generic INTERFACE) +target_compile_options(NUCLEO_G031K8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G031K8_serial_none INTERFACE) +target_compile_options(NUCLEO_G031K8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G031K8_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G031K8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G031K8_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G031K8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G031K8_usb_HID INTERFACE) +target_compile_options(NUCLEO_G031K8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G031K8_usb_none INTERFACE) +target_compile_options(NUCLEO_G031K8_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G031K8_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G031K8_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G031K8_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G031K8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G031K8_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G031K8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G070RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_G070RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G070RBT") +set(NUCLEO_G070RB_MAXSIZE 131072) +set(NUCLEO_G070RB_MAXDATASIZE 36864) +set(NUCLEO_G070RB_MCU cortex-m0plus) +set(NUCLEO_G070RB_FPCONF "-") +add_library(NUCLEO_G070RB INTERFACE) +target_compile_options(NUCLEO_G070RB INTERFACE + "SHELL:-DSTM32G070xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_G070RB_MCU} +) +target_compile_definitions(NUCLEO_G070RB INTERFACE + "STM32G0xx" + "ARDUINO_NUCLEO_G070RB" + "BOARD_NAME=\"NUCLEO_G070RB\"" + "BOARD_ID=NUCLEO_G070RB" + "VARIANT_H=\"variant_NUCLEO_G070RB.h\"" +) +target_include_directories(NUCLEO_G070RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${NUCLEO_G070RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_G070RB INTERFACE + "LINKER:--default-script=${NUCLEO_G070RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=36864" + "SHELL: " + -mcpu=${NUCLEO_G070RB_MCU} +) +target_link_libraries(NUCLEO_G070RB INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_G070RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G070RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G070RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_G070RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G070RB_serial_none INTERFACE) +target_compile_options(NUCLEO_G070RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G070RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G070RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G070RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G070RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G070RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_G070RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G070RB_usb_none INTERFACE) +target_compile_options(NUCLEO_G070RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G070RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G070RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G070RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G070RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G070RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G070RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G071RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_G071RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)") +set(NUCLEO_G071RB_MAXSIZE 131072) +set(NUCLEO_G071RB_MAXDATASIZE 32768) +set(NUCLEO_G071RB_MCU cortex-m0plus) +set(NUCLEO_G071RB_FPCONF "-") +add_library(NUCLEO_G071RB INTERFACE) +target_compile_options(NUCLEO_G071RB INTERFACE + "SHELL:-DSTM32G071xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_G071RB_MCU} +) +target_compile_definitions(NUCLEO_G071RB INTERFACE + "STM32G0xx" + "ARDUINO_NUCLEO_G071RB" + "BOARD_NAME=\"NUCLEO_G071RB\"" + "BOARD_ID=NUCLEO_G071RB" + "VARIANT_H=\"variant_NUCLEO_G071RB.h\"" +) +target_include_directories(NUCLEO_G071RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${NUCLEO_G071RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_G071RB INTERFACE + "LINKER:--default-script=${NUCLEO_G071RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${NUCLEO_G071RB_MCU} +) +target_link_libraries(NUCLEO_G071RB INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_G071RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G071RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G071RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_G071RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G071RB_serial_none INTERFACE) +target_compile_options(NUCLEO_G071RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G071RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G071RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G071RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G071RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G071RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_G071RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G071RB_usb_none INTERFACE) +target_compile_options(NUCLEO_G071RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G071RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G071RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G071RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G071RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G071RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G071RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G0B1RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_G0B1RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T") +set(NUCLEO_G0B1RE_MAXSIZE 262144) +set(NUCLEO_G0B1RE_MAXDATASIZE 147456) +set(NUCLEO_G0B1RE_MCU cortex-m0plus) +set(NUCLEO_G0B1RE_FPCONF "-") +add_library(NUCLEO_G0B1RE INTERFACE) +target_compile_options(NUCLEO_G0B1RE INTERFACE + "SHELL:-DSTM32G0B1xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_G0B1RE_MCU} +) +target_compile_definitions(NUCLEO_G0B1RE INTERFACE + "STM32G0xx" + "ARDUINO_NUCLEO_G0B1RE" + "BOARD_NAME=\"NUCLEO_G0B1RE\"" + "BOARD_ID=NUCLEO_G0B1RE" + "VARIANT_H=\"variant_NUCLEO_G0B1RE.h\"" +) +target_include_directories(NUCLEO_G0B1RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G0xx/Source/Templates/gcc/ + ${NUCLEO_G0B1RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_G0B1RE INTERFACE + "LINKER:--default-script=${NUCLEO_G0B1RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=147456" + "SHELL: " + -mcpu=${NUCLEO_G0B1RE_MCU} +) +target_link_libraries(NUCLEO_G0B1RE INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_G0B1RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G0B1RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G0B1RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_G0B1RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G0B1RE_serial_none INTERFACE) +target_compile_options(NUCLEO_G0B1RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G0B1RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G0B1RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G0B1RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G0B1RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G0B1RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_G0B1RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G0B1RE_usb_none INTERFACE) +target_compile_options(NUCLEO_G0B1RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G0B1RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G0B1RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G0B1RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G0B1RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G0B1RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G0B1RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G431KB +# ----------------------------------------------------------------------------- + +set(NUCLEO_G431KB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)") +set(NUCLEO_G431KB_MAXSIZE 131072) +set(NUCLEO_G431KB_MAXDATASIZE 32768) +set(NUCLEO_G431KB_MCU cortex-m4) +set(NUCLEO_G431KB_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_G431KB INTERFACE) +target_compile_options(NUCLEO_G431KB INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_G431KB_MCU} +) +target_compile_definitions(NUCLEO_G431KB INTERFACE + "STM32G4xx" + "ARDUINO_NUCLEO_G431KB" + "BOARD_NAME=\"NUCLEO_G431KB\"" + "BOARD_ID=NUCLEO_G431KB" + "VARIANT_H=\"variant_NUCLEO_G431KB.h\"" +) +target_include_directories(NUCLEO_G431KB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${NUCLEO_G431KB_VARIANT_PATH} +) + +target_link_options(NUCLEO_G431KB INTERFACE + "LINKER:--default-script=${NUCLEO_G431KB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_G431KB_MCU} +) +target_link_libraries(NUCLEO_G431KB INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_G431KB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G431KB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G431KB_serial_generic INTERFACE) +target_compile_options(NUCLEO_G431KB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G431KB_serial_none INTERFACE) +target_compile_options(NUCLEO_G431KB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G431KB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G431KB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G431KB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G431KB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G431KB_usb_HID INTERFACE) +target_compile_options(NUCLEO_G431KB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G431KB_usb_none INTERFACE) +target_compile_options(NUCLEO_G431KB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G431KB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G431KB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G431KB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G431KB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G431KB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G431KB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G431RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_G431RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)") +set(NUCLEO_G431RB_MAXSIZE 131072) +set(NUCLEO_G431RB_MAXDATASIZE 32768) +set(NUCLEO_G431RB_MCU cortex-m4) +set(NUCLEO_G431RB_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_G431RB INTERFACE) +target_compile_options(NUCLEO_G431RB INTERFACE + "SHELL:-DSTM32G431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_G431RB_MCU} +) +target_compile_definitions(NUCLEO_G431RB INTERFACE + "STM32G4xx" + "ARDUINO_NUCLEO_G431RB" + "BOARD_NAME=\"NUCLEO_G431RB\"" + "BOARD_ID=NUCLEO_G431RB" + "VARIANT_H=\"variant_NUCLEO_G431RB.h\"" +) +target_include_directories(NUCLEO_G431RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${NUCLEO_G431RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_G431RB INTERFACE + "LINKER:--default-script=${NUCLEO_G431RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_G431RB_MCU} +) +target_link_libraries(NUCLEO_G431RB INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_G431RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G431RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G431RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_G431RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G431RB_serial_none INTERFACE) +target_compile_options(NUCLEO_G431RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G431RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G431RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G431RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G431RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G431RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_G431RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G431RB_usb_none INTERFACE) +target_compile_options(NUCLEO_G431RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G431RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G431RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G431RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G431RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G431RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G431RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_G474RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_G474RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET") +set(NUCLEO_G474RE_MAXSIZE 524288) +set(NUCLEO_G474RE_MAXDATASIZE 131072) +set(NUCLEO_G474RE_MCU cortex-m4) +set(NUCLEO_G474RE_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_G474RE INTERFACE) +target_compile_options(NUCLEO_G474RE INTERFACE + "SHELL:-DSTM32G474xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_G474RE_MCU} +) +target_compile_definitions(NUCLEO_G474RE INTERFACE + "STM32G4xx" + "ARDUINO_NUCLEO_G474RE" + "BOARD_NAME=\"NUCLEO_G474RE\"" + "BOARD_ID=NUCLEO_G474RE" + "VARIANT_H=\"variant_NUCLEO_G474RE.h\"" +) +target_include_directories(NUCLEO_G474RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/ + ${NUCLEO_G474RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_G474RE INTERFACE + "LINKER:--default-script=${NUCLEO_G474RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_G474RE_MCU} +) +target_link_libraries(NUCLEO_G474RE INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_G474RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_G474RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_G474RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_G474RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_G474RE_serial_none INTERFACE) +target_compile_options(NUCLEO_G474RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_G474RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_G474RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_G474RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_G474RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_G474RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_G474RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_G474RE_usb_none INTERFACE) +target_compile_options(NUCLEO_G474RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_G474RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_G474RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_G474RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_G474RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_G474RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_G474RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_H723ZG +# ----------------------------------------------------------------------------- + +set(NUCLEO_H723ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT") +set(NUCLEO_H723ZG_MAXSIZE 1048576) +set(NUCLEO_H723ZG_MAXDATASIZE 327680) +set(NUCLEO_H723ZG_MCU cortex-m7) +set(NUCLEO_H723ZG_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_H723ZG INTERFACE) +target_compile_options(NUCLEO_H723ZG INTERFACE + "SHELL:-DSTM32H723xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_H723ZG_MCU} +) +target_compile_definitions(NUCLEO_H723ZG INTERFACE + "STM32H7xx" + "ARDUINO_NUCLEO_H723ZG" + "BOARD_NAME=\"NUCLEO_H723ZG\"" + "BOARD_ID=NUCLEO_H723ZG" + "VARIANT_H=\"variant_NUCLEO_H723ZG.h\"" +) +target_include_directories(NUCLEO_H723ZG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${NUCLEO_H723ZG_VARIANT_PATH} +) + +target_link_options(NUCLEO_H723ZG INTERFACE + "LINKER:--default-script=${NUCLEO_H723ZG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_H723ZG_MCU} +) +target_link_libraries(NUCLEO_H723ZG INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_H723ZG_serial_disabled INTERFACE) +target_compile_options(NUCLEO_H723ZG_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_H723ZG_serial_generic INTERFACE) +target_compile_options(NUCLEO_H723ZG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_H723ZG_serial_none INTERFACE) +target_compile_options(NUCLEO_H723ZG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_H723ZG_usb_CDC INTERFACE) +target_compile_options(NUCLEO_H723ZG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_H723ZG_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_H723ZG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_H723ZG_usb_HID INTERFACE) +target_compile_options(NUCLEO_H723ZG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_H723ZG_usb_none INTERFACE) +target_compile_options(NUCLEO_H723ZG_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_H723ZG_xusb_FS INTERFACE) +target_compile_options(NUCLEO_H723ZG_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_H723ZG_xusb_HS INTERFACE) +target_compile_options(NUCLEO_H723ZG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_H723ZG_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_H723ZG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_H743ZI +# ----------------------------------------------------------------------------- + +set(NUCLEO_H743ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(NUCLEO_H743ZI_MAXSIZE 2097152) +set(NUCLEO_H743ZI_MAXDATASIZE 524288) +set(NUCLEO_H743ZI_MCU cortex-m7) +set(NUCLEO_H743ZI_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_H743ZI INTERFACE) +target_compile_options(NUCLEO_H743ZI INTERFACE + "SHELL:-DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_H743ZI_MCU} +) +target_compile_definitions(NUCLEO_H743ZI INTERFACE + "STM32H7xx" + "ARDUINO_NUCLEO_H743ZI" + "BOARD_NAME=\"NUCLEO_H743ZI\"" + "BOARD_ID=NUCLEO_H743ZI" + "VARIANT_H=\"variant_NUCLEO_H743ZI.h\"" +) +target_include_directories(NUCLEO_H743ZI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${NUCLEO_H743ZI_VARIANT_PATH} +) + +target_link_options(NUCLEO_H743ZI INTERFACE + "LINKER:--default-script=${NUCLEO_H743ZI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_H743ZI_MCU} +) +target_link_libraries(NUCLEO_H743ZI INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_H743ZI_serial_disabled INTERFACE) +target_compile_options(NUCLEO_H743ZI_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_H743ZI_serial_generic INTERFACE) +target_compile_options(NUCLEO_H743ZI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_H743ZI_serial_none INTERFACE) +target_compile_options(NUCLEO_H743ZI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_H743ZI_usb_CDC INTERFACE) +target_compile_options(NUCLEO_H743ZI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_H743ZI_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_H743ZI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_H743ZI_usb_HID INTERFACE) +target_compile_options(NUCLEO_H743ZI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_H743ZI_usb_none INTERFACE) +target_compile_options(NUCLEO_H743ZI_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_H743ZI_xusb_FS INTERFACE) +target_compile_options(NUCLEO_H743ZI_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_H743ZI_xusb_HS INTERFACE) +target_compile_options(NUCLEO_H743ZI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_H743ZI_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_H743ZI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_H743ZI2 +# ----------------------------------------------------------------------------- + +set(NUCLEO_H743ZI2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT") +set(NUCLEO_H743ZI2_MAXSIZE 2097152) +set(NUCLEO_H743ZI2_MAXDATASIZE 524288) +set(NUCLEO_H743ZI2_MCU cortex-m7) +set(NUCLEO_H743ZI2_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_H743ZI2 INTERFACE) +target_compile_options(NUCLEO_H743ZI2 INTERFACE + "SHELL:-DSTM32H743xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_H743ZI2_MCU} +) +target_compile_definitions(NUCLEO_H743ZI2 INTERFACE + "STM32H7xx" + "ARDUINO_NUCLEO_H743ZI2" + "BOARD_NAME=\"NUCLEO_H743ZI2\"" + "BOARD_ID=NUCLEO_H743ZI2" + "VARIANT_H=\"variant_NUCLEO_H743ZI.h\"" +) +target_include_directories(NUCLEO_H743ZI2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${NUCLEO_H743ZI2_VARIANT_PATH} +) + +target_link_options(NUCLEO_H743ZI2 INTERFACE + "LINKER:--default-script=${NUCLEO_H743ZI2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_H743ZI2_MCU} +) +target_link_libraries(NUCLEO_H743ZI2 INTERFACE + arm_cortexM7lfsp_math +) + +add_library(NUCLEO_H743ZI2_serial_disabled INTERFACE) +target_compile_options(NUCLEO_H743ZI2_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_H743ZI2_serial_generic INTERFACE) +target_compile_options(NUCLEO_H743ZI2_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_H743ZI2_serial_none INTERFACE) +target_compile_options(NUCLEO_H743ZI2_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_H743ZI2_usb_CDC INTERFACE) +target_compile_options(NUCLEO_H743ZI2_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_H743ZI2_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_H743ZI2_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_H743ZI2_usb_HID INTERFACE) +target_compile_options(NUCLEO_H743ZI2_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_H743ZI2_usb_none INTERFACE) +target_compile_options(NUCLEO_H743ZI2_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_H743ZI2_xusb_FS INTERFACE) +target_compile_options(NUCLEO_H743ZI2_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_H743ZI2_xusb_HS INTERFACE) +target_compile_options(NUCLEO_H743ZI2_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_H743ZI2_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_H743ZI2_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L010RB +# ----------------------------------------------------------------------------- + +set(NUCLEO_L010RB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L010RBT") +set(NUCLEO_L010RB_MAXSIZE 131072) +set(NUCLEO_L010RB_MAXDATASIZE 20480) +set(NUCLEO_L010RB_MCU cortex-m0plus) +set(NUCLEO_L010RB_FPCONF "-") +add_library(NUCLEO_L010RB INTERFACE) +target_compile_options(NUCLEO_L010RB INTERFACE + "SHELL:-DSTM32L010xB -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_L010RB_MCU} +) +target_compile_definitions(NUCLEO_L010RB INTERFACE + "STM32L0xx" + "ARDUINO_NUCLEO_L010RB" + "BOARD_NAME=\"NUCLEO_L010RB\"" + "BOARD_ID=NUCLEO_L010RB" + "VARIANT_H=\"variant_NUCLEO_L010RB.h\"" +) +target_include_directories(NUCLEO_L010RB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${NUCLEO_L010RB_VARIANT_PATH} +) + +target_link_options(NUCLEO_L010RB INTERFACE + "LINKER:--default-script=${NUCLEO_L010RB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${NUCLEO_L010RB_MCU} +) +target_link_libraries(NUCLEO_L010RB INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_L010RB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L010RB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L010RB_serial_generic INTERFACE) +target_compile_options(NUCLEO_L010RB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L010RB_serial_none INTERFACE) +target_compile_options(NUCLEO_L010RB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L010RB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L010RB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L010RB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L010RB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L010RB_usb_HID INTERFACE) +target_compile_options(NUCLEO_L010RB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L010RB_usb_none INTERFACE) +target_compile_options(NUCLEO_L010RB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L010RB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L010RB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L010RB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L010RB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L010RB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L010RB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L031K6 +# ----------------------------------------------------------------------------- + +set(NUCLEO_L031K6_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L031K(4-6)T_L041K6T") +set(NUCLEO_L031K6_MAXSIZE 32768) +set(NUCLEO_L031K6_MAXDATASIZE 8192) +set(NUCLEO_L031K6_MCU cortex-m0plus) +set(NUCLEO_L031K6_FPCONF "-") +add_library(NUCLEO_L031K6 INTERFACE) +target_compile_options(NUCLEO_L031K6 INTERFACE + "SHELL:-DSTM32L031xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_L031K6_MCU} +) +target_compile_definitions(NUCLEO_L031K6 INTERFACE + "STM32L0xx" + "ARDUINO_NUCLEO_L031K6" + "BOARD_NAME=\"NUCLEO_L031K6\"" + "BOARD_ID=NUCLEO_L031K6" + "VARIANT_H=\"variant_NUCLEO_L031K6.h\"" +) +target_include_directories(NUCLEO_L031K6 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${NUCLEO_L031K6_VARIANT_PATH} +) + +target_link_options(NUCLEO_L031K6 INTERFACE + "LINKER:--default-script=${NUCLEO_L031K6_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${NUCLEO_L031K6_MCU} +) +target_link_libraries(NUCLEO_L031K6 INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_L031K6_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L031K6_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L031K6_serial_generic INTERFACE) +target_compile_options(NUCLEO_L031K6_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L031K6_serial_none INTERFACE) +target_compile_options(NUCLEO_L031K6_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L031K6_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L031K6_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L031K6_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L031K6_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L031K6_usb_HID INTERFACE) +target_compile_options(NUCLEO_L031K6_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L031K6_usb_none INTERFACE) +target_compile_options(NUCLEO_L031K6_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L031K6_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L031K6_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L031K6_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L031K6_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L031K6_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L031K6_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L053R8 +# ----------------------------------------------------------------------------- + +set(NUCLEO_L053R8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T") +set(NUCLEO_L053R8_MAXSIZE 65536) +set(NUCLEO_L053R8_MAXDATASIZE 8192) +set(NUCLEO_L053R8_MCU cortex-m0plus) +set(NUCLEO_L053R8_FPCONF "-") +add_library(NUCLEO_L053R8 INTERFACE) +target_compile_options(NUCLEO_L053R8 INTERFACE + "SHELL:-DSTM32L053xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_L053R8_MCU} +) +target_compile_definitions(NUCLEO_L053R8 INTERFACE + "STM32L0xx" + "ARDUINO_NUCLEO_L053R8" + "BOARD_NAME=\"NUCLEO_L053R8\"" + "BOARD_ID=NUCLEO_L053R8" + "VARIANT_H=\"variant_NUCLEO_L053R8.h\"" +) +target_include_directories(NUCLEO_L053R8 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${NUCLEO_L053R8_VARIANT_PATH} +) + +target_link_options(NUCLEO_L053R8 INTERFACE + "LINKER:--default-script=${NUCLEO_L053R8_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${NUCLEO_L053R8_MCU} +) +target_link_libraries(NUCLEO_L053R8 INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_L053R8_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L053R8_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L053R8_serial_generic INTERFACE) +target_compile_options(NUCLEO_L053R8_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L053R8_serial_none INTERFACE) +target_compile_options(NUCLEO_L053R8_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L053R8_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L053R8_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L053R8_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L053R8_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L053R8_usb_HID INTERFACE) +target_compile_options(NUCLEO_L053R8_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L053R8_usb_none INTERFACE) +target_compile_options(NUCLEO_L053R8_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L053R8_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L053R8_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L053R8_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L053R8_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L053R8_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L053R8_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L073RZ +# ----------------------------------------------------------------------------- + +set(NUCLEO_L073RZ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(NUCLEO_L073RZ_MAXSIZE 196608) +set(NUCLEO_L073RZ_MAXDATASIZE 20480) +set(NUCLEO_L073RZ_MCU cortex-m0plus) +set(NUCLEO_L073RZ_FPCONF "-") +add_library(NUCLEO_L073RZ INTERFACE) +target_compile_options(NUCLEO_L073RZ INTERFACE + "SHELL:-DSTM32L073xx -D__CORTEX_SC=0" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_L073RZ_MCU} +) +target_compile_definitions(NUCLEO_L073RZ INTERFACE + "STM32L0xx" + "ARDUINO_NUCLEO_L073RZ" + "BOARD_NAME=\"NUCLEO_L073RZ\"" + "BOARD_ID=NUCLEO_L073RZ" + "VARIANT_H=\"variant_NUCLEO_L073RZ.h\"" +) +target_include_directories(NUCLEO_L073RZ INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${NUCLEO_L073RZ_VARIANT_PATH} +) + +target_link_options(NUCLEO_L073RZ INTERFACE + "LINKER:--default-script=${NUCLEO_L073RZ_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${NUCLEO_L073RZ_MCU} +) +target_link_libraries(NUCLEO_L073RZ INTERFACE + arm_cortexM0l_math +) + +add_library(NUCLEO_L073RZ_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L073RZ_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L073RZ_serial_generic INTERFACE) +target_compile_options(NUCLEO_L073RZ_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L073RZ_serial_none INTERFACE) +target_compile_options(NUCLEO_L073RZ_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L073RZ_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L073RZ_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L073RZ_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L073RZ_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L073RZ_usb_HID INTERFACE) +target_compile_options(NUCLEO_L073RZ_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L073RZ_usb_none INTERFACE) +target_compile_options(NUCLEO_L073RZ_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L073RZ_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L073RZ_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L073RZ_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L073RZ_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L073RZ_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L073RZ_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L152RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_L152RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L151RET_L152RET_L162RET") +set(NUCLEO_L152RE_MAXSIZE 524288) +set(NUCLEO_L152RE_MAXDATASIZE 81920) +set(NUCLEO_L152RE_MCU cortex-m3) +set(NUCLEO_L152RE_FPCONF "-") +add_library(NUCLEO_L152RE INTERFACE) +target_compile_options(NUCLEO_L152RE INTERFACE + "SHELL:-DSTM32L152xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_L152RE_MCU} +) +target_compile_definitions(NUCLEO_L152RE INTERFACE + "STM32L1xx" + "ARDUINO_NUCLEO_L152RE" + "BOARD_NAME=\"NUCLEO_L152RE\"" + "BOARD_ID=NUCLEO_L152RE" + "VARIANT_H=\"variant_NUCLEO_L152RE.h\"" +) +target_include_directories(NUCLEO_L152RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${NUCLEO_L152RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_L152RE INTERFACE + "LINKER:--default-script=${NUCLEO_L152RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=81920" + "SHELL: " + -mcpu=${NUCLEO_L152RE_MCU} +) +target_link_libraries(NUCLEO_L152RE INTERFACE + arm_cortexM3l_math +) + +add_library(NUCLEO_L152RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L152RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L152RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_L152RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L152RE_serial_none INTERFACE) +target_compile_options(NUCLEO_L152RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L152RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L152RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L152RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L152RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L152RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_L152RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L152RE_usb_none INTERFACE) +target_compile_options(NUCLEO_L152RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L152RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L152RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L152RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L152RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L152RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L152RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L412KB +# ----------------------------------------------------------------------------- + +set(NUCLEO_L412KB_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)") +set(NUCLEO_L412KB_MAXSIZE 131072) +set(NUCLEO_L412KB_MAXDATASIZE 40960) +set(NUCLEO_L412KB_MCU cortex-m4) +set(NUCLEO_L412KB_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L412KB INTERFACE) +target_compile_options(NUCLEO_L412KB INTERFACE + "SHELL:-DSTM32L412xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L412KB_MCU} +) +target_compile_definitions(NUCLEO_L412KB INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L412KB" + "BOARD_NAME=\"NUCLEO_L412KB\"" + "BOARD_ID=NUCLEO_L412KB" + "VARIANT_H=\"variant_NUCLEO_L412KB.h\"" +) +target_include_directories(NUCLEO_L412KB INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L412KB_VARIANT_PATH} +) + +target_link_options(NUCLEO_L412KB INTERFACE + "LINKER:--default-script=${NUCLEO_L412KB_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L412KB_MCU} +) +target_link_libraries(NUCLEO_L412KB INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L412KB_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L412KB_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L412KB_serial_generic INTERFACE) +target_compile_options(NUCLEO_L412KB_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L412KB_serial_none INTERFACE) +target_compile_options(NUCLEO_L412KB_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L412KB_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L412KB_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L412KB_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L412KB_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L412KB_usb_HID INTERFACE) +target_compile_options(NUCLEO_L412KB_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L412KB_usb_none INTERFACE) +target_compile_options(NUCLEO_L412KB_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L412KB_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L412KB_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L412KB_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L412KB_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L412KB_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L412KB_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L432KC +# ----------------------------------------------------------------------------- + +set(NUCLEO_L432KC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L432K(B-C)U_L442KCU") +set(NUCLEO_L432KC_MAXSIZE 262144) +set(NUCLEO_L432KC_MAXDATASIZE 65536) +set(NUCLEO_L432KC_MCU cortex-m4) +set(NUCLEO_L432KC_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L432KC INTERFACE) +target_compile_options(NUCLEO_L432KC INTERFACE + "SHELL:-DSTM32L432xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L432KC_MCU} +) +target_compile_definitions(NUCLEO_L432KC INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L432KC" + "BOARD_NAME=\"NUCLEO_L432KC\"" + "BOARD_ID=NUCLEO_L432KC" + "VARIANT_H=\"variant_NUCLEO_L432KC.h\"" +) +target_include_directories(NUCLEO_L432KC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L432KC_VARIANT_PATH} +) + +target_link_options(NUCLEO_L432KC INTERFACE + "LINKER:--default-script=${NUCLEO_L432KC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L432KC_MCU} +) +target_link_libraries(NUCLEO_L432KC INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L432KC_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L432KC_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L432KC_serial_generic INTERFACE) +target_compile_options(NUCLEO_L432KC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L432KC_serial_none INTERFACE) +target_compile_options(NUCLEO_L432KC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L432KC_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L432KC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L432KC_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L432KC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L432KC_usb_HID INTERFACE) +target_compile_options(NUCLEO_L432KC_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L432KC_usb_none INTERFACE) +target_compile_options(NUCLEO_L432KC_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L432KC_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L432KC_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L432KC_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L432KC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L432KC_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L432KC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L433RC_P +# ----------------------------------------------------------------------------- + +set(NUCLEO_L433RC_P_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L433RCTxP") +set(NUCLEO_L433RC_P_MAXSIZE 262144) +set(NUCLEO_L433RC_P_MAXDATASIZE 65536) +set(NUCLEO_L433RC_P_MCU cortex-m4) +set(NUCLEO_L433RC_P_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L433RC_P INTERFACE) +target_compile_options(NUCLEO_L433RC_P INTERFACE + "SHELL:-DSTM32L433xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L433RC_P_MCU} +) +target_compile_definitions(NUCLEO_L433RC_P INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L433RC_P" + "BOARD_NAME=\"NUCLEO_L433RC_P\"" + "BOARD_ID=NUCLEO_L433RC_P" + "VARIANT_H=\"variant_NUCLEO_L433RC_P.h\"" +) +target_include_directories(NUCLEO_L433RC_P INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L433RC_P_VARIANT_PATH} +) + +target_link_options(NUCLEO_L433RC_P INTERFACE + "LINKER:--default-script=${NUCLEO_L433RC_P_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L433RC_P_MCU} +) +target_link_libraries(NUCLEO_L433RC_P INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L433RC_P_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L433RC_P_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L433RC_P_serial_generic INTERFACE) +target_compile_options(NUCLEO_L433RC_P_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L433RC_P_serial_none INTERFACE) +target_compile_options(NUCLEO_L433RC_P_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L433RC_P_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L433RC_P_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L433RC_P_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L433RC_P_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L433RC_P_usb_HID INTERFACE) +target_compile_options(NUCLEO_L433RC_P_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L433RC_P_usb_none INTERFACE) +target_compile_options(NUCLEO_L433RC_P_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L433RC_P_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L433RC_P_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L433RC_P_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L433RC_P_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L433RC_P_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L433RC_P_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L452RE +# ----------------------------------------------------------------------------- + +set(NUCLEO_L452RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)") +set(NUCLEO_L452RE_MAXSIZE 524288) +set(NUCLEO_L452RE_MAXDATASIZE 163840) +set(NUCLEO_L452RE_MCU cortex-m4) +set(NUCLEO_L452RE_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L452RE INTERFACE) +target_compile_options(NUCLEO_L452RE INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L452RE_MCU} +) +target_compile_definitions(NUCLEO_L452RE INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L452RE" + "BOARD_NAME=\"NUCLEO_L452RE\"" + "BOARD_ID=NUCLEO_L452RE" + "VARIANT_H=\"variant_NUCLEO_L452RE.h\"" +) +target_include_directories(NUCLEO_L452RE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L452RE_VARIANT_PATH} +) + +target_link_options(NUCLEO_L452RE INTERFACE + "LINKER:--default-script=${NUCLEO_L452RE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L452RE_MCU} +) +target_link_libraries(NUCLEO_L452RE INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L452RE_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L452RE_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L452RE_serial_generic INTERFACE) +target_compile_options(NUCLEO_L452RE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L452RE_serial_none INTERFACE) +target_compile_options(NUCLEO_L452RE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L452RE_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L452RE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L452RE_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L452RE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L452RE_usb_HID INTERFACE) +target_compile_options(NUCLEO_L452RE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L452RE_usb_none INTERFACE) +target_compile_options(NUCLEO_L452RE_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L452RE_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L452RE_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L452RE_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L452RE_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L452RE_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L452RE_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L452REP +# ----------------------------------------------------------------------------- + +set(NUCLEO_L452REP_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L452RETxP") +set(NUCLEO_L452REP_MAXSIZE 524288) +set(NUCLEO_L452REP_MAXDATASIZE 163840) +set(NUCLEO_L452REP_MCU cortex-m4) +set(NUCLEO_L452REP_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L452REP INTERFACE) +target_compile_options(NUCLEO_L452REP INTERFACE + "SHELL:-DSTM32L452xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L452REP_MCU} +) +target_compile_definitions(NUCLEO_L452REP INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L452RE_P" + "BOARD_NAME=\"NUCLEO_L452RE_P\"" + "BOARD_ID=NUCLEO_L452RE_P" + "VARIANT_H=\"variant_NUCLEO_L452RE_P.h\"" +) +target_include_directories(NUCLEO_L452REP INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L452REP_VARIANT_PATH} +) + +target_link_options(NUCLEO_L452REP INTERFACE + "LINKER:--default-script=${NUCLEO_L452REP_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=163840" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L452REP_MCU} +) +target_link_libraries(NUCLEO_L452REP INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L452REP_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L452REP_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L452REP_serial_generic INTERFACE) +target_compile_options(NUCLEO_L452REP_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L452REP_serial_none INTERFACE) +target_compile_options(NUCLEO_L452REP_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L452REP_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L452REP_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L452REP_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L452REP_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L452REP_usb_HID INTERFACE) +target_compile_options(NUCLEO_L452REP_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L452REP_usb_none INTERFACE) +target_compile_options(NUCLEO_L452REP_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L452REP_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L452REP_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L452REP_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L452REP_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L452REP_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L452REP_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L476RG +# ----------------------------------------------------------------------------- + +set(NUCLEO_L476RG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT") +set(NUCLEO_L476RG_MAXSIZE 1048576) +set(NUCLEO_L476RG_MAXDATASIZE 98304) +set(NUCLEO_L476RG_MCU cortex-m4) +set(NUCLEO_L476RG_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L476RG INTERFACE) +target_compile_options(NUCLEO_L476RG INTERFACE + "SHELL:-DSTM32L476xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L476RG_MCU} +) +target_compile_definitions(NUCLEO_L476RG INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L476RG" + "BOARD_NAME=\"NUCLEO_L476RG\"" + "BOARD_ID=NUCLEO_L476RG" + "VARIANT_H=\"variant_NUCLEO_L476RG.h\"" +) +target_include_directories(NUCLEO_L476RG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L476RG_VARIANT_PATH} +) + +target_link_options(NUCLEO_L476RG INTERFACE + "LINKER:--default-script=${NUCLEO_L476RG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L476RG_MCU} +) +target_link_libraries(NUCLEO_L476RG INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L476RG_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L476RG_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L476RG_serial_generic INTERFACE) +target_compile_options(NUCLEO_L476RG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L476RG_serial_none INTERFACE) +target_compile_options(NUCLEO_L476RG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L476RG_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L476RG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L476RG_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L476RG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L476RG_usb_HID INTERFACE) +target_compile_options(NUCLEO_L476RG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L476RG_usb_none INTERFACE) +target_compile_options(NUCLEO_L476RG_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L476RG_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L476RG_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L476RG_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L476RG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L476RG_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L476RG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L496ZG +# ----------------------------------------------------------------------------- + +set(NUCLEO_L496ZG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT") +set(NUCLEO_L496ZG_MAXSIZE 1048576) +set(NUCLEO_L496ZG_MAXDATASIZE 327680) +set(NUCLEO_L496ZG_MCU cortex-m4) +set(NUCLEO_L496ZG_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L496ZG INTERFACE) +target_compile_options(NUCLEO_L496ZG INTERFACE + "SHELL:-DSTM32L496xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L496ZG_MCU} +) +target_compile_definitions(NUCLEO_L496ZG INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L496ZG" + "BOARD_NAME=\"NUCLEO_L496ZG\"" + "BOARD_ID=NUCLEO_L496ZG" + "VARIANT_H=\"variant_NUCLEO_L496ZG.h\"" +) +target_include_directories(NUCLEO_L496ZG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L496ZG_VARIANT_PATH} +) + +target_link_options(NUCLEO_L496ZG INTERFACE + "LINKER:--default-script=${NUCLEO_L496ZG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L496ZG_MCU} +) +target_link_libraries(NUCLEO_L496ZG INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L496ZG_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L496ZG_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L496ZG_serial_generic INTERFACE) +target_compile_options(NUCLEO_L496ZG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L496ZG_serial_none INTERFACE) +target_compile_options(NUCLEO_L496ZG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L496ZG_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L496ZG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L496ZG_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L496ZG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L496ZG_usb_HID INTERFACE) +target_compile_options(NUCLEO_L496ZG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L496ZG_usb_none INTERFACE) +target_compile_options(NUCLEO_L496ZG_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L496ZG_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L496ZG_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L496ZG_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L496ZG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L496ZG_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L496ZG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L496ZG-P +# ----------------------------------------------------------------------------- + +set(NUCLEO_L496ZG-P_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP") +set(NUCLEO_L496ZG-P_MAXSIZE 1048576) +set(NUCLEO_L496ZG-P_MAXDATASIZE 327680) +set(NUCLEO_L496ZG-P_MCU cortex-m4) +set(NUCLEO_L496ZG-P_FPCONF "fpv4-sp-d16-") +add_library(NUCLEO_L496ZG-P INTERFACE) +target_compile_options(NUCLEO_L496ZG-P INTERFACE + "SHELL:-DSTM32L496xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 " + -mcpu=${NUCLEO_L496ZG-P_MCU} +) +target_compile_definitions(NUCLEO_L496ZG-P INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L496ZG_P" + "BOARD_NAME=\"NUCLEO_L496ZG_P\"" + "BOARD_ID=NUCLEO_L496ZG_P" + "VARIANT_H=\"variant_NUCLEO_L496ZG_P.h\"" +) +target_include_directories(NUCLEO_L496ZG-P INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L496ZG-P_VARIANT_PATH} +) + +target_link_options(NUCLEO_L496ZG-P INTERFACE + "LINKER:--default-script=${NUCLEO_L496ZG-P_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=327680" + "SHELL:-mfpu=fpv4-sp-d16 " + -mcpu=${NUCLEO_L496ZG-P_MCU} +) +target_link_libraries(NUCLEO_L496ZG-P INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L496ZG-P_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L496ZG-P_serial_generic INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L496ZG-P_serial_none INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L496ZG-P_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L496ZG-P_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L496ZG-P_usb_HID INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L496ZG-P_usb_none INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L496ZG-P_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L496ZG-P_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L496ZG-P_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L496ZG-P_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L4R5ZI +# ----------------------------------------------------------------------------- + +set(NUCLEO_L4R5ZI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT") +set(NUCLEO_L4R5ZI_MAXSIZE 2097152) +set(NUCLEO_L4R5ZI_MAXDATASIZE 655360) +set(NUCLEO_L4R5ZI_MCU cortex-m4) +set(NUCLEO_L4R5ZI_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L4R5ZI INTERFACE) +target_compile_options(NUCLEO_L4R5ZI INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L4R5ZI_MCU} +) +target_compile_definitions(NUCLEO_L4R5ZI INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L4R5ZI" + "BOARD_NAME=\"NUCLEO_L4R5ZI\"" + "BOARD_ID=NUCLEO_L4R5ZI" + "VARIANT_H=\"variant_NUCLEO_L4R5ZI.h\"" +) +target_include_directories(NUCLEO_L4R5ZI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L4R5ZI_VARIANT_PATH} +) + +target_link_options(NUCLEO_L4R5ZI INTERFACE + "LINKER:--default-script=${NUCLEO_L4R5ZI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L4R5ZI_MCU} +) +target_link_libraries(NUCLEO_L4R5ZI INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L4R5ZI_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L4R5ZI_serial_generic INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L4R5ZI_serial_none INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L4R5ZI_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L4R5ZI_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L4R5ZI_usb_HID INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L4R5ZI_usb_none INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L4R5ZI_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L4R5ZI_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L4R5ZI_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L4R5ZI_P +# ----------------------------------------------------------------------------- + +set(NUCLEO_L4R5ZI_P_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5ZITxP") +set(NUCLEO_L4R5ZI_P_MAXSIZE 2097152) +set(NUCLEO_L4R5ZI_P_MAXDATASIZE 655360) +set(NUCLEO_L4R5ZI_P_MCU cortex-m4) +set(NUCLEO_L4R5ZI_P_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L4R5ZI_P INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L4R5ZI_P_MCU} +) +target_compile_definitions(NUCLEO_L4R5ZI_P INTERFACE + "STM32L4xx" + "ARDUINO_NUCLEO_L4R5ZI_P" + "BOARD_NAME=\"NUCLEO_L4R5ZI_P\"" + "BOARD_ID=NUCLEO_L4R5ZI_P" + "VARIANT_H=\"variant_NUCLEO_L4R5ZI_P.h\"" +) +target_include_directories(NUCLEO_L4R5ZI_P INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${NUCLEO_L4R5ZI_P_VARIANT_PATH} +) + +target_link_options(NUCLEO_L4R5ZI_P INTERFACE + "LINKER:--default-script=${NUCLEO_L4R5ZI_P_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L4R5ZI_P_MCU} +) +target_link_libraries(NUCLEO_L4R5ZI_P INTERFACE + arm_cortexM4lf_math +) + +add_library(NUCLEO_L4R5ZI_P_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L4R5ZI_P_serial_generic INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L4R5ZI_P_serial_none INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L4R5ZI_P_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L4R5ZI_P_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L4R5ZI_P_usb_HID INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L4R5ZI_P_usb_none INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L4R5ZI_P_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L4R5ZI_P_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L4R5ZI_P_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L4R5ZI_P_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_L552ZE_Q +# ----------------------------------------------------------------------------- + +set(NUCLEO_L552ZE_Q_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ") +set(NUCLEO_L552ZE_Q_MAXSIZE 524288) +set(NUCLEO_L552ZE_Q_MAXDATASIZE 196608) +set(NUCLEO_L552ZE_Q_MCU cortex-m33) +set(NUCLEO_L552ZE_Q_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_L552ZE_Q INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q INTERFACE + "SHELL:-DSTM32L552xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L552ZE_Q_MCU} +) +target_compile_definitions(NUCLEO_L552ZE_Q INTERFACE + "STM32L5xx" + "ARDUINO_NUCLEO_L552ZE_Q" + "BOARD_NAME=\"NUCLEO_L552ZE_Q\"" + "BOARD_ID=NUCLEO_L552ZE_Q" + "VARIANT_H=\"variant_NUCLEO_L552ZE_Q.h\"" +) +target_include_directories(NUCLEO_L552ZE_Q INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/gcc/ + ${NUCLEO_L552ZE_Q_VARIANT_PATH} +) + +target_link_options(NUCLEO_L552ZE_Q INTERFACE + "LINKER:--default-script=${NUCLEO_L552ZE_Q_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_L552ZE_Q_MCU} +) +target_link_libraries(NUCLEO_L552ZE_Q INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(NUCLEO_L552ZE_Q_serial_disabled INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_L552ZE_Q_serial_generic INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_L552ZE_Q_serial_none INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_L552ZE_Q_usb_CDC INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_L552ZE_Q_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_L552ZE_Q_usb_HID INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_L552ZE_Q_usb_none INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_L552ZE_Q_xusb_FS INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_L552ZE_Q_xusb_HS INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_L552ZE_Q_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_L552ZE_Q_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_U575ZI_Q +# ----------------------------------------------------------------------------- + +set(NUCLEO_U575ZI_Q_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ") +set(NUCLEO_U575ZI_Q_MAXSIZE 2097152) +set(NUCLEO_U575ZI_Q_MAXDATASIZE 786432) +set(NUCLEO_U575ZI_Q_MCU cortex-m33) +set(NUCLEO_U575ZI_Q_FPCONF "fpv4-sp-d16-hard") +add_library(NUCLEO_U575ZI_Q INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q INTERFACE + "SHELL:-DSTM32U575xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_U575ZI_Q_MCU} +) +target_compile_definitions(NUCLEO_U575ZI_Q INTERFACE + "STM32U5xx" + "ARDUINO_NUCLEO_U575ZI_Q" + "BOARD_NAME=\"NUCLEO_U575ZI_Q\"" + "BOARD_ID=NUCLEO_U575ZI_Q" + "VARIANT_H=\"variant_NUCLEO_U575ZI_Q.h\"" +) +target_include_directories(NUCLEO_U575ZI_Q INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${NUCLEO_U575ZI_Q_VARIANT_PATH} +) + +target_link_options(NUCLEO_U575ZI_Q INTERFACE + "LINKER:--default-script=${NUCLEO_U575ZI_Q_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=786432" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${NUCLEO_U575ZI_Q_MCU} +) +target_link_libraries(NUCLEO_U575ZI_Q INTERFACE + arm_ARMv8MMLlfsp_math +) + +add_library(NUCLEO_U575ZI_Q_serial_disabled INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_U575ZI_Q_serial_generic INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_U575ZI_Q_serial_none INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_U575ZI_Q_usb_CDC INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_U575ZI_Q_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_U575ZI_Q_usb_HID INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_U575ZI_Q_usb_none INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_U575ZI_Q_xusb_FS INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_U575ZI_Q_xusb_HS INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_U575ZI_Q_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_U575ZI_Q_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# NUCLEO_WL55JC1 +# ----------------------------------------------------------------------------- + +set(NUCLEO_WL55JC1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I") +set(NUCLEO_WL55JC1_MAXSIZE 262144) +set(NUCLEO_WL55JC1_MAXDATASIZE 65536) +set(NUCLEO_WL55JC1_MCU cortex-m4) +set(NUCLEO_WL55JC1_FPCONF "-") +add_library(NUCLEO_WL55JC1 INTERFACE) +target_compile_options(NUCLEO_WL55JC1 INTERFACE + "SHELL:-DSTM32WLE5xx -DUSE_CM4_STARTUP_FILE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${NUCLEO_WL55JC1_MCU} +) +target_compile_definitions(NUCLEO_WL55JC1 INTERFACE + "STM32WLxx" + "ARDUINO_NUCLEO_WL55JC1" + "BOARD_NAME=\"NUCLEO_WL55JC1\"" + "BOARD_ID=NUCLEO_WL55JC1" + "VARIANT_H=\"variant_NUCLEO_WL55JC1.h\"" +) +target_include_directories(NUCLEO_WL55JC1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${NUCLEO_WL55JC1_VARIANT_PATH} +) + +target_link_options(NUCLEO_WL55JC1 INTERFACE + "LINKER:--default-script=${NUCLEO_WL55JC1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${NUCLEO_WL55JC1_MCU} +) +target_link_libraries(NUCLEO_WL55JC1 INTERFACE + arm_cortexM4l_math +) + +add_library(NUCLEO_WL55JC1_serial_disabled INTERFACE) +target_compile_options(NUCLEO_WL55JC1_serial_disabled INTERFACE + "SHELL:" +) +add_library(NUCLEO_WL55JC1_serial_generic INTERFACE) +target_compile_options(NUCLEO_WL55JC1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(NUCLEO_WL55JC1_serial_none INTERFACE) +target_compile_options(NUCLEO_WL55JC1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(NUCLEO_WL55JC1_usb_CDC INTERFACE) +target_compile_options(NUCLEO_WL55JC1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(NUCLEO_WL55JC1_usb_CDCgen INTERFACE) +target_compile_options(NUCLEO_WL55JC1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(NUCLEO_WL55JC1_usb_HID INTERFACE) +target_compile_options(NUCLEO_WL55JC1_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(NUCLEO_WL55JC1_usb_none INTERFACE) +target_compile_options(NUCLEO_WL55JC1_usb_none INTERFACE + "SHELL:" +) +add_library(NUCLEO_WL55JC1_xusb_FS INTERFACE) +target_compile_options(NUCLEO_WL55JC1_xusb_FS INTERFACE + "SHELL:" +) +add_library(NUCLEO_WL55JC1_xusb_HS INTERFACE) +target_compile_options(NUCLEO_WL55JC1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(NUCLEO_WL55JC1_xusb_HSFS INTERFACE) +target_compile_options(NUCLEO_WL55JC1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# OLIMEXINO_STM32F3 +# ----------------------------------------------------------------------------- + +set(OLIMEXINO_STM32F3_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(B-C)T") +set(OLIMEXINO_STM32F3_MAXSIZE 262144) +set(OLIMEXINO_STM32F3_MAXDATASIZE 40960) +set(OLIMEXINO_STM32F3_MCU cortex-m4) +set(OLIMEXINO_STM32F3_FPCONF "-") +add_library(OLIMEXINO_STM32F3 INTERFACE) +target_compile_options(OLIMEXINO_STM32F3 INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${OLIMEXINO_STM32F3_MCU} +) +target_compile_definitions(OLIMEXINO_STM32F3 INTERFACE + "STM32F3xx" + "ARDUINO_OLIMEXINO_STM32F3" + "BOARD_NAME=\"OLIMEXINO_STM32F3\"" + "BOARD_ID=OLIMEXINO_STM32F3" + "VARIANT_H=\"variant_OLIMEXINO_STM32F3.h\"" +) +target_include_directories(OLIMEXINO_STM32F3 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${OLIMEXINO_STM32F3_VARIANT_PATH} +) + +target_link_options(OLIMEXINO_STM32F3 INTERFACE + "LINKER:--default-script=${OLIMEXINO_STM32F3_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${OLIMEXINO_STM32F3_MCU} +) +target_link_libraries(OLIMEXINO_STM32F3 INTERFACE + arm_cortexM4lf_math +) + +add_library(OLIMEXINO_STM32F3_serial_disabled INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_serial_disabled INTERFACE + "SHELL:" +) +add_library(OLIMEXINO_STM32F3_serial_generic INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(OLIMEXINO_STM32F3_serial_none INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(OLIMEXINO_STM32F3_usb_CDC INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(OLIMEXINO_STM32F3_usb_CDCgen INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(OLIMEXINO_STM32F3_usb_HID INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(OLIMEXINO_STM32F3_usb_none INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_usb_none INTERFACE + "SHELL:" +) +add_library(OLIMEXINO_STM32F3_xusb_FS INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_xusb_FS INTERFACE + "SHELL:" +) +add_library(OLIMEXINO_STM32F3_xusb_HS INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(OLIMEXINO_STM32F3_xusb_HSFS INTERFACE) +target_compile_options(OLIMEXINO_STM32F3_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# P_NUCLEO_WB55RG +# ----------------------------------------------------------------------------- + +set(P_NUCLEO_WB55RG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB55R(C-E-G)V") +set(P_NUCLEO_WB55RG_MAXSIZE 524288) +set(P_NUCLEO_WB55RG_MAXDATASIZE 196608) +set(P_NUCLEO_WB55RG_MCU cortex-m4) +set(P_NUCLEO_WB55RG_FPCONF "fpv4-sp-d16-hard") +add_library(P_NUCLEO_WB55RG INTERFACE) +target_compile_options(P_NUCLEO_WB55RG INTERFACE + "SHELL:-DSTM32WB55xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${P_NUCLEO_WB55RG_MCU} +) +target_compile_definitions(P_NUCLEO_WB55RG INTERFACE + "STM32WBxx" + "ARDUINO_P_NUCLEO_WB55RG" + "BOARD_NAME=\"P_NUCLEO_WB55RG\"" + "BOARD_ID=P_NUCLEO_WB55RG" + "VARIANT_H=\"variant_P_NUCLEO_WB55RG.h\"" +) +target_include_directories(P_NUCLEO_WB55RG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${P_NUCLEO_WB55RG_VARIANT_PATH} +) + +target_link_options(P_NUCLEO_WB55RG INTERFACE + "LINKER:--default-script=${P_NUCLEO_WB55RG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${P_NUCLEO_WB55RG_MCU} +) +target_link_libraries(P_NUCLEO_WB55RG INTERFACE + arm_cortexM4lf_math +) + +add_library(P_NUCLEO_WB55RG_serial_disabled INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_serial_disabled INTERFACE + "SHELL:" +) +add_library(P_NUCLEO_WB55RG_serial_generic INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(P_NUCLEO_WB55RG_serial_none INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(P_NUCLEO_WB55RG_usb_CDC INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(P_NUCLEO_WB55RG_usb_CDCgen INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(P_NUCLEO_WB55RG_usb_HID INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(P_NUCLEO_WB55RG_usb_none INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_usb_none INTERFACE + "SHELL:" +) +add_library(P_NUCLEO_WB55RG_xusb_FS INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_xusb_FS INTERFACE + "SHELL:" +) +add_library(P_NUCLEO_WB55RG_xusb_HS INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(P_NUCLEO_WB55RG_xusb_HSFS INTERFACE) +target_compile_options(P_NUCLEO_WB55RG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# PRNTR_V1 +# ----------------------------------------------------------------------------- + +set(PRNTR_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(PRNTR_V1_MAXSIZE 524288) +set(PRNTR_V1_MAXDATASIZE 131072) +set(PRNTR_V1_MCU cortex-m4) +set(PRNTR_V1_FPCONF "fpv4-sp-d16-hard") +add_library(PRNTR_V1 INTERFACE) +target_compile_options(PRNTR_V1 INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PRNTR_V1_MCU} +) +target_compile_definitions(PRNTR_V1 INTERFACE + "STM32F4xx" + "ARDUINO_PRNTR_V1" + "BOARD_NAME=\"PRNTR_V1\"" + "BOARD_ID=PRNTR_V1" + "VARIANT_H=\"variant_PRNTR_V1.h\"" +) +target_include_directories(PRNTR_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${PRNTR_V1_VARIANT_PATH} +) + +target_link_options(PRNTR_V1 INTERFACE + "LINKER:--default-script=${PRNTR_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PRNTR_V1_MCU} +) +target_link_libraries(PRNTR_V1 INTERFACE + arm_cortexM4lf_math +) + +add_library(PRNTR_V1_serial_disabled INTERFACE) +target_compile_options(PRNTR_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(PRNTR_V1_serial_generic INTERFACE) +target_compile_options(PRNTR_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PRNTR_V1_serial_none INTERFACE) +target_compile_options(PRNTR_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PRNTR_V1_usb_CDC INTERFACE) +target_compile_options(PRNTR_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PRNTR_V1_usb_CDCgen INTERFACE) +target_compile_options(PRNTR_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PRNTR_V1_usb_none INTERFACE) +target_compile_options(PRNTR_V1_usb_none INTERFACE + "SHELL:" +) +add_library(PRNTR_V1_xusb_FS INTERFACE) +target_compile_options(PRNTR_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(PRNTR_V1_xusb_HS INTERFACE) +target_compile_options(PRNTR_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(PRNTR_V1_xusb_HSFS INTERFACE) +target_compile_options(PRNTR_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# PRNTR_V2 +# ----------------------------------------------------------------------------- + +set(PRNTR_V2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T") +set(PRNTR_V2_MAXSIZE 524288) +set(PRNTR_V2_MAXDATASIZE 131072) +set(PRNTR_V2_MCU cortex-m4) +set(PRNTR_V2_FPCONF "fpv4-sp-d16-hard") +add_library(PRNTR_V2 INTERFACE) +target_compile_options(PRNTR_V2 INTERFACE + "SHELL:-DSTM32F407xx -DVECT_TAB_OFFSET=0x8000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PRNTR_V2_MCU} +) +target_compile_definitions(PRNTR_V2 INTERFACE + "STM32F4xx" + "ARDUINO_PRNTR_V2" + "BOARD_NAME=\"PRNTR_V2\"" + "BOARD_ID=PRNTR_V2" + "VARIANT_H=\"variant_PRNTR_V2.h\"" +) +target_include_directories(PRNTR_V2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${PRNTR_V2_VARIANT_PATH} +) + +target_link_options(PRNTR_V2 INTERFACE + "LINKER:--default-script=${PRNTR_V2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x8000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PRNTR_V2_MCU} +) +target_link_libraries(PRNTR_V2 INTERFACE + arm_cortexM4lf_math +) + +add_library(PRNTR_V2_serial_disabled INTERFACE) +target_compile_options(PRNTR_V2_serial_disabled INTERFACE + "SHELL:" +) +add_library(PRNTR_V2_serial_generic INTERFACE) +target_compile_options(PRNTR_V2_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PRNTR_V2_serial_none INTERFACE) +target_compile_options(PRNTR_V2_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PRNTR_V2_usb_CDC INTERFACE) +target_compile_options(PRNTR_V2_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PRNTR_V2_usb_CDCgen INTERFACE) +target_compile_options(PRNTR_V2_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PRNTR_V2_usb_none INTERFACE) +target_compile_options(PRNTR_V2_usb_none INTERFACE + "SHELL:" +) +add_library(PRNTR_V2_xusb_FS INTERFACE) +target_compile_options(PRNTR_V2_xusb_FS INTERFACE + "SHELL:" +) +add_library(PRNTR_V2_xusb_HS INTERFACE) +target_compile_options(PRNTR_V2_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(PRNTR_V2_xusb_HSFS INTERFACE) +target_compile_options(PRNTR_V2_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# PX_HER0 +# ----------------------------------------------------------------------------- + +set(PX_HER0_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T") +set(PX_HER0_MAXSIZE 131072) +set(PX_HER0_MAXDATASIZE 20480) +set(PX_HER0_MCU cortex-m0plus) +set(PX_HER0_FPCONF "-") +add_library(PX_HER0 INTERFACE) +target_compile_options(PX_HER0 INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${PX_HER0_MCU} +) +target_compile_definitions(PX_HER0 INTERFACE + "STM32L0xx" + "ARDUINO_PX_HER0" + "BOARD_NAME=\"PX_HER0\"" + "BOARD_ID=PX_HER0" + "VARIANT_H=\"variant_PX_HER0.h\"" +) +target_include_directories(PX_HER0 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${PX_HER0_VARIANT_PATH} +) + +target_link_options(PX_HER0 INTERFACE + "LINKER:--default-script=${PX_HER0_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${PX_HER0_MCU} +) +target_link_libraries(PX_HER0 INTERFACE + arm_cortexM0l_math +) + +add_library(PX_HER0_serial_disabled INTERFACE) +target_compile_options(PX_HER0_serial_disabled INTERFACE + "SHELL:" +) +add_library(PX_HER0_serial_generic INTERFACE) +target_compile_options(PX_HER0_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PX_HER0_serial_none INTERFACE) +target_compile_options(PX_HER0_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PX_HER0_usb_CDC INTERFACE) +target_compile_options(PX_HER0_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PX_HER0_usb_CDCgen INTERFACE) +target_compile_options(PX_HER0_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PX_HER0_usb_HID INTERFACE) +target_compile_options(PX_HER0_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(PX_HER0_usb_none INTERFACE) +target_compile_options(PX_HER0_usb_none INTERFACE + "SHELL:" +) + +# PYBSTICK26_DUINO +# ----------------------------------------------------------------------------- + +set(PYBSTICK26_DUINO_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F072R8T_F072RB(H-I-T)") +set(PYBSTICK26_DUINO_MAXSIZE 131072) +set(PYBSTICK26_DUINO_MAXDATASIZE 16384) +set(PYBSTICK26_DUINO_MCU cortex-m0) +set(PYBSTICK26_DUINO_FPCONF "-") +add_library(PYBSTICK26_DUINO INTERFACE) +target_compile_options(PYBSTICK26_DUINO INTERFACE + "SHELL:-DSTM32F072xB " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${PYBSTICK26_DUINO_MCU} +) +target_compile_definitions(PYBSTICK26_DUINO INTERFACE + "STM32F0xx" + "ARDUINO_PYBSTICK26_DUINO" + "BOARD_NAME=\"PYBSTICK26_DUINO\"" + "BOARD_ID=PYBSTICK26_DUINO" + "VARIANT_H=\"variant_PYBSTICK26_DUINO.h\"" +) +target_include_directories(PYBSTICK26_DUINO INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${PYBSTICK26_DUINO_VARIANT_PATH} +) + +target_link_options(PYBSTICK26_DUINO INTERFACE + "LINKER:--default-script=${PYBSTICK26_DUINO_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${PYBSTICK26_DUINO_MCU} +) +target_link_libraries(PYBSTICK26_DUINO INTERFACE + arm_cortexM0l_math +) + +add_library(PYBSTICK26_DUINO_serial_disabled INTERFACE) +target_compile_options(PYBSTICK26_DUINO_serial_disabled INTERFACE + "SHELL:" +) +add_library(PYBSTICK26_DUINO_serial_generic INTERFACE) +target_compile_options(PYBSTICK26_DUINO_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PYBSTICK26_DUINO_serial_none INTERFACE) +target_compile_options(PYBSTICK26_DUINO_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PYBSTICK26_DUINO_usb_CDC INTERFACE) +target_compile_options(PYBSTICK26_DUINO_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PYBSTICK26_DUINO_usb_CDCgen INTERFACE) +target_compile_options(PYBSTICK26_DUINO_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PYBSTICK26_DUINO_usb_HID INTERFACE) +target_compile_options(PYBSTICK26_DUINO_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(PYBSTICK26_DUINO_usb_none INTERFACE) +target_compile_options(PYBSTICK26_DUINO_usb_none INTERFACE + "SHELL:" +) + +# PYBSTICK26_LITE +# ----------------------------------------------------------------------------- + +set(PYBSTICK26_LITE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)") +set(PYBSTICK26_LITE_MAXSIZE 524288) +set(PYBSTICK26_LITE_MAXDATASIZE 98304) +set(PYBSTICK26_LITE_MCU cortex-m4) +set(PYBSTICK26_LITE_FPCONF "fpv4-sp-d16-hard") +add_library(PYBSTICK26_LITE INTERFACE) +target_compile_options(PYBSTICK26_LITE INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PYBSTICK26_LITE_MCU} +) +target_compile_definitions(PYBSTICK26_LITE INTERFACE + "STM32F4xx" + "ARDUINO_PYBSTICK26_LITE" + "BOARD_NAME=\"PYBSTICK26_LITE\"" + "BOARD_ID=PYBSTICK26_LITE" + "VARIANT_H=\"variant_PYBSTICK26_LITE.h\"" +) +target_include_directories(PYBSTICK26_LITE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${PYBSTICK26_LITE_VARIANT_PATH} +) + +target_link_options(PYBSTICK26_LITE INTERFACE + "LINKER:--default-script=${PYBSTICK26_LITE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PYBSTICK26_LITE_MCU} +) +target_link_libraries(PYBSTICK26_LITE INTERFACE + arm_cortexM4lf_math +) + +add_library(PYBSTICK26_LITE_serial_disabled INTERFACE) +target_compile_options(PYBSTICK26_LITE_serial_disabled INTERFACE + "SHELL:" +) +add_library(PYBSTICK26_LITE_serial_generic INTERFACE) +target_compile_options(PYBSTICK26_LITE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PYBSTICK26_LITE_serial_none INTERFACE) +target_compile_options(PYBSTICK26_LITE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PYBSTICK26_LITE_usb_CDC INTERFACE) +target_compile_options(PYBSTICK26_LITE_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PYBSTICK26_LITE_usb_CDCgen INTERFACE) +target_compile_options(PYBSTICK26_LITE_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PYBSTICK26_LITE_usb_HID INTERFACE) +target_compile_options(PYBSTICK26_LITE_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(PYBSTICK26_LITE_usb_none INTERFACE) +target_compile_options(PYBSTICK26_LITE_usb_none INTERFACE + "SHELL:" +) + +# PYBSTICK26_PRO +# ----------------------------------------------------------------------------- + +set(PYBSTICK26_PRO_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F412R(E-G)(T-Y)x(P)") +set(PYBSTICK26_PRO_MAXSIZE 524288) +set(PYBSTICK26_PRO_MAXDATASIZE 262144) +set(PYBSTICK26_PRO_MCU cortex-m4) +set(PYBSTICK26_PRO_FPCONF "fpv4-sp-d16-hard") +add_library(PYBSTICK26_PRO INTERFACE) +target_compile_options(PYBSTICK26_PRO INTERFACE + "SHELL:-DSTM32F412Rx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PYBSTICK26_PRO_MCU} +) +target_compile_definitions(PYBSTICK26_PRO INTERFACE + "STM32F4xx" + "ARDUINO_PYBSTICK26_PRO" + "BOARD_NAME=\"PYBSTICK26_PRO\"" + "BOARD_ID=PYBSTICK26_PRO" + "VARIANT_H=\"variant_PYBSTICK26_PRO.h\"" +) +target_include_directories(PYBSTICK26_PRO INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${PYBSTICK26_PRO_VARIANT_PATH} +) + +target_link_options(PYBSTICK26_PRO INTERFACE + "LINKER:--default-script=${PYBSTICK26_PRO_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=262144" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PYBSTICK26_PRO_MCU} +) +target_link_libraries(PYBSTICK26_PRO INTERFACE + arm_cortexM4lf_math +) + +add_library(PYBSTICK26_PRO_serial_disabled INTERFACE) +target_compile_options(PYBSTICK26_PRO_serial_disabled INTERFACE + "SHELL:" +) +add_library(PYBSTICK26_PRO_serial_generic INTERFACE) +target_compile_options(PYBSTICK26_PRO_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PYBSTICK26_PRO_serial_none INTERFACE) +target_compile_options(PYBSTICK26_PRO_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PYBSTICK26_PRO_usb_CDC INTERFACE) +target_compile_options(PYBSTICK26_PRO_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PYBSTICK26_PRO_usb_CDCgen INTERFACE) +target_compile_options(PYBSTICK26_PRO_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PYBSTICK26_PRO_usb_HID INTERFACE) +target_compile_options(PYBSTICK26_PRO_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(PYBSTICK26_PRO_usb_none INTERFACE) +target_compile_options(PYBSTICK26_PRO_usb_none INTERFACE + "SHELL:" +) + +# PYBSTICK26_STD +# ----------------------------------------------------------------------------- + +set(PYBSTICK26_STD_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411R(C-E)T") +set(PYBSTICK26_STD_MAXSIZE 524288) +set(PYBSTICK26_STD_MAXDATASIZE 131072) +set(PYBSTICK26_STD_MCU cortex-m4) +set(PYBSTICK26_STD_FPCONF "fpv4-sp-d16-hard") +add_library(PYBSTICK26_STD INTERFACE) +target_compile_options(PYBSTICK26_STD INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PYBSTICK26_STD_MCU} +) +target_compile_definitions(PYBSTICK26_STD INTERFACE + "STM32F4xx" + "ARDUINO_PYBSTICK26_STD" + "BOARD_NAME=\"PYBSTICK26_STD\"" + "BOARD_ID=PYBSTICK26_STD" + "VARIANT_H=\"variant_PYBSTICK26_STD.h\"" +) +target_include_directories(PYBSTICK26_STD INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${PYBSTICK26_STD_VARIANT_PATH} +) + +target_link_options(PYBSTICK26_STD INTERFACE + "LINKER:--default-script=${PYBSTICK26_STD_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${PYBSTICK26_STD_MCU} +) +target_link_libraries(PYBSTICK26_STD INTERFACE + arm_cortexM4lf_math +) + +add_library(PYBSTICK26_STD_serial_disabled INTERFACE) +target_compile_options(PYBSTICK26_STD_serial_disabled INTERFACE + "SHELL:" +) +add_library(PYBSTICK26_STD_serial_generic INTERFACE) +target_compile_options(PYBSTICK26_STD_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(PYBSTICK26_STD_serial_none INTERFACE) +target_compile_options(PYBSTICK26_STD_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(PYBSTICK26_STD_usb_CDC INTERFACE) +target_compile_options(PYBSTICK26_STD_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(PYBSTICK26_STD_usb_CDCgen INTERFACE) +target_compile_options(PYBSTICK26_STD_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(PYBSTICK26_STD_usb_HID INTERFACE) +target_compile_options(PYBSTICK26_STD_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(PYBSTICK26_STD_usb_none INTERFACE) +target_compile_options(PYBSTICK26_STD_usb_none INTERFACE + "SHELL:" +) + +# RAK811_TRACKER +# ----------------------------------------------------------------------------- + +set(RAK811_TRACKER_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(RAK811_TRACKER_MAXSIZE 131072) +set(RAK811_TRACKER_MAXDATASIZE 16384) +set(RAK811_TRACKER_MCU cortex-m3) +set(RAK811_TRACKER_FPCONF "-") +add_library(RAK811_TRACKER INTERFACE) +target_compile_options(RAK811_TRACKER INTERFACE + "SHELL:-DSTM32L151xB " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${RAK811_TRACKER_MCU} +) +target_compile_definitions(RAK811_TRACKER INTERFACE + "STM32L1xx" + "ARDUINO_RAK811_TRACKER" + "BOARD_NAME=\"RAK811_TRACKER\"" + "BOARD_ID=RAK811_TRACKER" + "VARIANT_H=\"variant_RAK811_TRACKER.h\"" +) +target_include_directories(RAK811_TRACKER INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${RAK811_TRACKER_VARIANT_PATH} +) + +target_link_options(RAK811_TRACKER INTERFACE + "LINKER:--default-script=${RAK811_TRACKER_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=16384" + "SHELL: " + -mcpu=${RAK811_TRACKER_MCU} +) +target_link_libraries(RAK811_TRACKER INTERFACE + arm_cortexM3l_math +) + +add_library(RAK811_TRACKER_serial_disabled INTERFACE) +target_compile_options(RAK811_TRACKER_serial_disabled INTERFACE + "SHELL:" +) +add_library(RAK811_TRACKER_serial_generic INTERFACE) +target_compile_options(RAK811_TRACKER_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(RAK811_TRACKER_serial_none INTERFACE) +target_compile_options(RAK811_TRACKER_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# RAK811_TRACKERA +# ----------------------------------------------------------------------------- + +set(RAK811_TRACKERA_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)") +set(RAK811_TRACKERA_MAXSIZE 131072) +set(RAK811_TRACKERA_MAXDATASIZE 32768) +set(RAK811_TRACKERA_MCU cortex-m3) +set(RAK811_TRACKERA_FPCONF "-") +add_library(RAK811_TRACKERA INTERFACE) +target_compile_options(RAK811_TRACKERA INTERFACE + "SHELL:-DSTM32L151xBA " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${RAK811_TRACKERA_MCU} +) +target_compile_definitions(RAK811_TRACKERA INTERFACE + "STM32L1xx" + "ARDUINO_RAK811_TRACKERA" + "BOARD_NAME=\"RAK811_TRACKERA\"" + "BOARD_ID=RAK811_TRACKERA" + "VARIANT_H=\"variant_RAK811_TRACKER.h\"" +) +target_include_directories(RAK811_TRACKERA INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/gcc/ + ${RAK811_TRACKERA_VARIANT_PATH} +) + +target_link_options(RAK811_TRACKERA INTERFACE + "LINKER:--default-script=${RAK811_TRACKERA_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL: " + -mcpu=${RAK811_TRACKERA_MCU} +) +target_link_libraries(RAK811_TRACKERA INTERFACE + arm_cortexM3l_math +) + +add_library(RAK811_TRACKERA_serial_disabled INTERFACE) +target_compile_options(RAK811_TRACKERA_serial_disabled INTERFACE + "SHELL:" +) +add_library(RAK811_TRACKERA_serial_generic INTERFACE) +target_compile_options(RAK811_TRACKERA_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(RAK811_TRACKERA_serial_none INTERFACE) +target_compile_options(RAK811_TRACKERA_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# REMRAM_V1 +# ----------------------------------------------------------------------------- + +set(REMRAM_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)") +set(REMRAM_V1_MAXSIZE 2097152) +set(REMRAM_V1_MAXDATASIZE 524288) +set(REMRAM_V1_MCU cortex-m7) +set(REMRAM_V1_FPCONF "fpv4-sp-d16-hard") +add_library(REMRAM_V1 INTERFACE) +target_compile_options(REMRAM_V1 INTERFACE + "SHELL:-DSTM32F765xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${REMRAM_V1_MCU} +) +target_compile_definitions(REMRAM_V1 INTERFACE + "STM32F7xx" + "ARDUINO_REMRAM_V1" + "BOARD_NAME=\"REMRAM_V1\"" + "BOARD_ID=REMRAM_V1" + "VARIANT_H=\"variant_REMRAM_V1.h\"" +) +target_include_directories(REMRAM_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/ + ${REMRAM_V1_VARIANT_PATH} +) + +target_link_options(REMRAM_V1 INTERFACE + "LINKER:--default-script=${REMRAM_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${REMRAM_V1_MCU} +) +target_link_libraries(REMRAM_V1 INTERFACE + arm_cortexM7lfsp_math +) + +add_library(REMRAM_V1_serial_disabled INTERFACE) +target_compile_options(REMRAM_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(REMRAM_V1_serial_generic INTERFACE) +target_compile_options(REMRAM_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(REMRAM_V1_serial_none INTERFACE) +target_compile_options(REMRAM_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(REMRAM_V1_usb_CDC INTERFACE) +target_compile_options(REMRAM_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(REMRAM_V1_usb_CDCgen INTERFACE) +target_compile_options(REMRAM_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(REMRAM_V1_usb_none INTERFACE) +target_compile_options(REMRAM_V1_usb_none INTERFACE + "SHELL:" +) +add_library(REMRAM_V1_xusb_FS INTERFACE) +target_compile_options(REMRAM_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(REMRAM_V1_xusb_HS INTERFACE) +target_compile_options(REMRAM_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(REMRAM_V1_xusb_HSFS INTERFACE) +target_compile_options(REMRAM_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# RHF76_052 +# ----------------------------------------------------------------------------- + +set(RHF76_052_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L051C(6-8)(T-U)") +set(RHF76_052_MAXSIZE 65536) +set(RHF76_052_MAXDATASIZE 8192) +set(RHF76_052_MCU cortex-m0plus) +set(RHF76_052_FPCONF "-") +add_library(RHF76_052 INTERFACE) +target_compile_options(RHF76_052 INTERFACE + "SHELL:-DSTM32L051xx -D__CORTEX_SC=0" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${RHF76_052_MCU} +) +target_compile_definitions(RHF76_052 INTERFACE + "STM32L0xx" + "ARDUINO_RHF76_052" + "BOARD_NAME=\"RHF76_052\"" + "BOARD_ID=RHF76_052" + "VARIANT_H=\"variant_RHF76_052.h\"" +) +target_include_directories(RHF76_052 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${RHF76_052_VARIANT_PATH} +) + +target_link_options(RHF76_052 INTERFACE + "LINKER:--default-script=${RHF76_052_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=65536" + "LINKER:--defsym=LD_MAX_DATA_SIZE=8192" + "SHELL: " + -mcpu=${RHF76_052_MCU} +) +target_link_libraries(RHF76_052 INTERFACE + arm_cortexM0l_math +) + +add_library(RHF76_052_serial_disabled INTERFACE) +target_compile_options(RHF76_052_serial_disabled INTERFACE + "SHELL:" +) +add_library(RHF76_052_serial_generic INTERFACE) +target_compile_options(RHF76_052_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(RHF76_052_serial_none INTERFACE) +target_compile_options(RHF76_052_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + +# RUMBA32 +# ----------------------------------------------------------------------------- + +set(RUMBA32_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(RUMBA32_MAXSIZE 524288) +set(RUMBA32_MAXDATASIZE 131072) +set(RUMBA32_MCU cortex-m4) +set(RUMBA32_FPCONF "fpv4-sp-d16-hard") +add_library(RUMBA32 INTERFACE) +target_compile_options(RUMBA32 INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${RUMBA32_MCU} +) +target_compile_definitions(RUMBA32 INTERFACE + "STM32F4xx" + "ARDUINO_RUMBA32" + "BOARD_NAME=\"RUMBA32\"" + "BOARD_ID=RUMBA32" + "VARIANT_H=\"variant_RUMBA32.h\"" +) +target_include_directories(RUMBA32 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${RUMBA32_VARIANT_PATH} +) + +target_link_options(RUMBA32 INTERFACE + "LINKER:--default-script=${RUMBA32_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${RUMBA32_MCU} +) +target_link_libraries(RUMBA32 INTERFACE + arm_cortexM4lf_math +) + +add_library(RUMBA32_serial_disabled INTERFACE) +target_compile_options(RUMBA32_serial_disabled INTERFACE + "SHELL:" +) +add_library(RUMBA32_serial_generic INTERFACE) +target_compile_options(RUMBA32_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(RUMBA32_serial_none INTERFACE) +target_compile_options(RUMBA32_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(RUMBA32_usb_CDC INTERFACE) +target_compile_options(RUMBA32_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(RUMBA32_usb_CDCgen INTERFACE) +target_compile_options(RUMBA32_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(RUMBA32_usb_none INTERFACE) +target_compile_options(RUMBA32_usb_none INTERFACE + "SHELL:" +) +add_library(RUMBA32_xusb_FS INTERFACE) +target_compile_options(RUMBA32_xusb_FS INTERFACE + "SHELL:" +) +add_library(RUMBA32_xusb_HS INTERFACE) +target_compile_options(RUMBA32_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(RUMBA32_xusb_HSFS INTERFACE) +target_compile_options(RUMBA32_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# Sparky_V1 +# ----------------------------------------------------------------------------- + +set(Sparky_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(Sparky_V1_MAXSIZE 262144) +set(Sparky_V1_MAXDATASIZE 40960) +set(Sparky_V1_MCU cortex-m4) +set(Sparky_V1_FPCONF "fpv4-sp-d16-hard") +add_library(Sparky_V1 INTERFACE) +target_compile_options(Sparky_V1 INTERFACE + "SHELL:-DSTM32F303xC " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_MCU} +) +target_compile_definitions(Sparky_V1 INTERFACE + "STM32F3xx" + "ARDUINO_SPARKY_F303CC" + "BOARD_NAME=\"SPARKY_F303CC\"" + "BOARD_ID=SPARKY_F303CC" + "VARIANT_H=\"variant_SPARKY_F303CC.h\"" +) +target_include_directories(Sparky_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${Sparky_V1_VARIANT_PATH} +) + +target_link_options(Sparky_V1 INTERFACE + "LINKER:--default-script=${Sparky_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_MCU} +) +target_link_libraries(Sparky_V1 INTERFACE + arm_cortexM4lf_math +) + +add_library(Sparky_V1_serial_disabled INTERFACE) +target_compile_options(Sparky_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(Sparky_V1_serial_generic INTERFACE) +target_compile_options(Sparky_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(Sparky_V1_serial_none INTERFACE) +target_compile_options(Sparky_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(Sparky_V1_usb_CDC INTERFACE) +target_compile_options(Sparky_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(Sparky_V1_usb_CDCgen INTERFACE) +target_compile_options(Sparky_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(Sparky_V1_usb_HID INTERFACE) +target_compile_options(Sparky_V1_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(Sparky_V1_usb_none INTERFACE) +target_compile_options(Sparky_V1_usb_none INTERFACE + "SHELL:" +) +add_library(Sparky_V1_xusb_FS INTERFACE) +target_compile_options(Sparky_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(Sparky_V1_xusb_HS INTERFACE) +target_compile_options(Sparky_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(Sparky_V1_xusb_HSFS INTERFACE) +target_compile_options(Sparky_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# Sparky_V1_dfu2 +# ----------------------------------------------------------------------------- + +set(Sparky_V1_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(Sparky_V1_dfu2_MAXSIZE 262144) +set(Sparky_V1_dfu2_MAXDATASIZE 40960) +set(Sparky_V1_dfu2_MCU cortex-m4) +set(Sparky_V1_dfu2_FPCONF "fpv4-sp-d16-hard") +add_library(Sparky_V1_dfu2 INTERFACE) +target_compile_options(Sparky_V1_dfu2 INTERFACE + "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_dfu2_MCU} +) +target_compile_definitions(Sparky_V1_dfu2 INTERFACE + "STM32F3xx" + "ARDUINO_SPARKY_F303CC" + "BOARD_NAME=\"SPARKY_F303CC\"" + "BOARD_ID=SPARKY_F303CC" + "VARIANT_H=\"variant_SPARKY_F303CC.h\"" +) +target_include_directories(Sparky_V1_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${Sparky_V1_dfu2_VARIANT_PATH} +) + +target_link_options(Sparky_V1_dfu2 INTERFACE + "LINKER:--default-script=${Sparky_V1_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_dfu2_MCU} +) +target_link_libraries(Sparky_V1_dfu2 INTERFACE + arm_cortexM4lf_math +) + + +# Sparky_V1_dfuo +# ----------------------------------------------------------------------------- + +set(Sparky_V1_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(Sparky_V1_dfuo_MAXSIZE 262144) +set(Sparky_V1_dfuo_MAXDATASIZE 40960) +set(Sparky_V1_dfuo_MCU cortex-m4) +set(Sparky_V1_dfuo_FPCONF "fpv4-sp-d16-hard") +add_library(Sparky_V1_dfuo INTERFACE) +target_compile_options(Sparky_V1_dfuo INTERFACE + "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_dfuo_MCU} +) +target_compile_definitions(Sparky_V1_dfuo INTERFACE + "STM32F3xx" + "ARDUINO_SPARKY_F303CC" + "BOARD_NAME=\"SPARKY_F303CC\"" + "BOARD_ID=SPARKY_F303CC" + "VARIANT_H=\"variant_SPARKY_F303CC.h\"" +) +target_include_directories(Sparky_V1_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${Sparky_V1_dfuo_VARIANT_PATH} +) + +target_link_options(Sparky_V1_dfuo INTERFACE + "LINKER:--default-script=${Sparky_V1_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_dfuo_MCU} +) +target_link_libraries(Sparky_V1_dfuo INTERFACE + arm_cortexM4lf_math +) + + +# Sparky_V1_hid +# ----------------------------------------------------------------------------- + +set(Sparky_V1_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303C(B-C)T") +set(Sparky_V1_hid_MAXSIZE 262144) +set(Sparky_V1_hid_MAXDATASIZE 40960) +set(Sparky_V1_hid_MCU cortex-m4) +set(Sparky_V1_hid_FPCONF "fpv4-sp-d16-hard") +add_library(Sparky_V1_hid INTERFACE) +target_compile_options(Sparky_V1_hid INTERFACE + "SHELL:-DSTM32F303xC -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_hid_MCU} +) +target_compile_definitions(Sparky_V1_hid INTERFACE + "STM32F3xx" + "ARDUINO_SPARKY_F303CC" + "BOARD_NAME=\"SPARKY_F303CC\"" + "BOARD_ID=SPARKY_F303CC" + "VARIANT_H=\"variant_SPARKY_F303CC.h\"" +) +target_include_directories(Sparky_V1_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/ + ${Sparky_V1_hid_VARIANT_PATH} +) + +target_link_options(Sparky_V1_hid INTERFACE + "LINKER:--default-script=${Sparky_V1_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=40960" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${Sparky_V1_hid_MCU} +) +target_link_libraries(Sparky_V1_hid INTERFACE + arm_cortexM4lf_math +) + + +# ST3DP001_EVAL +# ----------------------------------------------------------------------------- + +set(ST3DP001_EVAL_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F401V(B-C-D-E)T") +set(ST3DP001_EVAL_MAXSIZE 524288) +set(ST3DP001_EVAL_MAXDATASIZE 98304) +set(ST3DP001_EVAL_MCU cortex-m4) +set(ST3DP001_EVAL_FPCONF "fpv4-sp-d16-hard") +add_library(ST3DP001_EVAL INTERFACE) +target_compile_options(ST3DP001_EVAL INTERFACE + "SHELL:-DSTM32F401xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${ST3DP001_EVAL_MCU} +) +target_compile_definitions(ST3DP001_EVAL INTERFACE + "STM32F4xx" + "ARDUINO_ST3DP001_EVAL" + "BOARD_NAME=\"ST3DP001_EVAL\"" + "BOARD_ID=ST3DP001_EVAL" + "VARIANT_H=\"variant_ST3DP001_EVAL.h\"" +) +target_include_directories(ST3DP001_EVAL INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${ST3DP001_EVAL_VARIANT_PATH} +) + +target_link_options(ST3DP001_EVAL INTERFACE + "LINKER:--default-script=${ST3DP001_EVAL_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=98304" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${ST3DP001_EVAL_MCU} +) +target_link_libraries(ST3DP001_EVAL INTERFACE + arm_cortexM4lf_math +) + +add_library(ST3DP001_EVAL_serial_disabled INTERFACE) +target_compile_options(ST3DP001_EVAL_serial_disabled INTERFACE + "SHELL:" +) +add_library(ST3DP001_EVAL_serial_generic INTERFACE) +target_compile_options(ST3DP001_EVAL_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(ST3DP001_EVAL_serial_none INTERFACE) +target_compile_options(ST3DP001_EVAL_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(ST3DP001_EVAL_usb_CDC INTERFACE) +target_compile_options(ST3DP001_EVAL_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(ST3DP001_EVAL_usb_CDCgen INTERFACE) +target_compile_options(ST3DP001_EVAL_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(ST3DP001_EVAL_usb_none INTERFACE) +target_compile_options(ST3DP001_EVAL_usb_none INTERFACE + "SHELL:" +) +add_library(ST3DP001_EVAL_xusb_FS INTERFACE) +target_compile_options(ST3DP001_EVAL_xusb_FS INTERFACE + "SHELL:" +) +add_library(ST3DP001_EVAL_xusb_HS INTERFACE) +target_compile_options(ST3DP001_EVAL_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(ST3DP001_EVAL_xusb_HSFS INTERFACE) +target_compile_options(ST3DP001_EVAL_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# STEVAL_MKSBOX1V1 +# ----------------------------------------------------------------------------- + +set(STEVAL_MKSBOX1V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ") +set(STEVAL_MKSBOX1V1_MAXSIZE 2097152) +set(STEVAL_MKSBOX1V1_MAXDATASIZE 655360) +set(STEVAL_MKSBOX1V1_MCU cortex-m4) +set(STEVAL_MKSBOX1V1_FPCONF "fpv4-sp-d16-hard") +add_library(STEVAL_MKSBOX1V1 INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1 INTERFACE + "SHELL:-DSTM32L4R9xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STEVAL_MKSBOX1V1_MCU} +) +target_compile_definitions(STEVAL_MKSBOX1V1 INTERFACE + "STM32L4xx" + "ARDUINO_STEVAL_MKSBOX1V1" + "BOARD_NAME=\"STEVAL_MKSBOX1V1\"" + "BOARD_ID=STEVAL_MKSBOX1V1" + "VARIANT_H=\"variant_STEVAL_MKSBOX1V1.h\"" +) +target_include_directories(STEVAL_MKSBOX1V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${STEVAL_MKSBOX1V1_VARIANT_PATH} +) + +target_link_options(STEVAL_MKSBOX1V1 INTERFACE + "LINKER:--default-script=${STEVAL_MKSBOX1V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STEVAL_MKSBOX1V1_MCU} +) +target_link_libraries(STEVAL_MKSBOX1V1 INTERFACE + arm_cortexM4lf_math +) + +add_library(STEVAL_MKSBOX1V1_serial_disabled INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(STEVAL_MKSBOX1V1_serial_generic INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(STEVAL_MKSBOX1V1_serial_none INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(STEVAL_MKSBOX1V1_usb_CDC INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(STEVAL_MKSBOX1V1_usb_CDCgen INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(STEVAL_MKSBOX1V1_usb_HID INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(STEVAL_MKSBOX1V1_usb_none INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_usb_none INTERFACE + "SHELL:" +) +add_library(STEVAL_MKSBOX1V1_xusb_FS INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(STEVAL_MKSBOX1V1_xusb_HS INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(STEVAL_MKSBOX1V1_xusb_HSFS INTERFACE) +target_compile_options(STEVAL_MKSBOX1V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# STM32MP157A_DK1 +# ----------------------------------------------------------------------------- + +set(STM32MP157A_DK1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC") +set(STM32MP157A_DK1_MAXSIZE 131072) +set(STM32MP157A_DK1_MAXDATASIZE 131072) +set(STM32MP157A_DK1_MCU cortex-m4) +set(STM32MP157A_DK1_FPCONF "-") +add_library(STM32MP157A_DK1 INTERFACE) +target_compile_options(STM32MP157A_DK1 INTERFACE + "SHELL:-DCORE_CM4 -DSTM32MP157Axx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32MP157A_DK1_MCU} +) +target_compile_definitions(STM32MP157A_DK1 INTERFACE + "STM32MP1xx" + "ARDUINO_STM32MP157A_DK1" + "BOARD_NAME=\"STM32MP157A_DK1\"" + "BOARD_ID=STM32MP157A_DK1" + "VARIANT_H=\"variant_STM32MP157_DK.h\"" +) +target_include_directories(STM32MP157A_DK1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32MP1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32MP1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32MP1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32MP1xx/Source/Templates/gcc/ + ${STM32MP157A_DK1_VARIANT_PATH} +) + +target_link_options(STM32MP157A_DK1 INTERFACE + "LINKER:--default-script=${STM32MP157A_DK1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32MP157A_DK1_MCU} +) +target_link_libraries(STM32MP157A_DK1 INTERFACE + arm_cortexM4l_math +) + +add_library(STM32MP157A_DK1_serial_disabled INTERFACE) +target_compile_options(STM32MP157A_DK1_serial_disabled INTERFACE + "SHELL:" +) +add_library(STM32MP157A_DK1_serial_generic INTERFACE) +target_compile_options(STM32MP157A_DK1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(STM32MP157A_DK1_serial_none INTERFACE) +target_compile_options(STM32MP157A_DK1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(STM32MP157A_DK1_virtio_disable INTERFACE) +target_compile_options(STM32MP157A_DK1_virtio_disable INTERFACE + "SHELL:" +) +add_library(STM32MP157A_DK1_virtio_enabled INTERFACE) +target_compile_options(STM32MP157A_DK1_virtio_enabled INTERFACE + "SHELL:-DVIRTIOCON -DNO_ATOMIC_64_SUPPORT -DMETAL_INTERNAL -DMETAL_MAX_DEVICE_REGIONS=2 -DVIRTIO_SLAVE_ONLY -DVIRTIO_LOG -DDISABLE_GENERIC_SERIALVIRTIO" +) +add_library(STM32MP157A_DK1_virtio_generic INTERFACE) +target_compile_options(STM32MP157A_DK1_virtio_generic INTERFACE + "SHELL:-DVIRTIOCON -DNO_ATOMIC_64_SUPPORT -DMETAL_INTERNAL -DMETAL_MAX_DEVICE_REGIONS=2 -DVIRTIO_SLAVE_ONLY -DVIRTIO_LOG" +) + +# STM32MP157C_DK2 +# ----------------------------------------------------------------------------- + +set(STM32MP157C_DK2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC") +set(STM32MP157C_DK2_MAXSIZE 131072) +set(STM32MP157C_DK2_MAXDATASIZE 131072) +set(STM32MP157C_DK2_MCU cortex-m4) +set(STM32MP157C_DK2_FPCONF "-") +add_library(STM32MP157C_DK2 INTERFACE) +target_compile_options(STM32MP157C_DK2 INTERFACE + "SHELL:-DCORE_CM4 -DSTM32MP157Cxx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32MP157C_DK2_MCU} +) +target_compile_definitions(STM32MP157C_DK2 INTERFACE + "STM32MP1xx" + "ARDUINO_STM32MP157C_DK2" + "BOARD_NAME=\"STM32MP157C_DK2\"" + "BOARD_ID=STM32MP157C_DK2" + "VARIANT_H=\"variant_STM32MP157_DK.h\"" +) +target_include_directories(STM32MP157C_DK2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32MP1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32MP1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32MP1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32MP1xx/Source/Templates/gcc/ + ${STM32MP157C_DK2_VARIANT_PATH} +) + +target_link_options(STM32MP157C_DK2 INTERFACE + "LINKER:--default-script=${STM32MP157C_DK2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32MP157C_DK2_MCU} +) +target_link_libraries(STM32MP157C_DK2 INTERFACE + arm_cortexM4l_math +) + +add_library(STM32MP157C_DK2_serial_disabled INTERFACE) +target_compile_options(STM32MP157C_DK2_serial_disabled INTERFACE + "SHELL:" +) +add_library(STM32MP157C_DK2_serial_generic INTERFACE) +target_compile_options(STM32MP157C_DK2_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(STM32MP157C_DK2_serial_none INTERFACE) +target_compile_options(STM32MP157C_DK2_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(STM32MP157C_DK2_virtio_disable INTERFACE) +target_compile_options(STM32MP157C_DK2_virtio_disable INTERFACE + "SHELL:" +) +add_library(STM32MP157C_DK2_virtio_enabled INTERFACE) +target_compile_options(STM32MP157C_DK2_virtio_enabled INTERFACE + "SHELL:-DVIRTIOCON -DNO_ATOMIC_64_SUPPORT -DMETAL_INTERNAL -DMETAL_MAX_DEVICE_REGIONS=2 -DVIRTIO_SLAVE_ONLY -DVIRTIO_LOG -DDISABLE_GENERIC_SERIALVIRTIO" +) +add_library(STM32MP157C_DK2_virtio_generic INTERFACE) +target_compile_options(STM32MP157C_DK2_virtio_generic INTERFACE + "SHELL:-DVIRTIOCON -DNO_ATOMIC_64_SUPPORT -DMETAL_INTERNAL -DMETAL_MAX_DEVICE_REGIONS=2 -DVIRTIO_SLAVE_ONLY -DVIRTIO_LOG" +) + +# STM32WB5MM_DK +# ----------------------------------------------------------------------------- + +set(STM32WB5MM_DK_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB5MMGH") +set(STM32WB5MM_DK_MAXSIZE 827392) +set(STM32WB5MM_DK_MAXDATASIZE 196608) +set(STM32WB5MM_DK_MCU cortex-m4) +set(STM32WB5MM_DK_FPCONF "fpv4-sp-d16-hard") +add_library(STM32WB5MM_DK INTERFACE) +target_compile_options(STM32WB5MM_DK INTERFACE + "SHELL:-DSTM32WB5Mxx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32WB5MM_DK_MCU} +) +target_compile_definitions(STM32WB5MM_DK INTERFACE + "STM32WBxx" + "ARDUINO_STM32WB5MM_DK" + "BOARD_NAME=\"STM32WB5MM_DK\"" + "BOARD_ID=STM32WB5MM_DK" + "VARIANT_H=\"variant_STM32WB5MM_DK.h\"" +) +target_include_directories(STM32WB5MM_DK INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${STM32WB5MM_DK_VARIANT_PATH} +) + +target_link_options(STM32WB5MM_DK INTERFACE + "LINKER:--default-script=${STM32WB5MM_DK_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=827392" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${STM32WB5MM_DK_MCU} +) +target_link_libraries(STM32WB5MM_DK INTERFACE + arm_cortexM4lf_math +) + +add_library(STM32WB5MM_DK_serial_disabled INTERFACE) +target_compile_options(STM32WB5MM_DK_serial_disabled INTERFACE + "SHELL:" +) +add_library(STM32WB5MM_DK_serial_generic INTERFACE) +target_compile_options(STM32WB5MM_DK_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(STM32WB5MM_DK_serial_none INTERFACE) +target_compile_options(STM32WB5MM_DK_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(STM32WB5MM_DK_usb_CDC INTERFACE) +target_compile_options(STM32WB5MM_DK_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(STM32WB5MM_DK_usb_CDCgen INTERFACE) +target_compile_options(STM32WB5MM_DK_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(STM32WB5MM_DK_usb_HID INTERFACE) +target_compile_options(STM32WB5MM_DK_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(STM32WB5MM_DK_usb_none INTERFACE) +target_compile_options(STM32WB5MM_DK_usb_none INTERFACE + "SHELL:" +) +add_library(STM32WB5MM_DK_xusb_FS INTERFACE) +target_compile_options(STM32WB5MM_DK_xusb_FS INTERFACE + "SHELL:" +) +add_library(STM32WB5MM_DK_xusb_HS INTERFACE) +target_compile_options(STM32WB5MM_DK_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(STM32WB5MM_DK_xusb_HSFS INTERFACE) +target_compile_options(STM32WB5MM_DK_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# STORM32_V1_31_RC +# ----------------------------------------------------------------------------- + +set(STORM32_V1_31_RC_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103R(C-D-E)T") +set(STORM32_V1_31_RC_MAXSIZE 262144) +set(STORM32_V1_31_RC_MAXDATASIZE 49152) +set(STORM32_V1_31_RC_MCU cortex-m3) +set(STORM32_V1_31_RC_FPCONF "-") +add_library(STORM32_V1_31_RC INTERFACE) +target_compile_options(STORM32_V1_31_RC INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${STORM32_V1_31_RC_MCU} +) +target_compile_definitions(STORM32_V1_31_RC INTERFACE + "STM32F1xx" + "ARDUINO_STORM32_V1_31_RC" + "BOARD_NAME=\"STORM32_V1_31_RC\"" + "BOARD_ID=STORM32_V1_31_RC" + "VARIANT_H=\"variant_STORM32_V1_31_RC.h\"" +) +target_include_directories(STORM32_V1_31_RC INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${STORM32_V1_31_RC_VARIANT_PATH} +) + +target_link_options(STORM32_V1_31_RC INTERFACE + "LINKER:--default-script=${STORM32_V1_31_RC_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=49152" + "SHELL: " + -mcpu=${STORM32_V1_31_RC_MCU} +) +target_link_libraries(STORM32_V1_31_RC INTERFACE + arm_cortexM3l_math +) + +add_library(STORM32_V1_31_RC_serial_disabled INTERFACE) +target_compile_options(STORM32_V1_31_RC_serial_disabled INTERFACE + "SHELL:" +) +add_library(STORM32_V1_31_RC_serial_generic INTERFACE) +target_compile_options(STORM32_V1_31_RC_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(STORM32_V1_31_RC_serial_none INTERFACE) +target_compile_options(STORM32_V1_31_RC_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(STORM32_V1_31_RC_usb_CDC INTERFACE) +target_compile_options(STORM32_V1_31_RC_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(STORM32_V1_31_RC_usb_CDCgen INTERFACE) +target_compile_options(STORM32_V1_31_RC_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(STORM32_V1_31_RC_usb_none INTERFACE) +target_compile_options(STORM32_V1_31_RC_usb_none INTERFACE + "SHELL:" +) +add_library(STORM32_V1_31_RC_xusb_FS INTERFACE) +target_compile_options(STORM32_V1_31_RC_xusb_FS INTERFACE + "SHELL:" +) +add_library(STORM32_V1_31_RC_xusb_HS INTERFACE) +target_compile_options(STORM32_V1_31_RC_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(STORM32_V1_31_RC_xusb_HSFS INTERFACE) +target_compile_options(STORM32_V1_31_RC_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# SWAN_R5 +# ----------------------------------------------------------------------------- + +set(SWAN_R5_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY") +set(SWAN_R5_MAXSIZE 2097152) +set(SWAN_R5_MAXDATASIZE 655360) +set(SWAN_R5_MCU cortex-m4) +set(SWAN_R5_FPCONF "fpv4-sp-d16-hard") +add_library(SWAN_R5 INTERFACE) +target_compile_options(SWAN_R5 INTERFACE + "SHELL:-DSTM32L4R5xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${SWAN_R5_MCU} +) +target_compile_definitions(SWAN_R5 INTERFACE + "STM32L4xx" + "ARDUINO_SWAN_R5" + "BOARD_NAME=\"SWAN_R5\"" + "BOARD_ID=SWAN_R5" + "VARIANT_H=\"variant_SWAN_R5.h\"" +) +target_include_directories(SWAN_R5 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${SWAN_R5_VARIANT_PATH} +) + +target_link_options(SWAN_R5 INTERFACE + "LINKER:--default-script=${SWAN_R5_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${SWAN_R5_MCU} +) +target_link_libraries(SWAN_R5 INTERFACE + arm_cortexM4lf_math +) + +add_library(SWAN_R5_serial_disabled INTERFACE) +target_compile_options(SWAN_R5_serial_disabled INTERFACE + "SHELL:" +) +add_library(SWAN_R5_serial_generic INTERFACE) +target_compile_options(SWAN_R5_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(SWAN_R5_serial_none INTERFACE) +target_compile_options(SWAN_R5_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(SWAN_R5_usb_CDC INTERFACE) +target_compile_options(SWAN_R5_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(SWAN_R5_usb_CDCgen INTERFACE) +target_compile_options(SWAN_R5_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(SWAN_R5_usb_HID INTERFACE) +target_compile_options(SWAN_R5_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(SWAN_R5_usb_none INTERFACE) +target_compile_options(SWAN_R5_usb_none INTERFACE + "SHELL:" +) +add_library(SWAN_R5_xusb_FS INTERFACE) +target_compile_options(SWAN_R5_xusb_FS INTERFACE + "SHELL:" +) +add_library(SWAN_R5_xusb_HS INTERFACE) +target_compile_options(SWAN_R5_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(SWAN_R5_xusb_HSFS INTERFACE) +target_compile_options(SWAN_R5_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# THUNDERPACK_F411 +# ----------------------------------------------------------------------------- + +set(THUNDERPACK_F411_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(THUNDERPACK_F411_MAXSIZE 524288) +set(THUNDERPACK_F411_MAXDATASIZE 131072) +set(THUNDERPACK_F411_MCU cortex-m4) +set(THUNDERPACK_F411_FPCONF "-") +add_library(THUNDERPACK_F411 INTERFACE) +target_compile_options(THUNDERPACK_F411 INTERFACE + "SHELL:-DSTM32F411xE " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${THUNDERPACK_F411_MCU} +) +target_compile_definitions(THUNDERPACK_F411 INTERFACE + "STM32F4xx" + "ARDUINO_THUNDERPACK_F411" + "BOARD_NAME=\"THUNDERPACK_F411\"" + "BOARD_ID=THUNDERPACK_F411" + "VARIANT_H=\"variant_THUNDERPACK_F411.h\"" +) +target_include_directories(THUNDERPACK_F411 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${THUNDERPACK_F411_VARIANT_PATH} +) + +target_link_options(THUNDERPACK_F411 INTERFACE + "LINKER:--default-script=${THUNDERPACK_F411_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${THUNDERPACK_F411_MCU} +) +target_link_libraries(THUNDERPACK_F411 INTERFACE + arm_cortexM4lf_math +) + +add_library(THUNDERPACK_F411_serial_disabled INTERFACE) +target_compile_options(THUNDERPACK_F411_serial_disabled INTERFACE + "SHELL:" +) +add_library(THUNDERPACK_F411_serial_generic INTERFACE) +target_compile_options(THUNDERPACK_F411_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(THUNDERPACK_F411_serial_none INTERFACE) +target_compile_options(THUNDERPACK_F411_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(THUNDERPACK_F411_usb_CDC INTERFACE) +target_compile_options(THUNDERPACK_F411_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(THUNDERPACK_F411_usb_CDCgen INTERFACE) +target_compile_options(THUNDERPACK_F411_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(THUNDERPACK_F411_usb_HID INTERFACE) +target_compile_options(THUNDERPACK_F411_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(THUNDERPACK_F411_usb_none INTERFACE) +target_compile_options(THUNDERPACK_F411_usb_none INTERFACE + "SHELL:" +) +add_library(THUNDERPACK_F411_xusb_FS INTERFACE) +target_compile_options(THUNDERPACK_F411_xusb_FS INTERFACE + "SHELL:" +) +add_library(THUNDERPACK_F411_xusb_HS INTERFACE) +target_compile_options(THUNDERPACK_F411_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(THUNDERPACK_F411_xusb_HSFS INTERFACE) +target_compile_options(THUNDERPACK_F411_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# THUNDERPACK_F411_hid +# ----------------------------------------------------------------------------- + +set(THUNDERPACK_F411_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)") +set(THUNDERPACK_F411_hid_MAXSIZE 524288) +set(THUNDERPACK_F411_hid_MAXDATASIZE 131072) +set(THUNDERPACK_F411_hid_MCU cortex-m4) +set(THUNDERPACK_F411_hid_FPCONF "-") +add_library(THUNDERPACK_F411_hid INTERFACE) +target_compile_options(THUNDERPACK_F411_hid INTERFACE + "SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${THUNDERPACK_F411_hid_MCU} +) +target_compile_definitions(THUNDERPACK_F411_hid INTERFACE + "STM32F4xx" + "ARDUINO_THUNDERPACK_F411" + "BOARD_NAME=\"THUNDERPACK_F411\"" + "BOARD_ID=THUNDERPACK_F411" + "VARIANT_H=\"variant_THUNDERPACK_F411.h\"" +) +target_include_directories(THUNDERPACK_F411_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${THUNDERPACK_F411_hid_VARIANT_PATH} +) + +target_link_options(THUNDERPACK_F411_hid INTERFACE + "LINKER:--default-script=${THUNDERPACK_F411_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${THUNDERPACK_F411_hid_MCU} +) +target_link_libraries(THUNDERPACK_F411_hid INTERFACE + arm_cortexM4lf_math +) + + +# THUNDERPACK_L072 +# ----------------------------------------------------------------------------- + +set(THUNDERPACK_L072_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T") +set(THUNDERPACK_L072_MAXSIZE 196608) +set(THUNDERPACK_L072_MAXDATASIZE 20480) +set(THUNDERPACK_L072_MCU cortex-m0plus) +set(THUNDERPACK_L072_FPCONF "-") +add_library(THUNDERPACK_L072 INTERFACE) +target_compile_options(THUNDERPACK_L072 INTERFACE + "SHELL:-DSTM32L072xx -D__CORTEX_SC=0" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${THUNDERPACK_L072_MCU} +) +target_compile_definitions(THUNDERPACK_L072 INTERFACE + "STM32L0xx" + "ARDUINO_THUNDERPACK_L072" + "BOARD_NAME=\"THUNDERPACK_L072\"" + "BOARD_ID=THUNDERPACK_L072" + "VARIANT_H=\"variant_THUNDERPACK_L072.h\"" +) +target_include_directories(THUNDERPACK_L072 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/ + ${THUNDERPACK_L072_VARIANT_PATH} +) + +target_link_options(THUNDERPACK_L072 INTERFACE + "LINKER:--default-script=${THUNDERPACK_L072_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=196608" + "LINKER:--defsym=LD_MAX_DATA_SIZE=20480" + "SHELL: " + -mcpu=${THUNDERPACK_L072_MCU} +) +target_link_libraries(THUNDERPACK_L072 INTERFACE + arm_cortexM0l_math +) + +add_library(THUNDERPACK_L072_serial_disabled INTERFACE) +target_compile_options(THUNDERPACK_L072_serial_disabled INTERFACE + "SHELL:" +) +add_library(THUNDERPACK_L072_serial_generic INTERFACE) +target_compile_options(THUNDERPACK_L072_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(THUNDERPACK_L072_serial_none INTERFACE) +target_compile_options(THUNDERPACK_L072_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(THUNDERPACK_L072_usb_CDC INTERFACE) +target_compile_options(THUNDERPACK_L072_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(THUNDERPACK_L072_usb_CDCgen INTERFACE) +target_compile_options(THUNDERPACK_L072_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(THUNDERPACK_L072_usb_HID INTERFACE) +target_compile_options(THUNDERPACK_L072_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(THUNDERPACK_L072_usb_none INTERFACE) +target_compile_options(THUNDERPACK_L072_usb_none INTERFACE + "SHELL:" +) + +# VAKE_V1 +# ----------------------------------------------------------------------------- + +set(VAKE_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F446V(C-E)T") +set(VAKE_V1_MAXSIZE 524288) +set(VAKE_V1_MAXDATASIZE 131072) +set(VAKE_V1_MCU cortex-m4) +set(VAKE_V1_FPCONF "fpv4-sp-d16-hard") +add_library(VAKE_V1 INTERFACE) +target_compile_options(VAKE_V1 INTERFACE + "SHELL:-DSTM32F446xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${VAKE_V1_MCU} +) +target_compile_definitions(VAKE_V1 INTERFACE + "STM32F4xx" + "ARDUINO_VAKE_V1" + "BOARD_NAME=\"VAKE_V1\"" + "BOARD_ID=VAKE_V1" + "VARIANT_H=\"variant_VAKE_V1.h\"" +) +target_include_directories(VAKE_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${VAKE_V1_VARIANT_PATH} +) + +target_link_options(VAKE_V1 INTERFACE + "LINKER:--default-script=${VAKE_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${VAKE_V1_MCU} +) +target_link_libraries(VAKE_V1 INTERFACE + arm_cortexM4lf_math +) + +add_library(VAKE_V1_serial_disabled INTERFACE) +target_compile_options(VAKE_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(VAKE_V1_serial_generic INTERFACE) +target_compile_options(VAKE_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(VAKE_V1_serial_none INTERFACE) +target_compile_options(VAKE_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(VAKE_V1_usb_CDC INTERFACE) +target_compile_options(VAKE_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(VAKE_V1_usb_CDCgen INTERFACE) +target_compile_options(VAKE_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(VAKE_V1_usb_none INTERFACE) +target_compile_options(VAKE_V1_usb_none INTERFACE + "SHELL:" +) +add_library(VAKE_V1_xusb_FS INTERFACE) +target_compile_options(VAKE_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(VAKE_V1_xusb_HS INTERFACE) +target_compile_options(VAKE_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(VAKE_V1_xusb_HSFS INTERFACE) +target_compile_options(VAKE_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# VCCGND_F103ZET6 +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_MAXSIZE 524288) +set(VCCGND_F103ZET6_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_MCU cortex-m3) +set(VCCGND_F103ZET6_FPCONF "-") +add_library(VCCGND_F103ZET6 INTERFACE) +target_compile_options(VCCGND_F103ZET6 INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MCU} +) +target_compile_definitions(VCCGND_F103ZET6 INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6" + "BOARD_NAME=\"VCCGND_F103ZET6\"" + "BOARD_ID=VCCGND_F103ZET6" + "VARIANT_H=\"variant_VCCGND_F103ZET6.h\"" +) +target_include_directories(VCCGND_F103ZET6 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6 INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MCU} +) +target_link_libraries(VCCGND_F103ZET6 INTERFACE + arm_cortexM3l_math +) + +add_library(VCCGND_F103ZET6_serial_disabled INTERFACE) +target_compile_options(VCCGND_F103ZET6_serial_disabled INTERFACE + "SHELL:" +) +add_library(VCCGND_F103ZET6_serial_generic INTERFACE) +target_compile_options(VCCGND_F103ZET6_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(VCCGND_F103ZET6_serial_none INTERFACE) +target_compile_options(VCCGND_F103ZET6_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(VCCGND_F103ZET6_usb_CDC INTERFACE) +target_compile_options(VCCGND_F103ZET6_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(VCCGND_F103ZET6_usb_CDCgen INTERFACE) +target_compile_options(VCCGND_F103ZET6_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(VCCGND_F103ZET6_usb_HID INTERFACE) +target_compile_options(VCCGND_F103ZET6_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(VCCGND_F103ZET6_usb_none INTERFACE) +target_compile_options(VCCGND_F103ZET6_usb_none INTERFACE + "SHELL:" +) +add_library(VCCGND_F103ZET6_xusb_FS INTERFACE) +target_compile_options(VCCGND_F103ZET6_xusb_FS INTERFACE + "SHELL:" +) +add_library(VCCGND_F103ZET6_xusb_HS INTERFACE) +target_compile_options(VCCGND_F103ZET6_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(VCCGND_F103ZET6_xusb_HSFS INTERFACE) +target_compile_options(VCCGND_F103ZET6_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# VCCGND_F103ZET6_dfu2 +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_dfu2_MAXSIZE 524288) +set(VCCGND_F103ZET6_dfu2_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_dfu2_MCU cortex-m3) +set(VCCGND_F103ZET6_dfu2_FPCONF "-") +add_library(VCCGND_F103ZET6_dfu2 INTERFACE) +target_compile_options(VCCGND_F103ZET6_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_dfu2_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6" + "BOARD_NAME=\"VCCGND_F103ZET6\"" + "BOARD_ID=VCCGND_F103ZET6" + "VARIANT_H=\"variant_VCCGND_F103ZET6.h\"" +) +target_include_directories(VCCGND_F103ZET6_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_dfu2_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_dfu2 INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_dfu2_MCU} +) +target_link_libraries(VCCGND_F103ZET6_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# VCCGND_F103ZET6_dfuo +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_dfuo_MAXSIZE 524288) +set(VCCGND_F103ZET6_dfuo_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_dfuo_MCU cortex-m3) +set(VCCGND_F103ZET6_dfuo_FPCONF "-") +add_library(VCCGND_F103ZET6_dfuo INTERFACE) +target_compile_options(VCCGND_F103ZET6_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_dfuo_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6" + "BOARD_NAME=\"VCCGND_F103ZET6\"" + "BOARD_ID=VCCGND_F103ZET6" + "VARIANT_H=\"variant_VCCGND_F103ZET6.h\"" +) +target_include_directories(VCCGND_F103ZET6_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_dfuo_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_dfuo INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_dfuo_MCU} +) +target_link_libraries(VCCGND_F103ZET6_dfuo INTERFACE + arm_cortexM3l_math +) + + +# VCCGND_F103ZET6_hid +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_hid_MAXSIZE 524288) +set(VCCGND_F103ZET6_hid_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_hid_MCU cortex-m3) +set(VCCGND_F103ZET6_hid_FPCONF "-") +add_library(VCCGND_F103ZET6_hid INTERFACE) +target_compile_options(VCCGND_F103ZET6_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_hid_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_hid INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6" + "BOARD_NAME=\"VCCGND_F103ZET6\"" + "BOARD_ID=VCCGND_F103ZET6" + "VARIANT_H=\"variant_VCCGND_F103ZET6.h\"" +) +target_include_directories(VCCGND_F103ZET6_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_hid_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_hid INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_hid_MCU} +) +target_link_libraries(VCCGND_F103ZET6_hid INTERFACE + arm_cortexM3l_math +) + + +# VCCGND_F103ZET6_MINI +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_MINI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_MINI_MAXSIZE 524288) +set(VCCGND_F103ZET6_MINI_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_MINI_MCU cortex-m3) +set(VCCGND_F103ZET6_MINI_FPCONF "-") +add_library(VCCGND_F103ZET6_MINI INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI INTERFACE + "SHELL:-DSTM32F103xE " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_MINI INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6_MINI" + "BOARD_NAME=\"VCCGND_F103ZET6_MINI\"" + "BOARD_ID=VCCGND_F103ZET6_MINI" + "VARIANT_H=\"variant_VCCGND_F103ZET6_MINI.h\"" +) +target_include_directories(VCCGND_F103ZET6_MINI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_MINI_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_MINI INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_MINI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_MCU} +) +target_link_libraries(VCCGND_F103ZET6_MINI INTERFACE + arm_cortexM3l_math +) + +add_library(VCCGND_F103ZET6_MINI_serial_disabled INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_serial_disabled INTERFACE + "SHELL:" +) +add_library(VCCGND_F103ZET6_MINI_serial_generic INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(VCCGND_F103ZET6_MINI_serial_none INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(VCCGND_F103ZET6_MINI_usb_CDC INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(VCCGND_F103ZET6_MINI_usb_CDCgen INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(VCCGND_F103ZET6_MINI_usb_HID INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(VCCGND_F103ZET6_MINI_usb_none INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_usb_none INTERFACE + "SHELL:" +) +add_library(VCCGND_F103ZET6_MINI_xusb_FS INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_xusb_FS INTERFACE + "SHELL:" +) +add_library(VCCGND_F103ZET6_MINI_xusb_HS INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(VCCGND_F103ZET6_MINI_xusb_HSFS INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# VCCGND_F103ZET6_MINI_dfu2 +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_MINI_dfu2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_MINI_dfu2_MAXSIZE 524288) +set(VCCGND_F103ZET6_MINI_dfu2_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_MINI_dfu2_MCU cortex-m3) +set(VCCGND_F103ZET6_MINI_dfu2_FPCONF "-") +add_library(VCCGND_F103ZET6_MINI_dfu2 INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_dfu2 INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x2000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_dfu2_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_MINI_dfu2 INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6_MINI" + "BOARD_NAME=\"VCCGND_F103ZET6_MINI\"" + "BOARD_ID=VCCGND_F103ZET6_MINI" + "VARIANT_H=\"variant_VCCGND_F103ZET6_MINI.h\"" +) +target_include_directories(VCCGND_F103ZET6_MINI_dfu2 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_MINI_dfu2_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_MINI_dfu2 INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_MINI_dfu2_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x2000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_dfu2_MCU} +) +target_link_libraries(VCCGND_F103ZET6_MINI_dfu2 INTERFACE + arm_cortexM3l_math +) + + +# VCCGND_F103ZET6_MINI_dfuo +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_MINI_dfuo_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_MINI_dfuo_MAXSIZE 524288) +set(VCCGND_F103ZET6_MINI_dfuo_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_MINI_dfuo_MCU cortex-m3) +set(VCCGND_F103ZET6_MINI_dfuo_FPCONF "-") +add_library(VCCGND_F103ZET6_MINI_dfuo INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_dfuo INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_LEGACY_LEAF -DVECT_TAB_OFFSET=0x5000" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_dfuo_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_MINI_dfuo INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6_MINI" + "BOARD_NAME=\"VCCGND_F103ZET6_MINI\"" + "BOARD_ID=VCCGND_F103ZET6_MINI" + "VARIANT_H=\"variant_VCCGND_F103ZET6_MINI.h\"" +) +target_include_directories(VCCGND_F103ZET6_MINI_dfuo INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_MINI_dfuo_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_MINI_dfuo INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_MINI_dfuo_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x5000" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_dfuo_MCU} +) +target_link_libraries(VCCGND_F103ZET6_MINI_dfuo INTERFACE + arm_cortexM3l_math +) + + +# VCCGND_F103ZET6_MINI_hid +# ----------------------------------------------------------------------------- + +set(VCCGND_F103ZET6_MINI_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F1xx/F103Z(C-D-E)(H-T)") +set(VCCGND_F103ZET6_MINI_hid_MAXSIZE 524288) +set(VCCGND_F103ZET6_MINI_hid_MAXDATASIZE 65536) +set(VCCGND_F103ZET6_MINI_hid_MCU cortex-m3) +set(VCCGND_F103ZET6_MINI_hid_FPCONF "-") +add_library(VCCGND_F103ZET6_MINI_hid INTERFACE) +target_compile_options(VCCGND_F103ZET6_MINI_hid INTERFACE + "SHELL:-DSTM32F103xE -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x800" + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_hid_MCU} +) +target_compile_definitions(VCCGND_F103ZET6_MINI_hid INTERFACE + "STM32F1xx" + "ARDUINO_VCCGND_F103ZET6_MINI" + "BOARD_NAME=\"VCCGND_F103ZET6_MINI\"" + "BOARD_ID=VCCGND_F103ZET6_MINI" + "VARIANT_H=\"variant_VCCGND_F103ZET6_MINI.h\"" +) +target_include_directories(VCCGND_F103ZET6_MINI_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F1xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F1xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/ + ${VCCGND_F103ZET6_MINI_hid_VARIANT_PATH} +) + +target_link_options(VCCGND_F103ZET6_MINI_hid INTERFACE + "LINKER:--default-script=${VCCGND_F103ZET6_MINI_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x800" + "LINKER:--defsym=LD_MAX_SIZE=524288" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${VCCGND_F103ZET6_MINI_hid_MCU} +) +target_link_libraries(VCCGND_F103ZET6_MINI_hid INTERFACE + arm_cortexM3l_math +) + + +# VCCGND_F407ZG_MINI +# ----------------------------------------------------------------------------- + +set(VCCGND_F407ZG_MINI_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(VCCGND_F407ZG_MINI_MAXSIZE 1048576) +set(VCCGND_F407ZG_MINI_MAXDATASIZE 131072) +set(VCCGND_F407ZG_MINI_MCU cortex-m4) +set(VCCGND_F407ZG_MINI_FPCONF "-") +add_library(VCCGND_F407ZG_MINI INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI INTERFACE + "SHELL:-DSTM32F407xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${VCCGND_F407ZG_MINI_MCU} +) +target_compile_definitions(VCCGND_F407ZG_MINI INTERFACE + "STM32F4xx" + "ARDUINO_VCCGND_F407ZG_MINI" + "BOARD_NAME=\"VCCGND_F407ZG_MINI\"" + "BOARD_ID=VCCGND_F407ZG_MINI" + "VARIANT_H=\"variant_VCCGND_F407ZG_MINI.h\"" +) +target_include_directories(VCCGND_F407ZG_MINI INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${VCCGND_F407ZG_MINI_VARIANT_PATH} +) + +target_link_options(VCCGND_F407ZG_MINI INTERFACE + "LINKER:--default-script=${VCCGND_F407ZG_MINI_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${VCCGND_F407ZG_MINI_MCU} +) +target_link_libraries(VCCGND_F407ZG_MINI INTERFACE + arm_cortexM4lf_math +) + +add_library(VCCGND_F407ZG_MINI_serial_disabled INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_serial_disabled INTERFACE + "SHELL:" +) +add_library(VCCGND_F407ZG_MINI_serial_generic INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(VCCGND_F407ZG_MINI_serial_none INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(VCCGND_F407ZG_MINI_usb_CDC INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(VCCGND_F407ZG_MINI_usb_CDCgen INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(VCCGND_F407ZG_MINI_usb_HID INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(VCCGND_F407ZG_MINI_usb_none INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_usb_none INTERFACE + "SHELL:" +) +add_library(VCCGND_F407ZG_MINI_xusb_FS INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_xusb_FS INTERFACE + "SHELL:" +) +add_library(VCCGND_F407ZG_MINI_xusb_HS INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(VCCGND_F407ZG_MINI_xusb_HSFS INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# VCCGND_F407ZG_MINI_hid +# ----------------------------------------------------------------------------- + +set(VCCGND_F407ZG_MINI_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T") +set(VCCGND_F407ZG_MINI_hid_MAXSIZE 1048576) +set(VCCGND_F407ZG_MINI_hid_MAXDATASIZE 131072) +set(VCCGND_F407ZG_MINI_hid_MCU cortex-m4) +set(VCCGND_F407ZG_MINI_hid_FPCONF "-") +add_library(VCCGND_F407ZG_MINI_hid INTERFACE) +target_compile_options(VCCGND_F407ZG_MINI_hid INTERFACE + "SHELL:-DSTM32F407xx -DHAL_UART_MODULE_ENABLED -DBL_HID -DVECT_TAB_OFFSET=0x4000" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${VCCGND_F407ZG_MINI_hid_MCU} +) +target_compile_definitions(VCCGND_F407ZG_MINI_hid INTERFACE + "STM32F4xx" + "ARDUINO_VCCGND_F407ZG_MINI" + "BOARD_NAME=\"VCCGND_F407ZG_MINI\"" + "BOARD_ID=VCCGND_F407ZG_MINI" + "VARIANT_H=\"variant_VCCGND_F407ZG_MINI.h\"" +) +target_include_directories(VCCGND_F407ZG_MINI_hid INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ + ${VCCGND_F407ZG_MINI_hid_VARIANT_PATH} +) + +target_link_options(VCCGND_F407ZG_MINI_hid INTERFACE + "LINKER:--default-script=${VCCGND_F407ZG_MINI_hid_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${VCCGND_F407ZG_MINI_hid_MCU} +) +target_link_libraries(VCCGND_F407ZG_MINI_hid INTERFACE + arm_cortexM4lf_math +) + + +# WeActMiniH743VITX +# ----------------------------------------------------------------------------- + +set(WeActMiniH743VITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(WeActMiniH743VITX_MAXSIZE 2097152) +set(WeActMiniH743VITX_MAXDATASIZE 524288) +set(WeActMiniH743VITX_MCU cortex-m7) +set(WeActMiniH743VITX_FPCONF "-") +add_library(WeActMiniH743VITX INTERFACE) +target_compile_options(WeActMiniH743VITX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H743xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${WeActMiniH743VITX_MCU} +) +target_compile_definitions(WeActMiniH743VITX INTERFACE + "STM32H7xx" + "ARDUINO_WeActMiniH743VITX" + "BOARD_NAME=\"WeActMiniH743VITX\"" + "BOARD_ID=WeActMiniH743VITX" + "VARIANT_H=\"variant_WeActMiniH7xx.h\"" +) +target_include_directories(WeActMiniH743VITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${WeActMiniH743VITX_VARIANT_PATH} +) + +target_link_options(WeActMiniH743VITX INTERFACE + "LINKER:--default-script=${WeActMiniH743VITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${WeActMiniH743VITX_MCU} +) +target_link_libraries(WeActMiniH743VITX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(WeActMiniH743VITX_serial_disabled INTERFACE) +target_compile_options(WeActMiniH743VITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(WeActMiniH743VITX_serial_generic INTERFACE) +target_compile_options(WeActMiniH743VITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(WeActMiniH743VITX_serial_none INTERFACE) +target_compile_options(WeActMiniH743VITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(WeActMiniH743VITX_usb_CDC INTERFACE) +target_compile_options(WeActMiniH743VITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(WeActMiniH743VITX_usb_CDCgen INTERFACE) +target_compile_options(WeActMiniH743VITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(WeActMiniH743VITX_usb_HID INTERFACE) +target_compile_options(WeActMiniH743VITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(WeActMiniH743VITX_usb_none INTERFACE) +target_compile_options(WeActMiniH743VITX_usb_none INTERFACE + "SHELL:" +) +add_library(WeActMiniH743VITX_xusb_FS INTERFACE) +target_compile_options(WeActMiniH743VITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(WeActMiniH743VITX_xusb_HS INTERFACE) +target_compile_options(WeActMiniH743VITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(WeActMiniH743VITX_xusb_HSFS INTERFACE) +target_compile_options(WeActMiniH743VITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# WeActMiniH750VBTX +# ----------------------------------------------------------------------------- + +set(WeActMiniH750VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)") +set(WeActMiniH750VBTX_MAXSIZE 131072) +set(WeActMiniH750VBTX_MAXDATASIZE 524288) +set(WeActMiniH750VBTX_MCU cortex-m7) +set(WeActMiniH750VBTX_FPCONF "-") +add_library(WeActMiniH750VBTX INTERFACE) +target_compile_options(WeActMiniH750VBTX INTERFACE + "SHELL:-DCORE_CM7 -DSTM32H750xx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${WeActMiniH750VBTX_MCU} +) +target_compile_definitions(WeActMiniH750VBTX INTERFACE + "STM32H7xx" + "ARDUINO_WeActMiniH750VBTX" + "BOARD_NAME=\"WeActMiniH750VBTX\"" + "BOARD_ID=WeActMiniH750VBTX" + "VARIANT_H=\"variant_WeActMiniH7xx.h\"" +) +target_include_directories(WeActMiniH750VBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/ + ${WeActMiniH750VBTX_VARIANT_PATH} +) + +target_link_options(WeActMiniH750VBTX INTERFACE + "LINKER:--default-script=${WeActMiniH750VBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=524288" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${WeActMiniH750VBTX_MCU} +) +target_link_libraries(WeActMiniH750VBTX INTERFACE + arm_cortexM7lfsp_math +) + +add_library(WeActMiniH750VBTX_serial_disabled INTERFACE) +target_compile_options(WeActMiniH750VBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(WeActMiniH750VBTX_serial_generic INTERFACE) +target_compile_options(WeActMiniH750VBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(WeActMiniH750VBTX_serial_none INTERFACE) +target_compile_options(WeActMiniH750VBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(WeActMiniH750VBTX_usb_CDC INTERFACE) +target_compile_options(WeActMiniH750VBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(WeActMiniH750VBTX_usb_CDCgen INTERFACE) +target_compile_options(WeActMiniH750VBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(WeActMiniH750VBTX_usb_HID INTERFACE) +target_compile_options(WeActMiniH750VBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(WeActMiniH750VBTX_usb_none INTERFACE) +target_compile_options(WeActMiniH750VBTX_usb_none INTERFACE + "SHELL:" +) +add_library(WeActMiniH750VBTX_xusb_FS INTERFACE) +target_compile_options(WeActMiniH750VBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(WeActMiniH750VBTX_xusb_HS INTERFACE) +target_compile_options(WeActMiniH750VBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(WeActMiniH750VBTX_xusb_HSFS INTERFACE) +target_compile_options(WeActMiniH750VBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# WRAITH32_V1 +# ----------------------------------------------------------------------------- + +set(WRAITH32_V1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F0xx/F051K(6-8)U") +set(WRAITH32_V1_MAXSIZE 32768) +set(WRAITH32_V1_MAXDATASIZE 7936) +set(WRAITH32_V1_MCU cortex-m0) +set(WRAITH32_V1_FPCONF "-") +add_library(WRAITH32_V1 INTERFACE) +target_compile_options(WRAITH32_V1 INTERFACE + "SHELL:-DSTM32F051x8 " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL: " + -mcpu=${WRAITH32_V1_MCU} +) +target_compile_definitions(WRAITH32_V1 INTERFACE + "STM32F0xx" + "ARDUINO_WRAITH32_V1" + "BOARD_NAME=\"WRAITH32_V1\"" + "BOARD_ID=WRAITH32_V1" + "VARIANT_H=\"variant_WRAITH32_V1.h\"" +) +target_include_directories(WRAITH32_V1 INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F0xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F0xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/ + ${WRAITH32_V1_VARIANT_PATH} +) + +target_link_options(WRAITH32_V1 INTERFACE + "LINKER:--default-script=${WRAITH32_V1_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=32768" + "LINKER:--defsym=LD_MAX_DATA_SIZE=7936" + "SHELL: " + -mcpu=${WRAITH32_V1_MCU} +) +target_link_libraries(WRAITH32_V1 INTERFACE + arm_cortexM0l_math +) + +add_library(WRAITH32_V1_serial_disabled INTERFACE) +target_compile_options(WRAITH32_V1_serial_disabled INTERFACE + "SHELL:" +) +add_library(WRAITH32_V1_serial_generic INTERFACE) +target_compile_options(WRAITH32_V1_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(WRAITH32_V1_serial_none INTERFACE) +target_compile_options(WRAITH32_V1_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(WRAITH32_V1_usb_CDC INTERFACE) +target_compile_options(WRAITH32_V1_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(WRAITH32_V1_usb_CDCgen INTERFACE) +target_compile_options(WRAITH32_V1_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0 -DUSBD_PID=0 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(WRAITH32_V1_usb_none INTERFACE) +target_compile_options(WRAITH32_V1_usb_none INTERFACE + "SHELL:" +) +add_library(WRAITH32_V1_xusb_FS INTERFACE) +target_compile_options(WRAITH32_V1_xusb_FS INTERFACE + "SHELL:" +) +add_library(WRAITH32_V1_xusb_HS INTERFACE) +target_compile_options(WRAITH32_V1_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(WRAITH32_V1_xusb_HSFS INTERFACE) +target_compile_options(WRAITH32_V1_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + diff --git a/cmake/build_sketch.cmake b/cmake/build_sketch.cmake new file mode 100644 index 0000000000..28a048621d --- /dev/null +++ b/cmake/build_sketch.cmake @@ -0,0 +1,65 @@ +cmake_minimum_required(VERSION 3.21) + +include(sketch_preprocess_sources) +include(convert_file) + +include(set_base_arduino_config) + +function(build_sketch) + add_subdirectory(${BUILD_VARIANT_PATH} ./variant) + add_subdirectory(${BUILD_CORE_PATH} ./cores/arduino) + add_subdirectory(${BUILD_LIB_PATH} ./libraries) + + + cmake_parse_arguments(PARSE_ARGV 0 SKBD "" "TARGET" "SOURCES;DEPENDS") + + if(DEFINED SKBD_UNPARSED_ARGUMENTS OR DEFINED SKBD_KEYWORDS_MISSING_VALUES) + message(SEND_ERROR "Invalid call to build_sketch(); some arguments went unparsed") + endif() + + if(NOT DEFINED SKBD_TARGET) + message(SEND_ERROR "Invalid call to build_sketch(); please specify a TARGET") + return() + elseif(NOT DEFINED SKBD_SOURCES) + message(SEND_ERROR "Invalid call to build_sketch(); please specify some SOURCES") + return() + endif() + + add_executable(${SKBD_TARGET}) + target_include_directories(base_config BEFORE INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}) + + foreach(SRCS IN LISTS SKBD_SOURCES) + sketch_preprocess_sources(OUTPUT_VARIABLE SRCS SOURCES ${SRCS}) + target_sources(${SKBD_TARGET} PRIVATE ${SRCS}) + endforeach() + + target_link_libraries(${SKBD_TARGET} PRIVATE stm32_runtime) + if(DEFINED SKBD_DEPENDS) + target_link_libraries(${SKBD_TARGET} PRIVATE ${SKBD_DEPENDS}) + endif() + + get_target_property(OUTDIR ${SKBD_TARGET} BINARY_DIR) + set(MAPFILE ${OUTDIR}/${SKBD_TARGET}.map) + + target_link_options(${SKBD_TARGET} PRIVATE + LINKER:-Map,${MAPFILE} + ) + + # this is here to make CMake et al. aware that the map file + # is generated along with the binary + add_custom_command(TARGET ${SKBD_TARGET} POST_BUILD + COMMAND ${CMAKE_COMMAND} -E true # essentially a no-op + BYPRODUCTS ${MAPFILE} + ) + + if(EXISTS ${Python3_EXECUTABLE}) + add_custom_command(TARGET ${SKBD_TARGET} POST_BUILD + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/sizereport.py -x ${CMAKE_SIZE} -f $ --progmem ${BOARD_MAXSIZE} --datamem ${BOARD_MAXDATASIZE} + ) + else() # STREQUAL "PYTHON3-NOTFOUND" + message(WARNING "python3 not found; the final size report will not be displayed") + endif() + + elf2bin(${SKBD_TARGET}) + elf2hex(${SKBD_TARGET}) +endfunction() diff --git a/cmake/convert_file.cmake b/cmake/convert_file.cmake new file mode 100644 index 0000000000..e80564de26 --- /dev/null +++ b/cmake/convert_file.cmake @@ -0,0 +1,27 @@ +cmake_minimum_required(VERSION 3.21) +function(elf2bin ELFTGT) + add_custom_command(TARGET ${ELFTGT} POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -O binary $ $.bin + ) + set_property(TARGET ${ELFTGT} APPEND PROPERTY ADDITIONAL_CLEAN_FILES "$.bin") +endfunction() + +function(elf2hex ELFTGT) + add_custom_command(TARGET ${ELFTGT} POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -O ihex $ $.hex + ) + set_property(TARGET ${ELFTGT} APPEND PROPERTY ADDITIONAL_CLEAN_FILES "$.hex") +endfunction() + +function(gv2svg GVFILE ENGINE) + get_filename_component(ABSGV ${GVFILE} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_BINARY_DIR}) + get_filename_component(GVNAME ${GVFILE} NAME) + + # HACK: all this to get the final SVG file as a visible target with the same name as the file + add_custom_target(${GVNAME}.svg DEPENDS ${ABSGV}) + add_custom_command(TARGET ${GVNAME}.svg POST_BUILD + COMMAND ${ENGINE} -Tsvg -o ${ABSGV}.svg ${ABSGV} + ) + set_property(TARGET ${GVNAME}.svg APPEND PROPERTY ADDITIONAL_CLEAN_FILES ${ABSGV}.svg) + +endfunction() diff --git a/cmake/ensure_core_deps.cmake b/cmake/ensure_core_deps.cmake new file mode 100644 index 0000000000..323af46bea --- /dev/null +++ b/cmake/ensure_core_deps.cmake @@ -0,0 +1,163 @@ +cmake_minimum_required(VERSION 3.21) +include(FetchContent) + +function(get_core_version OUTVAR) + file(READ ${PLATFORMTXT_PATH} PLATFORMTXT) + string(REGEX MATCH "version=.+\n" LINE "${PLATFORMTXT}") + string(SUBSTRING "${LINE}" 8 -1 INVAR) + set(${OUTVAR} ${INVAR} PARENT_SCOPE) +endfunction() + +function(get_host OUTVAR) + cmake_host_system_information( + RESULT HOSTINFO + QUERY OS_NAME OS_PLATFORM + ) + list(GET HOSTINFO 0 HOST_OS) + list(GET HOSTINFO 1 HOST_ARCH) + string(TOUPPER ${HOST_ARCH} HOST_ARCH) + + set(${OUTVAR} "all" PARENT_SCOPE) # fallback value + if (${HOST_OS} STREQUAL "Linux") + if (${HOST_ARCH} MATCHES "^(AMD64|X86_64|x64)$") + set(${OUTVAR} "x86_64-pc-linux-gnu" PARENT_SCOPE) + elseif (${HOST_ARCH} MATCHES "^(ARM64)$") + set(${OUTVAR} "aarch64-linux-gnu" PARENT_SCOPE) + elseif (${HOST_ARCH} MATCHES "^(ARM)$") + # TODO: check for FPU with cmake_host_system_information(HAS_FPU) + set(${OUTVAR} "arm-linux-gnueabihf" PARENT_SCOPE) + elseif (${HOST_ARCH} MATCHES "^(I386|IA32|x86|i686)$") + set(${OUTVAR} "i686-pc-linux-gnu" PARENT_SCOPE) + endif() + elseif (${HOST_OS} STREQUAL "Windows") + if (${HOST_ARCH} MATCHES "^(AMD64|X86_64|x64|I386|IA32|x86|I686)$") + set(${OUTVAR} "i686-mingw32" PARENT_SCOPE) + endif() + elseif (${HOST_OS} STREQUAL "Darwin") + if (${HOST_ARCH} MATCHES "^(AMD64|X86_64|x64)$") + set(${OUTVAR} "x86_64-apple-darwin" PARENT_SCOPE) + endif() + endif() +endfunction() + +function(get_target_url JSONARR OUT_URL OUT_SHA) + get_host(HOSTID) + string(JSON LEN LENGTH "${JSONARR}") + math(EXPR LEN "${LEN}-1") # iterate from 0 to len-1 + foreach(I RANGE ${LEN}) + string(JSON IHOST GET "${JSONARR}" ${I} "host") + if(${IHOST} STREQUAL "all" OR ${IHOST} STREQUAL ${HOSTID}) + string(JSON IURL GET "${JSONARR}" ${I} "url") + string(JSON ISUM GET "${JSONARR}" ${I} "checksum") + set(${OUT_URL} ${IURL} PARENT_SCOPE) + string(SUBSTRING "${ISUM}" 8 -1 ISUM) # assume "SHA-256:", remove that prefix + set(${OUT_SHA} ${ISUM} PARENT_SCOPE) + return() + endif() + endforeach() +endfunction() + +function(declare_deps CORE_VERSION) + file(REAL_PATH "${DL_DIR}/package_stmicroelectronics_index.json" JSONFILE) + if (NOT EXISTS ${JSONFILE}) + file(DOWNLOAD "${JSONCONFIG_URL}" ${JSONFILE}) + endif() + file(READ ${JSONFILE} JSONCONFIG) + string(JSON PLATFORMS GET "${JSONCONFIG}" "packages" 0 "platforms") + string(JSON TOOLS GET "${JSONCONFIG}" "packages" 0 "tools") + string(JSON LEN_PLATFORM LENGTH "${PLATFORMS}") + math(EXPR LEN_PLATFORM "${LEN_PLATFORM}-1") # iterate from 0 to len-1 + string(JSON LEN_TOOLS LENGTH "${TOOLS}") + math(EXPR LEN_TOOLS "${LEN_TOOLS}-1") + + # 1. extract the dependencies of the core at the specified version + # (or the latest version older than the target version) + set(VERS "0.0.0") + set(DEPS "") + foreach(I_PKG RANGE ${LEN_PLATFORM}) + string(JSON I_ARCH GET "${PLATFORMS}" ${I_PKG} "architecture") + if (NOT ${I_ARCH} STREQUAL "stm32") + continue() + endif() + + string(JSON I_VER GET "${PLATFORMS}" ${I_PKG} "version") + if(${I_VER} VERSION_LESS_EQUAL ${CORE_VERSION} AND ${I_VER} VERSION_GREATER ${VERS}) + set(VERS ${I_VER}) + string(JSON DEPS GET "${PLATFORMS}" ${I_PKG} "toolsDependencies") + endif() + endforeach() + + # 2. find the versions of the dependencies for that core + set(XPACK_VERSION "0.0.0") + set(CMSIS_VERSION "0.0.0") + # Note: we're ignoring the STM32Tools dep, because unlike Arduino IDE we don't need it (upload + misc scripts) + string(JSON LEN_DEPS LENGTH "${DEPS}") + math(EXPR LEN_DEPS "${LEN_DEPS}-1") + foreach(I_DEP RANGE ${LEN_DEPS}) + string(JSON DEP_NAME GET "${DEPS}" ${I_DEP} "name") + if(${DEP_NAME} STREQUAL "xpack-arm-none-eabi-gcc") + string(JSON XPACK_VERSION GET "${DEPS}" ${I_DEP} "version") + elseif(${DEP_NAME} STREQUAL "CMSIS") + string(JSON CMSIS_VERSION GET "${DEPS}" ${I_DEP} "version") + endif() + endforeach() + + # 3. grab the correct download URL + SHAsum for each dep + set(XPACK_URL "") + set(XPACK_SHA "") + set(CMSIS_URL "") + set(CMSIS_SHA "") + foreach(I_TOOL RANGE ${LEN_TOOLS}) + string(JSON TOOL_NAME GET "${TOOLS}" ${I_TOOL} "name") + string(JSON TOOL_VERSION GET "${TOOLS}" ${I_TOOL} "version") + string(JSON TOOL_SUPPORT GET "${TOOLS}" ${I_TOOL} "systems") + if(${TOOL_NAME} STREQUAL "xpack-arm-none-eabi-gcc" AND ${TOOL_VERSION} VERSION_EQUAL ${XPACK_VERSION}) + get_target_url("${TOOL_SUPPORT}" XPACK_URL XPACK_SHA) + elseif(${TOOL_NAME} STREQUAL "CMSIS" AND ${TOOL_VERSION} VERSION_EQUAL ${CMSIS_VERSION}) + get_target_url("${TOOL_SUPPORT}" CMSIS_URL CMSIS_SHA) + endif() + endforeach() + + # 4. declare the download (not executed yet, that will be up to the caller) + FetchContent_Declare( + xpack + SOURCE_DIR ${DL_DIR}/dist/xpack + PREFIX ${DL_DIR} + URL "${XPACK_URL}" + URL_HASH SHA256=${XPACK_SHA} + UPDATE_DISCONNECTED + ) + + FetchContent_Declare( + CMSIS5 + SOURCE_DIR ${DL_DIR}/dist/CMSIS5 + PREFIX ${DL_DIR} + URL "${CMSIS_URL}" + URL_HASH SHA256=${CMSIS_SHA} + UPDATE_DISCONNECTED + ) +endfunction() + +# defines a CMSIS5_PATH in the caller's scope +function(ensure_core_deps) + if(NOT EXISTS ${DL_DIR}/dist/CMSIS5 OR NOT EXISTS ${DL_DIR}/dist/xpack) + get_core_version(COREVER) + declare_deps(${COREVER}) + message(STATUS "Downloading the CMSIS...") + FetchContent_MakeAvailable(CMSIS5) + message(STATUS "Downloading the CMSIS... Done.") + message(STATUS "Downloading the compiler toolchain...") + FetchContent_MakeAvailable(xpack) + message(STATUS "Downloading the compiler toolchain... Done.") + endif() + + set(CMSIS5_PATH ${DL_DIR}/dist/CMSIS5 PARENT_SCOPE) + + find_program(CMAKE_ASM_COMPILER arm-none-eabi-gcc PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) + find_program(CMAKE_C_COMPILER arm-none-eabi-gcc PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) + find_program(CMAKE_CXX_COMPILER arm-none-eabi-g++ PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) + find_program(CMAKE_AR arm-none-eabi-ar PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) + find_program(CMAKE_LD arm-none-eabi-ld PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) + find_program(CMAKE_OBJCOPY arm-none-eabi-objcopy PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) + find_program(CMAKE_SIZE arm-none-eabi-size PATHS ${DL_DIR}/dist/xpack/bin REQUIRED) +endfunction() diff --git a/cmake/environment.cmake b/cmake/environment.cmake new file mode 100644 index 0000000000..836945d668 --- /dev/null +++ b/cmake/environment.cmake @@ -0,0 +1,20 @@ +cmake_minimum_required(VERSION 3.21) + +string(MD5 PATH_HASH "${CMAKE_CURRENT_LIST_FILE}") + +file(REAL_PATH "${CMAKE_CURRENT_LIST_DIR}/.." CORE_PATH) +file(REAL_PATH "${CORE_PATH}/cores/arduino" BUILD_CORE_PATH) +file(REAL_PATH "${CORE_PATH}/system" BUILD_SYSTEM_PATH) +file(REAL_PATH "${CORE_PATH}/libraries" BUILD_LIB_PATH) +file(REAL_PATH "~/.Arduino_Core_STM32_dl/${PATH_HASH}" DL_DIR EXPAND_TILDE) +file(REAL_PATH "${CORE_PATH}/platform.txt" PLATFORMTXT_PATH) +file(REAL_PATH "${CORE_PATH}/boards.txt" BOARDSTXT_PATH) +file(REAL_PATH "${CORE_PATH}/cmake/scripts" SCRIPTS_FOLDER) +file(REAL_PATH "${CORE_PATH}/cmake/templates/boards_db.cmake" CMAKE_BOARDS_DB_TEMPLATE_PATH) +file(REAL_PATH "${CORE_PATH}/cmake/boards_db.cmake" CMAKE_BOARDS_DB_PATH) + +set(JSONCONFIG_URL "https://raw.githubusercontent.com/stm32duino/BoardManagerFiles/dev/package_stmicroelectronics_index.json") + +if(NOT "${CMAKE_CURRENT_LIST_DIR}" IN_LIST CMAKE_MODULE_PATH) + list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_LIST_DIR}") +endif() diff --git a/cmake/external_library.cmake b/cmake/external_library.cmake new file mode 100644 index 0000000000..8be3ce2596 --- /dev/null +++ b/cmake/external_library.cmake @@ -0,0 +1,28 @@ +cmake_minimum_required(VERSION 3.21) + +# note: the doc say these must be called _at file scope_, not in a function +enable_language(C) +enable_language(CXX) +enable_language(ASM) + +function(external_library) + cmake_parse_arguments(PARSE_ARGV 0 XLIB "FORCE" "PATH" "DEPENDS") + + if(DEFINED XLIB_UNPARSED_ARGUMENTS OR DEFINED XLIB_KEYWORDS_MISSING_VALUES) + message(SEND_ERROR "Invalid call to external_library(); some arguments went unparsed") + endif() + + if(NOT DEFINED XLIB_PATH) + message(SEND_ERROR "Invalid call to external_library(); please specify a PATH") + return() + endif() + + if(NOT EXISTS ${XLIB_PATH}/CMakeLists.txt OR ${XLIB_FORCE}) + execute_process( + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/cmake_libs.py -l ${XLIB_PATH} -d ${XLIB_DEPENDS} + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} + ) + endif() + get_filename_component(LIBNAME ${XLIB_PATH} NAME) + add_subdirectory(${XLIB_PATH} ${LIBNAME}) +endfunction() diff --git a/cmake/insights.cmake b/cmake/insights.cmake new file mode 100644 index 0000000000..3113cd41f3 --- /dev/null +++ b/cmake/insights.cmake @@ -0,0 +1,126 @@ +cmake_minimum_required(VERSION 3.21) +include(convert_file) + +# internal +macro(find_dependencies TGT DEPTGTS) + get_target_property(TGT_TYPE ${TGT} TYPE) + unset(_DEP_PRIV) + unset(_DEP_PUB) + + get_target_property(_DEP_PUB ${TGT} INTERFACE_LINK_LIBRARIES) + + if (NOT ${TGT_TYPE} STREQUAL INTERFACE_LIBRARY) + get_target_property(_DEP_PRIV ${TGT} LINK_LIBRARIES) + list(APPEND ${DEPTGTS} ${TGT}) + endif() + + foreach(_LIB IN LISTS _DEP_PRIV _DEP_PUB) + if (TARGET ${_LIB} AND NOT ${_LIB} IN_LIST ${DEPTGTS}) + find_dependencies(${_LIB} ${DEPTGTS}) + endif() + endforeach() +endmacro() + +function(insights) + set(KEYWORDS "DIRECT_INCLUDES" "TRANSITIVE_INCLUDES" "SYMBOLS" "ARCHIVES" "LOGIC_STRUCTURE") + cmake_parse_arguments(PARSE_ARGV 0 INSIGHTS "${KEYWORDS}" "TARGET" "") + + if(DEFINED INSIGHTS_UNPARSED_ARGUMENTS OR DEFINED INSIGHTS_KEYWORDS_MISSING_VALUES) + message(SEND_ERROR "Invalid call to insights(); some arguments went unparsed") + endif() + + if(NOT DEFINED INSIGHTS_TARGET) + message(SEND_ERROR "Invalid call to insights(); please specify a TARGET") + return() + endif() + + get_target_property(OUTDIR ${INSIGHTS_TARGET} BINARY_DIR) + + if (${INSIGHTS_DIRECT_INCLUDES} OR ${INSIGHTS_TRANSITIVE_INCLUDES}) + set(LOGDIR "${OUTDIR}/cc_logs") + file(MAKE_DIRECTORY ${LOGDIR}) + + find_dependencies(${INSIGHTS_TARGET} ALLTARGETS) + set(ALL_LOGS "") + foreach(TGT IN LISTS ALLTARGETS) + set(TGT_LOGS "") + get_target_property(TGTSOURCES ${TGT} SOURCES) + foreach(S IN LISTS TGTSOURCES) + get_filename_component(FN ${S} NAME) + set(S_LOG "${LOGDIR}/${FN}.log") + # # doesn't work properly on some source files + # set_source_files_properties(${S} PROPERTIES + # OBJECT_OUTPUTS ${S_LOG} + # ) + add_custom_command( + # the log depends on the whole target, no just on the object file + # the latter would be more efficient, but is harder to implement properly + OUTPUT ${S_LOG} + DEPENDS ${TGT} + ) + list(APPEND ALL_LOGS ${S_LOG}) + list(APPEND TGT_LOGS ${S_LOG}) + + target_compile_options(${TGT} PRIVATE + -H # display #include'd paths on stderr + ) + set_target_properties(${TGT} PROPERTIES + RULE_LAUNCH_COMPILE "${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/ccwrapper.py -d ${LOGDIR} -i --" + ) + set_property(TARGET ${TGT} APPEND PROPERTY + ADDITIONAL_CLEAN_FILES "${TGT_LOGS}" + ) + endforeach() + endforeach() + endif() + + if (${INSIGHTS_SYMBOLS} OR ${INSIGHTS_ARCHIVES}) + set(MAPFILE ${OUTDIR}/${INSIGHTS_TARGET}.map) + endif() + + if (${INSIGHTS_DIRECT_INCLUDES}) + set(INSIGHTS_DIRECT_INCLUDES_GVFNAME ${OUTDIR}/direct_includes.gv) + add_custom_command(OUTPUT ${INSIGHTS_DIRECT_INCLUDES_GVFNAME} + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/includes.py -o ${INSIGHTS_DIRECT_INCLUDES_GVFNAME} ${ALL_LOGS} + DEPENDS ${ALL_LOGS} + ) + gv2svg(${INSIGHTS_DIRECT_INCLUDES_GVFNAME} ${SFDP}) + endif() + + if (${INSIGHTS_TRANSITIVE_INCLUDES}) + set(INSIGHTS_TRANSITIVE_INCLUDES_GVFNAME ${OUTDIR}/transitive_includes.gv) + add_custom_command(OUTPUT ${INSIGHTS_TRANSITIVE_INCLUDES_GVFNAME} + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/includes.py -t ${INSIGHTS_TRANSITIVE_INCLUDES_GVFNAME} ${ALL_LOGS} + DEPENDS ${ALL_LOGS} + ) + gv2svg(${INSIGHTS_TRANSITIVE_INCLUDES_GVFNAME} ${SFDP}) + endif() + + if (${INSIGHTS_SYMBOLS}) + set(INSIGHTS_SYMBOLS_GVFNAME ${OUTDIR}/symbols.gv) + add_custom_command(OUTPUT ${INSIGHTS_SYMBOLS_GVFNAME} + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/syms.py -m ${MAPFILE} -f ${INSIGHTS_SYMBOLS_GVFNAME} + DEPENDS ${MAPFILE} + ) + gv2svg(${INSIGHTS_SYMBOLS_GVFNAME} ${SFDP}) + endif() + + if (${INSIGHTS_ARCHIVES}) + set(INSIGHTS_ARCHIVES_GVFNAME ${OUTDIR}/archives.gv) + add_custom_command(OUTPUT ${INSIGHTS_ARCHIVES_GVFNAME} + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/syms.py -m ${MAPFILE} -s ${INSIGHTS_ARCHIVES_GVFNAME} + DEPENDS ${MAPFILE} + ) + gv2svg(${INSIGHTS_ARCHIVES_GVFNAME} ${SFDP}) + endif() + + if(${INSIGHTS_LOGIC_STRUCTURE}) + file(MAKE_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/gv) + add_custom_command(OUTPUT ${OUTDIR}/logicstructure.gv + COMMAND ${CMAKE_COMMAND} --graphviz=${CMAKE_CURRENT_BINARY_DIR}/gv/project.gv ${CMAKE_BINARY_DIR} + COMMAND ${CMAKE_COMMAND} -E copy ${CMAKE_CURRENT_BINARY_DIR}/gv/project.gv.${INSIGHTS_TARGET} ${OUTDIR}/logicstructure.gv + BYPRODUCTS ${CMAKE_CURRENT_BINARY_DIR}/gv/project.gv.${INSIGHTS_TARGET} + ) + gv2svg(${OUTDIR}/logicstructure.gv ${DOT}) + endif() +endfunction() diff --git a/cmake/overall_settings.cmake b/cmake/overall_settings.cmake new file mode 100644 index 0000000000..ec74e7221e --- /dev/null +++ b/cmake/overall_settings.cmake @@ -0,0 +1,99 @@ +cmake_minimum_required(VERSION 3.21) + +function(overall_settings) + if(TARGET user_settings) + message(SEND_ERROR "overall_settings() was called twice. This is not allowed as it could result in conflicting settings.") + return() + endif() + + add_library(user_settings INTERFACE) + + set(KEYWORDS0 STANDARD_LIBC PRINTF_FLOAT SCANF_FLOAT DEBUG_SYMBOLS LTO NO_RELATIVE_MACRO UNDEF_NDEBUG CORE_CALLBACK) + set(KEYWORDS1 OPTIMIZATION BUILD_OPT) + set(KEYWORDSN DISABLE_HAL_MODULES) + cmake_parse_arguments(PARSE_ARGV 0 WANT "${KEYWORDS0}" "${KEYWORDS1}" "${KEYWORDSN}") + + if(DEFINED WANT_UNPARSED_ARGUMENTS OR DEFINED WANT_KEYWORDS_MISSING_VALUES) + message(SEND_ERROR "Invalid call to overall_settings(); some arguments went unparsed") + endif() + + if(${WANT_CORE_CALLBACK}) + target_compile_options(user_settings INTERFACE + CORE_CALLBACK + ) + endif() + + if(NOT ${WANT_NO_RELATIVE_MACRO}) + # $ is evaluated by the final consumer, not user_settings + target_compile_options(user_settings INTERFACE + "-fmacro-prefix-map=$=." + ) + endif() + + if(NOT ${WANT_UNDEF_NDEBUG}) + target_compile_definitions(user_settings INTERFACE NDEBUG) + endif() + + if(NOT ${WANT_STANDARD_LIBC}) + target_link_options(user_settings INTERFACE + "--specs=nano.specs" + ) + if(${WANT_PRINTF_FLOAT}) + target_link_options(user_settings INTERFACE + "SHELL:-u _printf_float" + ) + endif() + if(${WANT_SCANF_FLOAT}) + target_link_options(user_settings INTERFACE + "SHELL:-u _scanf_float" + ) + endif() + endif() + + if(NOT DEFINED WANT_OPTIMIZATION) + set(WANT_OPTIMIZATION "s") + endif() + if(${WANT_OPTIMIZATION} MATCHES "^[0-3gs]$") + target_compile_options(user_settings INTERFACE + -O${WANT_OPTIMIZATION} + ) + else() + message(SEND_ERROR "Bad value for OPTIMIZATION: got `${WANT_OPTIMIZATION}`, expected one of 0123gs.") + endif() + + if(${WANT_DEBUG_SYMBOLS}) + target_compile_options(user_settings INTERFACE + -g + ) + endif() + + if(${WANT_LTO}) + # the INTERPROCEDURAL_OPTIMIZATION property doesn't work here + # (because it's an INTERFACE target I guess ?) + target_compile_options(user_settings INTERFACE + -flto + ) + target_link_options(user_settings INTERFACE + -flto + ) + endif() + + if(DEFINED WANT_BUILD_OPT) + cmake_path(ABSOLUTE_PATH WANT_BUILD_OPT) + target_compile_options(user_settings INTERFACE + "@${WANT_BUILD_OPT}" + ) + target_link_options(user_settings INTERFACE + "@${WANT_BUILD_OPT}" + ) + endif() + + if(DEFINED WANT_DISABLE_HAL_MODULES) + foreach(MOD IN LISTS WANT_DISABLE_HAL_MODULES) + string(TOUPPER ${MOD} MOD) + add_compile_definitions(user_settings INTERFACE + HAL_${MOD}_MODULE_DISABLED + ) + endforeach() + endif() +endfunction() diff --git a/cmake/scripts/.flake8 b/cmake/scripts/.flake8 new file mode 100644 index 0000000000..2bcd70e390 --- /dev/null +++ b/cmake/scripts/.flake8 @@ -0,0 +1,2 @@ +[flake8] +max-line-length = 88 diff --git a/cmake/scripts/ccwrapper.py b/cmake/scripts/ccwrapper.py new file mode 100644 index 0000000000..c00abbc300 --- /dev/null +++ b/cmake/scripts/ccwrapper.py @@ -0,0 +1,36 @@ +#!/usr/bin/env python3 + +import io +import re +import pathlib +import subprocess +import argparse + +parser = argparse.ArgumentParser() +parser.add_argument( + "--source", "-i", type=pathlib.Path, required=True, help="input file being compiled" +) +parser.add_argument( + "--logdir", "-d", type=pathlib.Path, required=True, help="log directory" +) +parser.add_argument( + "cmd", + action="extend", + nargs="+", + help="full compilation command (including -H etc...)", +) + +shargs = parser.parse_args() + +logline = re.compile(r"^\.* .+$") # a series of dots, a space, a filename + + +proc = subprocess.run(shargs.cmd, capture_output=True, encoding="ascii") +if proc.returncode != 0: + exit(proc.returncode) + +with open(shargs.logdir / (shargs.source.name + ".log"), "w") as file: + print(" " + str(shargs.source), file=file) + for line in io.StringIO(proc.stderr): + if logline.match(line): + print(line.rstrip(), file=file) # remove trailing '\n' diff --git a/cmake/scripts/cmake_core.py b/cmake/scripts/cmake_core.py new file mode 100644 index 0000000000..3fa52277f3 --- /dev/null +++ b/cmake/scripts/cmake_core.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python3 + +import argparse +from pathlib import Path +from jinja2 import Environment, FileSystemLoader +from cmake_gen import config_for_bareflat, render + +script_path = Path(__file__).parent.resolve() + +parser = argparse.ArgumentParser() +parser.add_argument("corepath", type=Path, help="path to .../cores/arduino") + +shargs = parser.parse_args() + +templates_dir = script_path / ".." / "templates" +j2_env = Environment( + loader=FileSystemLoader(str(templates_dir)), trim_blocks=True, lstrip_blocks=True +) +cmake_template = j2_env.get_template("CMakeLists.txt") + +config = config_for_bareflat(shargs.corepath, force_recurse=True) +config["target"] = "core" +config["objlib"] = False +render(shargs.corepath, cmake_template, config) diff --git a/cmake/scripts/cmake_easy_setup.py b/cmake/scripts/cmake_easy_setup.py new file mode 100644 index 0000000000..1b2f68e735 --- /dev/null +++ b/cmake/scripts/cmake_easy_setup.py @@ -0,0 +1,220 @@ +#!/usr/bin/env python3 + +import argparse +import subprocess +import shutil +import tempfile +import os +import pathlib +import json +from jinja2 import Environment, FileSystemLoader +import difflib + +from parse_boards import parse_file + +parser = argparse.ArgumentParser() +parser.add_argument( + "--cli", + "-x", + type=pathlib.Path, + required=False, + default=shutil.which("arduino-cli"), + help="path to arduino-cli", +) +parser.add_argument("--board", "-b", type=str, default="", help="board name") +parser.add_argument( + "--fire", + action="store_true", + default=False, + help="launch the build immediately (use with caution!)", +) +output_args = parser.add_mutually_exclusive_group(required=True) +output_args.add_argument( + "--output", "-o", type=pathlib.Path, help="output file (CMake) with placeholders" +) +output_args.add_argument( + "--sketch", + "-s", + type=pathlib.Path, + help="output file (CMake) filled given a sketch folder", +) + +shargs = parser.parse_args() +shargs.board = shargs.board.upper() + +if shargs.sketch and not shargs.board: + print( + """ + Warning: you did not specify which board you were targeting; + please review the generated CMakeLists.txt to remove the placeholder + value before calling `cmake`. + """ + ) + +if shargs.cli is None: + print( + """ + Error: `arduino-cli` not found in $PATH. + Please install arduino-cli and make it available from your system $PATH, + or give its location through the `--cli` argument. + """ + ) + exit(-1) + + +def arduino(*args): + # return (out.stdout, logfile) + # raises an exception if the command fails + handle, logfile = tempfile.mkstemp() + os.close(handle) + out = subprocess.run( + (shargs.cli, "--log-file", logfile, "--log-format", "json", *args), + capture_output=True, + encoding="utf-8", + check=True, + ).stdout + return (out, logfile) + + +def get_log(fname): + with open(fname) as file: + for line in file: + yield json.loads(line) + + +def get_boards(boardstxt): + + # we "reject" everything because we don't care about the values, only the keys + families = parse_file(boardstxt, lambda x: True) + del families["menu"] + + boards = set() + for fam, famcfg in families.items(): + boards.update(famcfg.menu.pnum.keys()) + + return boards + + +_, logf = arduino("lib", "list") + +allboards = get_boards(pathlib.Path(__file__).parent.parent.parent / "boards.txt") + + +if shargs.board and shargs.board not in allboards: + print(f"Unrecognized board name: '{shargs.board}'") + print("Possible matches:") + options = difflib.get_close_matches(shargs.board, allboards, n=9, cutoff=0.0) + print("0. (keep as-is)") + for i, x in enumerate(options, start=1): + print(f"{i}. {x}") + choice = input("Choice number: ") + while not choice.isdecimal(): + choice = input("Invalid choice *number*. Select a board: ") + choice = int(choice) + if choice != 0: + choice -= 1 + shargs.board = options[choice] + + +libpaths = dict() +for line in get_log(logf): + if line["msg"] == "Adding libraries dir": + libpaths[line["location"]] = pathlib.Path(line["dir"]) + +# platform lib path is already known, obviously, since that's where this script resides +if "user" in libpaths.keys(): + userlibs = pathlib.Path(libpaths["user"]) + if userlibs.exists(): + userlibs = userlibs.resolve() + libs = [u.name for u in userlibs.iterdir() if u.is_dir()] + else: + print( + f"""Warning: Cannot find {userlibs}. + This has likely to do with your arduino-cli configuration. + Please refer to the following link for setup details: + https://arduino.github.io/arduino-cli/latest/getting-started/#create-a-configuration-file + """ + ) + libs = list() +else: + userlibs = pathlib.Path.home() / "Arduino/libraries" + print( + f"""No user library path found through arduino-cli (falling back to {userlibs}). + This has likely to do with your arduino-cli configuration. + Please refer to the following link for setup details: + https://arduino.github.io/arduino-cli/latest/getting-started/#create-a-configuration-file + """ + ) + libs = list() + +corepath = pathlib.Path(__file__).parent.parent.parent.resolve() + +j2_env = Environment( + loader=FileSystemLoader(str(corepath / "cmake" / "templates")), + trim_blocks=True, + lstrip_blocks=True, +) +cmake_template = j2_env.get_template("easy_cmake.cmake") + + +userhome = pathlib.Path.home() +if userlibs.is_relative_to(userhome): + userlibs = "~/" + str(userlibs.relative_to(userhome)) +if corepath.is_relative_to(userhome): + corepath = "~/" + str(corepath.relative_to(userhome)) + +if shargs.sketch: + SOURCEFILE_EXTS = (".c", ".cpp", ".S", ".ino") + sources = { + file.relative_to(shargs.sketch) + for file in shargs.sketch.glob("*") + if file.is_file() and file.suffix in SOURCEFILE_EXTS + } + sources |= { + file.relative_to(shargs.sketch) + for file in shargs.sketch.rglob("src/*") + if file.is_file() and file.suffix in SOURCEFILE_EXTS + } + tgtname = shargs.sketch.resolve().name +else: + tgtname = "" + sources = set() + +scriptname = pathlib.Path(__file__) +if scriptname.is_relative_to(userhome): + scriptname = "~/" + str(scriptname.relative_to(userhome)) + +with open(shargs.output or shargs.sketch / "CMakeLists.txt", "w") as out: + out.write( + cmake_template.render( + corepath=str(corepath).replace( + "\\", "\\\\" + ), # escape backslashes for CMake + userlibs=str(userlibs).replace("\\", "\\\\"), + libs=libs, + scriptfile=scriptname, + tgtname=tgtname, + scrcfiles=sources, + boardname=shargs.board, + ) + ) + + +print("Generated", shargs.output or shargs.sketch / "CMakeLists.txt") +print( + """ +Unless you are building a very simple sketch with no library (e.g., Blink), +you are advised to edit this file to fill in any missing dependency relationship. +For details, please refer to +https://github.com/stm32duino/wiki/wiki/Arduino-%28in%29compatibility#library-management + """ +) + +if shargs.fire: + if not (shargs.sketch and shargs.board): + print( + "There remains some placeholder in the output file; I won't build _that_." + ) + exit(1) + subprocess.run(("cmake", "-S", shargs.sketch, "-B", shargs.sketch / "build")) + subprocess.run(("cmake", "--build", shargs.sketch / "build")) diff --git a/cmake/scripts/cmake_gen.py b/cmake/scripts/cmake_gen.py new file mode 100644 index 0000000000..ab8c8bd5ba --- /dev/null +++ b/cmake/scripts/cmake_gen.py @@ -0,0 +1,125 @@ +#!/usr/bin/env python3 + +SOURCEFILE_EXTS = ( + ".c", + ".cpp", + ".S", +) + + +def get_default_config(): + return dict( + sources=set(), + includedirs=set(), + extra_libs=set(), + target="", + objlib=True, + ldflags="", + precompiled="false", + binaries=dict(), + ) + + +def parse_configfile(file): + rawcfg = dict() + + for line in open(file): + line = line.strip() + if not line: + continue + if line.startswith("#"): + continue + + key, value = line.split("=", 1) + key = key + value = value + rawcfg[key.strip()] = value.strip() + + cfg = dict() + cfg["objlib"] = False if rawcfg.get("dot_a_linkage") == "true" else True + cfg["ldflags"] = rawcfg.get("ldflags", "") + cfg["precompiled"] = rawcfg.get("precompiled", "false") + return cfg + + +def get_sources(dir, recursive=False, relative_to=None): + if relative_to is None: + relative_to = dir + if recursive: + walker = type(dir).rglob + else: + walker = type(dir).glob + + return { + str(file.relative_to(relative_to)).replace("\\", "/") + for file in walker(dir, "*") + if file.is_file() and file.suffix in SOURCEFILE_EXTS + } + + +def render(dir, template, config): + with open(dir / "CMakeLists.txt", "w") as outfile: + outfile.write(template.render(**config)) + + +def get_static_libs(dir): + result = dict() + cpu = "" + fpconf = "-" # format: f"{fpu}-{float_abi}"; this makes "-" by default + for file in dir.glob("src/*/lib*.a"): + if not file.is_file(): + continue + cpu = file.parent.name + result.setdefault(cpu + fpconf, list()).append(file.relative_to(dir)) + for file in dir.glob("src/*/*/lib*.a"): + if not file.is_file(): + continue + fpconf = file.parent.name + cpu = file.parent.parent.name + result.setdefault(cpu + fpconf, list()).append(file.relative_to(dir)) + return result + + +def config_for_bareflat(dir, force_recurse=False): + # no library.properties + config = get_default_config() + + config["target"] = dir.name + config["sources"].update(get_sources(dir, recursive=force_recurse)) + config["includedirs"].add(dir.relative_to(dir)) + + utils = dir / "utility" + if utils.exists() and utils.is_dir(): + config["sources"].update( + get_sources(utils, relative_to=dir, recursive=force_recurse) + ) + config["includedirs"].add(utils.relative_to(dir)) + + return config + + +def config_for_modern(dir): + # library.properties present, src/ present + config = get_default_config() + config.update(parse_configfile(dir / "library.properties")) + + config["target"] = dir.name + config["sources"].update(get_sources(dir / "src", recursive=True, relative_to=dir)) + config["includedirs"].add((dir / "src").relative_to(dir)) + config["binaries"].update(get_static_libs(dir)) + + return config + + +def autoconfig(libdir): + conf_file = libdir / "library.properties" + srcdir = libdir / "src" + if ( + conf_file.exists() + and conf_file.is_file() + and srcdir.exists() + and srcdir.is_dir() + ): + return config_for_modern(libdir) + else: + return config_for_bareflat(libdir) diff --git a/cmake/scripts/cmake_libs.py b/cmake/scripts/cmake_libs.py new file mode 100644 index 0000000000..54b6484b1c --- /dev/null +++ b/cmake/scripts/cmake_libs.py @@ -0,0 +1,46 @@ +#!/usr/bin/env python3 + +import argparse +from pathlib import Path +from jinja2 import Environment, FileSystemLoader +from cmake_gen import autoconfig, render + +script_path = Path(__file__).parent.resolve() + +parser = argparse.ArgumentParser() +input_dirs = parser.add_mutually_exclusive_group(required=True) +input_dirs.add_argument( + "--library", "-l", type=Path, help="path to a single library to parse" +) +input_dirs.add_argument( + "--libraries", "-L", type=Path, help="path to a folder of libraries" +) +parser.add_argument( + "--depends", + "-d", + action="extend", + nargs="*", + default=list(), + help="additional dependencies of the libraries to parse", +) + +shargs = parser.parse_args() + +templates_dir = script_path / ".." / "templates" +j2_env = Environment( + loader=FileSystemLoader(str(templates_dir)), trim_blocks=True, lstrip_blocks=True +) +cmake_template = j2_env.get_template("CMakeLists.txt") + +if shargs.libraries is not None: + for lib in shargs.libraries.iterdir(): + if not lib.is_dir(): + continue + + config = autoconfig(lib) + config["extra_libs"].update(shargs.depends) + render(lib, cmake_template, config) +else: + config = autoconfig(shargs.library) + config["extra_libs"].update(shargs.depends) + render(shargs.library, cmake_template, config) diff --git a/cmake/scripts/cmake_updater_hook.py b/cmake/scripts/cmake_updater_hook.py new file mode 100644 index 0000000000..f121e44112 --- /dev/null +++ b/cmake/scripts/cmake_updater_hook.py @@ -0,0 +1,57 @@ +#!/usr/bin/env python3 + +""" +This file centralizes all the operations needed to regenerate the CMakeLists.txt +scattered along this repo. +Hint: it would be a good practice to run it before committing... +""" + +import argparse +import subprocess +import pathlib +import sys + +parser = argparse.ArgumentParser( + usage="updater hook for CMake files. Fully automatic, takes no argument." +) +shargs = parser.parse_args() + +script_dir = pathlib.Path(__file__).parent # Arduino_Core_STM32/cmake/scripts +base_dir = script_dir.parent.parent # Arduino_Core_STM32 +templates_dir = base_dir / "cmake" / "templates" + +print("Updating core/arduino...") +subprocess.run( + (sys.executable, script_dir / "cmake_core.py", base_dir / "cores" / "arduino"), + check=True, +) + +print("Updating libraries/...") +subprocess.run( + (sys.executable, script_dir / "cmake_libs.py", "-L", base_dir / "libraries"), + check=True, +) + +print("Updating variants/...") +subprocess.run( + (sys.executable, script_dir / "cmake_variant.py", base_dir / "variants"), + check=True, +) +print("Updating board database...") +subprocess.run( + ( + sys.executable, + script_dir / "update_boarddb.py", + "-b", + base_dir / "boards.txt", + "-p", + base_dir / "platform.txt", + "-t", + templates_dir / "boards_db.cmake", + "-o", + base_dir / "cmake" / "boards_db.cmake", + ), + check=True, +) + +print("All done !") diff --git a/cmake/scripts/cmake_variant.py b/cmake/scripts/cmake_variant.py new file mode 100644 index 0000000000..ffbc06331f --- /dev/null +++ b/cmake/scripts/cmake_variant.py @@ -0,0 +1,33 @@ +#!/usr/bin/env python3 + +import argparse +from pathlib import Path +from jinja2 import Environment, FileSystemLoader +from cmake_gen import config_for_bareflat, render + +script_path = Path(__file__).parent.resolve() + +parser = argparse.ArgumentParser() +parser.add_argument("variantspath", type=Path, help="path to .../variants/") + +shargs = parser.parse_args() + +templates_dir = script_path / ".." / "templates" +j2_env = Environment( + loader=FileSystemLoader(str(templates_dir)), trim_blocks=True, lstrip_blocks=True +) +cmake_template = j2_env.get_template("CMakeLists.txt") + + +for family in shargs.variantspath.iterdir(): + if not family.is_dir(): + continue + for variant in family.iterdir(): + # technically several variants may be gathered in the same folder + if not variant.is_dir(): + continue + + config = config_for_bareflat(variant, force_recurse=True) + config["target"] = "variant" + config["objlib"] = False + render(variant, cmake_template, config) diff --git a/cmake/scripts/generate_header.py b/cmake/scripts/generate_header.py new file mode 100644 index 0000000000..6dbc5b5093 --- /dev/null +++ b/cmake/scripts/generate_header.py @@ -0,0 +1,30 @@ +#!/usr/bin/env python3 + +import argparse +import pathlib + +parser = argparse.ArgumentParser() +parser.add_argument( + "--source", "-i", type=pathlib.Path, required=True, help="ctags's output" +) +parser.add_argument( + "--out", "-o", type=pathlib.Path, required=True, help="header to generate" +) + +shargs = parser.parse_args() + + +with open(shargs.source, "r") as infile: + with open(shargs.out, "w") as outfile: + for line in infile: + line = line.strip() + if line.startswith("!") or not line: + continue + + fields = line.split("\t") + kind = fields[3].split(":", 1)[1] + if kind == "function": + symname = fields[0] + signature = fields[5].split(":", 1)[1] + rtype = fields[6].split(":", 1)[1] + print(f"{rtype} {symname}{signature};", file=outfile) diff --git a/cmake/scripts/includes.py b/cmake/scripts/includes.py new file mode 100644 index 0000000000..9873bdf353 --- /dev/null +++ b/cmake/scripts/includes.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python3 + +import pathlib +import argparse + +import graphviz + +parser = argparse.ArgumentParser() +parser.add_argument("-o", type=pathlib.Path, help="file to write the full graph to") +parser.add_argument( + "-t", type=pathlib.Path, help="file to write the transitive graph to" +) +parser.add_argument( + "logs", + type=pathlib.Path, + nargs="*", + action="extend", + help="list of log files to parse", +) + +shargs = parser.parse_args() + + +def catfiles(files): + for fn in files: + with open(fn, "r") as file: + yield from file + + +def parse_output(log): + graph = graphviz.Digraph( + strict=True, graph_attr=dict(overlap="False") + ) # not transitive + rootgraph = graphviz.Digraph( + strict=True, graph_attr=dict(overlap="False") + ) # transitive includes + rootcause = None + files = list() # [(depth, header)...] + for line in log: + d, h = line.rstrip().split(" ", 1) + d = d.count(".") + h = pathlib.Path(h) + + if d == 0: + rootcause = h + else: + """ " + # A includes B.h, C.h + . A.h + .. B.h + .. C.h + """ + while files[-1][0] >= d: + del files[-1] + + # if str(h).startswith("..") : + graph.edge(str(files[-1][1].parent), str(h.parent)) + rootgraph.edge(str(rootcause.parent), str(h.parent)) + + files.append((d, h)) + + return (graph, rootgraph) + + +graph, rootgraph = parse_output(catfiles(shargs.logs)) + +if shargs.o: + with open(shargs.o, "w") as file: + print(graph.source, file=file) +if shargs.t: + with open(shargs.t, "w") as file: + print(rootgraph.source, file=file) diff --git a/cmake/scripts/parse_boards.py b/cmake/scripts/parse_boards.py new file mode 100644 index 0000000000..c7b0589177 --- /dev/null +++ b/cmake/scripts/parse_boards.py @@ -0,0 +1,81 @@ +#!/usr/bin/env python3 + +""" +Utility module to parse Arduino config files +such as boards.txt/platform.txt. +""" + + +class Configuration(dict): + def __str__(self): + if len(self): + return super().__str__() + else: + return "" + + def __getitem__(self, key): + return self.setdefault(key, Configuration()) + + def copy(self): + # Wrap dict's implementation (returning a dict) + # Because copying a Configuration should return a Configuration + return __class__(super().copy()) + + def __getattr__(self, attr): + return self.__getitem__(attr) + + def __setattr__(self, attr, val): + return self.__setitem__(val, attr) + + def set_default_entries(self, mothercfg): + for k, v in mothercfg.items(): + if isinstance(v, dict): + self[k].set_default_entries(v) + else: + self.setdefault(k, v) + + def evaluate_entries(self, wrt=None): + if wrt is None: + wrt = self + + for k in tuple(self.keys()): + if isinstance(self[k], str): + try: + newv = self[k].format(**wrt) + except KeyError: + raise + newv = "" + + self[k] = newv + else: + self[k].evaluate_entries(wrt) + + +def default_reject(x): + return False + + +def parse_file(infile, reject=None): + if reject is None: + reject = default_reject + + config = Configuration() + + for line in open(infile): + line = line.strip() + if not line or line.startswith("#"): + continue + key, value = line.split("=", 1) + key = key.strip() + value = value.strip() + + key = key.split(".") + ptr = config + for sub in key[:-1]: + ptr = ptr[sub] + + if reject(key): + ptr.setdefault(key[-1], Configuration()) + else: + ptr[key[-1]] = value + return config diff --git a/cmake/scripts/sizereport.py b/cmake/scripts/sizereport.py new file mode 100644 index 0000000000..6048eeb67b --- /dev/null +++ b/cmake/scripts/sizereport.py @@ -0,0 +1,58 @@ +#!/usr/bin/env python3 + +import pathlib +import re +import subprocess +import argparse + +parser = argparse.ArgumentParser() +parser.add_argument( + "-x", + "--tool", + type=pathlib.Path, + required=True, + help="path to `arm-none-eabi-size`", +) +parser.add_argument( + "-f", + "--binfile", + type=pathlib.Path, + required=True, + help="path to the binary to analyze", +) +parser.add_argument( + "--progmem", type=int, required=True, help="max amount of program storage space" +) +parser.add_argument( + "--datamem", type=int, required=True, help="max amount of dynamic memory" +) + +shargs = parser.parse_args() + + +proc = subprocess.run( + (shargs.tool, "-A", shargs.binfile), capture_output=True, encoding="UTF-8" +) +if proc.returncode != 0: + print("Error running", (shargs.tool, "-A", shargs.binfile), end=":\n\n") + print(proc.stderr) + print("Return code :", proc.returncode) + exit(1) + + +regex_all = re.compile(r"^(?:\.text|\.data|\.rodata)\s+([0-9]+).*", flags=re.MULTILINE) +regex_data = re.compile(r"^(?:\.data|\.bss|\.noinit)\s+([0-9]+).*", flags=re.MULTILINE) + +allsz = sum(int(u) for u in regex_all.findall(proc.stdout)) +datasz = sum(int(u) for u in regex_data.findall(proc.stdout)) + + +print( + f""" +Sketch uses {allsz} bytes ({allsz/shargs.progmem:.0%}) of program storage space. \ +Maximum is {shargs.progmem} bytes. +Global variables use {datasz} bytes ({datasz/shargs.datamem:.0%}) of dynamic memory, \ +leaving {shargs.datamem-datasz} bytes for local variables. \ +Maximum is {shargs.datamem} bytes. +""" +) diff --git a/cmake/scripts/syms.py b/cmake/scripts/syms.py new file mode 100644 index 0000000000..56fb366acd --- /dev/null +++ b/cmake/scripts/syms.py @@ -0,0 +1,76 @@ +#!/usr/bin/env python3 + +import pathlib +import argparse + +import graphviz + +parser = argparse.ArgumentParser() +parser.add_argument( + "-m", "--mapfile", type=pathlib.Path, required=True, help="path to ld's map file" +) +parser.add_argument( + "-f", "--fullgv", type=pathlib.Path, help="file to write the full graph to" +) +parser.add_argument( + "-s", "--summarygv", type=pathlib.Path, help="file to write the summarized graph to" +) + +shargs = parser.parse_args() + + +def parse_file(mapf): + fullgraph = graphviz.Digraph(graph_attr=dict(overlap="False")) + summary = graphviz.Digraph(strict=True, graph_attr=dict(overlap="False")) + + start = "Archive member included to satisfy reference by file (symbol)" + stop = "Discarded input sections" + for line in mapf: + if line.startswith(start): + break + + provider = None + demander = None + sym = None + for line in mapf: + if line.isspace(): + continue + if line.startswith(stop): + break + + if line.startswith((" ", "\t")): + try: + demander, sym = line.strip().rsplit(") (", 1) + demander = demander + ")" + sym = "(" + sym + except Exception: + continue + else: + provider = line.strip() + + if provider and demander and sym: + # .split("(")[0] gets the lib ; without this you get the obj + objdemander = demander.rsplit("/", 1)[1] + objprovider = provider.rsplit("/", 1)[1] + libdemander = objdemander.split("(")[0] + libprovider = objprovider.split("(")[0] + + fullgraph.edge(objdemander, objprovider, tooltip=sym) + summary.edge(libdemander, libprovider) + + provider = None + demander = None + sym = None + + return (fullgraph, summary) + + +with open(shargs.mapfile, "rt") as file: + fullgraph, summary = parse_file(file) + +if shargs.fullgv: + with open(shargs.fullgv, "w") as file: + print(fullgraph.source, file=file) +if shargs.summarygv: + with open(shargs.summarygv, "w") as file: + print(summary.source, file=file) diff --git a/cmake/scripts/update_boarddb.py b/cmake/scripts/update_boarddb.py new file mode 100644 index 0000000000..d3a430750b --- /dev/null +++ b/cmake/scripts/update_boarddb.py @@ -0,0 +1,161 @@ +#!/usr/bin/env python3 + +import pathlib +import argparse + +from jinja2 import Environment, FileSystemLoader + +from parse_boards import parse_file + + +def get_fpconf(config): + fpu = (config.build.get("fpu") or "-mfpu=").rsplit("=", 1)[1] + abi = (config.build.get("float-abi") or "-mfloat-abi=").rsplit("=", 1)[1] + return f"{fpu}-{abi}" + + +def boardstxt_filter(key): + # Remove menu entry labels + # In our data model, they conflict with the actual configuration + # they are associated to + # i.e. Nucleo_144.menu.pnum.NUCLEO_F207ZG would be both + # a string ("Nucleo F207ZG") + # and a dict (.build.variant_h=..., .upload.maximum_size=...) + + if key[0] == "menu": + # menu.xserial=U(S)ART support + return True + if len(key) == 4 and key[1] == "menu": + # Nucleo_144.menu.pnum.NUCLEO_F207ZG=Nucleo F207ZG + # Midatronics.menu.upload_method.MassStorage=Mass Storage + return True + + # keep bootloader flags that impact the build + if len(key) >= 6 and key[1] == "menu" and key[2] == "upload_method": + if key[3] != "build": + return False + return True + + return False + + +def platformtxt_filter(key): + # reject everything but build.** + # and also build.info (that's specific to the build system, we'll hard-code it) + # we don't need anything else from platform.txt + # +additional stuff might confuse later parts of the script + # e.g.: + + # compiler.warning_flags=-w + # compiler.warning_flags.none=-w + # compiler.warning_flags.default= + # compiler.warning_flags.more=-Wall + # compiler.warning_flags.all=-Wall -Wextra + + if key[0] == "build" and key[1] != "info": + return False + return True + + +def regenerate_template(config, infile, outfile): + j2_env = Environment( + loader=FileSystemLoader(str(infile.parent)), + trim_blocks=True, + lstrip_blocks=True, + ) + cmake_template = j2_env.get_template(infile.name) + + with open(outfile, "w") as out: + out.write( + cmake_template.render( + allcfg=config, + ) + ) + + +if __name__ == "__main__": + parser = argparse.ArgumentParser() + parser.add_argument( + "-b", "--boards", type=pathlib.Path, required=True, help="path to boards.txt" + ) + parser.add_argument( + "-p", + "--platform", + type=pathlib.Path, + required=True, + help="path to platform.txt", + ) + parser.add_argument( + "-t", + "--template", + type=pathlib.Path, + required=True, + help="path to the jinja template", + ) + parser.add_argument( + "-o", + "--outfile", + type=pathlib.Path, + required=True, + help="path to the cmake database to generate", + ) + + shargs = parser.parse_args() + + platformtxt_cfg = parse_file(shargs.platform, reject=platformtxt_filter) + platformtxt_cfg = {"build": platformtxt_cfg["build"]} # whitelist what we need + + boardstxt_cfg = parse_file(shargs.boards, reject=boardstxt_filter) + del boardstxt_cfg["menu"] # blacklist what we don't need + + # these are optional features to be picked out by the user + BOARD_FEATURES = [ + "enable_virtio", + "enable_usb", + "usb_speed", + "xSerial", + ] + + allboards = dict() + + for fam, famcfg in boardstxt_cfg.items(): + famcfg.set_default_entries(platformtxt_cfg) + + inherit_fam = famcfg.copy() + # shallow copy; + # we don't want to impact famcfg so we have to copy before edit/del + inherit_fam["menu"] = inherit_fam["menu"].copy() + # del what you iterate over (otherwise you get infinite nesting) + del inherit_fam["menu"]["pnum"] + for u_meth, u_meth_cfg in inherit_fam.menu.upload_method.copy().items(): + if "build" not in u_meth_cfg.keys(): + del inherit_fam.menu.upload_method[u_meth] + + for board, boardcfg in famcfg.menu.pnum.items(): + boardcfg["_fpconf"] = get_fpconf(boardcfg) + boardcfg.set_default_entries(inherit_fam) + + inherit_board = boardcfg.copy() + del inherit_board["menu"] + + board_feature_names = tuple(boardcfg["menu"].keys()) + + for fname in board_feature_names: + for label, labelcfg in boardcfg["menu"][fname].items(): + labelcfg.set_default_entries(inherit_board) + labelcfg.evaluate_entries() + + # base config won't manage all the board features, + # we thus have to mask them out + for feat in BOARD_FEATURES: + boardcfg.build[feat] = "" + + boardcfg.evaluate_entries() + + allboards[board] = boardcfg + for mth, mthcfg in boardcfg.menu.upload_method.items(): + if mth.startswith(("hid", "dfuo", "dfu2")): + mth = mth.removesuffix("Method") + allboards[f"{board}_{mth}"] = mthcfg + + regenerate_template(allboards, shargs.template, shargs.outfile) diff --git a/cmake/set_base_arduino_config.cmake b/cmake/set_base_arduino_config.cmake new file mode 100644 index 0000000000..cec1d09c39 --- /dev/null +++ b/cmake/set_base_arduino_config.cmake @@ -0,0 +1,81 @@ +cmake_minimum_required(VERSION 3.21) + +# note: the doc say these must be called _at file scope_, not in a function +enable_language(C) +enable_language(CXX) +enable_language(ASM) + +add_library(base_config INTERFACE) + +# better than an if/else because these may be defined later +target_link_libraries(base_config INTERFACE + $ + $ +) + +# generic compilation options +target_link_libraries(base_config INTERFACE + board + m + stdc++ + c + gcc +) +target_compile_definitions(base_config INTERFACE + USE_FULL_LL_DRIVER + ARDUINO_ARCH_STM32 +) +target_compile_options(base_config INTERFACE + -mthumb + --param max-inline-insns-single=500 + $<$:-fno-rtti> + $<$:-fno-exceptions> + $<$:-fno-use-cxa-atexit> + $<$:-fno-threadsafe-statics> + -ffunction-sections + -fdata-sections +) + +target_link_options(base_config INTERFACE + -mthumb + LINKER:--cref + LINKER:--check-sections + LINKER:--gc-sections + LINKER:--entry=Reset_Handler + LINKER:--unresolved-symbols=report-all + LINKER:--warn-common + LINKER:--script=${BUILD_SYSTEM_PATH}/ldscript.ld +) +target_link_directories(base_config INTERFACE + "${CMSIS5_PATH}/CMSIS/DSP/Lib/GCC" +) + +target_include_directories(base_config INTERFACE + "${BUILD_CORE_PATH}" + "${BUILD_CORE_PATH}/avr" + "${BUILD_CORE_PATH}/stm32" + "${BUILD_CORE_PATH}/stm32/LL" + "${BUILD_CORE_PATH}/stm32/usb" + "${BUILD_CORE_PATH}/stm32/OpenAMP" + "${BUILD_CORE_PATH}/stm32/usb/hid" + "${BUILD_CORE_PATH}/stm32/usb/cdc" + "${BUILD_SYSTEM_PATH}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc" + "${BUILD_SYSTEM_PATH}/Middlewares/ST/STM32_USB_Device_Library/Core/Src" + "${CMSIS5_PATH}/CMSIS/DSP/Include" + "${CMSIS5_PATH}/CMSIS/DSP/PrivateInclude" + "${CMSIS5_PATH}/CMSIS/Core/Include/" + "${CMSIS5_PATH}/CMSIS" + "${BUILD_SYSTEM_PATH}/Middlewares/OpenAMP" + "${BUILD_SYSTEM_PATH}/Middlewares/OpenAMP/open-amp/lib/include" + "${BUILD_SYSTEM_PATH}/Middlewares/OpenAMP/libmetal/lib/include" + "${BUILD_SYSTEM_PATH}/Middlewares/OpenAMP/virtual_driver" +) + +add_library(stm32_runtime INTERFACE) +target_link_libraries(stm32_runtime INTERFACE + base_config + + SrcWrapper + core + $ +) diff --git a/cmake/set_board.cmake b/cmake/set_board.cmake new file mode 100644 index 0000000000..af6e19a209 --- /dev/null +++ b/cmake/set_board.cmake @@ -0,0 +1,71 @@ +cmake_minimum_required(VERSION 3.21) + +function(set_board BOARD_ID) + include(updatedb) + updatedb() # updates board_db if needed + include(boards_db) + + set(KEYWORDS SERIAL USB XUSB VIRTIO BOOTLOADER) + cmake_parse_arguments(PARSE_ARGV 1 BOARD "" "${KEYWORDS}" "") + + if(DEFINED BOARD_UNPARSED_ARGUMENTS OR DEFINED BOARD_KEYWORDS_MISSING_VALUES) + message(SEND_ERROR "Invalid call to set_board(); some arguments went unparsed") + endif() + + if(DEFINED BOARD_BOOTLOADER) + set(BOARD_ID "${BOARD_ID}_${BOARD_BOOTLOADER}") + endif() + + if (NOT TARGET ${BOARD_ID}) + message(SEND_ERROR "Board ${BOARD_ID} not found. Maybe the board database is not up-to-date?") + return() + endif() + add_library(board ALIAS ${BOARD_ID}) + set(BUILD_VARIANT_PATH ${${BOARD_ID}_VARIANT_PATH} PARENT_SCOPE) + set(BOARD_MAXSIZE ${${BOARD_ID}_MAXSIZE} PARENT_SCOPE) + set(BOARD_MAXDATASIZE ${${BOARD_ID}_MAXDATASIZE} PARENT_SCOPE) + set(MCU ${${BOARD_ID}_MCU} PARENT_SCOPE) + set(FPCONF ${${BOARD_ID}_FPCONF} PARENT_SCOPE) + + # if the user passed in an invalid value, then the target won't be found + # and cmake will output an error message + if(DEFINED BOARD_SERIAL) + if (TARGET ${BOARD_ID}_serial_${BOARD_SERIAL}) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_serial_${BOARD_SERIAL}) + else() + message(SEND_ERROR "SERIAL=${BOARD_SERIAL} not supported (at least for this board)") + endif() + elseif(TARGET ${BOARD_ID}_serial_generic) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_serial_generic) + endif() + + if(DEFINED BOARD_USB) + if (TARGET ${BOARD_ID}_usb_${BOARD_USB}) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_usb_${BOARD_USB}) + else() + message(SEND_ERROR "USB=${BOARD_USB} not supported (at least for this board)") + endif() + elseif(TARGET ${BOARD_ID}_usb_none) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_usb_none) + endif() + + if(DEFINED BOARD_XUSB) + if (TARGET ${BOARD_ID}_xusb_${BOARD_XUSB}) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_xusb_${BOARD_XUSB}) + else() + message(SEND_ERROR "XUSB=${BOARD_XUSB} not supported (at least for this board)") + endif() + elseif(TARGET ${BOARD_ID}_xusb_FS) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_xusb_FS) + endif() + + if(DEFINED BOARD_VIRTIO) + if (TARGET ${BOARD_ID}_virtio_${BOARD_VIRTIO}) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_virtio_${BOARD_VIRTIO}) + else() + message(SEND_ERROR "VIRTIO=${BOARD_VIRTIO} not supported (at least for this board)") + endif() + elseif(TARGET ${BOARD_ID}_virtio_disable) + target_link_libraries(${BOARD_ID} INTERFACE ${BOARD_ID}_virtio_disable) + endif() +endfunction() diff --git a/cmake/sketch_preprocess_sources.cmake b/cmake/sketch_preprocess_sources.cmake new file mode 100644 index 0000000000..185aaf69e2 --- /dev/null +++ b/cmake/sketch_preprocess_sources.cmake @@ -0,0 +1,36 @@ +cmake_minimum_required(VERSION 3.21) + +function(sketch_preprocess_sources) + cmake_parse_arguments(PARSE_ARGV 0 SPC "" "OUTPUT_VARIABLE" "SOURCES") + set(SRCLIST "") + foreach(SRCFILE IN LISTS SPC_SOURCES) + if (${SRCFILE} MATCHES "\.ino$") + cmake_path(GET SRCFILE FILENAME SRC_BASE_NAME) + + configure_file( + ${SRCFILE} + ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.cpp + COPYONLY + ) + + add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.h + COMMAND ${ARDUINOCTAGS_EXECUTABLE} -u --language-force=c++ -f ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.ctags --c++-kinds=svpf --fields=KSTtzns --line-directives ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.cpp + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/generate_header.py -i ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.ctags -o ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.h + + DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.cpp + BYPRODUCTS ${CMAKE_CURRENT_BINARY_DIR}/${SRC_BASE_NAME}.ctags + VERBATIM + ) + + set_source_files_properties(${SRCFILE}.cpp + PROPERTIES + COMPILE_OPTIONS "-include;Arduino.h;-include;${SRCFILE}.h" + OBJECT_DEPENDS "${SRCFILE}.h" + ) + list(APPEND SRCLIST ${SRCFILE}.cpp) + else() + list(APPEND SRCLIST ${SRCFILE}) + endif() + endforeach() + set(${SPC_OUTPUT_VARIABLE} ${SRCLIST} PARENT_SCOPE) +endfunction() diff --git a/cmake/templates/CMakeLists.txt b/cmake/templates/CMakeLists.txt new file mode 100644 index 0000000000..094ce1dbbf --- /dev/null +++ b/cmake/templates/CMakeLists.txt @@ -0,0 +1,67 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library({{target}} INTERFACE) +add_library({{target}}_usage INTERFACE) + +{% if includedirs %} +target_include_directories({{target}}_usage INTERFACE + {% for dir in includedirs | sort %} + {{dir}} + {% endfor %} +) +{% endif %} + +{% if ldflags %} +target_link_options({{target}}_usage INTERFACE + {{ldflags}} +) +{% endif %} + +target_link_libraries({{target}}_usage INTERFACE + base_config + {% for lib in extra_libs | sort %} + {{lib}} + {% endfor %} +) + +target_link_libraries({{target}} INTERFACE {{target}}_usage) + + +{% if precompiled in ("true", "full") %} +set({{target}}_PRECOMPILED false) +{% for config, libs in binaries | dictsort | reverse %} +{{"if" if loop.first else "elseif"}} ("${MCU}${FPCONF}" STREQUAL "{{config}}") + target_link_libraries({{target}}_usage INTERFACE + {% for lib in libs %} + "{{"${CMAKE_CURRENT_SOURCE_DIR}/"}}{{lib}}" + {% endfor %} + ) + set({{target}}_PRECOMPILED true) +{{"endif()" if loop.last}} +{% endfor %} +{% endif %} + +{% if sources %} +add_library({{target}}_bin {{"OBJECT" if objlib else "STATIC"}} EXCLUDE_FROM_ALL + {% for file in sources | sort %} + {{file}} + {% endfor %} +) +target_link_libraries({{target}}_bin PUBLIC {{target}}_usage) + +{% if precompiled == "full" %} +if(NOT {{"${"}}{{target}}_PRECOMPILED{{"}"}}) +{% endif %} +target_link_libraries({{target}} INTERFACE + {{target}}_bin + {% if objlib %} + $ + {% endif %} +) +{% if precompiled == "full" %} +endif() +{% endif %} + +{% endif %} diff --git a/cmake/templates/boards_db.cmake b/cmake/templates/boards_db.cmake new file mode 100644 index 0000000000..48eb145e89 --- /dev/null +++ b/cmake/templates/boards_db.cmake @@ -0,0 +1,71 @@ +{% for pnum, config in allcfg | dictsort %} +# {{pnum}} +# ----------------------------------------------------------------------------- + +set({{pnum}}_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/{{config.build.variant}}") +set({{pnum}}_MAXSIZE {{config.upload.maximum_size}}) +set({{pnum}}_MAXDATASIZE {{config.upload.maximum_data_size}}) +set({{pnum}}_MCU {{config.build.mcu}}) +set({{pnum}}_FPCONF "{{config._fpconf}}") +add_library({{pnum}} INTERFACE) +target_compile_options({{pnum}} INTERFACE + "SHELL:{{config.build.st_extra_flags}}" + "SHELL:{{config.build.peripheral_pins}}" + "SHELL:{{config.build.startup_file}}" + "SHELL:{{config.build.fpu}} {{config.build["float-abi"]}}" + -mcpu={{ "${" }}{{pnum}}_MCU{{ "}" }} +) +target_compile_definitions({{pnum}} INTERFACE + "{{config.build.series}}" + "ARDUINO_{{config.build.board}}" + "BOARD_NAME=\"{{config.build.board}}\"" + "BOARD_ID={{config.build.board}}" + "VARIANT_H=\"{{config.build.variant_h or "variant_generic.h"}}\"" +) +target_include_directories({{pnum}} INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/{{config.build.series}} + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/{{config.build.series}}_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/{{config.build.series}}_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/{{config.build.series}}/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/{{config.build.series}}/Source/Templates/gcc/ + {{ "${" }}{{pnum}}_VARIANT_PATH{{ "}" }} +) + +target_link_options({{pnum}} INTERFACE + "LINKER:--default-script={{ "${" }}{{pnum}}_VARIANT_PATH{{ "}" }}/{{config.build.ldscript or "ldscript.ld"}}" + "LINKER:--defsym=LD_FLASH_OFFSET={{config.build.flash_offset or "0"}}" + "LINKER:--defsym=LD_MAX_SIZE={{config.upload.maximum_size}}" + "LINKER:--defsym=LD_MAX_DATA_SIZE={{config.upload.maximum_data_size}}" + "SHELL:{{config.build.fpu}} {{config.build["float-abi"]}}" + -mcpu={{ "${" }}{{pnum}}_MCU{{ "}" }} +) +target_link_libraries({{pnum}} INTERFACE + {{config.build.cmsis_lib_gcc}} +) + +{% for label,subconfig in config.menu.xserial | dictsort %} +add_library({{pnum}}_serial_{{label}} INTERFACE) +target_compile_options({{pnum}}_serial_{{label}} INTERFACE + "SHELL:{{subconfig.build.xSerial}}" +) +{% endfor %} +{% for label,subconfig in config.menu.usb | dictsort %} +add_library({{pnum}}_usb_{{label}} INTERFACE) +target_compile_options({{pnum}}_usb_{{label}} INTERFACE + "SHELL:{{subconfig.build.enable_usb}}" +) +{% endfor %} +{% for label,subconfig in config.menu.xusb | dictsort %} +add_library({{pnum}}_xusb_{{label}} INTERFACE) +target_compile_options({{pnum}}_xusb_{{label}} INTERFACE + "SHELL:{{subconfig.build.usb_speed}}" +) +{% endfor %} +{% for label,subconfig in config.menu.virtio | dictsort %} +add_library({{pnum}}_virtio_{{label}} INTERFACE) +target_compile_options({{pnum}}_virtio_{{label}} INTERFACE + "SHELL:{{subconfig.build.enable_virtio}}" +) +{% endfor %} + +{% endfor %} diff --git a/cmake/templates/easy_cmake.cmake b/cmake/templates/easy_cmake.cmake new file mode 100644 index 0000000000..e38863661e --- /dev/null +++ b/cmake/templates/easy_cmake.cmake @@ -0,0 +1,105 @@ +# This file was autogenerated by {{scriptfile}}. +# Use it in your CMake configuration by `include()`'ing it. +# You can also copy it in your sketch's folder and edit it to fit your project. + +cmake_minimum_required(VERSION 3.21) + +# STEP 1: set up bases of environment +# ----------------------------------------------------------------------------- + +file(REAL_PATH "{{corepath}}" CORE_PATH EXPAND_TILDE) +file(TO_CMAKE_PATH "{{"${CORE_PATH}"}}" CORE_PATH) + +file(REAL_PATH "{{userlibs}}" USER_LIBS EXPAND_TILDE) +file(TO_CMAKE_PATH "{{"${USER_LIBS}"}}" USER_LIBS) + +set(BOARDNAME "{{boardname or "@board_name_here@"}}") + +list(APPEND CMAKE_MODULE_PATH {{"${CORE_PATH}"}}/cmake) +set(CMAKE_TOOLCHAIN_FILE toolchain) + + +# You may remove this block when using this file as the sketch's CMakeLists.txt +if (NOT ${CMAKE_PARENT_LIST_FILE} STREQUAL ${CMAKE_CURRENT_LIST_FILE}) + # When we are imported from the main CMakeLists.txt, we should stop here + # not to interfere with the true build config. + return() +endif() + +project("{{tgtname+"_project" if tgtname else "@project_name_here@"}}") + +# STEP 2: configure the build +# ----------------------------------------------------------------------------- + +# Uncomment and pick the relevant value for each keyword! +# The first value listed is the default (when the feature is supported by the board) +# This means that leaving everything commented out yields the default config +include(set_board) +set_board("{{"${BOARDNAME}"}}" + # SERIAL generic / disabled / none + # USB none / CDCgen / CDC / HID + # XUSB FS / HS / HSFS + # VIRTIO disable / generic / enabled + # BOOTLOADER dfuo / dfu2 / hid +) + +include(overall_settings) +overall_settings( + # STANDARD_LIBC + # PRINTF_FLOAT + # SCANF_FLOAT + # DEBUG_SYMBOLS + # LTO + # NO_RELATIVE_MACRO + # UNDEF_NDEBUG + # OPTIMIZATION "s" + # BUILD_OPT ./build.opt + # DISABLE_HAL_MODULES ADC I2C RTC SPI TIM DAC EXTI ETH SD QSPI + # CORE_CALLBACK +) + +# STEP 3: configure your sketch +# ----------------------------------------------------------------------------- +include(external_library) +# I cannot tell the dependencies of the library ahead-of-time +# Please write them in using the DEPENDS ... clause +# The same directives apply as for `build_sketch()` just below. +{% for libdir in libs | sort %} +external_library(PATH "{{"${USER_LIBS}"}}/{{libdir}}") +{% endfor %} + +include(build_sketch) +build_sketch(TARGET "{{tgtname or "@binary_name_here@"}}" + SOURCES + {% for file in scrcfiles | sort %} + {{file}} + {% else %} + ./file1.ino + ./file2.ino + ./file3.cpp + ./file4.c + ./file5.S + {% endfor %} + + # Uncomment the lines below to bind libraries to your sketch + # Legitimate names after the DEPENDS keywords are: + # - libraries declared with external_library + # - libraries from the libraries/ folder of Arduino_Core_STM32 + + # DEPENDS + # SD + # Wire + # SPI +) + +# STEP 4: optional features +# ----------------------------------------------------------------------------- + +include(insights) +insights(TARGET "{{tgtname or "@binary_name_here@"}}" + # DIRECT_INCLUDES + # TRANSITIVE_INCLUDES + # SYMBOLS + # ARCHIVES + # LOGIC_STRUCTURE +) diff --git a/cmake/toolchain.cmake b/cmake/toolchain.cmake new file mode 100644 index 0000000000..019159de3e --- /dev/null +++ b/cmake/toolchain.cmake @@ -0,0 +1,59 @@ +cmake_minimum_required(VERSION 3.21) + +include("${CMAKE_CURRENT_LIST_DIR}/environment.cmake") + +find_package(ArduinoCtags REQUIRED) + +find_package( + Python3 3.9 REQUIRED + COMPONENTS Interpreter +) + +execute_process( + COMMAND ${Python3_EXECUTABLE} -c "import graphviz" + RESULT_VARIABLE EXIT_CODE + OUTPUT_QUIET +) +if(${EXIT_CODE}) + message(WARNING "Python's `graphviz` module not found. Some features will be disabled.") + set(PYTHON_HAS_GRAPHVIZ OFF) +else() + set(PYTHON_HAS_GRAPHVIZ ON) +endif() + +execute_process( + COMMAND ${Python3_EXECUTABLE} -c "import jinja2" + RESULT_VARIABLE EXIT_CODE + OUTPUT_QUIET +) +if(${EXIT_CODE}) + message(WARNING "Python's `jinja2` module not found. Some features will be disabled.") + set(PYTHON_HAS_JINJA OFF) +else() + set(PYTHON_HAS_JINJA ON) +endif() + +# graphviz layout engines +find_program(SFDP "sfdp") +find_program(DOT "dot") + +include("${CMAKE_CURRENT_LIST_DIR}/ensure_core_deps.cmake") +ensure_core_deps() + +# Setting Linux is forcing th extension to be .o instead of .obj when building on WIndows. +# It is important because armlink is failing when files have .obj extensions (error with +# scatter file section not found) +SET(CMAKE_SYSTEM_NAME Linux) +SET(CMAKE_SYSTEM_PROCESSOR arm) + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) # don't try to link when testing the compiler, it won't work anyway +set(BUILD_SHARED_LIBS false CACHE STRING "") + +set(CMAKE_CXX_STANDARD 14) +set(CMAKE_C_STANDARD 11) + +set(CMAKE_EXECUTABLE_SUFFIX .elf) +# These override CMAKE_EXECUTABLE_SUFFIX -- prevent any CMake built-in from overriding the value we want +set(CMAKE_EXECUTABLE_SUFFIX_C .elf) +set(CMAKE_EXECUTABLE_SUFFIX_CXX .elf) +set(CMAKE_EXECUTABLE_SUFFIX_ASM .elf) diff --git a/cmake/updatedb.cmake b/cmake/updatedb.cmake new file mode 100644 index 0000000000..8163c824b4 --- /dev/null +++ b/cmake/updatedb.cmake @@ -0,0 +1,24 @@ +cmake_minimum_required(VERSION 3.21) + +function(updatedb) + set_property(DIRECTORY APPEND + PROPERTY CMAKE_CONFIGURE_DEPENDS + "${BOARDSTXT_PATH}" "${PLATFORMTXT_PATH}" "${CMAKE_BOARDS_DB_TEMPLATE_PATH}" + ) + + if( + ${BOARDSTXT_PATH} IS_NEWER_THAN ${CMAKE_BOARDS_DB_PATH} + OR ${PLATFORMTXT_PATH} IS_NEWER_THAN ${CMAKE_BOARDS_DB_PATH} + OR ${CMAKE_BOARDS_DB_TEMPLATE_PATH} IS_NEWER_THAN ${CMAKE_BOARDS_DB_PATH} + ) + execute_process( + COMMAND ${Python3_EXECUTABLE} ${SCRIPTS_FOLDER}/update_boarddb.py + -b ${BOARDSTXT_PATH} + -p ${PLATFORMTXT_PATH} + -t ${CMAKE_BOARDS_DB_TEMPLATE_PATH} + -o ${CMAKE_BOARDS_DB_PATH} + + COMMAND_ERROR_IS_FATAL ANY + ) + endif() +endfunction() diff --git a/cores/arduino/CMakeLists.txt b/cores/arduino/CMakeLists.txt new file mode 100644 index 0000000000..80865f8f58 --- /dev/null +++ b/cores/arduino/CMakeLists.txt @@ -0,0 +1,89 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(core INTERFACE) +add_library(core_usage INTERFACE) + +target_include_directories(core_usage INTERFACE + . +) + + +target_link_libraries(core_usage INTERFACE + base_config +) + +target_link_libraries(core INTERFACE core_usage) + + + +add_library(core_bin STATIC EXCLUDE_FROM_ALL + abi.cpp + avr/dtostrf.c + board.c + core_debug.c + HardwareSerial.cpp + hooks.c + IPAddress.cpp + itoa.c + main.cpp + pins_arduino.c + Print.cpp + RingBuffer.cpp + stm32/OpenAMP/libmetal/device.c + stm32/OpenAMP/libmetal/generic/condition.c + stm32/OpenAMP/libmetal/generic/cortexm/sys.c + stm32/OpenAMP/libmetal/generic/generic_device.c + stm32/OpenAMP/libmetal/generic/generic_init.c + stm32/OpenAMP/libmetal/generic/generic_io.c + stm32/OpenAMP/libmetal/generic/generic_shmem.c + stm32/OpenAMP/libmetal/generic/time.c + stm32/OpenAMP/libmetal/init.c + stm32/OpenAMP/libmetal/io.c + stm32/OpenAMP/libmetal/log.c + stm32/OpenAMP/libmetal/shmem.c + stm32/OpenAMP/mbox_ipcc.c + stm32/OpenAMP/open-amp/remoteproc/remoteproc_virtio.c + stm32/OpenAMP/open-amp/rpmsg/rpmsg.c + stm32/OpenAMP/open-amp/rpmsg/rpmsg_virtio.c + stm32/OpenAMP/openamp.c + stm32/OpenAMP/rsc_table.c + stm32/OpenAMP/virt_uart.c + stm32/OpenAMP/virtio/virtio.c + stm32/OpenAMP/virtio/virtqueue.c + stm32/OpenAMP/virtio_buffer.c + stm32/OpenAMP/virtio_log.c + stm32/startup_stm32yyxx.S + stm32/usb/cdc/cdc_queue.c + stm32/usb/cdc/usbd_cdc.c + stm32/usb/cdc/usbd_cdc_if.c + stm32/usb/hid/usbd_hid_composite.c + stm32/usb/hid/usbd_hid_composite_if.c + stm32/usb/usb_device_core.c + stm32/usb/usb_device_ctlreq.c + stm32/usb/usb_device_ioreq.c + stm32/usb/usbd_conf.c + stm32/usb/usbd_desc.c + stm32/usb/usbd_ep_conf.c + stm32/usb/usbd_if.c + Stream.cpp + Tone.cpp + USBSerial.cpp + VirtIOSerial.cpp + WInterrupts.cpp + wiring_analog.c + wiring_digital.c + wiring_pulse.cpp + wiring_shift.c + wiring_time.c + WMath.cpp + WSerial.cpp + WString.cpp +) +target_link_libraries(core_bin PUBLIC core_usage) + +target_link_libraries(core INTERFACE + core_bin +) + diff --git a/libraries/CMSIS_DSP/CMakeLists.txt b/libraries/CMSIS_DSP/CMakeLists.txt new file mode 100644 index 0000000000..655fa92ace --- /dev/null +++ b/libraries/CMSIS_DSP/CMakeLists.txt @@ -0,0 +1,42 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(CMSIS_DSP INTERFACE) +add_library(CMSIS_DSP_usage INTERFACE) + +target_include_directories(CMSIS_DSP_usage INTERFACE + src +) + + +target_link_libraries(CMSIS_DSP_usage INTERFACE + base_config +) + +target_link_libraries(CMSIS_DSP INTERFACE CMSIS_DSP_usage) + + + +add_library(CMSIS_DSP_bin OBJECT EXCLUDE_FROM_ALL + src/BasicMathFunctions/BasicMathFunctions.c + src/BayesFunctions/BayesFunctions.c + src/CommonTables/CommonTables.c + src/ComplexMathFunctions/ComplexMathFunctions.c + src/ControllerFunctions/ControllerFunctions.c + src/DistanceFunctions/DistanceFunctions.c + src/FastMathFunctions/FastMathFunctions.c + src/FilteringFunctions/FilteringFunctions.c + src/MatrixFunctions/MatrixFunctions.c + src/StatisticsFunctions/StatisticsFunctions.c + src/SupportFunctions/SupportFunctions.c + src/SVMFunctions/SVMFunctions.c + src/TransformFunctions/TransformFunctions.c +) +target_link_libraries(CMSIS_DSP_bin PUBLIC CMSIS_DSP_usage) + +target_link_libraries(CMSIS_DSP INTERFACE + CMSIS_DSP_bin + $ +) + diff --git a/libraries/CMakeLists.txt b/libraries/CMakeLists.txt new file mode 100644 index 0000000000..791d8acaca --- /dev/null +++ b/libraries/CMakeLists.txt @@ -0,0 +1,13 @@ +# just a trampoline to avoid overwhelming the main CMakeLists.txt + +add_subdirectory(CMSIS_DSP) +add_subdirectory(EEPROM) +add_subdirectory(IWatchdog) +add_subdirectory(Keyboard) +add_subdirectory(Mouse) +add_subdirectory(RGB_LED_TLC59731) +add_subdirectory(SPI) +add_subdirectory(Servo) +add_subdirectory(SoftwareSerial) +add_subdirectory(SrcWrapper) +add_subdirectory(Wire) diff --git a/libraries/EEPROM/CMakeLists.txt b/libraries/EEPROM/CMakeLists.txt new file mode 100644 index 0000000000..a3b1c59e36 --- /dev/null +++ b/libraries/EEPROM/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(EEPROM INTERFACE) +add_library(EEPROM_usage INTERFACE) + +target_include_directories(EEPROM_usage INTERFACE + src +) + + +target_link_libraries(EEPROM_usage INTERFACE + base_config +) + +target_link_libraries(EEPROM INTERFACE EEPROM_usage) + + + +add_library(EEPROM_bin OBJECT EXCLUDE_FROM_ALL + src/utility/stm32_eeprom.c +) +target_link_libraries(EEPROM_bin PUBLIC EEPROM_usage) + +target_link_libraries(EEPROM INTERFACE + EEPROM_bin + $ +) + diff --git a/libraries/IWatchdog/CMakeLists.txt b/libraries/IWatchdog/CMakeLists.txt new file mode 100644 index 0000000000..ec629592b9 --- /dev/null +++ b/libraries/IWatchdog/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(IWatchdog INTERFACE) +add_library(IWatchdog_usage INTERFACE) + +target_include_directories(IWatchdog_usage INTERFACE + src +) + + +target_link_libraries(IWatchdog_usage INTERFACE + base_config +) + +target_link_libraries(IWatchdog INTERFACE IWatchdog_usage) + + + +add_library(IWatchdog_bin OBJECT EXCLUDE_FROM_ALL + src/IWatchdog.cpp +) +target_link_libraries(IWatchdog_bin PUBLIC IWatchdog_usage) + +target_link_libraries(IWatchdog INTERFACE + IWatchdog_bin + $ +) + diff --git a/libraries/Keyboard/CMakeLists.txt b/libraries/Keyboard/CMakeLists.txt new file mode 100644 index 0000000000..8acf9fe627 --- /dev/null +++ b/libraries/Keyboard/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(Keyboard INTERFACE) +add_library(Keyboard_usage INTERFACE) + +target_include_directories(Keyboard_usage INTERFACE + src +) + + +target_link_libraries(Keyboard_usage INTERFACE + base_config +) + +target_link_libraries(Keyboard INTERFACE Keyboard_usage) + + + +add_library(Keyboard_bin OBJECT EXCLUDE_FROM_ALL + src/Keyboard.cpp +) +target_link_libraries(Keyboard_bin PUBLIC Keyboard_usage) + +target_link_libraries(Keyboard INTERFACE + Keyboard_bin + $ +) + diff --git a/libraries/Mouse/CMakeLists.txt b/libraries/Mouse/CMakeLists.txt new file mode 100644 index 0000000000..a544f07a8a --- /dev/null +++ b/libraries/Mouse/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(Mouse INTERFACE) +add_library(Mouse_usage INTERFACE) + +target_include_directories(Mouse_usage INTERFACE + src +) + + +target_link_libraries(Mouse_usage INTERFACE + base_config +) + +target_link_libraries(Mouse INTERFACE Mouse_usage) + + + +add_library(Mouse_bin OBJECT EXCLUDE_FROM_ALL + src/Mouse.cpp +) +target_link_libraries(Mouse_bin PUBLIC Mouse_usage) + +target_link_libraries(Mouse INTERFACE + Mouse_bin + $ +) + diff --git a/libraries/RGB_LED_TLC59731/CMakeLists.txt b/libraries/RGB_LED_TLC59731/CMakeLists.txt new file mode 100644 index 0000000000..0a6c90b436 --- /dev/null +++ b/libraries/RGB_LED_TLC59731/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(RGB_LED_TLC59731 INTERFACE) +add_library(RGB_LED_TLC59731_usage INTERFACE) + +target_include_directories(RGB_LED_TLC59731_usage INTERFACE + src +) + + +target_link_libraries(RGB_LED_TLC59731_usage INTERFACE + base_config +) + +target_link_libraries(RGB_LED_TLC59731 INTERFACE RGB_LED_TLC59731_usage) + + + +add_library(RGB_LED_TLC59731_bin OBJECT EXCLUDE_FROM_ALL + src/RGB_LED_TLC59731.cpp +) +target_link_libraries(RGB_LED_TLC59731_bin PUBLIC RGB_LED_TLC59731_usage) + +target_link_libraries(RGB_LED_TLC59731 INTERFACE + RGB_LED_TLC59731_bin + $ +) + diff --git a/libraries/SPI/CMakeLists.txt b/libraries/SPI/CMakeLists.txt new file mode 100644 index 0000000000..bbd6f25cd5 --- /dev/null +++ b/libraries/SPI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(SPI INTERFACE) +add_library(SPI_usage INTERFACE) + +target_include_directories(SPI_usage INTERFACE + src +) + + +target_link_libraries(SPI_usage INTERFACE + base_config +) + +target_link_libraries(SPI INTERFACE SPI_usage) + + + +add_library(SPI_bin OBJECT EXCLUDE_FROM_ALL + src/SPI.cpp + src/utility/spi_com.c +) +target_link_libraries(SPI_bin PUBLIC SPI_usage) + +target_link_libraries(SPI INTERFACE + SPI_bin + $ +) + diff --git a/libraries/Servo/CMakeLists.txt b/libraries/Servo/CMakeLists.txt new file mode 100644 index 0000000000..20a5f0abbb --- /dev/null +++ b/libraries/Servo/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(Servo INTERFACE) +add_library(Servo_usage INTERFACE) + +target_include_directories(Servo_usage INTERFACE + src +) + + +target_link_libraries(Servo_usage INTERFACE + base_config +) + +target_link_libraries(Servo INTERFACE Servo_usage) + + + +add_library(Servo_bin OBJECT EXCLUDE_FROM_ALL + src/stm32/Servo.cpp +) +target_link_libraries(Servo_bin PUBLIC Servo_usage) + +target_link_libraries(Servo INTERFACE + Servo_bin + $ +) + diff --git a/libraries/SoftwareSerial/CMakeLists.txt b/libraries/SoftwareSerial/CMakeLists.txt new file mode 100644 index 0000000000..a400087192 --- /dev/null +++ b/libraries/SoftwareSerial/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(SoftwareSerial INTERFACE) +add_library(SoftwareSerial_usage INTERFACE) + +target_include_directories(SoftwareSerial_usage INTERFACE + src +) + + +target_link_libraries(SoftwareSerial_usage INTERFACE + base_config +) + +target_link_libraries(SoftwareSerial INTERFACE SoftwareSerial_usage) + + + +add_library(SoftwareSerial_bin OBJECT EXCLUDE_FROM_ALL + src/SoftwareSerial.cpp +) +target_link_libraries(SoftwareSerial_bin PUBLIC SoftwareSerial_usage) + +target_link_libraries(SoftwareSerial INTERFACE + SoftwareSerial_bin + $ +) + diff --git a/libraries/SrcWrapper/CMakeLists.txt b/libraries/SrcWrapper/CMakeLists.txt new file mode 100644 index 0000000000..b441d27da3 --- /dev/null +++ b/libraries/SrcWrapper/CMakeLists.txt @@ -0,0 +1,197 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(SrcWrapper INTERFACE) +add_library(SrcWrapper_usage INTERFACE) + +target_include_directories(SrcWrapper_usage INTERFACE + src +) + + +target_link_libraries(SrcWrapper_usage INTERFACE + base_config +) + +target_link_libraries(SrcWrapper INTERFACE SrcWrapper_usage) + + + +add_library(SrcWrapper_bin OBJECT EXCLUDE_FROM_ALL + src/HAL/stm32yyxx_hal.c + src/HAL/stm32yyxx_hal_adc.c + src/HAL/stm32yyxx_hal_adc_ex.c + src/HAL/stm32yyxx_hal_can.c + src/HAL/stm32yyxx_hal_cec.c + src/HAL/stm32yyxx_hal_comp.c + src/HAL/stm32yyxx_hal_comp_ex.c + src/HAL/stm32yyxx_hal_cordic.c + src/HAL/stm32yyxx_hal_cortex.c + src/HAL/stm32yyxx_hal_crc.c + src/HAL/stm32yyxx_hal_crc_ex.c + src/HAL/stm32yyxx_hal_cryp.c + src/HAL/stm32yyxx_hal_cryp_ex.c + src/HAL/stm32yyxx_hal_dac.c + src/HAL/stm32yyxx_hal_dac_ex.c + src/HAL/stm32yyxx_hal_dcache.c + src/HAL/stm32yyxx_hal_dcmi.c + src/HAL/stm32yyxx_hal_dcmi_ex.c + src/HAL/stm32yyxx_hal_dfsdm.c + src/HAL/stm32yyxx_hal_dfsdm_ex.c + src/HAL/stm32yyxx_hal_dma.c + src/HAL/stm32yyxx_hal_dma2d.c + src/HAL/stm32yyxx_hal_dma_ex.c + src/HAL/stm32yyxx_hal_dsi.c + src/HAL/stm32yyxx_hal_dts.c + src/HAL/stm32yyxx_hal_eth.c + src/HAL/stm32yyxx_hal_eth_ex.c + src/HAL/stm32yyxx_hal_exti.c + src/HAL/stm32yyxx_hal_fdcan.c + src/HAL/stm32yyxx_hal_firewall.c + src/HAL/stm32yyxx_hal_flash.c + src/HAL/stm32yyxx_hal_flash_ex.c + src/HAL/stm32yyxx_hal_flash_ramfunc.c + src/HAL/stm32yyxx_hal_fmac.c + src/HAL/stm32yyxx_hal_fmpi2c.c + src/HAL/stm32yyxx_hal_fmpi2c_ex.c + src/HAL/stm32yyxx_hal_fmpsmbus.c + src/HAL/stm32yyxx_hal_fmpsmbus_ex.c + src/HAL/stm32yyxx_hal_gfxmmu.c + src/HAL/stm32yyxx_hal_gpio.c + src/HAL/stm32yyxx_hal_gpio_ex.c + src/HAL/stm32yyxx_hal_gpu2d.c + src/HAL/stm32yyxx_hal_gtzc.c + src/HAL/stm32yyxx_hal_hash.c + src/HAL/stm32yyxx_hal_hash_ex.c + src/HAL/stm32yyxx_hal_hcd.c + src/HAL/stm32yyxx_hal_hrtim.c + src/HAL/stm32yyxx_hal_hsem.c + src/HAL/stm32yyxx_hal_i2c.c + src/HAL/stm32yyxx_hal_i2c_ex.c + src/HAL/stm32yyxx_hal_i2s.c + src/HAL/stm32yyxx_hal_i2s_ex.c + src/HAL/stm32yyxx_hal_icache.c + src/HAL/stm32yyxx_hal_ipcc.c + src/HAL/stm32yyxx_hal_irda.c + src/HAL/stm32yyxx_hal_iwdg.c + src/HAL/stm32yyxx_hal_jpeg.c + src/HAL/stm32yyxx_hal_lcd.c + src/HAL/stm32yyxx_hal_lptim.c + src/HAL/stm32yyxx_hal_ltdc.c + src/HAL/stm32yyxx_hal_ltdc_ex.c + src/HAL/stm32yyxx_hal_mdf.c + src/HAL/stm32yyxx_hal_mdios.c + src/HAL/stm32yyxx_hal_mdma.c + src/HAL/stm32yyxx_hal_mmc.c + src/HAL/stm32yyxx_hal_mmc_ex.c + src/HAL/stm32yyxx_hal_nand.c + src/HAL/stm32yyxx_hal_nor.c + src/HAL/stm32yyxx_hal_opamp.c + src/HAL/stm32yyxx_hal_opamp_ex.c + src/HAL/stm32yyxx_hal_ospi.c + src/HAL/stm32yyxx_hal_otfdec.c + src/HAL/stm32yyxx_hal_pccard.c + src/HAL/stm32yyxx_hal_pcd.c + src/HAL/stm32yyxx_hal_pcd_ex.c + src/HAL/stm32yyxx_hal_pka.c + src/HAL/stm32yyxx_hal_pssi.c + src/HAL/stm32yyxx_hal_pwr.c + src/HAL/stm32yyxx_hal_pwr_ex.c + src/HAL/stm32yyxx_hal_qspi.c + src/HAL/stm32yyxx_hal_ramcfg.c + src/HAL/stm32yyxx_hal_ramecc.c + src/HAL/stm32yyxx_hal_rcc.c + src/HAL/stm32yyxx_hal_rcc_ex.c + src/HAL/stm32yyxx_hal_rng.c + src/HAL/stm32yyxx_hal_rng_ex.c + src/HAL/stm32yyxx_hal_rtc.c + src/HAL/stm32yyxx_hal_rtc_ex.c + src/HAL/stm32yyxx_hal_sai.c + src/HAL/stm32yyxx_hal_sai_ex.c + src/HAL/stm32yyxx_hal_sd.c + src/HAL/stm32yyxx_hal_sd_ex.c + src/HAL/stm32yyxx_hal_sdadc.c + src/HAL/stm32yyxx_hal_sdram.c + src/HAL/stm32yyxx_hal_smartcard.c + src/HAL/stm32yyxx_hal_smartcard_ex.c + src/HAL/stm32yyxx_hal_smbus.c + src/HAL/stm32yyxx_hal_smbus_ex.c + src/HAL/stm32yyxx_hal_spdifrx.c + src/HAL/stm32yyxx_hal_spi.c + src/HAL/stm32yyxx_hal_spi_ex.c + src/HAL/stm32yyxx_hal_sram.c + src/HAL/stm32yyxx_hal_subghz.c + src/HAL/stm32yyxx_hal_swpmi.c + src/HAL/stm32yyxx_hal_tim.c + src/HAL/stm32yyxx_hal_tim_ex.c + src/HAL/stm32yyxx_hal_tsc.c + src/HAL/stm32yyxx_hal_uart.c + src/HAL/stm32yyxx_hal_uart_ex.c + src/HAL/stm32yyxx_hal_usart.c + src/HAL/stm32yyxx_hal_usart_ex.c + src/HAL/stm32yyxx_hal_wwdg.c + src/HAL/stm32yyxx_hal_xspi.c + src/HardwareTimer.cpp + src/LL/stm32yyxx_ll_adc.c + src/LL/stm32yyxx_ll_bdma.c + src/LL/stm32yyxx_ll_comp.c + src/LL/stm32yyxx_ll_cordic.c + src/LL/stm32yyxx_ll_crc.c + src/LL/stm32yyxx_ll_crs.c + src/LL/stm32yyxx_ll_dac.c + src/LL/stm32yyxx_ll_delayblock.c + src/LL/stm32yyxx_ll_dlyb.c + src/LL/stm32yyxx_ll_dma.c + src/LL/stm32yyxx_ll_dma2d.c + src/LL/stm32yyxx_ll_exti.c + src/LL/stm32yyxx_ll_fmac.c + src/LL/stm32yyxx_ll_fmc.c + src/LL/stm32yyxx_ll_fmpi2c.c + src/LL/stm32yyxx_ll_fsmc.c + src/LL/stm32yyxx_ll_gpio.c + src/LL/stm32yyxx_ll_hrtim.c + src/LL/stm32yyxx_ll_i2c.c + src/LL/stm32yyxx_ll_icache.c + src/LL/stm32yyxx_ll_lpgpio.c + src/LL/stm32yyxx_ll_lptim.c + src/LL/stm32yyxx_ll_lpuart.c + src/LL/stm32yyxx_ll_mdma.c + src/LL/stm32yyxx_ll_opamp.c + src/LL/stm32yyxx_ll_pka.c + src/LL/stm32yyxx_ll_pwr.c + src/LL/stm32yyxx_ll_rcc.c + src/LL/stm32yyxx_ll_rng.c + src/LL/stm32yyxx_ll_rtc.c + src/LL/stm32yyxx_ll_sdmmc.c + src/LL/stm32yyxx_ll_spi.c + src/LL/stm32yyxx_ll_swpmi.c + src/LL/stm32yyxx_ll_tim.c + src/LL/stm32yyxx_ll_ucpd.c + src/LL/stm32yyxx_ll_usart.c + src/LL/stm32yyxx_ll_usb.c + src/LL/stm32yyxx_ll_utils.c + src/new.cpp + src/stm32/analog.cpp + src/stm32/bootloader.c + src/stm32/clock.c + src/stm32/core_callback.c + src/stm32/dwt.c + src/stm32/hw_config.c + src/stm32/interrupt.cpp + src/stm32/otp.c + src/stm32/pinmap.c + src/stm32/PortNames.c + src/stm32/stm32_def.c + src/stm32/system_stm32yyxx.c + src/stm32/timer.c + src/stm32/uart.c + src/syscalls.c +) +target_link_libraries(SrcWrapper_bin PUBLIC SrcWrapper_usage) + +target_link_libraries(SrcWrapper INTERFACE + SrcWrapper_bin + $ +) + diff --git a/libraries/Wire/CMakeLists.txt b/libraries/Wire/CMakeLists.txt new file mode 100644 index 0000000000..a56f9a0f33 --- /dev/null +++ b/libraries/Wire/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(Wire INTERFACE) +add_library(Wire_usage INTERFACE) + +target_include_directories(Wire_usage INTERFACE + src +) + + +target_link_libraries(Wire_usage INTERFACE + base_config +) + +target_link_libraries(Wire INTERFACE Wire_usage) + + + +add_library(Wire_bin OBJECT EXCLUDE_FROM_ALL + src/utility/twi.c + src/Wire.cpp +) +target_link_libraries(Wire_bin PUBLIC Wire_usage) + +target_link_libraries(Wire INTERFACE + Wire_bin + $ +) + diff --git a/variants/STM32F0xx/F030C6T/CMakeLists.txt b/variants/STM32F0xx/F030C6T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F030C6T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F030C8T/CMakeLists.txt b/variants/STM32F0xx/F030C8T/CMakeLists.txt new file mode 100644 index 0000000000..e37eed6452 --- /dev/null +++ b/variants/STM32F0xx/F030C8T/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_EEXTR_F030_V1.c + variant_EEXTR_F030_V1.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F030CCT/CMakeLists.txt b/variants/STM32F0xx/F030CCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F030CCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F030F4P/CMakeLists.txt b/variants/STM32F0xx/F030F4P/CMakeLists.txt new file mode 100644 index 0000000000..608bf013da --- /dev/null +++ b/variants/STM32F0xx/F030F4P/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_DEMO_F030F4.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F030K6T/CMakeLists.txt b/variants/STM32F0xx/F030K6T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F030K6T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F030R8T/CMakeLists.txt b/variants/STM32F0xx/F030R8T/CMakeLists.txt new file mode 100644 index 0000000000..1e7ca98ff7 --- /dev/null +++ b/variants/STM32F0xx/F030R8T/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_DISCO_F030R8.cpp + variant_generic.cpp + variant_NUCLEO_F030R8.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F030RCT/CMakeLists.txt b/variants/STM32F0xx/F030RCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F030RCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F031C(4-6)T/CMakeLists.txt b/variants/STM32F0xx/F031C(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F031C(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F031E6Y_F038E6Y/CMakeLists.txt b/variants/STM32F0xx/F031E6Y_F038E6Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F031E6Y_F038E6Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F031F(4-6)P/CMakeLists.txt b/variants/STM32F0xx/F031F(4-6)P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F031F(4-6)P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F031G(4-6)U/CMakeLists.txt b/variants/STM32F0xx/F031G(4-6)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F031G(4-6)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F031K(4-6)U/CMakeLists.txt b/variants/STM32F0xx/F031K(4-6)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F031K(4-6)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F031K6T/CMakeLists.txt b/variants/STM32F0xx/F031K6T/CMakeLists.txt new file mode 100644 index 0000000000..38a12066aa --- /dev/null +++ b/variants/STM32F0xx/F031K6T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F031K6.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F038C6T/CMakeLists.txt b/variants/STM32F0xx/F038C6T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F038C6T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F038F6P/CMakeLists.txt b/variants/STM32F0xx/F038F6P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F038F6P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F038G6U/CMakeLists.txt b/variants/STM32F0xx/F038G6U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F038G6U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F038K6U/CMakeLists.txt b/variants/STM32F0xx/F038K6U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F038K6U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F042C(4-6)(T-U)/CMakeLists.txt b/variants/STM32F0xx/F042C(4-6)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F042C(4-6)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F042F(4-6)P/CMakeLists.txt b/variants/STM32F0xx/F042F(4-6)P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F042F(4-6)P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F042G(4-6)U/CMakeLists.txt b/variants/STM32F0xx/F042G(4-6)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F042G(4-6)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F042K(4-6)T/CMakeLists.txt b/variants/STM32F0xx/F042K(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..60ce28c475 --- /dev/null +++ b/variants/STM32F0xx/F042K(4-6)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F042K6.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F042K(4-6)U/CMakeLists.txt b/variants/STM32F0xx/F042K(4-6)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F042K(4-6)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F042T6Y/CMakeLists.txt b/variants/STM32F0xx/F042T6Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F042T6Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F048C6U/CMakeLists.txt b/variants/STM32F0xx/F048C6U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F048C6U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F048G6U/CMakeLists.txt b/variants/STM32F0xx/F048G6U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F048G6U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F048T6Y/CMakeLists.txt b/variants/STM32F0xx/F048T6Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F048T6Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051C4(T-U)/CMakeLists.txt b/variants/STM32F0xx/F051C4(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051C4(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051C6(T-U)/CMakeLists.txt b/variants/STM32F0xx/F051C6(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051C6(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051C8(T-U)/CMakeLists.txt b/variants/STM32F0xx/F051C8(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051C8(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051K(6-8)T/CMakeLists.txt b/variants/STM32F0xx/F051K(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051K(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051K(6-8)U/CMakeLists.txt b/variants/STM32F0xx/F051K(6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..da2c074b2f --- /dev/null +++ b/variants/STM32F0xx/F051K(6-8)U/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_WRAITH32_V1.c + variant_generic.cpp + variant_WRAITH32_V1.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051K4T/CMakeLists.txt b/variants/STM32F0xx/F051K4T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051K4T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051K4U/CMakeLists.txt b/variants/STM32F0xx/F051K4U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051K4U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051R4T/CMakeLists.txt b/variants/STM32F0xx/F051R4T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051R4T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051R6T/CMakeLists.txt b/variants/STM32F0xx/F051R6T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051R6T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051R8(H-T)/CMakeLists.txt b/variants/STM32F0xx/F051R8(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051R8(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F051T8Y/CMakeLists.txt b/variants/STM32F0xx/F051T8Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F051T8Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F058C8U/CMakeLists.txt b/variants/STM32F0xx/F058C8U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F058C8U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F058R8(H-T)/CMakeLists.txt b/variants/STM32F0xx/F058R8(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F058R8(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F058T8Y/CMakeLists.txt b/variants/STM32F0xx/F058T8Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F058T8Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F070C6T/CMakeLists.txt b/variants/STM32F0xx/F070C6T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F070C6T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F070CBT/CMakeLists.txt b/variants/STM32F0xx/F070CBT/CMakeLists.txt new file mode 100644 index 0000000000..717b22915f --- /dev/null +++ b/variants/STM32F0xx/F070CBT/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + startup_Mx00_f070xb.S + variant_generic.cpp + variant_MALYANMx00_F070CB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F070F6P/CMakeLists.txt b/variants/STM32F0xx/F070F6P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F070F6P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F070RBT/CMakeLists.txt b/variants/STM32F0xx/F070RBT/CMakeLists.txt new file mode 100644 index 0000000000..ca5103c65b --- /dev/null +++ b/variants/STM32F0xx/F070RBT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F070RB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/CMakeLists.txt b/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F071C8(T-U)_F071CB(T-U-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F071RBT/CMakeLists.txt b/variants/STM32F0xx/F071RBT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F071RBT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F071V(8-B)(H-T)/CMakeLists.txt b/variants/STM32F0xx/F071V(8-B)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F071V(8-B)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/CMakeLists.txt b/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/CMakeLists.txt new file mode 100644 index 0000000000..f2e3b8c9b9 --- /dev/null +++ b/variants/STM32F0xx/F072C8(T-U)_F072CB(T-U-Y)/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_ELEKTOR_F072Cx.c + variant_ELEKTOR_F072Cx.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/CMakeLists.txt b/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/CMakeLists.txt new file mode 100644 index 0000000000..08825b7af5 --- /dev/null +++ b/variants/STM32F0xx/F072R8T_F072RB(H-I-T)/CMakeLists.txt @@ -0,0 +1,35 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_PYBSTICK26_DUINO.c + variant_DISCO_F072RB.cpp + variant_generic.cpp + variant_NUCLEO_F072RB.cpp + variant_PYBSTICK26_DUINO.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F072V(8-B)(H-T)/CMakeLists.txt b/variants/STM32F0xx/F072V(8-B)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F072V(8-B)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F078CB(T-U-Y)/CMakeLists.txt b/variants/STM32F0xx/F078CB(T-U-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F078CB(T-U-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F078RB(H-T)/CMakeLists.txt b/variants/STM32F0xx/F078RB(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F078RB(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F078VB(H-T)/CMakeLists.txt b/variants/STM32F0xx/F078VB(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F078VB(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F091C(B-C)(T-U)/CMakeLists.txt b/variants/STM32F0xx/F091C(B-C)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F091C(B-C)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/CMakeLists.txt b/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2b1077a1c5 --- /dev/null +++ b/variants/STM32F0xx/F091RBT_F091RC(H-T-Y)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F091RC.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F091VBT_F091VC(H-T)/CMakeLists.txt b/variants/STM32F0xx/F091VBT_F091VC(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F091VBT_F091VC(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F098CC(T-U)/CMakeLists.txt b/variants/STM32F0xx/F098CC(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F098CC(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F098RC(H-T-Y)/CMakeLists.txt b/variants/STM32F0xx/F098RC(H-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F098RC(H-T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F0xx/F098VC(H-T)/CMakeLists.txt b/variants/STM32F0xx/F098VC(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F0xx/F098VC(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100C(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F100C(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100C(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100C(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F100C(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100C(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100R(4-6)H/CMakeLists.txt b/variants/STM32F1xx/F100R(4-6)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100R(4-6)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100R(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F100R(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100R(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100R(8-B)H/CMakeLists.txt b/variants/STM32F1xx/F100R(8-B)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100R(8-B)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100R(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F100R(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..d81d9fb691 --- /dev/null +++ b/variants/STM32F1xx/F100R(8-B)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_DISCO_F100RB.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100R(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F100R(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100R(C-D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100V(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F100V(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100V(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100V(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F100V(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100V(C-D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F100Z(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F100Z(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F100Z(C-D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101C(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F101C(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101C(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101C(8-B)(T-U)/CMakeLists.txt b/variants/STM32F1xx/F101C(8-B)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101C(8-B)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101R(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F101R(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101R(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101R(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F101R(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101R(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101R(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F101R(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101R(C-D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101R(F-G)T/CMakeLists.txt b/variants/STM32F1xx/F101R(F-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101R(F-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101RBH/CMakeLists.txt b/variants/STM32F1xx/F101RBH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101RBH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101T(4-6)U/CMakeLists.txt b/variants/STM32F1xx/F101T(4-6)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101T(4-6)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101T(8-B)U/CMakeLists.txt b/variants/STM32F1xx/F101T(8-B)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101T(8-B)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101V(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F101V(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101V(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101V(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F101V(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101V(C-D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101V(F-G)T/CMakeLists.txt b/variants/STM32F1xx/F101V(F-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101V(F-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101Z(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F101Z(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101Z(C-D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F101Z(F-G)T/CMakeLists.txt b/variants/STM32F1xx/F101Z(F-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F101Z(F-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F102C(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F102C(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F102C(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F102C(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F102C(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F102C(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F102R(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F102R(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F102R(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F102R(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F102R(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F102R(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103C4T_F103C6(T-U)/CMakeLists.txt b/variants/STM32F1xx/F103C4T_F103C6(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..d591607292 --- /dev/null +++ b/variants/STM32F1xx/F103C4T_F103C6(T-U)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_BLUEPILL_F103C6.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103C8T_F103CB(T-U)/CMakeLists.txt b/variants/STM32F1xx/F103C8T_F103CB(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..f026bfbfae --- /dev/null +++ b/variants/STM32F1xx/F103C8T_F103CB(T-U)/CMakeLists.txt @@ -0,0 +1,37 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_MALYANM200_F103CB.c + startup_M200_f103xb.S + variant_AFROFLIGHT_F103CB.cpp + variant_generic.cpp + variant_MALYANM200_F103CB.cpp + variant_MAPLEMINI_F103CB.cpp + variant_PILL_F103Cx.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(4-6)H/CMakeLists.txt b/variants/STM32F1xx/F103R(4-6)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103R(4-6)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(4-6)T/CMakeLists.txt b/variants/STM32F1xx/F103R(4-6)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103R(4-6)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(8-B)H/CMakeLists.txt b/variants/STM32F1xx/F103R(8-B)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103R(8-B)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(8-B)T/CMakeLists.txt b/variants/STM32F1xx/F103R(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..f478b411bb --- /dev/null +++ b/variants/STM32F1xx/F103R(8-B)T/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_BLUEBUTTON_F103RxT.cpp + variant_generic.cpp + variant_NUCLEO_F103RB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(C-D-E)T/CMakeLists.txt b/variants/STM32F1xx/F103R(C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..46ed9a8206 --- /dev/null +++ b/variants/STM32F1xx/F103R(C-D-E)T/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_STORM32_V1_31_RC.c + variant_BLUEBUTTON_F103RxT.cpp + variant_generic.cpp + variant_STORM32_V1_31_RC.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(C-D-E)Y/CMakeLists.txt b/variants/STM32F1xx/F103R(C-D-E)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103R(C-D-E)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103R(F-G)T/CMakeLists.txt b/variants/STM32F1xx/F103R(F-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103R(F-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103T(4-6)U/CMakeLists.txt b/variants/STM32F1xx/F103T(4-6)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103T(4-6)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103T(8-B)U/CMakeLists.txt b/variants/STM32F1xx/F103T(8-B)U/CMakeLists.txt new file mode 100644 index 0000000000..4ab2d01e62 --- /dev/null +++ b/variants/STM32F1xx/F103T(8-B)U/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_HY_TINYSTM103TB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103V(C-D-E)(H-T)/CMakeLists.txt b/variants/STM32F1xx/F103V(C-D-E)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103V(C-D-E)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103V(F-G)T/CMakeLists.txt b/variants/STM32F1xx/F103V(F-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103V(F-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/CMakeLists.txt b/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103V8(H-T)_F103VB(H-I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103Z(C-D-E)(H-T)/CMakeLists.txt b/variants/STM32F1xx/F103Z(C-D-E)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..3ce139596e --- /dev/null +++ b/variants/STM32F1xx/F103Z(C-D-E)(H-T)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_VCCGND_F103ZET6_XXX.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F103Z(F-G)(H-T)/CMakeLists.txt b/variants/STM32F1xx/F103Z(F-G)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F103Z(F-G)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F105R(8-B-C)T/CMakeLists.txt b/variants/STM32F1xx/F105R(8-B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F105R(8-B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/CMakeLists.txt b/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F105V(8-B)(H-T)_F105VCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F107R(B-C)T/CMakeLists.txt b/variants/STM32F1xx/F107R(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F107R(B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F1xx/F107VBT_F107VC(H-T)/CMakeLists.txt b/variants/STM32F1xx/F107VBT_F107VC(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F1xx/F107VBT_F107VC(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/CMakeLists.txt b/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F2xx/F205RE(T-Y)_F205R(B-C-F)T_F205RG(E-T-Y)_F215R(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/CMakeLists.txt b/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F2xx/F205V(B-C-E-F-G)T_F215V(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/CMakeLists.txt b/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F2xx/F205Z(C-E-F-G)T_F215Z(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/CMakeLists.txt b/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F2xx/F207I(C-E-F-G)(H-T)_F217I(E-G)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/CMakeLists.txt b/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F2xx/F207V(C-E-F-G)T_F217V(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/CMakeLists.txt b/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..87519e5dc4 --- /dev/null +++ b/variants/STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_NUCLEO_F207ZG.c + variant_generic.cpp + variant_NUCLEO_F207ZG.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F301C6T_F301C8(T-Y)/CMakeLists.txt b/variants/STM32F3xx/F301C6T_F301C8(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F301C6T_F301C8(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F301K(6-8)T/CMakeLists.txt b/variants/STM32F3xx/F301K(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F301K(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F301K(6-8)U/CMakeLists.txt b/variants/STM32F3xx/F301K(6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F301K(6-8)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F301R(6-8)T/CMakeLists.txt b/variants/STM32F3xx/F301R(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F301R(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302C(B-C)T/CMakeLists.txt b/variants/STM32F3xx/F302C(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302C(B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302C6T_F302C8(T-Y)/CMakeLists.txt b/variants/STM32F3xx/F302C6T_F302C8(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302C6T_F302C8(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302K(6-8)U/CMakeLists.txt b/variants/STM32F3xx/F302K(6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302K(6-8)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302R(6-8)T/CMakeLists.txt b/variants/STM32F3xx/F302R(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..c2ff0c8b91 --- /dev/null +++ b/variants/STM32F3xx/F302R(6-8)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F302R8.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302R(B-C)T/CMakeLists.txt b/variants/STM32F3xx/F302R(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302R(B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302R(D-E)T/CMakeLists.txt b/variants/STM32F3xx/F302R(D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302R(D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302V(B-C)T/CMakeLists.txt b/variants/STM32F3xx/F302V(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302V(B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302V(D-E)(H-T)/CMakeLists.txt b/variants/STM32F3xx/F302V(D-E)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302V(D-E)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302VCY/CMakeLists.txt b/variants/STM32F3xx/F302VCY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302VCY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F302Z(D-E)T/CMakeLists.txt b/variants/STM32F3xx/F302Z(D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F302Z(D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/CMakeLists.txt b/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303C(6-8)T_F334C(4-6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303C(B-C)T/CMakeLists.txt b/variants/STM32F3xx/F303C(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..3dab305844 --- /dev/null +++ b/variants/STM32F3xx/F303C(B-C)T/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_SPARKY_F303CC.c + variant_BLACKPILL_F303CC.cpp + variant_generic.cpp + variant_SPARKY_F303CC.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303C8Y_F334C8Y/CMakeLists.txt b/variants/STM32F3xx/F303C8Y_F334C8Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303C8Y_F334C8Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/CMakeLists.txt b/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..e8bb9fa701 --- /dev/null +++ b/variants/STM32F3xx/F303K(6-8)T_F334K(4-6-8)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F303K8.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/CMakeLists.txt b/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303K(6-8)U_F334K(4-6-8)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303R(B-C)T/CMakeLists.txt b/variants/STM32F3xx/F303R(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..a533f7b0f6 --- /dev/null +++ b/variants/STM32F3xx/F303R(B-C)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_OLIMEXINO_STM32F3.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303R(D-E)T/CMakeLists.txt b/variants/STM32F3xx/F303R(D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..57e7f71861 --- /dev/null +++ b/variants/STM32F3xx/F303R(D-E)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F303RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303V(B-C)T/CMakeLists.txt b/variants/STM32F3xx/F303V(B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..1acdebf7cd --- /dev/null +++ b/variants/STM32F3xx/F303V(B-C)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_DISCO_F303VC.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303V(D-E)(H-T)/CMakeLists.txt b/variants/STM32F3xx/F303V(D-E)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303V(D-E)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303VCY/CMakeLists.txt b/variants/STM32F3xx/F303VCY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303VCY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303VEY/CMakeLists.txt b/variants/STM32F3xx/F303VEY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303VEY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F303Z(D-E)T/CMakeLists.txt b/variants/STM32F3xx/F303Z(D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F303Z(D-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F318C8(T-Y)/CMakeLists.txt b/variants/STM32F3xx/F318C8(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F318C8(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F318K8U/CMakeLists.txt b/variants/STM32F3xx/F318K8U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F318K8U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F328C8T/CMakeLists.txt b/variants/STM32F3xx/F328C8T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F328C8T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F358CCT/CMakeLists.txt b/variants/STM32F3xx/F358CCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F358CCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F358RCT/CMakeLists.txt b/variants/STM32F3xx/F358RCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F358RCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F358VCT/CMakeLists.txt b/variants/STM32F3xx/F358VCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F358VCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F373C(8-B-C)T/CMakeLists.txt b/variants/STM32F3xx/F373C(8-B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F373C(8-B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F373R(8-B-C)T/CMakeLists.txt b/variants/STM32F3xx/F373R(8-B-C)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F373R(8-B-C)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F373V(8-B-C)(H-T)/CMakeLists.txt b/variants/STM32F3xx/F373V(8-B-C)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F373V(8-B-C)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F378CCT/CMakeLists.txt b/variants/STM32F3xx/F378CCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F378CCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F378RC(T-Y)/CMakeLists.txt b/variants/STM32F3xx/F378RC(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F378RC(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F378VC(H-T)/CMakeLists.txt b/variants/STM32F3xx/F378VC(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F378VC(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F3xx/F398VET/CMakeLists.txt b/variants/STM32F3xx/F398VET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F3xx/F398VET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/CMakeLists.txt b/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/CMakeLists.txt new file mode 100644 index 0000000000..e167717b4e --- /dev/null +++ b/variants/STM32F4xx/F401CC(F-U-Y)_F401C(B-D-E)(U-Y)/CMakeLists.txt @@ -0,0 +1,35 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_BLACKPILL_F401Cx.c + PeripheralPins_PYBSTICK26_LITE.c + variant_BLACKPILL_F401Cx.cpp + variant_generic.cpp + variant_PYBSTICK26_LITE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F401R(B-C-D-E)T/CMakeLists.txt b/variants/STM32F4xx/F401R(B-C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..abfbe71997 --- /dev/null +++ b/variants/STM32F4xx/F401R(B-C-D-E)T/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_CoreBoard_F401RC.c + variant_CoreBoard_F401RC.cpp + variant_generic.cpp + variant_NUCLEO_F401RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F401V(B-C-D-E)H/CMakeLists.txt b/variants/STM32F4xx/F401V(B-C-D-E)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F401V(B-C-D-E)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F401V(B-C-D-E)T/CMakeLists.txt b/variants/STM32F4xx/F401V(B-C-D-E)T/CMakeLists.txt new file mode 100644 index 0000000000..28fdb52dd7 --- /dev/null +++ b/variants/STM32F4xx/F401V(B-C-D-E)T/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_ST3DP001_EVAL.c + variant_generic.cpp + variant_ST3DP001_EVAL.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F405O(E-G)Y_F415OGY/CMakeLists.txt b/variants/STM32F4xx/F405O(E-G)Y_F415OGY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F405O(E-G)Y_F415OGY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F405RGT_F415RGT/CMakeLists.txt b/variants/STM32F4xx/F405RGT_F415RGT/CMakeLists.txt new file mode 100644 index 0000000000..bdcd38c5ab --- /dev/null +++ b/variants/STM32F4xx/F405RGT_F415RGT/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_FEATHER_F405.c + variant_FEATHER_F405.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F405VGT_F415VGT/CMakeLists.txt b/variants/STM32F4xx/F405VGT_F415VGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F405VGT_F415VGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F405ZGT_F415ZGT/CMakeLists.txt b/variants/STM32F4xx/F405ZGT_F415ZGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F405ZGT_F415ZGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/CMakeLists.txt b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F407I(E-G)(H-T)_F417I(E-G)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/CMakeLists.txt b/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..f8e014cdff --- /dev/null +++ b/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/CMakeLists.txt @@ -0,0 +1,44 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_ARMED_V1.c + PeripheralPins_BLACK_F407VX.c + PeripheralPins_BLUE_F407VE_MINI.c + PeripheralPins_FK407M1.c + PeripheralPins_PRNTR_V1.c + PeripheralPins_PRNTR_V2.c + variant_ARMED_V1.cpp + variant_BLACK_F407VX.cpp + variant_BLUE_F407VE_MINI.cpp + variant_DISCO_F407VG.cpp + variant_DIYMORE_F407VGT.cpp + variant_FK407M1.cpp + variant_generic.cpp + variant_PRNTR_Vx.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/CMakeLists.txt b/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..922e03e3fa --- /dev/null +++ b/variants/STM32F4xx/F407Z(E-G)T_F417Z(E-G)T/CMakeLists.txt @@ -0,0 +1,35 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_BLACK_F407ZX.c + PeripheralPins_VCCGND_F407ZG_MINI.c + variant_BLACK_F407ZX.cpp + variant_generic.cpp + variant_VCCGND_F407ZG_MINI.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F410C(8-B)T/CMakeLists.txt b/variants/STM32F4xx/F410C(8-B)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F410C(8-B)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F410C(8-B)U/CMakeLists.txt b/variants/STM32F4xx/F410C(8-B)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F410C(8-B)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt b/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F410R(8-B)(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F410T(8-B)Y/CMakeLists.txt b/variants/STM32F4xx/F410T(8-B)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F410T(8-B)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F411C(C-E)(U-Y)/CMakeLists.txt b/variants/STM32F4xx/F411C(C-E)(U-Y)/CMakeLists.txt new file mode 100644 index 0000000000..0c9a37ec7c --- /dev/null +++ b/variants/STM32F4xx/F411C(C-E)(U-Y)/CMakeLists.txt @@ -0,0 +1,35 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_BLACKPILL_F411CE.c + PeripheralPins_THUNDERPACK_F411.c + variant_BLACKPILL_F411CE.cpp + variant_generic.cpp + variant_THUNDERPACK_F411.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F411R(C-E)T/CMakeLists.txt b/variants/STM32F4xx/F411R(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..88288259c7 --- /dev/null +++ b/variants/STM32F4xx/F411R(C-E)T/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_PYBSTICK26_STD.c + variant_generic.cpp + variant_NUCLEO_F411RE.cpp + variant_PYBSTICK26_STD.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F411V(C-E)H/CMakeLists.txt b/variants/STM32F4xx/F411V(C-E)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F411V(C-E)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt b/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F411V(C-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F412C(E-G)U/CMakeLists.txt b/variants/STM32F4xx/F412C(E-G)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F412C(E-G)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/CMakeLists.txt b/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/CMakeLists.txt new file mode 100644 index 0000000000..e4143bbd68 --- /dev/null +++ b/variants/STM32F4xx/F412R(E-G)(T-Y)x(P)/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_PYBSTICK26_PRO.c + variant_generic.cpp + variant_PYBSTICK26_PRO.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F412V(E-G)H/CMakeLists.txt b/variants/STM32F4xx/F412V(E-G)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F412V(E-G)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F412V(E-G)T/CMakeLists.txt b/variants/STM32F4xx/F412V(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F412V(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F412Z(E-G)(J-T)/CMakeLists.txt b/variants/STM32F4xx/F412Z(E-G)(J-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F412Z(E-G)(J-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F413C(G-H)U_F423CHU/CMakeLists.txt b/variants/STM32F4xx/F413C(G-H)U_F423CHU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F413C(G-H)U_F423CHU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F413M(G-H)Y_F423MHY/CMakeLists.txt b/variants/STM32F4xx/F413M(G-H)Y_F423MHY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F413M(G-H)Y_F423MHY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F413R(G-H)T_F423RHT/CMakeLists.txt b/variants/STM32F4xx/F413R(G-H)T_F423RHT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F413R(G-H)T_F423RHT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F413V(G-H)H_F423VHH/CMakeLists.txt b/variants/STM32F4xx/F413V(G-H)H_F423VHH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F413V(G-H)H_F423VHH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F413V(G-H)T_F423VHT/CMakeLists.txt b/variants/STM32F4xx/F413V(G-H)T_F423VHT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F413V(G-H)T_F423VHT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/CMakeLists.txt b/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/CMakeLists.txt new file mode 100644 index 0000000000..952077697c --- /dev/null +++ b/variants/STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_DISCO_F413ZH.c + variant_DISCO_F413ZH.cpp + variant_generic.cpp + variant_NUCLEO_F413ZH.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/CMakeLists.txt b/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F427A(G-I)H_F429A(G-I)H_F437AIH_F439AIH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/CMakeLists.txt b/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F427I(G-I)(H-T)_F429I(E-G-I)(H-T)_F437I(G-I)(H-T)_F439I(G-I)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/CMakeLists.txt b/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F427V(G-I)T_F429V(E-G-I)T_F437V(G-I)T_F439V(G-I)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/CMakeLists.txt b/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..fcd5b0dc26 --- /dev/null +++ b/variants/STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F429ZI.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/CMakeLists.txt b/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F429B(E-G-I)T_F429N(E-G-I)H_F439B(G-I)T_F439N(G-I)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F446M(C-E)Y/CMakeLists.txt b/variants/STM32F4xx/F446M(C-E)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F446M(C-E)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F446R(C-E)T/CMakeLists.txt b/variants/STM32F4xx/F446R(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..325173d8f9 --- /dev/null +++ b/variants/STM32F4xx/F446R(C-E)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F446RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F446V(C-E)T/CMakeLists.txt b/variants/STM32F4xx/F446V(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..1d2d41c497 --- /dev/null +++ b/variants/STM32F4xx/F446V(C-E)T/CMakeLists.txt @@ -0,0 +1,37 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_FYSETC_S6.c + PeripheralPins_RUMBA32.c + PeripheralPins_VAKE_V1.c + variant_FYSETC_S6.cpp + variant_generic.cpp + variant_RUMBA32.cpp + variant_VAKE_V1.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F446Z(C-E)(H-J-T)/CMakeLists.txt b/variants/STM32F4xx/F446Z(C-E)(H-J-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F446Z(C-E)(H-J-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/CMakeLists.txt b/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F469A(E-G-I)(H-Y)_F479A(G-I)(H-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/CMakeLists.txt b/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F469B(E-G-I)T_F469N(E-G-I)H_F479B(G-I)T_F479N(G-I)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/CMakeLists.txt b/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F469I(E-G-I)(H-T)_F479I(G-I)(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/CMakeLists.txt b/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F469V(E-G-I)T_F479V(G-I)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/CMakeLists.txt b/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F4xx/F469Z(E-G-I)T_F479Z(G-I)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/CMakeLists.txt b/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F722I(C-E)(K-T)_F732IE(K-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/CMakeLists.txt b/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F722R(C-E)T_F730R8T_F732RET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/CMakeLists.txt b/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F722V(C-E)T_F730V8T_F732VET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F722Z(C-E)T_F732ZET/CMakeLists.txt b/variants/STM32F7xx/F722Z(C-E)T_F732ZET/CMakeLists.txt new file mode 100644 index 0000000000..d932ca389a --- /dev/null +++ b/variants/STM32F7xx/F722Z(C-E)T_F732ZET/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F722ZE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/CMakeLists.txt b/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F723I(C-E)(K-T)_F730I8K_F733IE(K-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/CMakeLists.txt b/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F723V(C-E)(T-Y)_F733VE(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/CMakeLists.txt b/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F723Z(C-E)(I-T)_F730Z8T_F733ZE(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/CMakeLists.txt b/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F745I(E-G)(K-T)_F746I(E-G)(K-T)_F756IG(K-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/CMakeLists.txt b/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F745V(E-G)(H-T)_F746V(E-G)(H-T)_F750V8T_F756VG(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/CMakeLists.txt b/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..c40bd132e0 --- /dev/null +++ b/variants/STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_ETHERCAT_DUINO.c + variant_ETHERCAT_DUINO.cpp + variant_generic.cpp + variant_NUCLEO_F7x6ZG.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/CMakeLists.txt b/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/CMakeLists.txt new file mode 100644 index 0000000000..d31b4a38f4 --- /dev/null +++ b/variants/STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_DISCO_F746NG.c + variant_DISCO_F746NG.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/CMakeLists.txt b/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F765B(G-I)T_F765N(G-I)H_F767B(G-I)T_F767N(G-I)H_F777BIT_F777NIH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/CMakeLists.txt b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/CMakeLists.txt b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..1ca595c4c7 --- /dev/null +++ b/variants/STM32F7xx/F765V(G-I)(H-T)_F767V(G-I)(H-T)_F777VI(H-T)/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_REMRAM_V1.c + variant_generic.cpp + variant_REMRAM_V1.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/CMakeLists.txt b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/CMakeLists.txt new file mode 100644 index 0000000000..ae30d1321c --- /dev/null +++ b/variants/STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_F767ZI.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/CMakeLists.txt b/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F768AIY_F769A(G-I)Y_F778AIY_F779AIY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/CMakeLists.txt b/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F769B(G-I)T_F769N(G-I)H_F779BIT_F779NIH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32F7xx/F769I(G-I)T_F779IIT/CMakeLists.txt b/variants/STM32F7xx/F769I(G-I)T_F779IIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32F7xx/F769I(G-I)T_F779IIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G030C(6-8)T/CMakeLists.txt b/variants/STM32G0xx/G030C(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G030C(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G030F6P/CMakeLists.txt b/variants/STM32G0xx/G030F6P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G030F6P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G030J6M/CMakeLists.txt b/variants/STM32G0xx/G030J6M/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G030J6M/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G030K(6-8)T/CMakeLists.txt b/variants/STM32G0xx/G030K(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..60242fcea9 --- /dev/null +++ b/variants/STM32G0xx/G030K(6-8)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_AURORA_ONE.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/CMakeLists.txt b/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G031C(4-6-8)(T-U)_G041C(6-8)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/CMakeLists.txt b/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G031F(4-6-8)P_G031Y8Y_G041F(6-8)P_G041Y8Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/CMakeLists.txt b/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G031G(4-6-8)U_G041G(6-8)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G031J(4-6)M_G041J6M/CMakeLists.txt b/variants/STM32G0xx/G031J(4-6)M_G041J6M/CMakeLists.txt new file mode 100644 index 0000000000..f41b321a56 --- /dev/null +++ b/variants/STM32G0xx/G031J(4-6)M_G041J6M/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_DISCO_G0316.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/CMakeLists.txt b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..36fdbf474f --- /dev/null +++ b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G031K8.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G050C(6-8)T/CMakeLists.txt b/variants/STM32G0xx/G050C(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G050C(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G050F6P/CMakeLists.txt b/variants/STM32G0xx/G050F6P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G050F6P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G050K(6-8)T/CMakeLists.txt b/variants/STM32G0xx/G050K(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G050K(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/CMakeLists.txt b/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G051C(6-8)(T-U)_G061C(6-8)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/CMakeLists.txt b/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G051F6P_G051F8(P-Y)_G061F6P_G061F8(P-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/CMakeLists.txt b/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G051G(6-8)U_G061G(6-8)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/CMakeLists.txt b/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G051K(6-8)(T-U)_G061K(6-8)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G070CBT/CMakeLists.txt b/variants/STM32G0xx/G070CBT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G070CBT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G070KBT/CMakeLists.txt b/variants/STM32G0xx/G070KBT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G070KBT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G070RBT/CMakeLists.txt b/variants/STM32G0xx/G070RBT/CMakeLists.txt new file mode 100644 index 0000000000..f8d9d765d6 --- /dev/null +++ b/variants/STM32G0xx/G070RBT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G070RB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/CMakeLists.txt b/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..4adea93540 --- /dev/null +++ b/variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_AGAFIA_SG0.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071EBY_G081EBY/CMakeLists.txt b/variants/STM32G0xx/G071EBY_G081EBY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G071EBY_G081EBY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/CMakeLists.txt b/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G071G(6-8-B)U_G081GBU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/CMakeLists.txt b/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G071G(8-B)UxN_G081GBUxN/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/CMakeLists.txt b/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G071K(6-8-B)(T-U)_G081KB(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/CMakeLists.txt b/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G071K(8-B)(T-U)xN_G081KB(T-U)xN/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/CMakeLists.txt b/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..8a2823e1be --- /dev/null +++ b/variants/STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G071RB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B0CET/CMakeLists.txt b/variants/STM32G0xx/G0B0CET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B0CET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B0KET/CMakeLists.txt b/variants/STM32G0xx/G0B0KET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B0KET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B0RET/CMakeLists.txt b/variants/STM32G0xx/G0B0RET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B0RET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B0VET/CMakeLists.txt b/variants/STM32G0xx/G0B0VET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B0VET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/CMakeLists.txt b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..5d338b3086 --- /dev/null +++ b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)_G0C1C(C-E)(T-U)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_EBB42_V1_1.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/CMakeLists.txt b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1C(B-C-E)(T-U)xN_G0C1C(C-E)(T-U)xN/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/CMakeLists.txt b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)_G0C1K(C-E)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/CMakeLists.txt b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1K(B-C-E)(T-U)xN_G0C1K(C-E)(T-U)xN/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/CMakeLists.txt b/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1M(B-C-E)T_G0C1M(C-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1NEY_G0C1NEY/CMakeLists.txt b/variants/STM32G0xx/G0B1NEY_G0C1NEY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1NEY_G0C1NEY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/CMakeLists.txt b/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1R(B-C-E)(I-T)xN_G0C1R(C-E)(I-T)xN/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/CMakeLists.txt b/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..e3665d2bb2 --- /dev/null +++ b/variants/STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G0B1RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/CMakeLists.txt b/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G0xx/G0B1V(B-C-E)(I-T)_G0C1V(C-E)(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/CMakeLists.txt b/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G431C(6-8-B)T_G441CBT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/CMakeLists.txt b/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/CMakeLists.txt new file mode 100644 index 0000000000..48a9f2393a --- /dev/null +++ b/variants/STM32G4xx/G431C(6-8-B)U_G441CBU/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_B_G431B_ESC1.c + variant_B_G431B_ESC1.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431CBY_G441CBY/CMakeLists.txt b/variants/STM32G4xx/G431CBY_G441CBY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G431CBY_G441CBY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/CMakeLists.txt b/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..dc632a7a3b --- /dev/null +++ b/variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G431KB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/CMakeLists.txt b/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G431M(6-8-B)T_G441MBT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)/CMakeLists.txt b/variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..a2eea5d929 --- /dev/null +++ b/variants/STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G431RB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/CMakeLists.txt b/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G431V(6-8-B)T_G441VBT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471C(C-E)T/CMakeLists.txt b/variants/STM32G4xx/G471C(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471C(C-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471C(C-E)U/CMakeLists.txt b/variants/STM32G4xx/G471C(C-E)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471C(C-E)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471M(C-E)T/CMakeLists.txt b/variants/STM32G4xx/G471M(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471M(C-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471MEY/CMakeLists.txt b/variants/STM32G4xx/G471MEY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471MEY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471Q(C-E)T/CMakeLists.txt b/variants/STM32G4xx/G471Q(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471Q(C-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471R(C-E)T/CMakeLists.txt b/variants/STM32G4xx/G471R(C-E)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471R(C-E)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G471V(C-E)(H-I-T)/CMakeLists.txt b/variants/STM32G4xx/G471V(C-E)(H-I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G471V(C-E)(H-I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/CMakeLists.txt b/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/CMakeLists.txt b/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473M(B-C-E)T_G474M(B-C-E)T_G483MET_G484MET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/CMakeLists.txt b/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473MEY_G474MEY_G483MEY_G484MEY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/CMakeLists.txt b/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473P(B-C-E)I_G474P(B-C-E)I_G483PEI_G484PEI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET/CMakeLists.txt b/variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473Q(B-C-E)T_G474Q(B-C-E)T_G483QET_G484QET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET/CMakeLists.txt b/variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET/CMakeLists.txt new file mode 100644 index 0000000000..ead531ad14 --- /dev/null +++ b/variants/STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_G474RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/CMakeLists.txt b/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G473V(B-C-E)(H-T)_G474V(B-C-E)(H-T)_G483VE(H-T)_G484VE(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G491C(C-E)T_G4A1CET/CMakeLists.txt b/variants/STM32G4xx/G491C(C-E)T_G4A1CET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G491C(C-E)T_G4A1CET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G491C(C-E)U_G4A1CEU/CMakeLists.txt b/variants/STM32G4xx/G491C(C-E)U_G4A1CEU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G491C(C-E)U_G4A1CEU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/CMakeLists.txt b/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G491K(C-E)U_G4A1KEU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/CMakeLists.txt b/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/CMakeLists.txt b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/G491V(C-E)T_G4A1VET/CMakeLists.txt b/variants/STM32G4xx/G491V(C-E)T_G4A1VET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32G4xx/G491V(C-E)T_G4A1VET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32G4xx/GBK1CBT/CMakeLists.txt b/variants/STM32G4xx/GBK1CBT/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32G4xx/GBK1CBT/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/CMakeLists.txt b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/CMakeLists.txt b/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H723Z(E-G)I_H730ZBI_H733ZGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/CMakeLists.txt b/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/CMakeLists.txt new file mode 100644 index 0000000000..7f8fe0d43b --- /dev/null +++ b/variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_H723ZG.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/CMakeLists.txt b/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725A(E-G)I_H730ABIxQ_H735AGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/CMakeLists.txt b/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725I(E-G)K_H730IBKxQ_H735IGK/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/CMakeLists.txt b/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725I(E-G)T_H730IBTxQ_H735IGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725R(E-G)V_H735RGV/CMakeLists.txt b/variants/STM32H7xx/H725R(E-G)V_H735RGV/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725R(E-G)V_H735RGV/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725V(E-G)H/CMakeLists.txt b/variants/STM32H7xx/H725V(E-G)H/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H725V(E-G)H/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H725V(E-G)H_H735VGH/CMakeLists.txt b/variants/STM32H7xx/H725V(E-G)H_H735VGH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725V(E-G)H_H735VGH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725V(E-G)T/CMakeLists.txt b/variants/STM32H7xx/H725V(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H725V(E-G)T/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H725V(E-G)T_H735VGT/CMakeLists.txt b/variants/STM32H7xx/H725V(E-G)T_H735VGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725V(E-G)T_H735VGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725VGY_H735VGY/CMakeLists.txt b/variants/STM32H7xx/H725VGY_H735VGY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725VGY_H735VGY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/CMakeLists.txt b/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H725Z(E-G)T_H735ZGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H730IBKxQ/CMakeLists.txt b/variants/STM32H7xx/H730IBKxQ/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H730IBKxQ/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H730VB(H-T)/CMakeLists.txt b/variants/STM32H7xx/H730VB(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H730VB(H-T)/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H730ZBT/CMakeLists.txt b/variants/STM32H7xx/H730ZBT/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H730ZBT/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H735VGH/CMakeLists.txt b/variants/STM32H7xx/H735VGH/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H735VGH/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H735VGT/CMakeLists.txt b/variants/STM32H7xx/H735VGT/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32H7xx/H735VGT/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/CMakeLists.txt b/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H742A(G-I)I_H743A(G-I)I_H753AII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/CMakeLists.txt b/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H742B(G-I)T_H743B(G-I)T_H753BIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/CMakeLists.txt b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/CMakeLists.txt new file mode 100644 index 0000000000..271b27c96b --- /dev/null +++ b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/CMakeLists.txt @@ -0,0 +1,37 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_DAISY_PATCH_SM.c + PeripheralPins_DAISY_PETAL_SM.c + PeripheralPins_DAISY_SEED.c + variant_DAISY_PATCH_SM.cpp + variant_DAISY_PETAL_SM.cpp + variant_DAISY_SEED.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/CMakeLists.txt b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..1916f1a178 --- /dev/null +++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/CMakeLists.txt @@ -0,0 +1,35 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_DevEBoxH7xx.c + PeripheralPins_WeActMiniH7xx.c + variant_DevEBoxH7xx.cpp + variant_generic.cpp + variant_WeActMiniH7xx.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/CMakeLists.txt b/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H742X(G-I)H_H743X(G-I)H_H745X(G-I)H_H747X(G-I)H_H750XBH_H753XIH_H755XIH_H757XIH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/CMakeLists.txt b/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/CMakeLists.txt new file mode 100644 index 0000000000..de8d28df0c --- /dev/null +++ b/variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_H743ZI.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H745B(G-I)T_H755BIT/CMakeLists.txt b/variants/STM32H7xx/H745B(G-I)T_H755BIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H745B(G-I)T_H755BIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H745I(G-I)K_H755IIK/CMakeLists.txt b/variants/STM32H7xx/H745I(G-I)K_H755IIK/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H745I(G-I)K_H755IIK/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H745I(G-I)T_H755IIT/CMakeLists.txt b/variants/STM32H7xx/H745I(G-I)T_H755IIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H745I(G-I)T_H755IIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/CMakeLists.txt b/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H745Z(G-I)T_H755ZIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H747B(G-I)T_H757BIT/CMakeLists.txt b/variants/STM32H7xx/H747B(G-I)T_H757BIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H747B(G-I)T_H757BIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H747ZIY_H757ZIY/CMakeLists.txt b/variants/STM32H7xx/H747ZIY_H757ZIY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H747ZIY_H757ZIY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3A(G-I)IxQ_H7B0ABIxQ_H7B3AIIxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/CMakeLists.txt b/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3I(G-I)(K-T)_H7B0IBT_H7B3II(K-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3I(G-I)KxQ_H7B0IBKxQ_H7B3IIKxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3I(G-I)TxQ_H7B3IITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3L(G-I)HxQ_H7B3LIHxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/CMakeLists.txt b/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3N(G-I)H_H7B3NIH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3QIYxQ_H7B3QIYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/CMakeLists.txt b/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3R(G-I)T_H7B0RBT_H7B3RIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/CMakeLists.txt b/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3V(G-I)(H-T)_H7B0VBT_H7B3VI(H-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3V(G-I)HxQ_H7B3VIHxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3V(G-I)TxQ_H7B3VITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/CMakeLists.txt b/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3Z(G-I)T_H7B0ZBT_H7B3ZIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/CMakeLists.txt b/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32H7xx/H7A3Z(G-I)TxQ_H7B3ZITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L010C6T/CMakeLists.txt b/variants/STM32L0xx/L010C6T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L010C6T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/CMakeLists.txt b/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L010F4P_L011F(3-4)P_L021F4P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/CMakeLists.txt b/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L010K4T_L011K(3-4)T_L021K4T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L010K8T/CMakeLists.txt b/variants/STM32L0xx/L010K8T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L010K8T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L010R8T/CMakeLists.txt b/variants/STM32L0xx/L010R8T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L010R8T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L010RBT/CMakeLists.txt b/variants/STM32L0xx/L010RBT/CMakeLists.txt new file mode 100644 index 0000000000..2b38d972bc --- /dev/null +++ b/variants/STM32L0xx/L010RBT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L010RB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L011D(3-4)P_L021D4P/CMakeLists.txt b/variants/STM32L0xx/L011D(3-4)P_L021D4P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L011D(3-4)P_L021D4P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L011E(3-4)Y/CMakeLists.txt b/variants/STM32L0xx/L011E(3-4)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L011E(3-4)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L011F(3-4)U_L021F4U/CMakeLists.txt b/variants/STM32L0xx/L011F(3-4)U_L021F4U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L011F(3-4)U_L021F4U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L011G(3-4)U_L021G4U/CMakeLists.txt b/variants/STM32L0xx/L011G(3-4)U_L021G4U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L011G(3-4)U_L021G4U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L011K(3-4)U_L021K4U/CMakeLists.txt b/variants/STM32L0xx/L011K(3-4)U_L021K4U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L011K(3-4)U_L021K4U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/CMakeLists.txt b/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L031C(4-6)(T-U)_L041C4T_L041C6(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/CMakeLists.txt b/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L031E(4-6)Y_L041E6Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031F(4-6)P_L041F6P/CMakeLists.txt b/variants/STM32L0xx/L031F(4-6)P_L041F6P/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L031F(4-6)P_L041F6P/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031G(4-6)U_L041G6U/CMakeLists.txt b/variants/STM32L0xx/L031G(4-6)U_L041G6U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L031G(4-6)U_L041G6U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031G6UxS_L041G6UxS/CMakeLists.txt b/variants/STM32L0xx/L031G6UxS_L041G6UxS/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L031G6UxS_L041G6UxS/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031K(4-6)T_L041K6T/CMakeLists.txt b/variants/STM32L0xx/L031K(4-6)T_L041K6T/CMakeLists.txt new file mode 100644 index 0000000000..beba101070 --- /dev/null +++ b/variants/STM32L0xx/L031K(4-6)T_L041K6T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L031K6.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L031K(4-6)U_L041K6U/CMakeLists.txt b/variants/STM32L0xx/L031K(4-6)U_L041K6U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L031K(4-6)U_L041K6U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L051C(6-8)(T-U)/CMakeLists.txt b/variants/STM32L0xx/L051C(6-8)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..33078b8a54 --- /dev/null +++ b/variants/STM32L0xx/L051C(6-8)(T-U)/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_RHF76_052.c + variant_generic.cpp + variant_RHF76_052.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L051K(6-8)T/CMakeLists.txt b/variants/STM32L0xx/L051K(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L051K(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L051K(6-8)U/CMakeLists.txt b/variants/STM32L0xx/L051K(6-8)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L051K(6-8)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L051R(6-8)H/CMakeLists.txt b/variants/STM32L0xx/L051R(6-8)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L051R(6-8)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L051R(6-8)T/CMakeLists.txt b/variants/STM32L0xx/L051R(6-8)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L051R(6-8)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L051T(6-8)Y/CMakeLists.txt b/variants/STM32L0xx/L051T(6-8)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L051T(6-8)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/CMakeLists.txt b/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L052C(6-8)(T-U)_L053C(6-8)(T-U)_L062C8U_L063C8(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L052K(6-8)T_L062K8T/CMakeLists.txt b/variants/STM32L0xx/L052K(6-8)T_L062K8T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L052K(6-8)T_L062K8T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L052K(6-8)U_L062K8U/CMakeLists.txt b/variants/STM32L0xx/L052K(6-8)U_L062K8U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L052K(6-8)U_L062K8U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/CMakeLists.txt b/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L052R(6-8)H_L053R(6-8)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/CMakeLists.txt b/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/CMakeLists.txt new file mode 100644 index 0000000000..af8b3fe432 --- /dev/null +++ b/variants/STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L053R8.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/CMakeLists.txt b/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L052T6Y_L052T8(F-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/CMakeLists.txt b/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071C(8-B-Z)(T-U)_L081CBT_L081CZ(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071C(B-Z)Y/CMakeLists.txt b/variants/STM32L0xx/L071C(B-Z)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071C(B-Z)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/CMakeLists.txt b/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071K(8-B-Z)U_L081KZU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071K(B-Z)T_L081KZT/CMakeLists.txt b/variants/STM32L0xx/L071K(B-Z)T_L081KZT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071K(B-Z)T_L081KZT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071R(B-Z)H/CMakeLists.txt b/variants/STM32L0xx/L071R(B-Z)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071R(B-Z)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071R(B-Z)T/CMakeLists.txt b/variants/STM32L0xx/L071R(B-Z)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071R(B-Z)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L071V(8-B-Z)(I-T)/CMakeLists.txt b/variants/STM32L0xx/L071V(8-B-Z)(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L071V(8-B-Z)(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/CMakeLists.txt b/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L072C(B-Z)(T-U)_L073C(B-Z)(T-U)_L082CZU_L083CBT_L083CZ(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/CMakeLists.txt b/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/CMakeLists.txt new file mode 100644 index 0000000000..1ccb744c15 --- /dev/null +++ b/variants/STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_B_L072Z_LRWAN1.c + variant_B_L072Z_LRWAN1.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/CMakeLists.txt b/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/CMakeLists.txt new file mode 100644 index 0000000000..d7a6011631 --- /dev/null +++ b/variants/STM32L0xx/L072K(B-Z)T_L082K(B-Z)T/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_THUNDERPACK_L072.c + variant_generic.cpp + variant_THUNDERPACK_L072.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/CMakeLists.txt b/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L072K(B-Z)U_L082K(B-Z)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/CMakeLists.txt b/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L072R(B-Z)(H-I)_L073RBH_L073RZ(H-I)_L083R(B-Z)H/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/CMakeLists.txt b/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/CMakeLists.txt new file mode 100644 index 0000000000..70db5ce54e --- /dev/null +++ b/variants/STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T/CMakeLists.txt @@ -0,0 +1,36 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_ACSIP_S76S..c + PeripheralPins_PX_HER0.c + variant_ACSIP_S76S.cpp + variant_generic.cpp + variant_NUCLEO_L073RZ.cpp + variant_PX_HER0.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/CMakeLists.txt b/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L0xx/L072V(8-B-Z)(I-T)_L073V(8-B-Z)(I-T)_L083V(8-B-Z)(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/CMakeLists.txt b/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/CMakeLists.txt new file mode 100644 index 0000000000..7b87148f27 --- /dev/null +++ b/variants/STM32L1xx/L100C6Ux(A)_L151C(6-8-B)(T-U)x(A)_L152C(6-8-B)(T-U)x(A)/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_RAK811_TRACKER.c + variant_generic.cpp + variant_RAK811_TRACKER.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/CMakeLists.txt b/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L100R(8-B)Tx(A)_L151R(6-8-B)Tx(A)_L152R(6-8-B)Tx(A)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L100RCT/CMakeLists.txt b/variants/STM32L1xx/L100RCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L100RCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/CMakeLists.txt b/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151CC(T-U)_L152CC(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/CMakeLists.txt b/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151QCH_L152QCH_L162QCH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/CMakeLists.txt b/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151QDH_L152QDH_L162QDH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151QEH_L152QEH/CMakeLists.txt b/variants/STM32L1xx/L151QEH_L152QEH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151QEH_L152QEH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/CMakeLists.txt b/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151R(6-8-B)Hx(A)_L152R(6-8-B)Hx(A)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/CMakeLists.txt b/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151RC(T-Y)x(A)_L151UCY_L152RCTx(A)_L152UCY_L162RCTx(A)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/CMakeLists.txt b/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151RD(T-Y)_L152RD(T-Y)_L162RD(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151RET_L152RET_L162RET/CMakeLists.txt b/variants/STM32L1xx/L151RET_L152RET_L162RET/CMakeLists.txt new file mode 100644 index 0000000000..fa3f4343a7 --- /dev/null +++ b/variants/STM32L1xx/L151RET_L152RET_L162RET/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L152RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/CMakeLists.txt b/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151V(8-B)(H-T)x(A)_L152V(8-B)(H-T)x(A)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/CMakeLists.txt b/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151VC(H-T)x(A)_L152VC(H-T)x(A)_L162VC(H-T)x(A)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/CMakeLists.txt b/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151VD(T-Y)xX_L151VE(T-Y)_L152VDTxX_L152VE(T-Y)_L162VDYxX_L162VE(T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/CMakeLists.txt b/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151VDT_L152VDT_L162VDT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/CMakeLists.txt b/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151ZCT_L152ZCT_L162ZCT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/CMakeLists.txt b/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151ZDT_L152ZDT_L162ZDT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/CMakeLists.txt b/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L1xx/L151ZET_L152ZET_L162ZET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/CMakeLists.txt b/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L412C(8-B)(T-U)_L422CB(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412CB(T-U)xP/CMakeLists.txt b/variants/STM32L4xx/L412CB(T-U)xP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L412CB(T-U)xP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/CMakeLists.txt b/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..33103e8c0b --- /dev/null +++ b/variants/STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L412KB.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/CMakeLists.txt b/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L412R(8-B)(I-T)_L422RB(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt b/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412T(8-B)Y_L422TBY/CMakeLists.txt b/variants/STM32L4xx/L412T(8-B)Y_L422TBY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L412T(8-B)Y_L422TBY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L412TBYxP/CMakeLists.txt b/variants/STM32L4xx/L412TBYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L412TBYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L431C(B-C)(T-U)/CMakeLists.txt b/variants/STM32L4xx/L431C(B-C)(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L431C(B-C)(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L431C(B-C)Y/CMakeLists.txt b/variants/STM32L4xx/L431C(B-C)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L431C(B-C)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L431K(B-C)U/CMakeLists.txt b/variants/STM32L4xx/L431K(B-C)U/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L431K(B-C)U/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L431R(B-C)(I-T-Y)/CMakeLists.txt b/variants/STM32L4xx/L431R(B-C)(I-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L431R(B-C)(I-T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L431VC(I-T)/CMakeLists.txt b/variants/STM32L4xx/L431VC(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L431VC(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L432K(B-C)U_L442KCU/CMakeLists.txt b/variants/STM32L4xx/L432K(B-C)U_L442KCU/CMakeLists.txt new file mode 100644 index 0000000000..4ae56716aa --- /dev/null +++ b/variants/STM32L4xx/L432K(B-C)U_L442KCU/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L432KC.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/CMakeLists.txt b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/CMakeLists.txt b/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L433C(B-C)Y_L443CC(F-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/CMakeLists.txt b/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L433R(B-C)(I-T-Y)_L443RC(I-T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L433RCTxP/CMakeLists.txt b/variants/STM32L4xx/L433RCTxP/CMakeLists.txt new file mode 100644 index 0000000000..ed0f4e85e1 --- /dev/null +++ b/variants/STM32L4xx/L433RCTxP/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L433RC_P.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/CMakeLists.txt b/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L433VC(I-T)_L443VC(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L451CCU_L451CE(T-U)/CMakeLists.txt b/variants/STM32L4xx/L451CCU_L451CE(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L451CCU_L451CE(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L451R(C-E)(I-T-Y)/CMakeLists.txt b/variants/STM32L4xx/L451R(C-E)(I-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L451R(C-E)(I-T-Y)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L451V(C-E)(I-T)/CMakeLists.txt b/variants/STM32L4xx/L451V(C-E)(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L451V(C-E)(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/CMakeLists.txt b/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L452CCU_L452CE(T-U)x(P)_L462CE(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/CMakeLists.txt b/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/CMakeLists.txt new file mode 100644 index 0000000000..0ef499e88b --- /dev/null +++ b/variants/STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)/CMakeLists.txt @@ -0,0 +1,34 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_LEAFONY_AP03.c + variant_generic.cpp + variant_LEAFONY_AP03.cpp + variant_NUCLEO_L452RE.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L452RETxP/CMakeLists.txt b/variants/STM32L4xx/L452RETxP/CMakeLists.txt new file mode 100644 index 0000000000..4b7c8f634a --- /dev/null +++ b/variants/STM32L4xx/L452RETxP/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L452RE_P.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/CMakeLists.txt b/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L452V(C-E)(I-T)_L462VE(I-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L471Q(E-G)I/CMakeLists.txt b/variants/STM32L4xx/L471Q(E-G)I/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L471Q(E-G)I/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L471R(E-G)T/CMakeLists.txt b/variants/STM32L4xx/L471R(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L471R(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L471V(E-G)T/CMakeLists.txt b/variants/STM32L4xx/L471V(E-G)T/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L471V(E-G)T/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L471Z(E-G)(J-T)/CMakeLists.txt b/variants/STM32L4xx/L471Z(E-G)(J-T)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L471Z(E-G)(J-T)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/CMakeLists.txt b/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/CMakeLists.txt new file mode 100644 index 0000000000..3ea5b4f636 --- /dev/null +++ b/variants/STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L476RG.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/CMakeLists.txt b/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/CMakeLists.txt new file mode 100644 index 0000000000..2596e4cf8b --- /dev/null +++ b/variants/STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_B_L475E_IOT01A.c + variant_B_L475E_IOT01A.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/CMakeLists.txt b/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476J(E-G)Y_L485J(C-E)Y_L486JGY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476JGYxP/CMakeLists.txt b/variants/STM32L4xx/L476JGYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476JGYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476M(E-G)Y/CMakeLists.txt b/variants/STM32L4xx/L476M(E-G)Y/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476M(E-G)Y/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/CMakeLists.txt b/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476QEI_L476QGIx(P)_L486QGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476VGYxP/CMakeLists.txt b/variants/STM32L4xx/L476VGYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476VGYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/CMakeLists.txt b/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476ZET_L476ZG(J-T)_L486ZGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L476ZGTxP/CMakeLists.txt b/variants/STM32L4xx/L476ZGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L476ZGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/CMakeLists.txt b/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496A(E-G)I_L4A6AGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/CMakeLists.txt b/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496AGIxP_L4A6AGIxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/CMakeLists.txt b/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496QEI_L496QGIx(S)_L4A6QGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/CMakeLists.txt b/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496QGIxP_L4A6QGIxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/CMakeLists.txt b/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496R(E-G)T_L4A6RGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496RGTxP/CMakeLists.txt b/variants/STM32L4xx/L496RGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496RGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/CMakeLists.txt b/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496V(E-G)T_L4A6VGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/CMakeLists.txt b/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496VGTxP_L4A6VGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496VGY_L4A6VGY/CMakeLists.txt b/variants/STM32L4xx/L496VGY_L4A6VGY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496VGY_L4A6VGY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/CMakeLists.txt b/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496VGYxP_L4A6VGYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496WGYxP/CMakeLists.txt b/variants/STM32L4xx/L496WGYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L496WGYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/CMakeLists.txt b/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/CMakeLists.txt new file mode 100644 index 0000000000..6b73642711 --- /dev/null +++ b/variants/STM32L4xx/L496Z(E-G)T_L4A6ZGT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L496ZG.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/CMakeLists.txt b/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/CMakeLists.txt new file mode 100644 index 0000000000..ec68a833b8 --- /dev/null +++ b/variants/STM32L4xx/L496ZGTxP_L4A6ZGTxP/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L496ZG_P.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4A6RGTxP/CMakeLists.txt b/variants/STM32L4xx/L4A6RGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4A6RGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/CMakeLists.txt b/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5A(G-E)I_L4Q5AGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/CMakeLists.txt b/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5AGIxP_L4Q5AGIxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/CMakeLists.txt b/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5C(E-G)(T-U)_L4Q5CG(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/CMakeLists.txt b/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5CG(T-U)xP_L4Q5CG(T-U)xP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/CMakeLists.txt b/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5Q(G-E)I_L4Q5QGI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/CMakeLists.txt b/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5QGIx(P-S)_L4Q5QGIxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/CMakeLists.txt b/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5R(G-E)T_L4Q5RGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/CMakeLists.txt b/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5RGTxP_L4Q5RGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/CMakeLists.txt b/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5V(G-E)T_L4Q5VGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/CMakeLists.txt b/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5V(G-E)Y_L4Q5VGY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/CMakeLists.txt b/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5VGTxP_L4Q5VGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/CMakeLists.txt b/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5VGYxP_L4Q5VGYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/CMakeLists.txt b/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5Z(G-E)T_L4Q5ZGT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/CMakeLists.txt b/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4P5ZGTxP_L4Q5ZGTxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/CMakeLists.txt b/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4R5AGI_L4R5AIIx(P)_L4R7AII_L4S5AII_L4S7AII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/CMakeLists.txt b/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4R5QGIx(S)_L4R5QIIx(P)_L4S5QII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/CMakeLists.txt b/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/CMakeLists.txt new file mode 100644 index 0000000000..d0c9613eb7 --- /dev/null +++ b/variants/STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_B_L4S5I_IOT01A.c + variant_B_L4S5I_IOT01A.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/CMakeLists.txt b/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/CMakeLists.txt new file mode 100644 index 0000000000..036c48e3a4 --- /dev/null +++ b/variants/STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L4R5ZI.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/CMakeLists.txt b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/CMakeLists.txt new file mode 100644 index 0000000000..7f4796aacf --- /dev/null +++ b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_SWAN_R5.c + variant_generic.cpp + variant_SWAN_R5.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R5ZITxP/CMakeLists.txt b/variants/STM32L4xx/L4R5ZITxP/CMakeLists.txt new file mode 100644 index 0000000000..62f89905cf --- /dev/null +++ b/variants/STM32L4xx/L4R5ZITxP/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L4R5ZI_P.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/CMakeLists.txt b/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4R9A(G-I)I_L4S9AII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/CMakeLists.txt b/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4R9V(G-I)T_L4S9VIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/CMakeLists.txt b/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/CMakeLists.txt new file mode 100644 index 0000000000..390a2c0323 --- /dev/null +++ b/variants/STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_STEVAL_MKSBOX1V1.c + variant_generic.cpp + variant_STEVAL_MKSBOX1V1.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/CMakeLists.txt b/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4R9Z(G-I)T_L4S9ZIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L4xx/L4R9ZIYxP/CMakeLists.txt b/variants/STM32L4xx/L4R9ZIYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L4xx/L4R9ZIYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/CMakeLists.txt b/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552C(C-E)(T-U)_L562CE(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/CMakeLists.txt b/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552CE(T-U)xP_L562CE(T-U)xP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552MEYxP_L562MEYxP/CMakeLists.txt b/variants/STM32L5xx/L552MEYxP_L562MEYxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552MEYxP_L562MEYxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/CMakeLists.txt b/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552MEYxQ_L562MEYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552QEI_L562QEI/CMakeLists.txt b/variants/STM32L5xx/L552QEI_L562QEI/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552QEI_L562QEI/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552QEIxP_L562QEIxP/CMakeLists.txt b/variants/STM32L5xx/L552QEIxP_L562QEIxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552QEIxP_L562QEIxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552R(C-E)T_L562RET/CMakeLists.txt b/variants/STM32L5xx/L552R(C-E)T_L562RET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552R(C-E)T_L562RET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552RETxP_L562RETxP/CMakeLists.txt b/variants/STM32L5xx/L552RETxP_L562RETxP/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552RETxP_L562RETxP/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552RETxQ_L562RETxQ/CMakeLists.txt b/variants/STM32L5xx/L552RETxQ_L562RETxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552RETxQ_L562RETxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/CMakeLists.txt b/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552V(C-E)TxQ_L562VETxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552VET_L562VET/CMakeLists.txt b/variants/STM32L5xx/L552VET_L562VET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552VET_L562VET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/CMakeLists.txt b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/CMakeLists.txt new file mode 100644 index 0000000000..94829e1d3d --- /dev/null +++ b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_L552ZE_Q.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32L5xx/L552ZET_L562ZET/CMakeLists.txt b/variants/STM32L5xx/L552ZET_L562ZET/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32L5xx/L552ZET_L562ZET/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP131AA(E-F-G)_MP131CA(E-F-G)_MP131DA(E-F-G)_MP131FA(E-F-G)/CMakeLists.txt b/variants/STM32MP1xx/MP131AA(E-F-G)_MP131CA(E-F-G)_MP131DA(E-F-G)_MP131FA(E-F-G)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP131AA(E-F-G)_MP131CA(E-F-G)_MP131DA(E-F-G)_MP131FA(E-F-G)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP133AA(E-F-G)_MP133CA(E-F-G)_MP133DA(E-F-G)_MP133FA(E-F-G)_MP135AA(E-F-G)_MP135CA(E-F-G)_MP135DA(E-F-G)_MP135FA(E-F-G)/CMakeLists.txt b/variants/STM32MP1xx/MP133AA(E-F-G)_MP133CA(E-F-G)_MP133DA(E-F-G)_MP133FA(E-F-G)_MP135AA(E-F-G)_MP135CA(E-F-G)_MP135DA(E-F-G)_MP135FA(E-F-G)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP133AA(E-F-G)_MP133CA(E-F-G)_MP133DA(E-F-G)_MP133FA(E-F-G)_MP135AA(E-F-G)_MP135CA(E-F-G)_MP135DA(E-F-G)_MP135FA(E-F-G)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/CMakeLists.txt b/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP151AA(B-D)_MP151CA(B-D)_MP151DA(B-D)_MP151FA(B-D)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/CMakeLists.txt b/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP151AAA_MP151CAA_MP151DAA_MP151FAA/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/CMakeLists.txt b/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP151AAC_MP151CAC_MP151DAC_MP151FAC/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/CMakeLists.txt b/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP153AA(B-D)_MP153CA(B-D)_MP153DA(B-D)_MP153FA(B-D)_MP157AA(B-D)_MP157CA(B-D)_MP157DA(B-D)_MP157FA(B-D)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/CMakeLists.txt b/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32MP1xx/MP153AAA_MP153CAA_MP153DAA_MP153FAA_MP157AAA_MP157CAA_MP157DAA_MP157FAA/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/CMakeLists.txt b/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/CMakeLists.txt new file mode 100644 index 0000000000..a25a9f40e5 --- /dev/null +++ b/variants/STM32MP1xx/MP153AAC_MP153CAC_MP153DAC_MP153FAC_MP157AAC_MP157CAC_MP157DAC_MP157FAC/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_STM32MP157_DK.c + variant_generic.cpp + variant_STM32MP157_DK.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575A(G-I)I_U585AII/CMakeLists.txt b/variants/STM32U5xx/U575A(G-I)I_U585AII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575A(G-I)I_U585AII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/CMakeLists.txt b/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/CMakeLists.txt new file mode 100644 index 0000000000..70ee29e5c4 --- /dev/null +++ b/variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_B_U585I_IOT02A.c + variant_B_U585I_IOT02A.cpp + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/CMakeLists.txt b/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/CMakeLists.txt b/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575C(G-I)(T-U)xQ_U585CI(T-U)xQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575Q(G-I)I_U585QII/CMakeLists.txt b/variants/STM32U5xx/U575Q(G-I)I_U585QII/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575Q(G-I)I_U585QII/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/CMakeLists.txt b/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575Q(G-I)IxQ_U585QIIxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575R(G-I)T_U585RIT/CMakeLists.txt b/variants/STM32U5xx/U575R(G-I)T_U585RIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575R(G-I)T_U585RIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/CMakeLists.txt b/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575R(G-I)TxQ_U585RITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575V(G-I)T_U585VIT/CMakeLists.txt b/variants/STM32U5xx/U575V(G-I)T_U585VIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575V(G-I)T_U585VIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/CMakeLists.txt b/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575V(G-I)TxQ_U585VITxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/CMakeLists.txt b/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U575Z(G-I)T_U585ZIT/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/CMakeLists.txt b/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/CMakeLists.txt new file mode 100644 index 0000000000..4eaea67965 --- /dev/null +++ b/variants/STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_NUCLEO_U575ZI_Q.c + variant_generic.cpp + variant_NUCLEO_U575ZI_Q.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U595ZJTxQ_U5A5ZJTxQ/CMakeLists.txt b/variants/STM32U5xx/U595ZJTxQ_U5A5ZJTxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U595ZJTxQ_U5A5ZJTxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/CMakeLists.txt b/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U599BJYxQ_U5A9BJYxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/CMakeLists.txt b/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32U5xx/U599N(I-J)HxQ_U5A9NJHxQ/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB10CCU/CMakeLists.txt b/variants/STM32WBxx/WB10CCU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB10CCU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB15CCU/CMakeLists.txt b/variants/STM32WBxx/WB15CCU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB15CCU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB15CCUxE/CMakeLists.txt b/variants/STM32WBxx/WB15CCUxE/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB15CCUxE/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB15CCY/CMakeLists.txt b/variants/STM32WBxx/WB15CCY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB15CCY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB1MMCH/CMakeLists.txt b/variants/STM32WBxx/WB1MMCH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB1MMCH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB30CEUxA/CMakeLists.txt b/variants/STM32WBxx/WB30CEUxA/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32WBxx/WB30CEUxA/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32WBxx/WB30CEUxA_WB50CGU/CMakeLists.txt b/variants/STM32WBxx/WB30CEUxA_WB50CGU/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB30CEUxA_WB50CGU/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB35C(C-E)UxA/CMakeLists.txt b/variants/STM32WBxx/WB35C(C-E)UxA/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32WBxx/WB35C(C-E)UxA/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/CMakeLists.txt b/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/CMakeLists.txt new file mode 100644 index 0000000000..793d429479 --- /dev/null +++ b/variants/STM32WBxx/WB35C(C-E)UxA_WB55C(C-E-G)U/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_MKR_SHARKY.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB50CGU/CMakeLists.txt b/variants/STM32WBxx/WB50CGU/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32WBxx/WB50CGU/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32WBxx/WB55C(C-E-G)U/CMakeLists.txt b/variants/STM32WBxx/WB55C(C-E-G)U/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32WBxx/WB55C(C-E-G)U/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32WBxx/WB55R(C-E-G)V/CMakeLists.txt b/variants/STM32WBxx/WB55R(C-E-G)V/CMakeLists.txt new file mode 100644 index 0000000000..d755b0fe67 --- /dev/null +++ b/variants/STM32WBxx/WB55R(C-E-G)V/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_P_NUCLEO_WB55RG.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/CMakeLists.txt b/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WBxx/WB5MMGH/CMakeLists.txt b/variants/STM32WBxx/WB5MMGH/CMakeLists.txt new file mode 100644 index 0000000000..29fa14a7c9 --- /dev/null +++ b/variants/STM32WBxx/WB5MMGH/CMakeLists.txt @@ -0,0 +1,33 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + PeripheralPins_STM32WB5MM_DK.c + variant_generic.cpp + variant_STM32WB5MM_DK.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/CMakeLists.txt b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/CMakeLists.txt new file mode 100644 index 0000000000..02915dde5a --- /dev/null +++ b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_GENERIC_NODE_SE_TTI.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/CMakeLists.txt b/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/CMakeLists.txt new file mode 100644 index 0000000000..d7e31131ba --- /dev/null +++ b/variants/STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I/CMakeLists.txt @@ -0,0 +1,32 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp + variant_NUCLEO_WL55JC1.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/STM32WLxx/WL55UCY_WLE5U(8-B)Y/CMakeLists.txt b/variants/STM32WLxx/WL55UCY_WLE5U(8-B)Y/CMakeLists.txt new file mode 100644 index 0000000000..9a784567af --- /dev/null +++ b/variants/STM32WLxx/WL55UCY_WLE5U(8-B)Y/CMakeLists.txt @@ -0,0 +1,20 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + diff --git a/variants/STM32WLxx/WL5MOCH/CMakeLists.txt b/variants/STM32WLxx/WL5MOCH/CMakeLists.txt new file mode 100644 index 0000000000..2a4d55b6b1 --- /dev/null +++ b/variants/STM32WLxx/WL5MOCH/CMakeLists.txt @@ -0,0 +1,31 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + generic_clock.c + PeripheralPins.c + variant_generic.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) +