From b1f76829168d1aad7286e43e494a7952211db8bf Mon Sep 17 00:00:00 2001 From: MrZloHex Date: Thu, 23 Dec 2021 12:25:30 +0200 Subject: [PATCH 1/7] G070RB --- variants/STM32G0xx/G070RBT6/ldscript.ld | 185 ++++++++++++++++++++++++ 1 file changed, 185 insertions(+) create mode 100644 variants/STM32G0xx/G070RBT6/ldscript.ld diff --git a/variants/STM32G0xx/G070RBT6/ldscript.ld b/variants/STM32G0xx/G070RBT6/ldscript.ld new file mode 100644 index 0000000000..cd436af78e --- /dev/null +++ b/variants/STM32G0xx/G070RBT6/ldscript.ld @@ -0,0 +1,185 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-G070RB Board embedding STM32G070RBTx Device from stm32g0 series +** 128Kbytes FLASH +** 36Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2021 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 36K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From 0ca3374cf933bbafeb9b409c36a9971a9a5823f4 Mon Sep 17 00:00:00 2001 From: MrZloHex Date: Sat, 25 Dec 2021 13:30:15 +0200 Subject: [PATCH 2/7] Add Linker Sxript and Clock setup for G070RB --- variants/STM32G0xx/G070RBT/generic_clock.c | 37 ++++++++++++++++++- .../{G070RBT6 => G070RBT}/ldscript.ld | 6 +-- 2 files changed, 38 insertions(+), 5 deletions(-) rename variants/STM32G0xx/{G070RBT6 => G070RBT}/ldscript.ld (95%) diff --git a/variants/STM32G0xx/G070RBT/generic_clock.c b/variants/STM32G0xx/G070RBT/generic_clock.c index 2268ecd557..7330a583ca 100644 --- a/variants/STM32G0xx/G070RBT/generic_clock.c +++ b/variants/STM32G0xx/G070RBT/generic_clock.c @@ -20,8 +20,41 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; + RCC_OscInitStruct.PLL.PLLN = 8; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32G0xx/G070RBT6/ldscript.ld b/variants/STM32G0xx/G070RBT/ldscript.ld similarity index 95% rename from variants/STM32G0xx/G070RBT6/ldscript.ld rename to variants/STM32G0xx/G070RBT/ldscript.ld index cd436af78e..e5beecbe5c 100644 --- a/variants/STM32G0xx/G070RBT6/ldscript.ld +++ b/variants/STM32G0xx/G070RBT/ldscript.ld @@ -44,8 +44,8 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 36K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET } /* Sections */ @@ -147,7 +147,7 @@ SECTIONS } >RAM AT> FLASH /* Uninitialized data section into "RAM" Ram type memory */ - . = ALIGN(4); + . = ALIGN(4);quest please fi .bss : { /* This is used by the startup in order to initialize the .bss section */ From d17ee621e12397a525bb5014d87a054e900aa643 Mon Sep 17 00:00:00 2001 From: MrZloHex Date: Sat, 25 Dec 2021 13:37:36 +0200 Subject: [PATCH 3/7] Add board specification to board.txt --- boards.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/boards.txt b/boards.txt index 15dd539735..7261562c08 100644 --- a/boards.txt +++ b/boards.txt @@ -349,6 +349,19 @@ Nucleo_64.menu.pnum.NUCLEO_F446RE.build.product_line=STM32F446xx Nucleo_64.menu.pnum.NUCLEO_F446RE.build.variant=STM32F4xx/F446R(C-E)T Nucleo_64.menu.pnum.NUCLEO_F446RE.build.cmsis_lib_gcc=arm_cortexM4lf_math +# NUCLEO_G070RB board +Nucleo_64.menu.pnum.NUCLEO_G070RB=Nucleo G070RB +Nucleo_64.menu.pnum.NUCLEO_G070RB.node=NODE_G070RB +Nucleo_64.menu.pnum.NUCLEO_G070RB.upload.maximum_size=131072 +Nucleo_64.menu.pnum.NUCLEO_G070RB.upload.maximum_data_size=36864 +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.mcu=cortex-m0plus +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.board=NUCLEO_G070RB +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.series=STM32G0xx +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.product_line=STM32G070xx +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.variant=STM32G0xx/G070RBT +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.cmsis_lib_gcc=arm_cortexM0l_math +Nucleo_64.menu.pnum.NUCLEO_G070RB.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0 + # NUCLEO_G071RB board Nucleo_64.menu.pnum.NUCLEO_G071RB=Nucleo G071RB Nucleo_64.menu.pnum.NUCLEO_G071RB.node=NODE_G071RB From 138c329a79b400bf107cae7b39843e02cc686bf9 Mon Sep 17 00:00:00 2001 From: MrZloHex Date: Sat, 25 Dec 2021 13:41:42 +0200 Subject: [PATCH 4/7] Update README --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 496fe0c2d2..f876c3d3f9 100644 --- a/README.md +++ b/README.md @@ -111,6 +111,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F401RE | [Nucleo F401RE](http://www.st.com/en/evaluation-tools/nucleo-f401re.html) | *0.2.1* | | | :green_heart: | STM32F411RE | [Nucleo F411RE](http://www.st.com/en/evaluation-tools/nucleo-f411re.html) | *0.2.1* | | | :green_heart: | STM32F446RE | [Nucleo F446RE](http://www.st.com/en/evaluation-tools/nucleo-f446re.html) | *1.1.1* | | +| :yellow_heart: | STM32G070RB | [Nucleo G070RB](https://www.st.com/en/evaluation-tools/nucleo-g070rb.html) | *0.1.0* | | | :green_heart: | STM32G071RB | [Nucleo G071RB](https://www.st.com/en/evaluation-tools/nucleo-g071rb.html) | *1.6.0* | | | :green_heart: | STM32G0B1RE | [Nucleo G0B1RE](https://www.st.com/en/evaluation-tools/nucleo-g0b1re.html) | *2.1.0* | | | :green_heart: | STM32G431RB | [Nucleo G431RB](https://www.st.com/en/evaluation-tools/nucleo-g431rb.html) | *1.7.0* | | From df4db78fdc724466d56df78aaa26f5b7fb363844 Mon Sep 17 00:00:00 2001 From: MrZloHex Date: Sat, 25 Dec 2021 16:34:13 +0200 Subject: [PATCH 5/7] Fixing linker script --- README.md | 2 +- boards.txt | 21 ++++++++------------- variants/STM32G0xx/G070RBT/ldscript.ld | 2 +- 3 files changed, 10 insertions(+), 15 deletions(-) diff --git a/README.md b/README.md index f876c3d3f9..251b88ede5 100644 --- a/README.md +++ b/README.md @@ -111,7 +111,6 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F401RE | [Nucleo F401RE](http://www.st.com/en/evaluation-tools/nucleo-f401re.html) | *0.2.1* | | | :green_heart: | STM32F411RE | [Nucleo F411RE](http://www.st.com/en/evaluation-tools/nucleo-f411re.html) | *0.2.1* | | | :green_heart: | STM32F446RE | [Nucleo F446RE](http://www.st.com/en/evaluation-tools/nucleo-f446re.html) | *1.1.1* | | -| :yellow_heart: | STM32G070RB | [Nucleo G070RB](https://www.st.com/en/evaluation-tools/nucleo-g070rb.html) | *0.1.0* | | | :green_heart: | STM32G071RB | [Nucleo G071RB](https://www.st.com/en/evaluation-tools/nucleo-g071rb.html) | *1.6.0* | | | :green_heart: | STM32G0B1RE | [Nucleo G0B1RE](https://www.st.com/en/evaluation-tools/nucleo-g0b1re.html) | *2.1.0* | | | :green_heart: | STM32G431RB | [Nucleo G431RB](https://www.st.com/en/evaluation-tools/nucleo-g431rb.html) | *1.7.0* | | @@ -302,6 +301,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32G031K4
STM32G031K6
STM32G031K8 | Generic Board | *2.0.0* | | | :green_heart: | STM32G041J6 | Generic Board | *2.0.0* | | | :green_heart: | STM32G041K6
STM32G041K8 | Generic Board | *2.0.0* | | +| :green_heart: | STM32G070RB | Generic Board | *0.1.0* | | | :green_heart: | STM32G071R6
STM32G071R8
STM32G071RB | Generic Board | *2.0.0* | | | :green_heart: | STM32G081RB | Generic Board | *2.0.0* | | | :green_heart: | STM32G0B1RB
STM32G0B1RC
STM32G0B1RE | Generic Board | *2.1.0* | | diff --git a/boards.txt b/boards.txt index 7261562c08..b22bfd63c3 100644 --- a/boards.txt +++ b/boards.txt @@ -349,19 +349,6 @@ Nucleo_64.menu.pnum.NUCLEO_F446RE.build.product_line=STM32F446xx Nucleo_64.menu.pnum.NUCLEO_F446RE.build.variant=STM32F4xx/F446R(C-E)T Nucleo_64.menu.pnum.NUCLEO_F446RE.build.cmsis_lib_gcc=arm_cortexM4lf_math -# NUCLEO_G070RB board -Nucleo_64.menu.pnum.NUCLEO_G070RB=Nucleo G070RB -Nucleo_64.menu.pnum.NUCLEO_G070RB.node=NODE_G070RB -Nucleo_64.menu.pnum.NUCLEO_G070RB.upload.maximum_size=131072 -Nucleo_64.menu.pnum.NUCLEO_G070RB.upload.maximum_data_size=36864 -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.mcu=cortex-m0plus -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.board=NUCLEO_G070RB -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.series=STM32G0xx -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.product_line=STM32G070xx -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.variant=STM32G0xx/G070RBT -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.cmsis_lib_gcc=arm_cortexM0l_math -Nucleo_64.menu.pnum.NUCLEO_G070RB.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0 - # NUCLEO_G071RB board Nucleo_64.menu.pnum.NUCLEO_G071RB=Nucleo G071RB Nucleo_64.menu.pnum.NUCLEO_G071RB.node=NODE_G071RB @@ -3347,6 +3334,14 @@ GenG0.menu.pnum.GENERIC_G041K8UX.build.board=GENERIC_G041K8UX GenG0.menu.pnum.GENERIC_G041K8UX.build.product_line=STM32G041xx GenG0.menu.pnum.GENERIC_G041K8UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) +# Generic G070RBTx +GenG0.menu.pnum.GENERIC_G070RBTX=Generic G070RBTx +GenG0.menu.pnum.GENERIC_G070RBTX.upload.maximum_size=131072 +GenG0.menu.pnum.GENERIC_G070RBTX.upload.maximum_data_size=36864 +GenG0.menu.pnum.GENERIC_G070RBTX.build.board=GENERIC_G070RBTX +GenG0.menu.pnum.GENERIC_G070RBTX.build.product_line=STM32G070xx +GenG0.menu.pnum.GENERIC_G070RBTX.build.variant=STM32G0xx/G070RBT + # Generic G071R6Tx GenG0.menu.pnum.GENERIC_G071R6TX=Generic G071R6Tx GenG0.menu.pnum.GENERIC_G071R6TX.upload.maximum_size=32768 diff --git a/variants/STM32G0xx/G070RBT/ldscript.ld b/variants/STM32G0xx/G070RBT/ldscript.ld index e5beecbe5c..9fe55590e2 100644 --- a/variants/STM32G0xx/G070RBT/ldscript.ld +++ b/variants/STM32G0xx/G070RBT/ldscript.ld @@ -147,7 +147,7 @@ SECTIONS } >RAM AT> FLASH /* Uninitialized data section into "RAM" Ram type memory */ - . = ALIGN(4);quest please fi + . = ALIGN(4); .bss : { /* This is used by the startup in order to initialize the .bss section */ From 46bdcfb4a8fe3f85e5ad319ad1042b5d4c3ce32a Mon Sep 17 00:00:00 2001 From: MrZlo Date: Tue, 4 Jan 2022 18:30:49 +0200 Subject: [PATCH 6/7] Update README.md Co-authored-by: Alexandre Bourdiol <50730894+ABOSTM@users.noreply.github.com> --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 251b88ede5..7c4e3cfc2a 100644 --- a/README.md +++ b/README.md @@ -301,7 +301,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32G031K4
STM32G031K6
STM32G031K8 | Generic Board | *2.0.0* | | | :green_heart: | STM32G041J6 | Generic Board | *2.0.0* | | | :green_heart: | STM32G041K6
STM32G041K8 | Generic Board | *2.0.0* | | -| :green_heart: | STM32G070RB | Generic Board | *0.1.0* | | +| :yellow_heart: | STM32G070RB | Generic Board | **2.3.0** | | | :green_heart: | STM32G071R6
STM32G071R8
STM32G071RB | Generic Board | *2.0.0* | | | :green_heart: | STM32G081RB | Generic Board | *2.0.0* | | | :green_heart: | STM32G0B1RB
STM32G0B1RC
STM32G0B1RE | Generic Board | *2.1.0* | | From b01eee0385e1c02b57a90ddb5f99e9656ea64d55 Mon Sep 17 00:00:00 2001 From: MrZlo Date: Tue, 4 Jan 2022 18:31:12 +0200 Subject: [PATCH 7/7] Update variants/STM32G0xx/G070RBT/generic_clock.c Co-authored-by: Alexandre Bourdiol <50730894+ABOSTM@users.noreply.github.com> --- variants/STM32G0xx/G070RBT/generic_clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/STM32G0xx/G070RBT/generic_clock.c b/variants/STM32G0xx/G070RBT/generic_clock.c index 7330a583ca..6a86b77311 100644 --- a/variants/STM32G0xx/G070RBT/generic_clock.c +++ b/variants/STM32G0xx/G070RBT/generic_clock.c @@ -20,8 +20,8 @@ */ WEAK void SystemClock_Config(void) { - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; /** Configure the main internal regulator output voltage */