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knielsenknielsen
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Post-review corrections for NUCLEO-F302R8 support
 - Correct f_cpu in boards.txt - Enable some TIM17 pins. - Revert back to HSI for clock (NUCLEO_F302R8 has no external HSE source by default). Signed-off-by: Kristian Nielsen <[email protected]>
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Diff for: ‎boards.txt

+3-3
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ Nucleo_64.menu.pnum.NUCLEO_F091RC.node=NODE_F091RC
9494
Nucleo_64.menu.pnum.NUCLEO_F091RC.upload.maximum_size=262144
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Nucleo_64.menu.pnum.NUCLEO_F091RC.upload.maximum_data_size=32768
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Nucleo_64.menu.pnum.NUCLEO_F091RC.build.mcu=cortex-m0
97-
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.f_cpu=8000000L
97+
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.f_cpu=48000000L
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Nucleo_64.menu.pnum.NUCLEO_F091RC.build.board=NUCLEO_F091RC
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Nucleo_64.menu.pnum.NUCLEO_F091RC.build.series=STM32F0xx
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Nucleo_64.menu.pnum.NUCLEO_F091RC.build.product_line=STM32F091xC
@@ -122,7 +122,7 @@ Nucleo_64.menu.pnum.NUCLEO_F302R8.node=NODE_F302R8
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Nucleo_64.menu.pnum.NUCLEO_F302R8.upload.maximum_size=65536
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Nucleo_64.menu.pnum.NUCLEO_F302R8.upload.maximum_data_size=16384
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Nucleo_64.menu.pnum.NUCLEO_F302R8.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
125-
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.f_cpu=7200000L
125+
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.f_cpu=72000000L
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Nucleo_64.menu.pnum.NUCLEO_F302R8.build.board=NUCLEO_F302R8
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Nucleo_64.menu.pnum.NUCLEO_F302R8.build.series=STM32F3xx
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Nucleo_64.menu.pnum.NUCLEO_F302R8.build.product_line=STM32F302x8
@@ -136,7 +136,7 @@ Nucleo_64.menu.pnum.NUCLEO_F303RE.node=NODE_F303RE
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Nucleo_64.menu.pnum.NUCLEO_F303RE.upload.maximum_size=524288
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Nucleo_64.menu.pnum.NUCLEO_F303RE.upload.maximum_data_size=65536
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Nucleo_64.menu.pnum.NUCLEO_F303RE.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
139-
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.f_cpu=8000000L
139+
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.f_cpu=72000000L
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Nucleo_64.menu.pnum.NUCLEO_F303RE.build.board=NUCLEO_F303RE
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Nucleo_64.menu.pnum.NUCLEO_F303RE.build.series=STM32F3xx
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Nucleo_64.menu.pnum.NUCLEO_F303RE.build.product_line=STM32F303xE

Diff for: ‎variants/NUCLEO_F302R8/PeripheralPins.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ const PinMap PinMap_PWM[] = {
110110
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - STLink Rx
111111
// {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
112112
{PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
113-
// {PA_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
113+
{PA_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
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// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N
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{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 0)}, // TIM1_CH1
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{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 0)}, // TIM1_CH2
@@ -127,11 +127,11 @@ const PinMap PinMap_PWM[] = {
127127
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N
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// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
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{PB_4, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
130-
// {PB_5, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM17, 1, 0)}, // TIM17_CH1
130+
{PB_5, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM17, 1, 0)}, // TIM17_CH1
131131
{PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
132-
// {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
132+
{PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
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{PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
134-
// {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
134+
{PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
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// {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
136136
// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
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// {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N

Diff for: ‎variants/NUCLEO_F302R8/variant.cpp

+3-5
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,7 @@ extern "C" {
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/**
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* @brief System Clock Configuration
105105
* The system Clock is configured as follows :
106-
* System Clock source = PLL (HSE)
106+
* System Clock source = PLL (HSI)
107107
* SYSCLK(Hz) = 72000000
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* HCLK(Hz) = 72000000
109109
* AHB Prescaler = 1
@@ -120,13 +120,11 @@ WEAK void SystemClock_Config(void)
120120
RCC_ClkInitTypeDef RCC_ClkInitStruct;
121121

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/**Initializes the CPU, AHB and APB busses clocks */
123-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE;
124-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
125-
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
123+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
126124
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
127125
RCC_OscInitStruct.HSICalibrationValue = 16;
128126
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
129-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
127+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
131129
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{

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