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variant(H5): add NUCLEO-H563ZI support
Signed-off-by: Frederic Pillon <[email protected]>
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Diff for: ‎README.md

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@@ -95,6 +95,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32F767ZI | [Nucleo F767ZI](http://www.st.com/en/evaluation-tools/nucleo-f767zi.html) | *1.4.0* | |
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| :green_heart: | STM32F746ZG | [Nucleo F746ZG](https://www.st.com/en/evaluation-tools/nucleo-f746zg.html) | *1.9.0* | |
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| :green_heart: | STM32F756ZG | [Nucleo F756ZG](https://www.st.com/en/evaluation-tools/nucleo-f756zg.html) | *1.9.0* | |
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| :yellow_heart: | STM32H563ZI | [Nucleo H563ZI](https://www.st.com/en/evaluation-tools/nucleo-h563zi.html) | **2.6.0** | |
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| :green_heart: | STM32H723ZG | [Nucleo H723ZG](https://www.st.com/en/evaluation-tools/nucleo-h723zg.html) | *2.4.0* | |
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| :green_heart: | STM32H743ZI | [Nucleo H743ZI(2)](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html) | *1.5.0* | Nucleo H743ZI2 since 1.6.0 |
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| :green_heart: | STM32L496ZG | [Nucleo L496ZG](http://www.st.com/en/evaluation-tools/nucleo-l496zg.html) | *1.3.0* | |

Diff for: ‎boards.txt

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@@ -138,6 +138,20 @@ Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.product_line=STM32F767xx
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Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.variant=STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT
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Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
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# NUCLEO H563ZI
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Nucleo_144.menu.pnum.NUCLEO_H563ZI=Nucleo H563ZI
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.node=NOD_H563ZI
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.upload.maximum_size=2097152
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.upload.maximum_data_size=655360
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.mcu=cortex-m33
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.fpu=-mfpu=fpv4-sp-d16
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.float-abi=-mfloat-abi=hard
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.board=NUCLEO_H563ZI
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.series=STM32H5xx
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.product_line=STM32H563xx
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.variant=STM32H5xx/H563Z(G-I)T_H573ZIT
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Nucleo_144.menu.pnum.NUCLEO_H563ZI.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math
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# NUCLEO H723ZG board
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Nucleo_144.menu.pnum.NUCLEO_H723ZG=Nucleo H723ZG
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Nucleo_144.menu.pnum.NUCLEO_H723ZG.node=NODE_H723ZG

Diff for: ‎variants/STM32H5xx/H563Z(G-I)T_H573ZIT/variant_NUCLEO_H563ZI.cpp

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/*
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*******************************************************************************
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* Copyright (c) 2020, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#if defined(ARDUINO_NUCLEO_H563ZI)
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#include "pins_arduino.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PB_7, // D0
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PB_6, // D1
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PG_14, // D2
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PE_13, // D3
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PE_14, // D4
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PE_11, // D5
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PE_9, // D6
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PG_12, // D7
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PF_3, // D8
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PD_15, // D9
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PD_14, // D10
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PB_5, // D11
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PG_9, // D12
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PA_5, // D13/A9
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PB_9, // D14
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PB_8, // D15
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PC_6, // D16
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PB_15, // D17
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PB_13, // D18
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PB_12, // D19
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PA_15, // D20
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PC_7, // D21
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PB_5, // D22
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PB_3, // D23
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PG_10, // D24
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PB_4, // D25
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PG_6, // D26
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PB_2, // D27
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PD_13, // D28
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PD_12, // D29
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PD_11, // D30
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PE_2, // D31
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PA_0, // D32/A10
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PB_0, // D33/A11
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PE_0, // D34
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PA_3, // D35/A12
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PB_10, // D36
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PE_15, // D37
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PE_6, // D38
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PE_12, // D39
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PE_10, // D40
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PE_7, // D41
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PE_8, // D42
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PC_8, // D43
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PC_9, // D44
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PC_10, // D45
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PC_11, // D46
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PC_12, // D47
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PD_2, // D48
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PG_2, // D49
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PG_3, // D50
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PD_7, // D51
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PD_6, // D52
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PD_5, // D53
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PD_4, // D54
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PD_3, // D55
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PE_2, // D56
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PE_4, // D57
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PE_5, // D58
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PE_6, // D59
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PE_3, // D60
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PF_8, // D61
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PF_7, // D62
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PF_9, // D63
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PG_1, // D64
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PG_0, // D65
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PD_1, // D66
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PD_0, // D67
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PF_0, // D68
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PF_1, // D69
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PF_2, // D70
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PE_9, // D71
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PB_2, // D72
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PA_6, // D73/A0
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PC_0, // D74/A1
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PC_3, // D75/A2
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PB_1, // D76/A3
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PC_2, // D77/A4
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PF_11, // D78/A5
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PF_12, // D79/A6
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PF_13, // D80/A7
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PF_14, // D81/A8
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PA_1, // D82/A13
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PA_2, // D83/A14
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PA_4, // D84/A15
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PA_7, // D85/A16
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PA_8, // D86
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PA_9, // D87
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PA_10, // D88
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PA_11, // D89
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PA_12, // D90
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PA_13, // D91
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PA_14, // D92
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PB_14, // D93
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PC_1, // D94/A17
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PC_4, // D95/A18
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PC_5, // D96/A19
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PC_13, // D97
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PC_14, // D98
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PC_15, // D99
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PD_8, // D100
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PD_9, // D101
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PD_10, // D102
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PF_4, // D103
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PF_5, // D104
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PF_6, // D105
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PF_10, // D106
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PF_15, // D107
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PG_4, // D108
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PG_5, // D109
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PG_7, // D110
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PG_8, // D111
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PG_11, // D112
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PG_13, // D113
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PG_15, // D114
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PH_0, // D115
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PH_1 // D116
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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73, // A0, PA6
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74, // A1, PC0
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75, // A2, PC3
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76, // A3, PB1
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77, // A4, PC2
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78, // A5, PF11
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79, // A6, PF12
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80, // A7, PF13
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81, // A8, PF14
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13, // A9, PA5
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32, // A10, PA0
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33, // A11, PB0
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35, // A12, PA3
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82, // A13, PA1
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83, // A14, PA2
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84, // A15, PA4
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85, // A16, PA7
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94, // A17, PC1
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95, // A18, PC4
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96 // A19, PC5
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief System Clock Configuration
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* @param None
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* @retval None
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*/
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WEAK void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
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| RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DIGITAL;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 4;
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RCC_OscInitStruct.PLL.PLLN = 250;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
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| RCC_CLOCKTYPE_PCLK3;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the peripherals clock
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*/
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
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| RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_SDMMC1
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| RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HCLK;
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PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
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PeriphClkInitStruct.PLL2.PLL2M = 2;
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PeriphClkInitStruct.PLL2.PLL2N = 128;
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PeriphClkInitStruct.PLL2.PLL2P = 2;
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PeriphClkInitStruct.PLL2.PLL2Q = 16;
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PeriphClkInitStruct.PLL2.PLL2R = 2;
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PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
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PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
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PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
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PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ;
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PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
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PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_HCLK;
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PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
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PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_HSE;
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PeriphClkInitStruct.PLL3.PLL3M = 2;
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PeriphClkInitStruct.PLL3.PLL3N = 96;
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PeriphClkInitStruct.PLL3.PLL3P = 2;
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PeriphClkInitStruct.PLL3.PLL3Q = 8;
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PeriphClkInitStruct.PLL3.PLL3R = 2;
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PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_0;
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PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_MEDIUM;
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PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
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PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3Q;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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Error_Handler();
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}
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}
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif /* ARDUINO_NUCLEO_H563ZI */

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