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Merge pull request #1900 from Subtle-Puneet-Shrivas/main
Added Nucleo-WB15CC
2 parents 294ace5 + 6ccf2cd commit ca4beb4

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Diff for: ‎README.md

+2
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
128128
| :green_heart: | STM32L452RE | [Nucleo L452RE](http://www.st.com/en/evaluation-tools/nucleo-l452re.html) | *1.5.0* | |
129129
| :green_heart: | STM32L452RE-P | [Nucleo L452RE-P](http://www.st.com/en/evaluation-tools/nucleo-l452re-p.html) | *1.8.0* | |
130130
| :green_heart: | STM32L476RG | [Nucleo L476RG](http://www.st.com/en/evaluation-tools/nucleo-l476rg.html) | *0.1.0* | |
131+
| :yellow_heart: | STM32WB15CCU | [Nucleo-WB15CC](https://www.st.com/en/evaluation-tools/nucleo-wb15cc.html) | **2.5.0** | |
131132
| :green_heart: | STM32WB55RG<br>STM32WB55CG | [P-Nucleo-WB55RG](https://www.st.com/en/evaluation-tools/p-nucleo-wb55.html) | *1.6.0* | BLE support with [STM32duinoBLE](https://github.com/stm32duino/STM32duinoBLE) |
132133
| :green_heart: | STM32WL55JC | [Nucleo WL55JC1](https://www.st.com/en/evaluation-tools/nucleo-wl55jc.html) | *2.1.0* | LoRa support not available |
133134

@@ -661,6 +662,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
661662

662663
| Status | Device(s) | Name | Release | Notes |
663664
| :----: | :-------: | ---- | :-----: | :---- |
665+
| :yellow_heart: | STM32WB15CCU | Generic Board | **2.5.0** | |
664666
| :green_heart: | STM32WB55CC<br>STM32WB55CE<br>STM32WB55CG | Generic Board | *2.0.0* | |
665667
| :green_heart: | STM32WB5MMG | Generic Board | *2.1.0* | |
666668
| :green_heart: | STM32WB55RC<br>STM32WB55RE<br>STM32WB55RG | Generic Board | *2.0.0* | |

Diff for: ‎boards.txt

+22
Original file line numberDiff line numberDiff line change
@@ -586,6 +586,20 @@ Nucleo_64.menu.pnum.NUCLEO_L476RG.build.product_line=STM32L476xx
586586
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.variant=STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT
587587
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.cmsis_lib_gcc=arm_cortexM4lf_math
588588

589+
# NUCLEO_WB15CC
590+
Nucleo_64.menu.pnum.NUCLEO_WB15CC=Nucleo WB15CC
591+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.node="NOD_WB15CC"
592+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.upload.maximum_size=131072
593+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.upload.maximum_data_size=12288
594+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.mcu=cortex-m4
595+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.fpu=-mfpu=fpv4-sp-d16
596+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.float-abi=-mfloat-abi=hard
597+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.board=NUCLEO_WB15CC
598+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.series=STM32WBxx
599+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.product_line=STM32WB15xx
600+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.variant=STM32WBxx/WB15CCU
601+
Nucleo_64.menu.pnum.NUCLEO_WB15CC.build.cmsis_lib_gcc=arm_cortexM4lf_math
602+
589603
# P_NUCLEO_WB55RG board
590604
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG=P-Nucleo WB55RG
591605
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.node="NODE_WB55RG,NOD_WB55RG"
@@ -9532,6 +9546,14 @@ GenWB.build.cmsis_lib_gcc=arm_cortexM4lf_math
95329546
GenWB.upload.maximum_size=0
95339547
GenWB.upload.maximum_data_size=0
95349548

9549+
# Generic WB15CCUx
9550+
GenWB.menu.pnum.GENERIC_WB15CCUX=Generic WB15CCUx
9551+
GenWB.menu.pnum.GENERIC_WB15CCUX.upload.maximum_size=131072
9552+
GenWB.menu.pnum.GENERIC_WB15CCUX.upload.maximum_data_size=12288
9553+
GenWB.menu.pnum.GENERIC_WB15CCUX.build.board=GENERIC_WB15CCUX
9554+
GenWB.menu.pnum.GENERIC_WB15CCUX.build.product_line=STM32WB15xx
9555+
GenWB.menu.pnum.GENERIC_WB15CCUX.build.variant=STM32WBxx/WB15CCU
9556+
95359557
# Generic WB55CCUx
95369558
GenWB.menu.pnum.GENERIC_WB55CCUX=Generic WB55CCUx
95379559
GenWB.menu.pnum.GENERIC_WB55CCUX.upload.maximum_size=131072

Diff for: ‎cores/arduino/stm32/timer.h

+3-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ extern "C" {
4747
#elif defined (TIM10_BASE)
4848
#define TIM1_IRQHandler TIM1_UP_TIM10_IRQHandler
4949
#endif
50-
#elif defined(STM32F3xx) || defined(STM32L4xx) || defined(STM32WBxx)
50+
#elif (defined(STM32F3xx) || defined(STM32L4xx) || defined(STM32WBxx)) &&\
51+
defined(TIM16_BASE)
5152
#define TIM1_IRQn TIM1_UP_TIM16_IRQn
5253
#define TIM1_IRQHandler TIM1_UP_TIM16_IRQHandler
5354
#elif defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32F7xx)
@@ -59,7 +60,7 @@ extern "C" {
5960
#define TIM1_IRQHandler TIM1_UP_TIM10_IRQHandler
6061
#endif
6162
#elif defined(STM32H7xx) || defined(STM32L5xx) || defined(STM32MP1xx) ||\
62-
defined(STM32U5xx) || defined(STM32WLxx)
63+
defined(STM32U5xx) || defined(STM32WBxx) || defined(STM32WLxx)
6364
#define TIM1_IRQn TIM1_UP_IRQn
6465
#define TIM1_IRQHandler TIM1_UP_IRQHandler
6566
#endif

Diff for: ‎libraries/SrcWrapper/src/stm32/analog.cpp

+5-4
Original file line numberDiff line numberDiff line change
@@ -860,7 +860,7 @@ uint16_t adc_read_value(PinName pin, uint32_t resolution)
860860
#if !defined(STM32F1xx) && !defined(STM32F2xx) && !defined(STM32F3xx) && \
861861
!defined(STM32F4xx) && !defined(STM32F7xx) && !defined(STM32G4xx) && \
862862
!defined(STM32H7xx) && !defined(STM32L4xx) && !defined(STM32L5xx) && \
863-
!defined(STM32MP1xx) && !defined(STM32WBxx)
863+
!defined(STM32MP1xx) && !defined(STM32WBxx) || defined(ADC_SUPPORT_2_5_MSPS)
864864
AdcHandle.Init.LowPowerAutoPowerOff = DISABLE; /* ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered */
865865
#endif
866866
#ifdef ADC_CHANNELS_BANK_B
@@ -874,7 +874,7 @@ uint16_t adc_read_value(PinName pin, uint32_t resolution)
874874
#endif
875875
AdcHandle.Init.DiscontinuousConvMode = DISABLE; /* Parameter discarded because sequencer is disabled */
876876
#if !defined(STM32F0xx) && !defined(STM32G0xx) && !defined(STM32L0xx) && \
877-
!defined(STM32WLxx)
877+
!defined(STM32WLxx) && !defined(ADC_SUPPORT_2_5_MSPS)
878878
AdcHandle.Init.NbrOfDiscConversion = 0; /* Parameter discarded because sequencer is disabled */
879879
#endif
880880
AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; /* Software start to trig the 1st conversion manually, without external event */
@@ -898,7 +898,8 @@ uint16_t adc_read_value(PinName pin, uint32_t resolution)
898898
#if defined(STM32F0xx)
899899
AdcHandle.Init.SamplingTimeCommon = samplingTime;
900900
#endif
901-
#if defined(STM32G0xx) || defined(STM32U5xx) || defined(STM32WLxx)
901+
#if defined(STM32G0xx) || defined(STM32U5xx) || defined(STM32WLxx) || \
902+
defined(ADC_SUPPORT_2_5_MSPS)
902903
AdcHandle.Init.SamplingTimeCommon1 = samplingTime; /* Set sampling time common to a group of channels. */
903904
AdcHandle.Init.SamplingTimeCommon2 = samplingTime; /* Set sampling time common to a group of channels, second common setting possible.*/
904905
#endif
@@ -908,7 +909,7 @@ uint16_t adc_read_value(PinName pin, uint32_t resolution)
908909
#endif
909910
#if !defined(STM32F0xx) && !defined(STM32F1xx) && !defined(STM32F2xx) && \
910911
!defined(STM32F3xx) && !defined(STM32F4xx) && !defined(STM32F7xx) && \
911-
!defined(STM32L1xx)
912+
!defined(STM32L1xx) && !defined(ADC_SUPPORT_2_5_MSPS)
912913
AdcHandle.Init.OversamplingMode = DISABLE;
913914
/* AdcHandle.Init.Oversample ignore for STM32L0xx as oversampling disabled */
914915
/* AdcHandle.Init.Oversampling ignored for other as oversampling disabled */

Diff for: ‎variants/STM32WBxx/WB15CCU/generic_clock.c

+55-2
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
*/
1313
#if defined(ARDUINO_GENERIC_WB15CCUX)
1414
#include "pins_arduino.h"
15+
#include "lock_resource.h"
1516

1617
/**
1718
* @brief System Clock Configuration
@@ -20,8 +21,60 @@
2021
*/
2122
WEAK void SystemClock_Config(void)
2223
{
23-
/* SystemClock_Config can be generated by STM32CubeMX */
24-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
25+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
26+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
27+
28+
/* This prevents concurrent access to RCC registers by CPU2 (M0+) */
29+
hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
30+
31+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI1
32+
| RCC_OSCILLATORTYPE_MSI;
33+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
34+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
35+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
36+
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
37+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_10;
38+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
39+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
40+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
41+
Error_Handler();
42+
}
43+
44+
/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
45+
*/
46+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2
47+
| RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
48+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
49+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
50+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
51+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
52+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
53+
RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
54+
RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
55+
56+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
57+
Error_Handler();
58+
}
59+
60+
/** Initializes the peripherals clock
61+
*/
62+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS;
63+
PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI;
64+
PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
65+
66+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
67+
Error_Handler();
68+
}
69+
70+
LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
71+
LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
72+
LL_PWR_SMPS_Enable();
73+
74+
/* Select HSI as system clock source after Wake Up from Stop mode */
75+
LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
76+
77+
hsem_unlock(CFG_HW_RCC_SEMID);
2578
}
2679

2780
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32WBxx/WB15CCU/ldscript.ld

+183
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,183 @@
1+
/*
2+
******************************************************************************
3+
**
4+
** File : LinkerScript.ld
5+
**
6+
** Author : STM32CubeIDE
7+
**
8+
** Abstract : Linker script for STM32WB15xC Device
9+
** 320Kbytes FLASH
10+
** 48Kbytes RAM
11+
**
12+
** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
15+
** Set memory bank area and size if external memory is used.
16+
**
17+
** Target : STMicroelectronics STM32
18+
**
19+
** Distribution: The file is distributed as is without any warranty
20+
** of any kind.
21+
**
22+
*****************************************************************************
23+
** @attention
24+
**
25+
** Copyright (c) 2022 STMicroelectronics.
26+
** All rights reserved.
27+
**
28+
** This software is licensed under terms that can be found in the LICENSE file
29+
** in the root directory of this software component.
30+
** If no LICENSE file comes with this software, it is provided AS-IS.
31+
**
32+
*****************************************************************************
33+
*/
34+
35+
/* Entry Point */
36+
ENTRY(Reset_Handler)
37+
38+
/* Highest address of the user mode stack */
39+
_estack = ORIGIN(RAM1) + LENGTH(RAM1); /* end of RAM1 */
40+
/* Generate a link error if heap and stack don't fit into RAM */
41+
_Min_Heap_Size = 0x200; /* required amount of heap */
42+
_Min_Stack_Size = 0x400; /* required amount of stack */
43+
44+
/* Specify the memory areas */
45+
MEMORY
46+
{
47+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
48+
RAM1 (xrw) : ORIGIN = 0x20000004, LENGTH = LD_MAX_DATA_SIZE - 4
49+
RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
50+
}
51+
52+
/* Define output sections */
53+
SECTIONS
54+
{
55+
/* The startup code goes first into FLASH */
56+
.isr_vector :
57+
{
58+
. = ALIGN(4);
59+
KEEP(*(.isr_vector)) /* Startup code */
60+
. = ALIGN(4);
61+
} >FLASH
62+
63+
/* The program code and other data goes into FLASH */
64+
.text :
65+
{
66+
. = ALIGN(4);
67+
*(.text) /* .text sections (code) */
68+
*(.text*) /* .text* sections (code) */
69+
*(.glue_7) /* glue arm to thumb code */
70+
*(.glue_7t) /* glue thumb to arm code */
71+
*(.eh_frame)
72+
73+
KEEP (*(.init))
74+
KEEP (*(.fini))
75+
76+
. = ALIGN(4);
77+
_etext = .; /* define a global symbols at end of code */
78+
} >FLASH
79+
80+
/* Constant data goes into FLASH */
81+
.rodata :
82+
{
83+
. = ALIGN(4);
84+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
85+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
86+
. = ALIGN(4);
87+
} >FLASH
88+
89+
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
90+
.ARM : {
91+
__exidx_start = .;
92+
*(.ARM.exidx*)
93+
__exidx_end = .;
94+
} >FLASH
95+
96+
.preinit_array :
97+
{
98+
PROVIDE_HIDDEN (__preinit_array_start = .);
99+
KEEP (*(.preinit_array*))
100+
PROVIDE_HIDDEN (__preinit_array_end = .);
101+
} >FLASH
102+
.init_array :
103+
{
104+
PROVIDE_HIDDEN (__init_array_start = .);
105+
KEEP (*(SORT(.init_array.*)))
106+
KEEP (*(.init_array*))
107+
PROVIDE_HIDDEN (__init_array_end = .);
108+
} >FLASH
109+
.fini_array :
110+
{
111+
PROVIDE_HIDDEN (__fini_array_start = .);
112+
KEEP (*(SORT(.fini_array.*)))
113+
KEEP (*(.fini_array*))
114+
PROVIDE_HIDDEN (__fini_array_end = .);
115+
} >FLASH
116+
117+
/* used by the startup to initialize data */
118+
_sidata = LOADADDR(.data);
119+
120+
/* Initialized data sections goes into RAM, load LMA copy after code */
121+
.data :
122+
{
123+
. = ALIGN(4);
124+
_sdata = .; /* create a global symbol at data start */
125+
*(.data) /* .data sections */
126+
*(.data*) /* .data* sections */
127+
*(.RamFunc) /* .RamFunc sections */
128+
*(.RamFunc*) /* .RamFunc* sections */
129+
130+
. = ALIGN(4);
131+
_edata = .; /* define a global symbol at data end */
132+
} >RAM1 AT> FLASH
133+
134+
/* Uninitialized data section */
135+
. = ALIGN(4);
136+
.bss :
137+
{
138+
/* This is used by the startup in order to initialize the .bss section */
139+
_sbss = .; /* define a global symbol at bss start */
140+
__bss_start__ = _sbss;
141+
*(.bss)
142+
*(.bss*)
143+
*(COMMON)
144+
145+
. = ALIGN(4);
146+
_ebss = .; /* define a global symbol at bss end */
147+
__bss_end__ = _ebss;
148+
} >RAM1
149+
150+
/* User_heap_stack section, used to check that there is enough RAM left */
151+
._user_heap_stack :
152+
{
153+
. = ALIGN(8);
154+
PROVIDE ( end = . );
155+
PROVIDE ( _end = . );
156+
. = . + _Min_Heap_Size;
157+
. = . + _Min_Stack_Size;
158+
. = ALIGN(8);
159+
} >RAM1
160+
161+
/* Remove information from the standard libraries */
162+
/DISCARD/ :
163+
{
164+
libc.a ( * )
165+
libm.a ( * )
166+
libgcc.a ( * )
167+
}
168+
169+
.ARM.attributes 0 : { *(.ARM.attributes) }
170+
MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
171+
MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
172+
173+
/* used by the startup to initialize .MB_MEM2 data */
174+
_siMB_MEM2 = LOADADDR(.MB_MEM2);
175+
.MB_MEM2 :
176+
{
177+
_sMB_MEM2 = . ;
178+
*(.MB_MEM2) ;
179+
_eMB_MEM2 = . ;
180+
} >RAM_SHARED AT> FLASH
181+
}
182+
183+

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