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variant(H5): add generic generic H503RBTx support
Signed-off-by: dojyorin <[email protected]> Co-authored-by: Frederic Pillon <[email protected]>
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‎README.md

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@@ -521,6 +521,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| Status | Device(s) | Name | Release | Notes |
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| :----: | :-------: | ---- | :-----: | :---- |
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| :yellow_heart: | STM32H503RB | Generic Board | **2.7.0** | |
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| :green_heart: | STM32H563IIKxQ | Generic Board | *2.6.0* | |
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| :green_heart: | STM32H563ZG<br>STM32H563ZI | Generic Board | *2.6.0* | |
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| :green_heart: | STM32H573IIKxQ | Generic Board | *2.6.0* | |

‎boards.txt

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@@ -7204,6 +7204,14 @@ GenH5.build.flash_offset=0x0
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GenH5.upload.maximum_size=0
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GenH5.upload.maximum_data_size=0
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# Generic H503RBTx
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GenH5.menu.pnum.GENERIC_H503RBTX=Generic H503RBTx
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GenH5.menu.pnum.GENERIC_H503RBTX.upload.maximum_size=131072
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GenH5.menu.pnum.GENERIC_H503RBTX.upload.maximum_data_size=32768
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GenH5.menu.pnum.GENERIC_H503RBTX.build.board=GENERIC_H503RBTX
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GenH5.menu.pnum.GENERIC_H503RBTX.build.product_line=STM32H503xx
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GenH5.menu.pnum.GENERIC_H503RBTX.build.variant=STM32H5xx/H503RBT
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# Generic H563IIKxQ
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GenH5.menu.pnum.GENERIC_H563IIKXQ=Generic H563IIKxQ
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GenH5.menu.pnum.GENERIC_H563IIKXQ.upload.maximum_size=2097152

‎variants/STM32H5xx/H503RBT/generic_clock.c

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@@ -20,8 +20,55 @@
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*/
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WEAK void SystemClock_Config(void)
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{
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/* SystemClock_Config can be generated by STM32CubeMX */
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#warning "SystemClock_Config() is empty. Default clock at reset is used."
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
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/* Configure the main internal regulator output voltage */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/* Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_CSI;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.CSIState = RCC_CSI_ON;
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RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 125;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/* Initializes the CPU, AHB and APB buses clocks */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
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| RCC_CLOCKTYPE_PCLK3;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
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Error_Handler();
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}
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/* Initializes the peripherals clock */
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_CSI;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
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Error_Handler();
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}
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}
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#endif /* ARDUINO_GENERIC_* */

‎variants/STM32H5xx/H503RBT/ldscript.ld

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/*
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******************************************************************************
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**
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** @file : LinkerScript.ld
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**
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** @author : Auto-generated by STM32CubeIDE
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**
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** @brief : Linker script for STM32H503RBTx Device from STM32H5 series
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** 128Kbytes FLASH
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** 32Kbytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
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** @attention
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**
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** Copyright (c) 2021 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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******************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Memories definition */
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MEMORY {
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
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FLASH ( rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
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}
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/* Sections */
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SECTIONS {
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/* The startup code into "FLASH" Rom type memory */
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.isr_vector : {
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} > FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text : {
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP(*(.init))
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KEEP(*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} > FLASH
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/* Constant data into "FLASH" Rom type memory */
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.rodata : {
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} > FLASH
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.ARM.extab : {
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. = ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(4);
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} > FLASH
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.ARM : {
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. = ALIGN(4);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(4);
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} > FLASH
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.preinit_array : {
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. = ALIGN(4);
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PROVIDE_HIDDEN(__preinit_array_start = .);
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KEEP(*(.preinit_array*))
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PROVIDE_HIDDEN(__preinit_array_end = .);
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. = ALIGN(4);
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} > FLASH
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.init_array : {
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. = ALIGN(4);
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PROVIDE_HIDDEN(__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array*))
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PROVIDE_HIDDEN(__init_array_end = .);
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. = ALIGN(4);
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} > FLASH
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.fini_array : {
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. = ALIGN(4);
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PROVIDE_HIDDEN(__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array*))
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PROVIDE_HIDDEN(__fini_array_end = .);
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. = ALIGN(4);
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} > FLASH
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/* Used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections into "RAM" Ram type memory */
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.data : {
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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*(.RamFunc) /* .RamFunc sections */
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*(.RamFunc*) /* .RamFunc* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} > RAM AT > FLASH
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/* Uninitialized data section into "RAM" Ram type memory */
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. = ALIGN(4);
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.bss : {
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/* This is used by the startup in order to initialize the .bss section */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} > RAM
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/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
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._user_heap_stack : {
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. = ALIGN(8);
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PROVIDE(end = .);
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PROVIDE(_end = .);
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} > RAM
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/* Remove information from the compiler libraries */
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/DISCARD/ : {
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libc.a (*)
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libm.a (*)
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libgcc.a (*)
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}
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.ARM.attributes 0 : {
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*(.ARM.attributes)
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}
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}

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