Skip to content

Commit c73c1cb

Browse files
committed
feat: add support of generic variant STM32L431Rx
Signed-off-by: Alexandre Bourdiol <[email protected]>
1 parent 706265f commit c73c1cb

File tree

4 files changed

+279
-3
lines changed

4 files changed

+279
-3
lines changed

README.md

+1
Original file line numberDiff line numberDiff line change
@@ -407,6 +407,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
407407
| Status | Device(s) | Name | Release | Notes |
408408
| :----: | :-------: | ---- | :-----: | :---- |
409409
| :green_heart: | STM32L412K8<br>STM32L412KB<br>STM32L422KB | Generic Board | *2.0.0* | |
410+
| :yellow_heart: | STM32L431RB<br>STM32L431RC | Generic Board | **2.3.0** | |
410411
| :green_heart: | STM32L432KB<br>STM32L432KC<br>STM32L442KC | Generic Board | *2.0.0* | |
411412
| :green_heart: | STM32L433CBT<br>STM32L433CCT | Generic Board | *2.1.0* | |
412413
| :green_heart: | STM32L433CBU<br>STM32L433CCU | Generic Board | *2.1.0* | |

boards.txt

+49-1
Original file line numberDiff line numberDiff line change
@@ -4954,6 +4954,54 @@ GenL4.menu.pnum.GENERIC_L422KBUX.build.board=GENERIC_L422KBUX
49544954
GenL4.menu.pnum.GENERIC_L422KBUX.build.product_line=STM32L422xx
49554955
GenL4.menu.pnum.GENERIC_L422KBUX.build.variant=STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)
49564956

4957+
# Generic L431RBIx
4958+
GenL4.menu.pnum.GENERIC_L431RBIX=Generic L431RBIx
4959+
GenL4.menu.pnum.GENERIC_L431RBIX.upload.maximum_size=131072
4960+
GenL4.menu.pnum.GENERIC_L431RBIX.upload.maximum_data_size=65536
4961+
GenL4.menu.pnum.GENERIC_L431RBIX.build.board=GENERIC_L431RBIX
4962+
GenL4.menu.pnum.GENERIC_L431RBIX.build.product_line=STM32L431xx
4963+
GenL4.menu.pnum.GENERIC_L431RBIX.build.variant=STM32L4xx/L431R(B-C)(I-T-Y)
4964+
4965+
# Generic L431RCIx
4966+
GenL4.menu.pnum.GENERIC_L431RCIX=Generic L431RCIx
4967+
GenL4.menu.pnum.GENERIC_L431RCIX.upload.maximum_size=262144
4968+
GenL4.menu.pnum.GENERIC_L431RCIX.upload.maximum_data_size=65536
4969+
GenL4.menu.pnum.GENERIC_L431RCIX.build.board=GENERIC_L431RCIX
4970+
GenL4.menu.pnum.GENERIC_L431RCIX.build.product_line=STM32L431xx
4971+
GenL4.menu.pnum.GENERIC_L431RCIX.build.variant=STM32L4xx/L431R(B-C)(I-T-Y)
4972+
4973+
# Generic L431RBTx
4974+
GenL4.menu.pnum.GENERIC_L431RBTX=Generic L431RBTx
4975+
GenL4.menu.pnum.GENERIC_L431RBTX.upload.maximum_size=131072
4976+
GenL4.menu.pnum.GENERIC_L431RBTX.upload.maximum_data_size=65536
4977+
GenL4.menu.pnum.GENERIC_L431RBTX.build.board=GENERIC_L431RBTX
4978+
GenL4.menu.pnum.GENERIC_L431RBTX.build.product_line=STM32L431xx
4979+
GenL4.menu.pnum.GENERIC_L431RBTX.build.variant=STM32L4xx/L431R(B-C)(I-T-Y)
4980+
4981+
# Generic L431RCTx
4982+
GenL4.menu.pnum.GENERIC_L431RCTX=Generic L431RCTx
4983+
GenL4.menu.pnum.GENERIC_L431RCTX.upload.maximum_size=262144
4984+
GenL4.menu.pnum.GENERIC_L431RCTX.upload.maximum_data_size=65536
4985+
GenL4.menu.pnum.GENERIC_L431RCTX.build.board=GENERIC_L431RCTX
4986+
GenL4.menu.pnum.GENERIC_L431RCTX.build.product_line=STM32L431xx
4987+
GenL4.menu.pnum.GENERIC_L431RCTX.build.variant=STM32L4xx/L431R(B-C)(I-T-Y)
4988+
4989+
# Generic L431RBYx
4990+
GenL4.menu.pnum.GENERIC_L431RBYX=Generic L431RBYx
4991+
GenL4.menu.pnum.GENERIC_L431RBYX.upload.maximum_size=131072
4992+
GenL4.menu.pnum.GENERIC_L431RBYX.upload.maximum_data_size=65536
4993+
GenL4.menu.pnum.GENERIC_L431RBYX.build.board=GENERIC_L431RBYX
4994+
GenL4.menu.pnum.GENERIC_L431RBYX.build.product_line=STM32L431xx
4995+
GenL4.menu.pnum.GENERIC_L431RBYX.build.variant=STM32L4xx/L431R(B-C)(I-T-Y)
4996+
4997+
# Generic L431RCYx
4998+
GenL4.menu.pnum.GENERIC_L431RCYX=Generic L431RCYx
4999+
GenL4.menu.pnum.GENERIC_L431RCYX.upload.maximum_size=262144
5000+
GenL4.menu.pnum.GENERIC_L431RCYX.upload.maximum_data_size=65536
5001+
GenL4.menu.pnum.GENERIC_L431RCYX.build.board=GENERIC_L431RCYX
5002+
GenL4.menu.pnum.GENERIC_L431RCYX.build.product_line=STM32L431xx
5003+
GenL4.menu.pnum.GENERIC_L431RCYX.build.variant=STM32L4xx/L431R(B-C)(I-T-Y)
5004+
49575005
# Generic L432KBUx
49585006
GenL4.menu.pnum.GENERIC_L432KBUX=Generic L432KBUx
49595007
GenL4.menu.pnum.GENERIC_L432KBUX.upload.maximum_size=131072
@@ -7967,4 +8015,4 @@ Midatronics.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_f
79678015
Midatronics.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
79688016
Midatronics.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
79698017
Midatronics.menu.rtlib.full=Newlib Standard
7970-
Midatronics.menu.rtlib.full.build.flags.ldspecs=
8018+
Midatronics.menu.rtlib.full.build.flags.ldspecs=

variants/STM32L4xx/L431R(B-C)(I-T-Y)/generic_clock.c

+42-2
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,48 @@
2222
*/
2323
WEAK void SystemClock_Config(void)
2424
{
25-
/* SystemClock_Config can be generated by STM32CubeMX */
26-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
25+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
26+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
27+
28+
/** Configure the main internal regulator output voltage
29+
*/
30+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
31+
{
32+
Error_Handler();
33+
}
34+
35+
/** Initializes the RCC Oscillators according to the specified parameters
36+
* in the RCC_OscInitTypeDef structure.
37+
*/
38+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
39+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
40+
RCC_OscInitStruct.MSICalibrationValue = 0;
41+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
42+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
43+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
44+
RCC_OscInitStruct.PLL.PLLM = 1;
45+
RCC_OscInitStruct.PLL.PLLN = 40;
46+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
47+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
48+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
49+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
50+
{
51+
Error_Handler();
52+
}
53+
54+
/** Initializes the CPU, AHB and APB buses clocks
55+
*/
56+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
57+
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
58+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
59+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
60+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
61+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
62+
63+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
64+
{
65+
Error_Handler();
66+
}
2767
}
2868

2969
#endif /* ARDUINO_GENERIC_* */
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,187 @@
1+
/*
2+
******************************************************************************
3+
**
4+
** @file : LinkerScript.ld
5+
**
6+
** @author : Auto-generated by STM32CubeIDE
7+
**
8+
** @brief : Linker script for STM32L431RCTx Device from STM32L4 series
9+
** 256Kbytes FLASH
10+
** 64Kbytes RAM
11+
** 16Kbytes RAM2
12+
**
13+
** Set heap size, stack size and stack location according
14+
** to application requirements.
15+
**
16+
** Set memory bank area and size if external memory is used
17+
**
18+
** Target : STMicroelectronics STM32
19+
**
20+
** Distribution: The file is distributed as is, without any warranty
21+
** of any kind.
22+
**
23+
******************************************************************************
24+
** @attention
25+
**
26+
** Copyright (c) 2022 STMicroelectronics.
27+
** All rights reserved.
28+
**
29+
** This software is licensed under terms that can be found in the LICENSE file
30+
** in the root directory of this software component.
31+
** If no LICENSE file comes with this software, it is provided AS-IS.
32+
**
33+
******************************************************************************
34+
*/
35+
36+
/* Entry Point */
37+
ENTRY(Reset_Handler)
38+
39+
/* Highest address of the user mode stack */
40+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
41+
42+
_Min_Heap_Size = 0x200 ; /* required amount of heap */
43+
_Min_Stack_Size = 0x400 ; /* required amount of stack */
44+
45+
/* Memories definition */
46+
MEMORY
47+
{
48+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
49+
RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
50+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
51+
}
52+
53+
/* Sections */
54+
SECTIONS
55+
{
56+
/* The startup code into "FLASH" Rom type memory */
57+
.isr_vector :
58+
{
59+
. = ALIGN(4);
60+
KEEP(*(.isr_vector)) /* Startup code */
61+
. = ALIGN(4);
62+
} >FLASH
63+
64+
/* The program code and other data into "FLASH" Rom type memory */
65+
.text :
66+
{
67+
. = ALIGN(4);
68+
*(.text) /* .text sections (code) */
69+
*(.text*) /* .text* sections (code) */
70+
*(.glue_7) /* glue arm to thumb code */
71+
*(.glue_7t) /* glue thumb to arm code */
72+
*(.eh_frame)
73+
74+
KEEP (*(.init))
75+
KEEP (*(.fini))
76+
77+
. = ALIGN(4);
78+
_etext = .; /* define a global symbols at end of code */
79+
} >FLASH
80+
81+
/* Constant data into "FLASH" Rom type memory */
82+
.rodata :
83+
{
84+
. = ALIGN(4);
85+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
86+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
87+
. = ALIGN(4);
88+
} >FLASH
89+
90+
.ARM.extab : {
91+
. = ALIGN(4);
92+
*(.ARM.extab* .gnu.linkonce.armextab.*)
93+
. = ALIGN(4);
94+
} >FLASH
95+
96+
.ARM : {
97+
. = ALIGN(4);
98+
__exidx_start = .;
99+
*(.ARM.exidx*)
100+
__exidx_end = .;
101+
. = ALIGN(4);
102+
} >FLASH
103+
104+
.preinit_array :
105+
{
106+
. = ALIGN(4);
107+
PROVIDE_HIDDEN (__preinit_array_start = .);
108+
KEEP (*(.preinit_array*))
109+
PROVIDE_HIDDEN (__preinit_array_end = .);
110+
. = ALIGN(4);
111+
} >FLASH
112+
113+
.init_array :
114+
{
115+
. = ALIGN(4);
116+
PROVIDE_HIDDEN (__init_array_start = .);
117+
KEEP (*(SORT(.init_array.*)))
118+
KEEP (*(.init_array*))
119+
PROVIDE_HIDDEN (__init_array_end = .);
120+
. = ALIGN(4);
121+
} >FLASH
122+
123+
.fini_array :
124+
{
125+
. = ALIGN(4);
126+
PROVIDE_HIDDEN (__fini_array_start = .);
127+
KEEP (*(SORT(.fini_array.*)))
128+
KEEP (*(.fini_array*))
129+
PROVIDE_HIDDEN (__fini_array_end = .);
130+
. = ALIGN(4);
131+
} >FLASH
132+
133+
/* Used by the startup to initialize data */
134+
_sidata = LOADADDR(.data);
135+
136+
/* Initialized data sections into "RAM" Ram type memory */
137+
.data :
138+
{
139+
. = ALIGN(4);
140+
_sdata = .; /* create a global symbol at data start */
141+
*(.data) /* .data sections */
142+
*(.data*) /* .data* sections */
143+
*(.RamFunc) /* .RamFunc sections */
144+
*(.RamFunc*) /* .RamFunc* sections */
145+
146+
. = ALIGN(4);
147+
_edata = .; /* define a global symbol at data end */
148+
149+
} >RAM AT> FLASH
150+
151+
/* Uninitialized data section into "RAM" Ram type memory */
152+
. = ALIGN(4);
153+
.bss :
154+
{
155+
/* This is used by the startup in order to initialize the .bss section */
156+
_sbss = .; /* define a global symbol at bss start */
157+
__bss_start__ = _sbss;
158+
*(.bss)
159+
*(.bss*)
160+
*(COMMON)
161+
162+
. = ALIGN(4);
163+
_ebss = .; /* define a global symbol at bss end */
164+
__bss_end__ = _ebss;
165+
} >RAM
166+
167+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
168+
._user_heap_stack :
169+
{
170+
. = ALIGN(8);
171+
PROVIDE ( end = . );
172+
PROVIDE ( _end = . );
173+
. = . + _Min_Heap_Size;
174+
. = . + _Min_Stack_Size;
175+
. = ALIGN(8);
176+
} >RAM
177+
178+
/* Remove information from the compiler libraries */
179+
/DISCARD/ :
180+
{
181+
libc.a ( * )
182+
libm.a ( * )
183+
libgcc.a ( * )
184+
}
185+
186+
.ARM.attributes 0 : { *(.ARM.attributes) }
187+
}

0 commit comments

Comments
 (0)