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fpistmfpistm
authoredAug 1, 2018
Merge pull request #285 from fpistm/NUCLEO-L4R5ZI
Add Nucleo-L4R5ZI and Nucleo-L4R5ZI-P support
·
2.10.11.4.0
2 parents ef2529d + 0f425f9 commit ba0b439

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‎README.md

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@@ -68,6 +68,10 @@ For advanced user, you can use the repository: see the [Using git repository](ht
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* [B-L475E-IOT01A](http://www.st.com/en/evaluation-tools/b-l475e-iot01a.html)
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### Next release
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* STM32L4
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* [Nucleo L4R5ZI](http://www.st.com/en/evaluation-tools/nucleo-l4r5zi.html)
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* [NUCLEO-L4R5ZI](http://www.st.com/en/evaluation-tools/nucleo-l4r5zi-p.html)
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## Troubleshooting

‎boards.txt

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@@ -73,6 +73,30 @@ Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.product_line=STM32L496xx
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Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.variant=NUCLEO_L496ZG
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Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.cmsis_lib_gcc=arm_cortexM4l_math
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# NUCLEO_L4R5ZI board
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI=Nucleo L4R5ZI
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.node=NODE_L4R5ZI
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.upload.maximum_size=2097152
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.upload.maximum_data_size=655360
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.board=NUCLEO_L4R5ZI
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.series=STM32L4xx
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.product_line=STM32L4R5xx
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.variant=NUCLEO_L4R5ZI
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.cmsis_lib_gcc=arm_cortexM4l_math
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# NUCLEO_L4R5ZI-P board
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P=Nucleo L4R5ZI-P
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.node=NODE_L4R5ZI
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.upload.maximum_size=2097152
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.upload.maximum_data_size=655360
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.build.board=NUCLEO_L4R5ZI_P
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.build.series=STM32L4xx
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.build.product_line=STM32L4R5xx
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.build.variant=NUCLEO_L4R5ZI
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Nucleo_144.menu.pnum.NUCLEO_L4R5ZI-P.build.cmsis_lib_gcc=arm_cortexM4l_math
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# Upload menu
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Nucleo_144.menu.upload_method.MassStorage=Mass Storage
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Nucleo_144.menu.upload_method.MassStorage.upload.protocol=

‎variants/NUCLEO_L4R5ZI/PeripheralPins.c

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‎variants/NUCLEO_L4R5ZI/PinNamesVar.h

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/* SYS_WKUP */
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#ifdef PWR_WAKEUP_PIN1
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SYS_WKUP1 = PA_0,
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#endif
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#ifdef PWR_WAKEUP_PIN2
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SYS_WKUP2 = PC_13,
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#endif
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#ifdef PWR_WAKEUP_PIN3
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SYS_WKUP3 = PE_6,
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#endif
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#ifdef PWR_WAKEUP_PIN4
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SYS_WKUP4 = PA_2,
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#endif
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#ifdef PWR_WAKEUP_PIN5
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SYS_WKUP5 = PC_5,
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#endif
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#ifdef PWR_WAKEUP_PIN6
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SYS_WKUP6 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN7
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SYS_WKUP7 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN8
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SYS_WKUP8 = NC,
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#endif

‎variants/NUCLEO_L4R5ZI/ldscript.ld

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/*
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*****************************************************************************
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**
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** File : LinkerScript.ld
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**
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** Abstract : Linker script for STM32L4R5ZITx Device with
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** 2048KByte FLASH, 640KByte RAM
9+
**
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** Set heap size, stack size and stack location according
11+
** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
16+
**
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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** (c)Copyright Ac6.
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** You may use this file as-is or modify it according to the needs of your
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** project. Distribution of this file (unmodified or modified) is not
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** permitted. Ac6 permit registered System Workbench for MCU users the
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** rights to distribute the assembled, compiled & linked contents of this
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** file as part of an application binary file, provided that it is built
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** using the System Workbench for MCU toolchain.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x200A0000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(8);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(8);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(8);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(8);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(8);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(8);
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} >FLASH
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.ARM.extab :
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{
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. = ALIGN(8);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(8);
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} >FLASH
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.ARM : {
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. = ALIGN(8);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(8);
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} >FLASH
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.preinit_array :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(8);
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} >FLASH
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.init_array :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(8);
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} >FLASH
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.fini_array :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(8);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(8);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(8);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
161+
{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >RAM
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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‎variants/NUCLEO_L4R5ZI/stm32l4xx_hal_conf.h

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‎variants/NUCLEO_L4R5ZI/variant.cpp

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/*
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*******************************************************************************
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* Copyright (c) 2018, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
13+
* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
15+
* may be used to endorse or promote products derived from this software
16+
* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27+
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28+
*******************************************************************************
29+
*/
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31+
#include "variant.h"
32+
33+
#ifdef __cplusplus
34+
extern "C" {
35+
#endif
36+
37+
// Pin number
38+
// Match Table 11. NUCLEO-L4R5ZI, NUCLEO-L4R5ZI-P pin assignments
39+
// from UM2179 STM32 Nucleo-144 board
40+
const PinName digitalPin[] = {
41+
PD_9, //D0
42+
PD_8, //D1
43+
PF_15, //D2
44+
PE_13, //D3
45+
PF_14, //D4
46+
PE_11, //D5
47+
PE_9, //D6
48+
PF_13, //D7
49+
PF_12, //D8
50+
PD_15, //D9
51+
PD_14, //D10
52+
PA_7, //D11
53+
PA_6, //D12
54+
PA_5, //D13
55+
PB_9, //D14
56+
PB_8, //D15
57+
PC_6, //D16
58+
PB_15, //D17
59+
PB_13, //D18
60+
PB_12, //D19
61+
PA_4, //D20
62+
PB_4, //D21
63+
PB_5, //D22
64+
PB_3, //D23
65+
PA_4, //D24
66+
PB_4, //D25
67+
PA_2, //D26
68+
PB_10, //D27
69+
PE_15, //D28
70+
PB_0, //D29
71+
PE_12, //D30
72+
PE_14, //D31
73+
PA_0, //D32
74+
PB_0, //D33
75+
PE_0, //D34
76+
#ifdef ARDUINO_NUCLEO_L4R5ZI
77+
PB_11, //D35
78+
#else
79+
NC, //D35
80+
#endif
81+
PB_10, //D36
82+
PE_15, //D37
83+
PE_14, //D38
84+
PE_12, //D39
85+
PE_10, //D40
86+
PE_7, //D41
87+
PE_8, //D42
88+
PC_8, //D43
89+
PC_9, //D44
90+
PC_10, //D45
91+
PC_11, //D46
92+
PC_12, //D47
93+
PD_2, //D48
94+
PF_3, //D49
95+
PF_5, //D50
96+
PD_7, //D51
97+
PD_6, //D52
98+
PD_5, //D53
99+
PD_4, //D54
100+
PD_3, //D55
101+
PE_2, //D56
102+
PE_4, //D57
103+
PE_5, //D58
104+
PE_6, //D59
105+
PE_3, //D60
106+
PF_8, //D61
107+
PF_7, //D62
108+
PF_9, //D63
109+
PG_1, //D64
110+
PG_0, //D65
111+
PD_1, //D66
112+
PD_0, //D67
113+
PF_0, //D68
114+
PF_1, //D69
115+
PF_2, //D70
116+
PB_6, //D71
117+
PB_2, //D72
118+
// ST Morpho
119+
PA_8, //D73
120+
PA_9, //D74
121+
PA_10, //D75
122+
PA_11, //D76
123+
PA_12, //D77
124+
PA_15, //D78
125+
PB_7, //D79 - LEDBLUE
126+
PB_14, //D80 - LEDRED
127+
PC_7, //D81 - LEDGREEN
128+
PC_13, //D82 - USERBTN
129+
PC_14, //D83
130+
PC_15, //D84
131+
PD_10, //D85
132+
PD_11, //D86
133+
PD_12, //D87
134+
PD_13, //D88
135+
PE_1, //D89
136+
PF_10, //D90
137+
PF_11, //D91
138+
PG_2, //D92
139+
PG_3, //D93
140+
PG_4, //D94
141+
PG_5, //D95
142+
PG_6, //D96
143+
PG_7, //D97 - Serial Tx
144+
PG_8, //D98 - Serial Rx
145+
PG_9, //D99
146+
PG_10, //D100
147+
PG_11, //D101
148+
PG_12, //D102
149+
PG_13, //D103
150+
PG_14, //D104
151+
PH_0, //D105
152+
PH_1, //D106
153+
// Analog pins
154+
PA_3, //D107/A0
155+
PC_0, //D108/A1
156+
PC_3, //D109/A2
157+
PC_1, //D110/A3
158+
PC_4, //D111/A4
159+
PC_5, //D112/A5
160+
PB_1, //D113/A6
161+
PC_2, //D114/A7
162+
PA_1, //D115/A8
163+
// Duplicated pins in order to be aligned with PinMapADC
164+
PA_7, //D116/A9 = D11
165+
PA_6, //D117/A10 = D12
166+
PA_5, //D118/A11 = D13
167+
PA_4, //D119/A12 = D20
168+
PA_2, //D120/A13 = D26
169+
PB_0, //D121/A14 = D29
170+
PA_0, //D122/A15 = D32
171+
#ifdef ARDUINO_NUCLEO_L4R5ZI
172+
PG_15 //D123
173+
#endif
174+
};
175+
176+
#ifdef __cplusplus
177+
}
178+
#endif
179+
180+
// ----------------------------------------------------------------------------
181+
182+
#ifdef __cplusplus
183+
extern "C" {
184+
#endif
185+
186+
/**
187+
* @brief System Clock Configuration
188+
* The system Clock is configured as follow :
189+
* System Clock source = PLL (MSI)
190+
* SYSCLK(Hz) = 120000000
191+
* HCLK(Hz) = 120000000
192+
* AHB Prescaler = 1
193+
* APB1 Prescaler = 2
194+
* APB2 Prescaler = 1
195+
* PLL_M = 1
196+
* PLL_N = 60
197+
* PLL_P = 2
198+
* PLL_Q = 2
199+
* PLL_R = 2
200+
* VDD(V) = 3.3
201+
* Main regulator output voltage = Scale1 mode
202+
* Flash Latency(WS) = 5
203+
* @param None
204+
* @retval None
205+
*/
206+
WEAK void SystemClock_Config(void)
207+
{
208+
RCC_OscInitTypeDef RCC_OscInitStruct;
209+
RCC_ClkInitTypeDef RCC_ClkInitStruct;
210+
RCC_PeriphCLKInitTypeDef PeriphClkInit;
211+
212+
/**Configure the main internal regulator output voltage
213+
*/
214+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK)
215+
{
216+
_Error_Handler(__FILE__, __LINE__);
217+
}
218+
219+
/**Configure LSE Drive Capability
220+
*/
221+
HAL_PWR_EnableBkUpAccess();
222+
223+
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
224+
225+
/**Initializes the CPU, AHB and APB busses clocks
226+
*/
227+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
228+
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
229+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
230+
RCC_OscInitStruct.MSICalibrationValue = 0;
231+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
232+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
233+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
234+
RCC_OscInitStruct.PLL.PLLM = 1;
235+
RCC_OscInitStruct.PLL.PLLN = 60;
236+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
237+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
238+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
239+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
240+
{
241+
_Error_Handler(__FILE__, __LINE__);
242+
}
243+
244+
/**Initializes the CPU, AHB and APB busses clocks
245+
*/
246+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
247+
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
248+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
249+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
250+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
251+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
252+
253+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
254+
{
255+
_Error_Handler(__FILE__, __LINE__);
256+
}
257+
258+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_USB;
259+
PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
260+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
261+
PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
262+
PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
263+
PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
264+
PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV2;
265+
PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
266+
PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
267+
PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
268+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
269+
{
270+
_Error_Handler(__FILE__, __LINE__);
271+
}
272+
273+
/**Configure the Systick interrupt time
274+
*/
275+
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
276+
277+
/**Configure the Systick
278+
*/
279+
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
280+
281+
/**Enable MSI Auto calibration
282+
*/
283+
HAL_RCCEx_EnableMSIPLLMode();
284+
285+
/* SysTick_IRQn interrupt configuration */
286+
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
287+
}
288+
289+
#ifdef __cplusplus
290+
}
291+
#endif

‎variants/NUCLEO_L4R5ZI/variant.h

+252
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,252 @@
1+
/*
2+
*******************************************************************************
3+
* Copyright (c) 2018, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* Redistribution and use in source and binary forms, with or without
7+
* modification, are permitted provided that the following conditions are met:
8+
*
9+
* 1. Redistributions of source code must retain the above copyright notice,
10+
* this list of conditions and the following disclaimer.
11+
* 2. Redistributions in binary form must reproduce the above copyright notice,
12+
* this list of conditions and the following disclaimer in the documentation
13+
* and/or other materials provided with the distribution.
14+
* 3. Neither the name of STMicroelectronics nor the names of its contributors
15+
* may be used to endorse or promote products derived from this software
16+
* without specific prior written permission.
17+
*
18+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22+
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26+
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27+
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28+
*******************************************************************************
29+
*/
30+
31+
#ifndef _VARIANT_ARDUINO_STM32_
32+
#define _VARIANT_ARDUINO_STM32_
33+
34+
/*----------------------------------------------------------------------------
35+
* Headers
36+
*----------------------------------------------------------------------------*/
37+
#include "PeripheralPins.h"
38+
39+
#ifdef __cplusplus
40+
extern "C"{
41+
#endif // __cplusplus
42+
43+
/*----------------------------------------------------------------------------
44+
* Pins
45+
*----------------------------------------------------------------------------*/
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extern const PinName digitalPin[];
47+
48+
// Match Table 11. NUCLEO-L4R5ZI, NUCLEO-L4R5ZI-P pin assignments
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// from UM2179 STM32 Nucleo-144 board
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enum {
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PD9, //D0
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PD8, //D1
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PF15, //D2
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PE13, //D3
55+
PF14, //D4
56+
PE11, //D5
57+
PE9, //D6
58+
PF13, //D7
59+
PF12, //D8
60+
PD15, //D9
61+
PD14, //D10
62+
PA7, //D11
63+
PA6, //D12
64+
PA5, //D13
65+
PB9, //D14
66+
PB8, //D15
67+
PC6, //D16
68+
PB15, //D17
69+
PB13, //D18
70+
PB12, //D19
71+
PA4, //D20
72+
PB4, //D21
73+
PB5, //D22
74+
PB3, //D23
75+
PA4_2,//D24
76+
PB4_2,//D25
77+
PA2, //D26
78+
PB10, //D27
79+
PE15, //D28
80+
PB0, //D29
81+
PE12, //D30
82+
PE14, //D31
83+
PA0, //D32
84+
PB0_2,//D33
85+
PE0, //D34
86+
#ifdef ARDUINO_NUCLEO_L4R5ZI
87+
PB11, //D35
88+
#else
89+
NC_1, //D35
90+
#endif
91+
PB10_2,//D36
92+
PE15_2,//D37
93+
PE14_2,//D38
94+
PE12_2,//D39
95+
PE10, //D40
96+
PE7, //D41
97+
PE8, //D42
98+
PC8, //D43
99+
PC9, //D44
100+
PC10, //D45
101+
PC11, //D46
102+
PC12, //D47
103+
PD2, //D48
104+
PF3, //D49
105+
PF5, //D50
106+
PD7, //D51
107+
PD6, //D52
108+
PD5, //D53
109+
PD4, //D54
110+
PD3, //D55
111+
PE2, //D56
112+
PE4, //D57
113+
PE5, //D58
114+
PE6, //D59
115+
PE3, //D60
116+
PF8, //D61
117+
PF7, //D62
118+
PF9, //D63
119+
PG1, //D64
120+
PG0, //D65
121+
PD1, //D66
122+
PD0, //D67
123+
PF0, //D68
124+
PF1, //D69
125+
PF2, //D70
126+
PB6, //D71
127+
PB2, //D72
128+
// ST Morpho
129+
PA8, //D73
130+
PA9, //D74
131+
PA10, //D75
132+
PA11, //D76
133+
PA12, //D77
134+
PA15, //D78
135+
PB7, //D79 - LEDBLUE
136+
PB14, //D80 - LEDRED
137+
PC7, //D81 - LEDGREEN
138+
PC13, //D82 - USERBTN
139+
PC14, //D83
140+
PC15, //D84
141+
PD10, //D85
142+
PD11, //D86
143+
PD12, //D87
144+
PD13, //D88
145+
PE1, //D89
146+
PF10, //D90
147+
PF11, //D91
148+
PG2, //D92
149+
PG3, //D93
150+
PG4, //D94
151+
PG5, //D95
152+
PG6, //D96
153+
PG7, //D97 - Serial Tx
154+
PG8, //D98 - Serial Rx
155+
PG9, //D99
156+
PG10, //D100
157+
PG11, //D101
158+
PG12, //D102
159+
PG13, //D103
160+
PG14, //D104
161+
PH0, //D105
162+
PH1, //D106
163+
// Analog pins
164+
PA3, //D107/A0
165+
PC0, //D108/A1
166+
PC3, //D109/A2
167+
PC1, //D110/A3
168+
PC4, //D111/A4
169+
PC5, //D112/A5
170+
PB1, //D113/A6
171+
PC2, //D114/A7
172+
PA1, //D115/A8
173+
// Duplicated pins in order to be aligned with PinMapADC
174+
PA7_3, //D116/A9 = D11
175+
PA6_2, //D117/A10 = D12
176+
PA5_2, //D118/A11 = D13
177+
PA4_3, //D119/A12 = D20
178+
PA2_2, //D120/A13 = D26
179+
PB0_3, //D121/A14 = D29
180+
PA0_2, //D122/A15 = D32
181+
#ifdef ARDUINO_NUCLEO_L4R5ZI
182+
PG15, //D123
183+
#endif
184+
// PA13 and PA14 are shared with SWD signals connected to ST-LINK/V2-1.
185+
// If ST-LINK part is not cut, it is not recommended to use them as I/O pins.
186+
//PA13, //D124
187+
//PA14, //D125
188+
PEND
189+
};
190+
191+
// This must be a literal with the same value as PEND
192+
#ifdef ARDUINO_NUCLEO_L4R5ZI
193+
#define NUM_DIGITAL_PINS 124
194+
#else
195+
#define NUM_DIGITAL_PINS 123
196+
#endif
197+
// This must be a literal with a value less than or equal to to MAX_ANALOG_INPUTS
198+
#define NUM_ANALOG_INPUTS 16
199+
#define NUM_ANALOG_FIRST 107
200+
201+
// On-board LED pin number
202+
#define LED_BUILTIN PC7
203+
#define LED_GREEN LED_BUILTIN
204+
#define LED_BLUE PB7
205+
#define LED_RED PB14
206+
207+
// On-board user button
208+
#define USER_BTN PC13
209+
210+
// Timer Definitions
211+
// Do not use timer used by PWM pins when possible. See PinMap_PWM.
212+
#define TIMER_TONE TIM6
213+
214+
// Do not use basic timer: OC is required
215+
#define TIMER_SERVO TIM2 //TODO: advanced-control timers don't work
216+
217+
// UART Definitions
218+
#define SERIAL_UART_INSTANCE 0 //Connected to ST-Link - LPUART1
219+
220+
// Serial pin used for console (ex: stlink)
221+
// Required by Firmata
222+
#define PIN_SERIAL_RX PG8
223+
#define PIN_SERIAL_TX PG7
224+
225+
#ifdef __cplusplus
226+
} // extern "C"
227+
#endif
228+
/*----------------------------------------------------------------------------
229+
* Arduino objects - C++ only
230+
*----------------------------------------------------------------------------*/
231+
232+
#ifdef __cplusplus
233+
// These serial port names are intended to allow libraries and architecture-neutral
234+
// sketches to automatically default to the correct port name for a particular type
235+
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
236+
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
237+
//
238+
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
239+
//
240+
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
241+
//
242+
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
243+
//
244+
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
245+
//
246+
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
247+
// pins are NOT connected to anything by default.
248+
#define SERIAL_PORT_MONITOR Serial
249+
#define SERIAL_PORT_HARDWARE Serial
250+
#endif
251+
252+
#endif /* _VARIANT_ARDUINO_STM32_ */

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