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Commit a94dd7c

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fpistmfpistm
committedAug 19, 2017
Update AF for STM32F1
Signed-off-by: Frederic Pillon <[email protected]>
1 parent 8433db3 commit a94dd7c

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4 files changed

+725
-248
lines changed

4 files changed

+725
-248
lines changed
 

‎cores/arduino/stm32/PinAF_STM32F1.h

Lines changed: 304 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,8 @@ static inline void pinF1_DisconnectDebug(PinName pin)
5656
if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
5757
__HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
5858
}
59+
#else
60+
UNUSED(pin);
5961
#endif /* STM32F1_FORCE_DEBUG */
6062
}
6163

@@ -64,55 +66,308 @@ static inline void pin_SetF1AFPin(uint32_t afnum)
6466
// Enable AFIO clock
6567
__HAL_RCC_AFIO_CLK_ENABLE();
6668

67-
if (afnum > 0) {
68-
switch (afnum) {
69-
case 1: // Remap SPI1
70-
__HAL_AFIO_REMAP_SPI1_ENABLE();
71-
break;
72-
case 2: // Remap I2C1
73-
__HAL_AFIO_REMAP_I2C1_ENABLE();
74-
break;
75-
case 3: // Remap USART1
76-
__HAL_AFIO_REMAP_USART1_ENABLE();
77-
break;
78-
case 4: // Remap USART2
79-
__HAL_AFIO_REMAP_USART2_ENABLE();
80-
break;
81-
case 5: // Partial Remap USART3
82-
__HAL_AFIO_REMAP_USART3_PARTIAL();
83-
break;
84-
case 6: // Partial Remap TIM1
85-
__HAL_AFIO_REMAP_TIM1_PARTIAL();
86-
break;
87-
case 7: // Partial Remap TIM3
88-
__HAL_AFIO_REMAP_TIM3_PARTIAL();
89-
break;
90-
case 8: // Full Remap TIM2
91-
__HAL_AFIO_REMAP_TIM2_ENABLE();
92-
break;
93-
case 9: // Full Remap TIM3
94-
__HAL_AFIO_REMAP_TIM3_ENABLE();
95-
break;
96-
#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
97-
case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
98-
__HAL_AFIO_REMAP_CAN1_2();
99-
break;
100-
case 11: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
101-
__HAL_AFIO_REMAP_CAN1_3();
102-
break;
103-
#endif
104-
case 12: // Full Remap USART3
105-
__HAL_AFIO_REMAP_USART3_ENABLE();
106-
break;
107-
case 13: // Full Remap TIM1
108-
__HAL_AFIO_REMAP_TIM1_ENABLE();
109-
break;
110-
case 14: // Full Remap TIM4
111-
__HAL_AFIO_REMAP_TIM4_ENABLE();
112-
break;
113-
default:
114-
break;
115-
}
69+
switch (afnum) {
70+
case AFIO_SPI1_ENABLE:
71+
__HAL_AFIO_REMAP_SPI1_ENABLE();
72+
break;
73+
case AFIO_SPI1_DISABLE:
74+
__HAL_AFIO_REMAP_SPI1_DISABLE();
75+
break;
76+
case AFIO_I2C1_ENABLE:
77+
__HAL_AFIO_REMAP_I2C1_ENABLE();
78+
break;
79+
case AFIO_I2C1_DISABLE:
80+
__HAL_AFIO_REMAP_I2C1_DISABLE();
81+
break;
82+
case AFIO_USART1_ENABLE:
83+
__HAL_AFIO_REMAP_USART1_ENABLE();
84+
break;
85+
case AFIO_USART1_DISABLE:
86+
__HAL_AFIO_REMAP_USART1_DISABLE();
87+
break;
88+
case AFIO_USART2_ENABLE:
89+
__HAL_AFIO_REMAP_USART2_ENABLE();
90+
break;
91+
case AFIO_USART2_DISABLE:
92+
__HAL_AFIO_REMAP_USART2_DISABLE();
93+
break;
94+
case AFIO_USART3_ENABLE:
95+
__HAL_AFIO_REMAP_USART3_ENABLE();
96+
break;
97+
case AFIO_USART3_PARTIAL:
98+
__HAL_AFIO_REMAP_USART3_PARTIAL();
99+
break;
100+
case AFIO_USART3_DISABLE:
101+
__HAL_AFIO_REMAP_USART3_DISABLE();
102+
break;
103+
case AFIO_TIM1_ENABLE:
104+
__HAL_AFIO_REMAP_TIM1_ENABLE();
105+
break;
106+
case AFIO_TIM1_PARTIAL:
107+
__HAL_AFIO_REMAP_TIM1_PARTIAL();
108+
break;
109+
case AFIO_TIM1_DISABLE:
110+
__HAL_AFIO_REMAP_TIM1_DISABLE();
111+
break;
112+
case AFIO_TIM2_ENABLE:
113+
__HAL_AFIO_REMAP_TIM2_ENABLE();
114+
break;
115+
case AFIO_TIM2_PARTIAL_2:
116+
__HAL_AFIO_REMAP_TIM2_PARTIAL_2();
117+
break;
118+
case AFIO_TIM2_PARTIAL_1:
119+
__HAL_AFIO_REMAP_TIM2_PARTIAL_1();
120+
break;
121+
case AFIO_TIM2_DISABLE:
122+
__HAL_AFIO_REMAP_TIM2_DISABLE();
123+
break;
124+
case AFIO_TIM3_ENABLE:
125+
__HAL_AFIO_REMAP_TIM3_ENABLE();
126+
break;
127+
case AFIO_TIM3_PARTIAL:
128+
__HAL_AFIO_REMAP_TIM3_PARTIAL();
129+
break;
130+
case AFIO_TIM3_DISABLE:
131+
__HAL_AFIO_REMAP_TIM3_DISABLE();
132+
break;
133+
case AFIO_TIM4_ENABLE:
134+
__HAL_AFIO_REMAP_TIM4_ENABLE();
135+
break;
136+
case AFIO_TIM4_DISABLE:
137+
__HAL_AFIO_REMAP_TIM4_DISABLE();
138+
break;
139+
#if defined(AFIO_MAPR_CAN_REMAP1)
140+
case AFIO_CAN1_1:
141+
__HAL_AFIO_REMAP_CAN1_1();
142+
break;
143+
case AFIO_CAN1_2:
144+
__HAL_AFIO_REMAP_CAN1_2();
145+
break;
146+
case AFIO_CAN1_3:
147+
__HAL_AFIO_REMAP_CAN1_3();
148+
break;
149+
#endif
150+
case AFIO_PD01_ENABLE:
151+
__HAL_AFIO_REMAP_PD01_ENABLE();
152+
break;
153+
case AFIO_PD01_DISABLE:
154+
__HAL_AFIO_REMAP_PD01_DISABLE();
155+
break;
156+
#if defined(AFIO_MAPR_TIM5CH4_IREMAP)
157+
case AFIO_TIM5CH4_ENABLE:
158+
__HAL_AFIO_REMAP_TIM5CH4_ENABLE();
159+
break;
160+
case AFIO_TIM5CH4_DISABLE:
161+
__HAL_AFIO_REMAP_TIM5CH4_DISABLE();
162+
break;
163+
#endif
164+
#if defined(AFIO_MAPR_ETH_REMAP)
165+
case AFIO_ETH_ENABLE:
166+
__HAL_AFIO_REMAP_ETH_ENABLE();
167+
break;
168+
case AFIO_ETH_DISABLE:
169+
__HAL_AFIO_REMAP_ETH_DISABLE();
170+
break;
171+
#endif
172+
#if defined(AFIO_MAPR_CAN2_REMAP)
173+
case AFIO_CAN2_ENABLE:
174+
__HAL_AFIO_REMAP_CAN2_ENABLE();
175+
break;
176+
case AFIO_CAN2_DISABLE:
177+
__HAL_AFIO_REMAP_CAN2_DISABLE();
178+
break;
179+
#endif
180+
#if defined(AFIO_MAPR_MII_RMII_SEL)
181+
case AFIO_ETH_RMII:
182+
__HAL_AFIO_ETH_RMII();
183+
break;
184+
case AFIO_ETH_MII:
185+
__HAL_AFIO_ETH_MII();
186+
break;
187+
#endif
188+
#if defined(AFIO_MAPR_ADC1_ETRGINJ_REMAP)
189+
case AFIO_ADC1_ETRGINJ_ENABLE:
190+
__HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE();
191+
break;
192+
case AFIO_ADC1_ETRGINJ_DISABLE:
193+
__HAL_AFIO_REMAP_ADC1_ETRGINJ_DISABLE();
194+
break;
195+
#endif
196+
#if defined(AFIO_MAPR_ADC1_ETRGREG_REMAP)
197+
case AFIO_ADC1_ETRGREG_ENABLE:
198+
__HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE();
199+
break;
200+
case AFIO_ADC1_ETRGREG_DISABLE:
201+
__HAL_AFIO_REMAP_ADC1_ETRGREG_DISABLE();
202+
break;
203+
#endif
204+
#if defined(AFIO_MAPR_ADC2_ETRGINJ_REMAP)
205+
case AFIO_ADC2_ETRGINJ_ENABLE:
206+
__HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE();
207+
break;
208+
case AFIO_ADC2_ETRGINJ_DISABLE:
209+
__HAL_AFIO_REMAP_ADC2_ETRGINJ_DISABLE();
210+
break;
211+
#endif
212+
#if defined(AFIO_MAPR_ADC2_ETRGREG_REMAP)
213+
case AFIO_ADC2_ETRGREG_ENABLE:
214+
__HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE();
215+
break;
216+
case AFIO_ADC2_ETRGREG_DISABLE:
217+
__HAL_AFIO_REMAP_ADC2_ETRGREG_DISABLE();
218+
break;
219+
#endif
220+
case AFIO_SWJ_ENABLE:
221+
__HAL_AFIO_REMAP_SWJ_ENABLE();
222+
break;
223+
case AFIO_SWJ_NONJTRST:
224+
__HAL_AFIO_REMAP_SWJ_NONJTRST();
225+
break;
226+
case AFIO_SWJ_NOJTAG:
227+
__HAL_AFIO_REMAP_SWJ_NOJTAG();
228+
break;
229+
case AFIO_SWJ_DISABLE:
230+
__HAL_AFIO_REMAP_SWJ_DISABLE();
231+
break;
232+
#if defined(AFIO_MAPR_SPI3_REMAP)
233+
case AFIO_SPI3_ENABLE:
234+
__HAL_AFIO_REMAP_SPI3_ENABLE();
235+
break;
236+
case AFIO_SPI3_DISABLE:
237+
__HAL_AFIO_REMAP_SPI3_DISABLE();
238+
break;
239+
#endif
240+
#if defined(AFIO_MAPR_TIM2ITR1_IREMAP)
241+
case AFIO_TIM2ITR1_TO_USB:
242+
__HAL_AFIO_TIM2ITR1_TO_USB();
243+
break;
244+
case AFIO_TIM2ITR1_TO_ETH:
245+
__HAL_AFIO_TIM2ITR1_TO_ETH();
246+
break;
247+
#endif
248+
#if defined(AFIO_MAPR_PTP_PPS_REMAP)
249+
case AFIO_ETH_PTP_PPS_ENABLE:
250+
__HAL_AFIO_ETH_PTP_PPS_ENABLE();
251+
break;
252+
case AFIO_ETH_PTP_PPS_DISABLE:
253+
__HAL_AFIO_ETH_PTP_PPS_DISABLE();
254+
break;
255+
#endif
256+
#if defined(AFIO_MAPR2_TIM9_REMAP)
257+
case AFIO_TIM9_ENABLE:
258+
__HAL_AFIO_REMAP_TIM9_ENABLE();
259+
break;
260+
case AFIO_TIM9_DISABLE:
261+
__HAL_AFIO_REMAP_TIM9_DISABLE();
262+
break;
263+
#endif
264+
#if defined(AFIO_MAPR2_TIM10_REMAP)
265+
case AFIO_TIM10_ENABLE:
266+
__HAL_AFIO_REMAP_TIM10_ENABLE();
267+
break;
268+
case AFIO_TIM10_DISABLE:
269+
__HAL_AFIO_REMAP_TIM10_DISABLE();
270+
break;
271+
#endif
272+
#if defined(AFIO_MAPR2_TIM11_REMAP)
273+
case AFIO_TIM11_ENABLE:
274+
__HAL_AFIO_REMAP_TIM11_ENABLE();
275+
break;
276+
case AFIO_TIM11_DISABLE:
277+
__HAL_AFIO_REMAP_TIM11_DISABLE();
278+
break;
279+
#endif
280+
#if defined(AFIO_MAPR2_TIM13_REMAP)
281+
case AFIO_TIM13_ENABLE:
282+
__HAL_AFIO_REMAP_TIM13_ENABLE();
283+
break;
284+
case AFIO_TIM13_DISABLE:
285+
__HAL_AFIO_REMAP_TIM13_DISABLE();
286+
break;
287+
#endif
288+
#if defined(AFIO_MAPR2_TIM14_REMAP)
289+
case AFIO_TIM14_ENABLE:
290+
__HAL_AFIO_REMAP_TIM14_ENABLE();
291+
break;
292+
case AFIO_TIM14_DISABLE:
293+
__HAL_AFIO_REMAP_TIM14_DISABLE();
294+
break;
295+
#endif
296+
#if defined(AFIO_MAPR2_FSMC_NADV_REMAP)
297+
case AFIO_FSMCNADV_DISCONNECTED:
298+
__HAL_AFIO_FSMCNADV_DISCONNECTED();
299+
break;
300+
case AFIO_FSMCNADV_CONNECTED:
301+
__HAL_AFIO_FSMCNADV_CONNECTED();
302+
break;
303+
#endif
304+
#if defined(AFIO_MAPR2_TIM15_REMAP)
305+
case AFIO_TIM15_ENABLE:
306+
__HAL_AFIO_REMAP_TIM15_ENABLE();
307+
break;
308+
case AFIO_TIM15_DISABLE:
309+
__HAL_AFIO_REMAP_TIM15_DISABLE();
310+
break;
311+
#endif
312+
#if defined(AFIO_MAPR2_TIM16_REMAP)
313+
case AFIO_TIM16_ENABLE:
314+
__HAL_AFIO_REMAP_TIM16_ENABLE();
315+
break;
316+
case AFIO_TIM16_DISABLE:
317+
__HAL_AFIO_REMAP_TIM16_DISABLE();
318+
break;
319+
#endif
320+
#if defined(AFIO_MAPR2_TIM17_REMAP)
321+
case AFIO_TIM17_ENABLE:
322+
__HAL_AFIO_REMAP_TIM17_ENABLE();
323+
break;
324+
case AFIO_TIM17_DISABLE:
325+
__HAL_AFIO_REMAP_TIM17_DISABLE();
326+
break;
327+
#endif
328+
#if defined(AFIO_MAPR2_CEC_REMAP)
329+
case AFIO_CEC_ENABLE:
330+
__HAL_AFIO_REMAP_CEC_ENABLE();
331+
break;
332+
case AFIO_CEC_DISABLE:
333+
__HAL_AFIO_REMAP_CEC_DISABLE();
334+
break;
335+
#endif
336+
#if defined(AFIO_MAPR2_TIM1_DMA_REMAP)
337+
case AFIO_TIM1DMA_ENABLE:
338+
__HAL_AFIO_REMAP_TIM1DMA_ENABLE();
339+
break;
340+
case AFIO_TIM1DMA_DISABLE:
341+
__HAL_AFIO_REMAP_TIM1DMA_DISABLE();
342+
break;
343+
#endif
344+
#if defined(AFIO_MAPR2_TIM67_DAC_DMA_REMAP)
345+
case AFIO_TIM67DACDMA_ENABLE:
346+
__HAL_AFIO_REMAP_TIM67DACDMA_ENABLE();
347+
break;
348+
case AFIO_TIM67DACDMA_DISABLE:
349+
__HAL_AFIO_REMAP_TIM67DACDMA_DISABLE();
350+
break;
351+
#endif
352+
#if defined(AFIO_MAPR2_TIM12_REMAP)
353+
case AFIO_TIM12_ENABLE:
354+
__HAL_AFIO_REMAP_TIM12_ENABLE();
355+
break;
356+
case AFIO_TIM12_DISABLE:
357+
__HAL_AFIO_REMAP_TIM12_DISABLE();
358+
break;
359+
#endif
360+
#if defined(AFIO_MAPR2_MISC_REMAP)
361+
case AFIO_MISC_ENABLE:
362+
__HAL_AFIO_REMAP_MISC_ENABLE();
363+
break;
364+
case AFIO_MISC_DISABLE:
365+
__HAL_AFIO_REMAP_MISC_DISABLE();
366+
break;
367+
#endif
368+
default:
369+
case AFIO_NONE:
370+
break;
116371
}
117372
}
118373

‎cores/arduino/wiring_constants.h

Lines changed: 136 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,142 @@ enum {
4949
DEND
5050
};
5151

52+
#ifdef STM32F1xx
53+
enum {
54+
AFIO_NONE,
55+
AFIO_SPI1_ENABLE,
56+
AFIO_SPI1_DISABLE,
57+
AFIO_I2C1_ENABLE,
58+
AFIO_I2C1_DISABLE,
59+
AFIO_USART1_ENABLE,
60+
AFIO_USART1_DISABLE,
61+
AFIO_USART2_ENABLE,
62+
AFIO_USART2_DISABLE,
63+
AFIO_USART3_ENABLE,
64+
AFIO_USART3_PARTIAL,
65+
AFIO_USART3_DISABLE,
66+
AFIO_TIM1_ENABLE,
67+
AFIO_TIM1_PARTIAL,
68+
AFIO_TIM1_DISABLE,
69+
AFIO_TIM2_ENABLE,
70+
AFIO_TIM2_PARTIAL_2,
71+
AFIO_TIM2_PARTIAL_1,
72+
AFIO_TIM2_DISABLE,
73+
AFIO_TIM3_ENABLE,
74+
AFIO_TIM3_PARTIAL,
75+
AFIO_TIM3_DISABLE,
76+
AFIO_TIM4_ENABLE,
77+
AFIO_TIM4_DISABLE,
78+
#if defined(AFIO_MAPR_CAN_REMAP1)
79+
AFIO_CAN1_1,
80+
AFIO_CAN1_2,
81+
AFIO_CAN1_3,
82+
#endif
83+
AFIO_PD01_ENABLE,
84+
AFIO_PD01_DISABLE,
85+
#if defined(AFIO_MAPR_TIM5CH4_IREMAP)
86+
AFIO_TIM5CH4_ENABLE,
87+
AFIO_TIM5CH4_DISABLE,
88+
#endif
89+
#if defined(AFIO_MAPR_ETH_REMAP)
90+
AFIO_ETH_ENABLE,
91+
AFIO_ETH_DISABLE,
92+
#endif
93+
#if defined(AFIO_MAPR_CAN2_REMAP)
94+
AFIO_CAN2_ENABLE,
95+
AFIO_CAN2_DISABLE,
96+
#endif
97+
#if defined(AFIO_MAPR_MII_RMII_SEL)
98+
AFIO_ETH_RMII,
99+
AFIO_ETH_MII,
100+
#endif
101+
AFIO_ADC1_ETRGINJ_ENABLE,
102+
AFIO_ADC1_ETRGINJ_DISABLE,
103+
AFIO_ADC1_ETRGREG_ENABLE,
104+
AFIO_ADC1_ETRGREG_DISABLE,
105+
#if defined(AFIO_MAPR_ADC2_ETRGINJ_REMAP)
106+
AFIO_ADC2_ETRGINJ_ENABLE,
107+
AFIO_ADC2_ETRGINJ_DISABLE,
108+
#endif
109+
#if defined(AFIO_MAPR_ADC2_ETRGREG_REMAP)
110+
AFIO_ADC2_ETRGREG_ENABLE,
111+
AFIO_ADC2_ETRGREG_DISABLE,
112+
#endif
113+
AFIO_SWJ_ENABLE,
114+
AFIO_SWJ_NONJTRST,
115+
AFIO_SWJ_NOJTAG,
116+
AFIO_SWJ_DISABLE,
117+
#if defined(AFIO_MAPR_SPI3_REMAP)
118+
AFIO_SPI3_ENABLE,
119+
AFIO_SPI3_DISABLE,
120+
#endif
121+
#if defined(AFIO_MAPR_TIM2ITR1_IREMAP)
122+
AFIO_TIM2ITR1_TO_USB,
123+
AFIO_TIM2ITR1_TO_ETH,
124+
#endif
125+
#if defined(AFIO_MAPR_PTP_PPS_REMAP)
126+
AFIO_ETH_PTP_PPS_ENABLE,
127+
AFIO_ETH_PTP_PPS_DISABLE,
128+
#endif
129+
#if defined(AFIO_MAPR2_TIM9_REMAP)
130+
AFIO_TIM9_ENABLE,
131+
AFIO_TIM9_DISABLE,
132+
#endif
133+
#if defined(AFIO_MAPR2_TIM10_REMAP)
134+
AFIO_TIM10_ENABLE,
135+
AFIO_TIM10_DISABLE,
136+
#endif
137+
#if defined(AFIO_MAPR2_TIM11_REMAP)
138+
AFIO_TIM11_ENABLE,
139+
AFIO_TIM11_DISABLE,
140+
#endif
141+
#if defined(AFIO_MAPR2_TIM13_REMAP)
142+
AFIO_TIM13_ENABLE,
143+
AFIO_TIM13_DISABLE,
144+
#endif
145+
#if defined(AFIO_MAPR2_TIM14_REMAP)
146+
AFIO_TIM14_ENABLE,
147+
AFIO_TIM14_DISABLE,
148+
#endif
149+
#if defined(AFIO_MAPR2_FSMC_NADV_REMAP)
150+
AFIO_FSMCNADV_DISCONNECTED,
151+
AFIO_FSMCNADV_CONNECTED,
152+
#endif
153+
#if defined(AFIO_MAPR2_TIM15_REMAP)
154+
AFIO_TIM15_ENABLE,
155+
AFIO_TIM15_DISABLE,
156+
#endif
157+
#if defined(AFIO_MAPR2_TIM16_REMAP)
158+
AFIO_TIM16_ENABLE,
159+
AFIO_TIM16_DISABLE,
160+
#endif
161+
#if defined(AFIO_MAPR2_TIM17_REMAP)
162+
AFIO_TIM17_ENABLE,
163+
AFIO_TIM17_DISABLE,
164+
#endif
165+
#if defined(AFIO_MAPR2_CEC_REMAP)
166+
AFIO_CEC_ENABLE,
167+
AFIO_CEC_DISABLE,
168+
#endif
169+
#if defined(AFIO_MAPR2_TIM1_DMA_REMAP)
170+
AFIO_TIM1DMA_ENABLE,
171+
AFIO_TIM1DMA_DISABLE,
172+
#endif
173+
#if defined(AFIO_MAPR2_TIM67_DAC_DMA_REMAP)
174+
AFIO_TIM67DACDMA_ENABLE,
175+
AFIO_TIM67DACDMA_DISABLE,
176+
#endif
177+
#if defined(AFIO_MAPR2_TIM12_REMAP)
178+
AFIO_TIM12_ENABLE,
179+
AFIO_TIM12_DISABLE,
180+
#endif
181+
#if defined(AFIO_MAPR2_MISC_REMAP)
182+
AFIO_MISC_ENABLE,
183+
AFIO_MISC_DISABLE,
184+
#endif
185+
};
186+
#endif // STM32F1xx
187+
52188
#define HIGH 0x1
53189
#define LOW 0x0
54190

‎variants/DISCO_F100RB/PeripheralPins.c

Lines changed: 139 additions & 97 deletions
Original file line numberDiff line numberDiff line change
@@ -38,161 +38,203 @@
3838

3939
//*** ADC ***
4040

41+
#ifdef HAL_ADC_MODULE_ENABLED
4142
const PinMap PinMap_ADC[] = {
42-
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
43-
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
44-
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
45-
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
46-
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
47-
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
48-
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
49-
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
50-
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
51-
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
52-
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
53-
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
54-
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
55-
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
56-
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
57-
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
43+
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
44+
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
45+
// {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 - STLink Tx
46+
// {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 - STLink Rx
47+
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
48+
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
49+
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
50+
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
51+
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
52+
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
53+
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
54+
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
55+
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
56+
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
57+
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
58+
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
5859
{NC, NP, 0}
5960
};
61+
#endif
6062

6163
//*** DAC ***
6264

65+
#ifdef HAL_DAC_MODULE_ENABLED
6366
const PinMap PinMap_DAC[] = {
64-
{PA_4, DAC, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
65-
{PA_5, DAC, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
66-
{NC, NP, 0}
67+
{PA_4, DAC, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
68+
{PA_5, DAC, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
69+
{NC, NP, 0}
6770
};
71+
#endif
6872

6973
//*** I2C ***
7074

75+
#ifdef HAL_I2C_MODULE_ENABLED
7176
const PinMap PinMap_I2C_SDA[] = {
72-
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
73-
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 2)}, // GPIO_Remap_I2C1
74-
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
77+
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
78+
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)},
79+
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
7580
{NC, NP, 0}
7681
};
82+
#endif
7783

84+
#ifdef HAL_I2C_MODULE_ENABLED
7885
const PinMap PinMap_I2C_SCL[] = {
79-
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
80-
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 2)}, // GPIO_Remap_I2C1
81-
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
86+
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
87+
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)},
88+
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
8289
{NC, NP, 0}
8390
};
91+
#endif
8492

8593
//*** PWM ***
8694

95+
#ifdef HAL_TIM_MODULE_ENABLED
8796
const PinMap PinMap_PWM[] = {
88-
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM2_CH1
89-
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM2_CH2
90-
// {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM15_CH1
91-
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM2_CH3
92-
// {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM15_CH2
93-
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM2_CH4
94-
// {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM16_CH1
95-
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM3_CH1
96-
// {PA_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM17_CH1
97-
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 6, 1, 1)}, // TIM1_CH1N - GPIO_PartialRemap_TIM1
98-
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM3_CH2
99-
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM1_CH1
100-
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM1_CH2
101-
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM1_CH3
102-
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM1_CH4
103-
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 1, 0)}, // TIM2_CH1 - GPIO_FullRemap_TIM2
104-
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 6, 2, 1)}, // TIM1_CH2N - GPIO_PartialRemap_TIM1
105-
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM3_CH3
106-
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 6, 3, 1)}, // TIM1_CH3N - GPIO_PartialRemap_TIM1
107-
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM3_CH4
108-
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 2, 0)}, // TIM2_CH2 - GPIO_FullRemap_TIM2
109-
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 1, 0)}, // TIM3_CH1 - GPIO_PartialRemap_TIM3
110-
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 2, 0)}, // TIM3_CH2 - GPIO_PartialRemap_TIM3
111-
// {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 1)}, // TIM16_CH1N
112-
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM4_CH1
113-
// {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 1)}, // TIM17_CH1N
114-
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM4_CH2
115-
// {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM16_CH1
116-
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM4_CH3
117-
// {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM17_CH1
118-
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM4_CH4
119-
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 3, 0)}, // TIM2_CH3 - GPIO_FullRemap_TIM2
120-
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 4, 0)}, // TIM2_CH4 - GPIO_FullRemap_TIM2
121-
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 1)}, // TIM1_CH1N
122-
// {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM15_CH1
123-
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 1)}, // TIM1_CH2N
124-
// {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 1)}, // TIM15_CH1N
125-
// {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM15_CH2
126-
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 1)}, // TIM1_CH3N
127-
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 1, 0)}, // TIM3_CH1 - GPIO_FullRemap_TIM3
128-
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 2, 0)}, // TIM3_CH2 - GPIO_FullRemap_TIM3
129-
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 3, 0)}, // TIM3_CH3 - GPIO_FullRemap_TIM3
130-
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 4, 0)}, // TIM3_CH4 - GPIO_FullRemap_TIM3
97+
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
98+
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
99+
// {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM15_CH1 - STLink Tx
100+
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 - STLink Tx
101+
// {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM15_CH2 - STLink Rx
102+
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 - STLink Rx
103+
// {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM16_ENABLE, 1, 0)}, // TIM16_CH1
104+
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
105+
// {PA_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM17_ENABLE, 1, 0)}, // TIM17_CH1
106+
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
107+
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
108+
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
109+
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
110+
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
111+
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
112+
// {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
113+
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
114+
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
115+
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
116+
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
117+
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
118+
// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
119+
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
120+
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
121+
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
122+
// {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM16_CH1N
123+
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
124+
// {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM17_CH1N
125+
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
126+
// {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM16_CH1
127+
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
128+
// {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM17_CH1
129+
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
130+
// {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
131+
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
132+
// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
133+
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
134+
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
135+
// {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM15_ENABLE, 1, 0)}, // TIM15_CH1
136+
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
137+
// {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM15_CH1N
138+
// {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM15_ENABLE, 2, 0)}, // TIM15_CH2
139+
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
140+
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
141+
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2
142+
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3
143+
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4
131144
{NC, NP, 0}
132145
};
146+
#endif
133147

134148
//*** SERIAL ***
135149

150+
#ifdef HAL_UART_MODULE_ENABLED
136151
const PinMap PinMap_UART_TX[] = {
137-
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
138-
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
139-
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 3)}, // GPIO_Remap_USART1
140-
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
141-
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 5)}, // GPIO_PartialRemap_USART3
152+
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
153+
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
154+
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)},
155+
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
156+
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
142157
{NC, NP, 0}
143158
};
159+
#endif
144160

161+
#ifdef HAL_UART_MODULE_ENABLED
145162
const PinMap PinMap_UART_RX[] = {
146-
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
147-
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
148-
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 3)}, // GPIO_Remap_USART1
149-
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
150-
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 5)}, // GPIO_PartialRemap_USART3
163+
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
164+
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
165+
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)},
166+
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
167+
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
151168
{NC, NP, 0}
152169
};
170+
#endif
153171

172+
#ifdef HAL_UART_MODULE_ENABLED
154173
const PinMap PinMap_UART_RTS[] = {
155-
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
156-
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
157-
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
174+
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
175+
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
176+
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
158177
{NC, NP, 0}
159178
};
179+
#endif
160180

181+
#ifdef HAL_UART_MODULE_ENABLED
161182
const PinMap PinMap_UART_CTS[] = {
162-
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
163-
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
164-
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
183+
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
184+
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
185+
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
165186
{NC, NP, 0}
166187
};
188+
#endif
167189

168190
//*** SPI ***
169191

192+
#ifdef HAL_SPI_MODULE_ENABLED
170193
const PinMap PinMap_SPI_MOSI[] = {
171-
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
172-
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
173-
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
194+
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
195+
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
196+
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
174197
{NC, NP, 0}
175198
};
199+
#endif
176200

201+
#ifdef HAL_SPI_MODULE_ENABLED
177202
const PinMap PinMap_SPI_MISO[] = {
178-
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
179-
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
180-
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
203+
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
204+
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
205+
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
181206
{NC, NP, 0}
182207
};
208+
#endif
183209

210+
#ifdef HAL_SPI_MODULE_ENABLED
184211
const PinMap PinMap_SPI_SCLK[] = {
185-
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
186-
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
187-
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
212+
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
213+
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
214+
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
188215
{NC, NP, 0}
189216
};
217+
#endif
190218

219+
#ifdef HAL_SPI_MODULE_ENABLED
191220
const PinMap PinMap_SPI_SSEL[] = {
192-
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
193-
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
194-
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
221+
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
222+
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
223+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
195224
{NC, NP, 0}
196225
};
226+
#endif
227+
228+
//*** CAN ***
229+
230+
//*** No CAN_RD ***
231+
232+
//*** No CAN_TD ***
233+
234+
//*** ETHERNET ***
235+
236+
//*** No Ethernet ***
237+
238+
//*** QUADSPI ***
197239

198-
//*** No CAN ***
240+
//*** No QUADSPI ***

‎variants/NUCLEO_F103RB/PeripheralPins.c

Lines changed: 146 additions & 102 deletions
Original file line numberDiff line numberDiff line change
@@ -38,170 +38,214 @@
3838

3939
//*** ADC ***
4040

41+
#ifdef HAL_ADC_MODULE_ENABLED
4142
const PinMap PinMap_ADC[] = {
42-
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
43-
// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
44-
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
45-
// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
46-
// {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 - STLink Tx
47-
// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
48-
// {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 - STLink Rx
49-
// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
50-
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
51-
// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
52-
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
53-
// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
54-
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
55-
// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
56-
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
57-
// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
58-
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
59-
// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
60-
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
61-
// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
62-
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
63-
// {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
64-
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
65-
// {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
66-
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
67-
// {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
68-
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
69-
// {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
70-
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
71-
// {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
72-
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
73-
// {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
43+
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
44+
// {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
45+
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
46+
// {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
47+
// {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 - STLink Tx
48+
// {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 - STLink Tx
49+
// {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 - STLink Rx
50+
// {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 - STLink Rx
51+
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
52+
// {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
53+
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
54+
// {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
55+
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
56+
// {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
57+
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
58+
// {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
59+
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
60+
// {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
61+
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
62+
// {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
63+
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
64+
// {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
65+
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
66+
// {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
67+
{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
68+
// {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
69+
{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
70+
// {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
71+
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
72+
// {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
73+
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
74+
// {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
7475
{NC, NP, 0}
7576
};
77+
#endif
78+
79+
//*** DAC ***
80+
81+
//*** No DAC ***
7682

7783
//*** I2C ***
7884

85+
#ifdef HAL_I2C_MODULE_ENABLED
7986
const PinMap PinMap_I2C_SDA[] = {
80-
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
81-
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 2)}, // GPIO_Remap_I2C1
82-
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
87+
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
88+
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)},
89+
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
8390
{NC, NP, 0}
8491
};
92+
#endif
8593

94+
#ifdef HAL_I2C_MODULE_ENABLED
8695
const PinMap PinMap_I2C_SCL[] = {
87-
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
88-
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 2)}, // GPIO_Remap_I2C1
89-
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, 0)},
96+
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
97+
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)},
98+
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
9099
{NC, NP, 0}
91100
};
101+
#endif
92102

93103
//*** PWM ***
94104

105+
#ifdef HAL_TIM_MODULE_ENABLED
95106
const PinMap PinMap_PWM[] = {
96-
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM2_CH1
97-
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM2_CH2
98-
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM2_CH3 - STLink Rx
99-
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM2_CH4 - STLink Tx
100-
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM3_CH1
101-
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 6, 1, 1)}, // TIM1_CH1N - GPIO_PartialRemap_TIM1
102-
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM3_CH2
103-
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM1_CH1
104-
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM1_CH2
105-
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM1_CH3
106-
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM1_CH4
107-
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 1, 0)}, // TIM2_CH1 - GPIO_FullRemap_TIM2
108-
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 6, 2, 1)}, // TIM1_CH2N - GPIO_PartialRemap_TIM1
109-
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM3_CH3
110-
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 6, 3, 1)}, // TIM1_CH3N - GPIO_PartialRemap_TIM1
111-
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM3_CH4
112-
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 2, 0)}, // TIM2_CH2 - GPIO_FullRemap_TIM2
113-
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 1, 0)}, // TIM3_CH1 - GPIO_PartialRemap_TIM3
114-
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 2, 0)}, // TIM3_CH2 - GPIO_PartialRemap_TIM3
115-
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 0)}, // TIM4_CH1
116-
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 0)}, // TIM4_CH2
117-
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM4_CH3
118-
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM4_CH4
119-
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 3, 0)}, // TIM2_CH3 - GPIO_FullRemap_TIM2
120-
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 4, 0)}, // TIM2_CH4 - GPIO_FullRemap_TIM2
121-
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 1, 1)}, // TIM1_CH1N
122-
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 2, 1)}, // TIM1_CH2N
123-
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 1)}, // TIM1_CH3N
124-
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 1, 0)}, // TIM3_CH1 - GPIO_FullRemap_TIM3
125-
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 2, 0)}, // TIM3_CH2 - GPIO_FullRemap_TIM3
126-
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 3, 0)}, // TIM3_CH3 - GPIO_FullRemap_TIM3
127-
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 4, 0)}, // TIM3_CH4 - GPIO_FullRemap_TIM3
107+
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
108+
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
109+
// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
110+
// {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
111+
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
112+
// {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
113+
{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
114+
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
115+
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
116+
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
117+
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
118+
// {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
119+
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
120+
// {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
121+
{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
122+
// {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
123+
{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
124+
// {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
125+
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
126+
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
127+
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
128+
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
129+
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
130+
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
131+
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
132+
// {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
133+
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
134+
// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
135+
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
136+
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
137+
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
138+
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
139+
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
140+
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2
141+
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3
142+
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4
128143
{NC, NP, 0}
129144
};
145+
#endif
130146

131147
//*** SERIAL ***
132148

149+
#ifdef HAL_UART_MODULE_ENABLED
133150
const PinMap PinMap_UART_TX[] = {
134-
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
135-
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
136-
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 3)}, // GPIO_Remap_USART1
137-
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
138-
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 5)}, // GPIO_PartialRemap_USART3
151+
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
152+
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
153+
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)},
154+
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
155+
{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
139156
{NC, NP, 0}
140157
};
158+
#endif
141159

160+
#ifdef HAL_UART_MODULE_ENABLED
142161
const PinMap PinMap_UART_RX[] = {
143-
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
144-
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
145-
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 3)}, // GPIO_Remap_USART1
146-
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
147-
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 5)}, // GPIO_PartialRemap_USART3
162+
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
163+
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
164+
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)},
165+
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
166+
{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
148167
{NC, NP, 0}
149168
};
169+
#endif
150170

171+
#ifdef HAL_UART_MODULE_ENABLED
151172
const PinMap PinMap_UART_RTS[] = {
152-
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
153-
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
154-
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
173+
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
174+
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
175+
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
155176
{NC, NP, 0}
156177
};
178+
#endif
157179

180+
#ifdef HAL_UART_MODULE_ENABLED
158181
const PinMap PinMap_UART_CTS[] = {
159-
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
160-
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
161-
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
182+
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
183+
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
184+
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
162185
{NC, NP, 0}
163186
};
187+
#endif
164188

165189
//*** SPI ***
166190

191+
#ifdef HAL_SPI_MODULE_ENABLED
167192
const PinMap PinMap_SPI_MOSI[] = {
168-
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
169-
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
170-
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
193+
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
194+
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
195+
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
171196
{NC, NP, 0}
172197
};
198+
#endif
173199

200+
#ifdef HAL_SPI_MODULE_ENABLED
174201
const PinMap PinMap_SPI_MISO[] = {
175-
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
176-
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
177-
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
202+
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
203+
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
204+
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
178205
{NC, NP, 0}
179206
};
207+
#endif
180208

209+
#ifdef HAL_SPI_MODULE_ENABLED
181210
const PinMap PinMap_SPI_SCLK[] = {
182-
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
183-
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
184-
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
211+
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
212+
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
213+
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
185214
{NC, NP, 0}
186215
};
216+
#endif
187217

218+
#ifdef HAL_SPI_MODULE_ENABLED
188219
const PinMap PinMap_SPI_SSEL[] = {
189-
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
190-
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 1)}, // GPIO_Remap_SPI1
191-
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)},
220+
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
221+
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)},
222+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
192223
{NC, NP, 0}
193224
};
225+
#endif
194226

195227
//*** CAN ***
196228

229+
#ifdef HAL_CAN_MODULE_ENABLED
197230
const PinMap PinMap_CAN_RD[] = {
198-
{PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)},
199-
{PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 10)}, // Remap CAN_RX to PB_9
231+
{PA_11, CAN, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
232+
{PB_8, CAN, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)},
200233
{NC, NP, 0}
201234
};
235+
#endif
202236

237+
#ifdef HAL_CAN_MODULE_ENABLED
203238
const PinMap PinMap_CAN_TD[] = {
204-
{PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)},
205-
{PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 10)}, // Remap CAN_TX to PB_9
239+
{PA_12, CAN, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
240+
{PB_9, CAN, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)},
206241
{NC, NP, 0}
207242
};
243+
#endif
244+
245+
//*** ETHERNET ***
246+
247+
//*** No Ethernet ***
248+
249+
//*** QUADSPI ***
250+
251+
//*** No QUADSPI ***

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