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ALTracerfpistm
ALTracer
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fpistm
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variant(g4): register Generic G474CEUx board
* UFQFN48 (U) boards were missing from selection, only LQFP48 were available (T) * Copy missing linkerscript from G474CET * Copy missing SystemClock_Config and readjust for HSI16 into PLL150 and HSI48 CRS (for USB FS Device)
1 parent bb640bf commit a7928d9

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4 files changed

+324
-6
lines changed

4 files changed

+324
-6
lines changed

Diff for: ‎README.md

+8-4
Original file line numberDiff line numberDiff line change
@@ -509,25 +509,29 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
509509
| :green_heart: | STM32G471QC<br>STM32G471QE | Generic Board | *2.4.0* | |
510510
| :green_heart: | STM32G471RC<br>STM32G471RE | Generic Board | *2.4.0* | |
511511
| :green_heart: | STM32G471VC<br>STM32G471VE | Generic Board | *2.4.0* | |
512-
| :green_heart: | STM32G473CB<br>STM32G473CC<br>STM32G473CE | Generic Board | *2.4.0* | |
512+
| :green_heart: | STM32G473CBT<br>STM32G473CCT<br>STM32G473CET | Generic Board | *2.4.0* | |
513+
| :yellow_heart: | STM32G473CBU<br>STM32G473CCU<br>STM32G473CEU | Generic Board | **2.9.0** | |
513514
| :green_heart: | STM32G473MB<br>STM32G473MC<br>STM32G473ME | Generic Board | *2.4.0* | |
514515
| :green_heart: | STM32G473PB<br>STM32G473PC<br>STM32G473PE | Generic Board | *2.4.0* | |
515516
| :green_heart: | STM32G473QB<br>STM32G473QC<br>STM32G473QE | Generic Board | *2.4.0* | |
516517
| :green_heart: | STM32G473RB<br>STM32G473RC<br>STM32G473RE | Generic Board | *2.0.0* | |
517518
| :green_heart: | STM32G473VB<br>STM32G473VC<br>STM32G473VE | Generic Board | *2.4.0* | |
518-
| :green_heart: | STM32G474CB<br>STM32G474CC<br>STM32G474CE | Generic Board | *2.4.0* | |
519+
| :green_heart: | STM32G474CBT<br>STM32G474CCT<br>STM32G474CET | Generic Board | *2.4.0* | |
520+
| :yellow_heart: | STM32G474CBU<br>STM32G474CCU<br>STM32G474CEU | Generic Board | **2.9.0** | |
519521
| :green_heart: | STM32G474MB<br>STM32G474MC<br>STM32G474ME | Generic Board | *2.4.0* | |
520522
| :green_heart: | STM32G474PB<br>STM32G474PC<br>STM32G474PE | Generic Board | *2.4.0* | |
521523
| :green_heart: | STM32G474QB<br>STM32G474QC<br>STM32G474QE | Generic Board | *2.4.0* | |
522524
| :green_heart: | STM32G474RB<br>STM32G474RC<br>STM32G474RE | Generic Board | *2.0.0* | |
523525
| :green_heart: | STM32G474VB<br>STM32G474VC<br>STM32G474VE | Generic Board | *2.4.0* | |
524-
| :green_heart: | STM32G483CE | Generic Board | *2.4.0* | |
526+
| :green_heart: | STM32G483CET | Generic Board | *2.4.0* | |
527+
| :yellow_heart: | STM32G483CEU | Generic Board | **2.9.0** | |
525528
| :green_heart: | STM32G483ME | Generic Board | *2.4.0* | |
526529
| :green_heart: | STM32G483PE | Generic Board | *2.4.0* | |
527530
| :green_heart: | STM32G483QE | Generic Board | *2.4.0* | |
528531
| :green_heart: | STM32G483RE | Generic Board | *2.0.0* | |
529532
| :green_heart: | STM32G483VE | Generic Board | *2.4.0* | |
530-
| :green_heart: | STM32G484CE | Generic Board | *2.4.0* | |
533+
| :green_heart: | STM32G484CET | Generic Board | *2.4.0* | |
534+
| :yellow_heart: | STM32G484CEU | Generic Board | **2.9.0** | |
531535
| :green_heart: | STM32G484ME | Generic Board | *2.4.0* | |
532536
| :green_heart: | STM32G484PE | Generic Board | *2.4.0* | |
533537
| :green_heart: | STM32G484QE | Generic Board | *2.4.0* | |

Diff for: ‎boards.txt

+72
Original file line numberDiff line numberDiff line change
@@ -7885,6 +7885,15 @@ GenG4.menu.pnum.GENERIC_G473CBTX.build.product_line=STM32G473xx
78857885
GenG4.menu.pnum.GENERIC_G473CBTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
78867886
GenG4.menu.pnum.GENERIC_G473CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
78877887

7888+
# Generic G473CBUx
7889+
GenG4.menu.pnum.GENERIC_G473CBUX=Generic G473CBUx
7890+
GenG4.menu.pnum.GENERIC_G473CBUX.upload.maximum_size=131072
7891+
GenG4.menu.pnum.GENERIC_G473CBUX.upload.maximum_data_size=131072
7892+
GenG4.menu.pnum.GENERIC_G473CBUX.build.board=GENERIC_G473CBUX
7893+
GenG4.menu.pnum.GENERIC_G473CBUX.build.product_line=STM32G473xx
7894+
GenG4.menu.pnum.GENERIC_G473CBUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
7895+
GenG4.menu.pnum.GENERIC_G473CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
7896+
78887897
# Generic G473CCTx
78897898
GenG4.menu.pnum.GENERIC_G473CCTX=Generic G473CCTx
78907899
GenG4.menu.pnum.GENERIC_G473CCTX.upload.maximum_size=262144
@@ -7894,6 +7903,15 @@ GenG4.menu.pnum.GENERIC_G473CCTX.build.product_line=STM32G473xx
78947903
GenG4.menu.pnum.GENERIC_G473CCTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
78957904
GenG4.menu.pnum.GENERIC_G473CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
78967905

7906+
# Generic G473CCUx
7907+
GenG4.menu.pnum.GENERIC_G473CCUX=Generic G473CCUx
7908+
GenG4.menu.pnum.GENERIC_G473CCUX.upload.maximum_size=262144
7909+
GenG4.menu.pnum.GENERIC_G473CCUX.upload.maximum_data_size=131072
7910+
GenG4.menu.pnum.GENERIC_G473CCUX.build.board=GENERIC_G473CCUX
7911+
GenG4.menu.pnum.GENERIC_G473CCUX.build.product_line=STM32G473xx
7912+
GenG4.menu.pnum.GENERIC_G473CCUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
7913+
GenG4.menu.pnum.GENERIC_G473CCUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
7914+
78977915
# Generic G473CETx
78987916
GenG4.menu.pnum.GENERIC_G473CETX=Generic G473CETx
78997917
GenG4.menu.pnum.GENERIC_G473CETX.upload.maximum_size=524288
@@ -7903,6 +7921,15 @@ GenG4.menu.pnum.GENERIC_G473CETX.build.product_line=STM32G473xx
79037921
GenG4.menu.pnum.GENERIC_G473CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
79047922
GenG4.menu.pnum.GENERIC_G473CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
79057923

7924+
# Generic G473CEUx
7925+
GenG4.menu.pnum.GENERIC_G473CEUX=Generic G473CEUx
7926+
GenG4.menu.pnum.GENERIC_G473CEUX.upload.maximum_size=524288
7927+
GenG4.menu.pnum.GENERIC_G473CEUX.upload.maximum_data_size=131072
7928+
GenG4.menu.pnum.GENERIC_G473CEUX.build.board=GENERIC_G473CEUX
7929+
GenG4.menu.pnum.GENERIC_G473CEUX.build.product_line=STM32G473xx
7930+
GenG4.menu.pnum.GENERIC_G473CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
7931+
GenG4.menu.pnum.GENERIC_G473CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
7932+
79067933
# Generic G473MBTx
79077934
GenG4.menu.pnum.GENERIC_G473MBTX=Generic G473MBTx
79087935
GenG4.menu.pnum.GENERIC_G473MBTX.upload.maximum_size=131072
@@ -8083,6 +8110,15 @@ GenG4.menu.pnum.GENERIC_G474CBTX.build.product_line=STM32G474xx
80838110
GenG4.menu.pnum.GENERIC_G474CBTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
80848111
GenG4.menu.pnum.GENERIC_G474CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
80858112

8113+
# Generic G474CBUx
8114+
GenG4.menu.pnum.GENERIC_G474CBUX=Generic G474CBUx
8115+
GenG4.menu.pnum.GENERIC_G474CBUX.upload.maximum_size=131072
8116+
GenG4.menu.pnum.GENERIC_G474CBUX.upload.maximum_data_size=131072
8117+
GenG4.menu.pnum.GENERIC_G474CBUX.build.board=GENERIC_G474CBUX
8118+
GenG4.menu.pnum.GENERIC_G474CBUX.build.product_line=STM32G474xx
8119+
GenG4.menu.pnum.GENERIC_G474CBUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
8120+
GenG4.menu.pnum.GENERIC_G474CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
8121+
80868122
# Generic G474CCTx
80878123
GenG4.menu.pnum.GENERIC_G474CCTX=Generic G474CCTx
80888124
GenG4.menu.pnum.GENERIC_G474CCTX.upload.maximum_size=262144
@@ -8092,6 +8128,15 @@ GenG4.menu.pnum.GENERIC_G474CCTX.build.product_line=STM32G474xx
80928128
GenG4.menu.pnum.GENERIC_G474CCTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
80938129
GenG4.menu.pnum.GENERIC_G474CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
80948130

8131+
# Generic G474CCUx
8132+
GenG4.menu.pnum.GENERIC_G474CCUX=Generic G474CCUx
8133+
GenG4.menu.pnum.GENERIC_G474CCUX.upload.maximum_size=262144
8134+
GenG4.menu.pnum.GENERIC_G474CCUX.upload.maximum_data_size=131072
8135+
GenG4.menu.pnum.GENERIC_G474CCUX.build.board=GENERIC_G474CCUX
8136+
GenG4.menu.pnum.GENERIC_G474CCUX.build.product_line=STM32G474xx
8137+
GenG4.menu.pnum.GENERIC_G474CCUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
8138+
GenG4.menu.pnum.GENERIC_G474CCUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
8139+
80958140
# Generic G474CETx
80968141
GenG4.menu.pnum.GENERIC_G474CETX=Generic G474CETx
80978142
GenG4.menu.pnum.GENERIC_G474CETX.upload.maximum_size=524288
@@ -8101,6 +8146,15 @@ GenG4.menu.pnum.GENERIC_G474CETX.build.product_line=STM32G474xx
81018146
GenG4.menu.pnum.GENERIC_G474CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
81028147
GenG4.menu.pnum.GENERIC_G474CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
81038148

8149+
# Generic G474CEUx
8150+
GenG4.menu.pnum.GENERIC_G474CEUX=Generic G474CEUx
8151+
GenG4.menu.pnum.GENERIC_G474CEUX.upload.maximum_size=524288
8152+
GenG4.menu.pnum.GENERIC_G474CEUX.upload.maximum_data_size=131072
8153+
GenG4.menu.pnum.GENERIC_G474CEUX.build.board=GENERIC_G474CEUX
8154+
GenG4.menu.pnum.GENERIC_G474CEUX.build.product_line=STM32G474xx
8155+
GenG4.menu.pnum.GENERIC_G474CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
8156+
GenG4.menu.pnum.GENERIC_G474CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
8157+
81048158
# Generic G474MBTx
81058159
GenG4.menu.pnum.GENERIC_G474MBTX=Generic G474MBTx
81068160
GenG4.menu.pnum.GENERIC_G474MBTX.upload.maximum_size=131072
@@ -8281,6 +8335,15 @@ GenG4.menu.pnum.GENERIC_G483CETX.build.product_line=STM32G483xx
82818335
GenG4.menu.pnum.GENERIC_G483CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
82828336
GenG4.menu.pnum.GENERIC_G483CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G483.svd
82838337

8338+
# Generic G483CEUx
8339+
GenG4.menu.pnum.GENERIC_G483CEUX=Generic G483CEUx
8340+
GenG4.menu.pnum.GENERIC_G483CEUX.upload.maximum_size=524288
8341+
GenG4.menu.pnum.GENERIC_G483CEUX.upload.maximum_data_size=131072
8342+
GenG4.menu.pnum.GENERIC_G483CEUX.build.board=GENERIC_G483CEUX
8343+
GenG4.menu.pnum.GENERIC_G483CEUX.build.product_line=STM32G483xx
8344+
GenG4.menu.pnum.GENERIC_G483CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
8345+
GenG4.menu.pnum.GENERIC_G483CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G483.svd
8346+
82848347
# Generic G483METx
82858348
GenG4.menu.pnum.GENERIC_G483METX=Generic G483METx
82868349
GenG4.menu.pnum.GENERIC_G483METX.upload.maximum_size=524288
@@ -8344,6 +8407,15 @@ GenG4.menu.pnum.GENERIC_G484CETX.build.product_line=STM32G484xx
83448407
GenG4.menu.pnum.GENERIC_G484CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
83458408
GenG4.menu.pnum.GENERIC_G484CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G484.svd
83468409

8410+
# Generic G484CEUx
8411+
GenG4.menu.pnum.GENERIC_G484CEUX=Generic G484CEUx
8412+
GenG4.menu.pnum.GENERIC_G484CEUX.upload.maximum_size=524288
8413+
GenG4.menu.pnum.GENERIC_G484CEUX.upload.maximum_data_size=131072
8414+
GenG4.menu.pnum.GENERIC_G484CEUX.build.board=GENERIC_G484CEUX
8415+
GenG4.menu.pnum.GENERIC_G484CEUX.build.product_line=STM32G484xx
8416+
GenG4.menu.pnum.GENERIC_G484CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
8417+
GenG4.menu.pnum.GENERIC_G484CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G484.svd
8418+
83478419
# Generic G484METx
83488420
GenG4.menu.pnum.GENERIC_G484METX=Generic G484METx
83498421
GenG4.menu.pnum.GENERIC_G484METX.upload.maximum_size=524288

Diff for: ‎variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/generic_clock.c

+59-2
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,65 @@
2323
*/
2424
WEAK void SystemClock_Config(void)
2525
{
26-
/* SystemClock_Config can be generated by STM32CubeMX */
27-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
26+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
27+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
28+
#ifdef USBCON
29+
RCC_CRSInitTypeDef pInit = {};
30+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
31+
#endif
32+
33+
/* Configure the main internal regulator output voltage */
34+
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
35+
36+
/* Initializes the RCC Oscillators */
37+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
38+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
39+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
40+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
41+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
42+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
43+
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
44+
RCC_OscInitStruct.PLL.PLLN = 75;
45+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
46+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
47+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
48+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
49+
Error_Handler();
50+
}
51+
52+
/* Initializes the CPU, AHB and APB buses clocks */
53+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
54+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
55+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
56+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
57+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
58+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
59+
60+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
61+
Error_Handler();
62+
}
63+
64+
#ifdef USBCON
65+
/* Enable the SYSCFG APB clock */
66+
__HAL_RCC_CRS_CLK_ENABLE();
67+
68+
/* Configures CRS */
69+
pInit.Prescaler = RCC_CRS_SYNC_DIV1;
70+
pInit.Source = RCC_CRS_SYNC_SOURCE_USB;
71+
pInit.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
72+
pInit.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
73+
pInit.ErrorLimitValue = 34;
74+
pInit.HSI48CalibrationValue = 32;
75+
76+
HAL_RCCEx_CRSConfig(&pInit);
77+
78+
/* Initializes the peripherals clocks */
79+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
80+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
81+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
82+
Error_Handler();
83+
}
84+
#endif
2885
}
2986

3087
#endif /* ARDUINO_GENERIC_* */

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