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fpistmfpistm
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fix(h5): review system clock configuration
SPI clock selection have to be explicitly done and ensure frequency allows standard SPI freq based on the SPI baudrate prescaler. Also prevent to use HSE as it is not operational as oscillator. See Errata sheet. Fixes #2598 Signed-off-by: Frederic Pillon <[email protected]>
1 parent a2e6705 commit 82b932a

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10 files changed

+282
-122
lines changed

10 files changed

+282
-122
lines changed

Diff for: ‎variants/STM32H5xx/H503CB(T-U)/generic_clock.c

+24-10
Original file line numberDiff line numberDiff line change
@@ -33,11 +33,8 @@ WEAK void SystemClock_Config(void)
3333
/** Initializes the RCC Oscillators according to the specified parameters
3434
* in the RCC_OscInitTypeDef structure.
3535
*/
36-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
37-
| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_CSI;
38-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
39-
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV2;
40-
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
37+
| RCC_OSCILLATORTYPE_CSI;
4138
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
4239
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
4340
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
@@ -47,7 +44,7 @@ WEAK void SystemClock_Config(void)
4744
RCC_OscInitStruct.PLL.PLLM = 1;
4845
RCC_OscInitStruct.PLL.PLLN = 125;
4946
RCC_OscInitStruct.PLL.PLLP = 2;
50-
RCC_OscInitStruct.PLL.PLLQ = 2;
47+
RCC_OscInitStruct.PLL.PLLQ = 10;
5148
RCC_OscInitStruct.PLL.PLLR = 2;
5249
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
5350
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
@@ -71,14 +68,31 @@ WEAK void SystemClock_Config(void)
7168
Error_Handler();
7269
}
7370

71+
/** Configure the programming delay
72+
*/
73+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
74+
7475
/** Initializes the peripherals clock
7576
*/
7677
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
77-
| RCC_PERIPHCLK_USB;
78-
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSI;
79-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
78+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
79+
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
80+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
81+
PeriphClkInitStruct.PLL2.PLL2M = 1;
82+
PeriphClkInitStruct.PLL2.PLL2N = 125;
83+
PeriphClkInitStruct.PLL2.PLL2P = 2;
84+
PeriphClkInitStruct.PLL2.PLL2Q = 15;
85+
PeriphClkInitStruct.PLL2.PLL2R = 4;
86+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
87+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
88+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
89+
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
91+
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
8092
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
81-
93+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
94+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
95+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
8296
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
8397
Error_Handler();
8498
}

Diff for: ‎variants/STM32H5xx/H503RBT/generic_clock.c

+10-2
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ WEAK void SystemClock_Config(void)
4343
RCC_OscInitStruct.PLL.PLLM = 1;
4444
RCC_OscInitStruct.PLL.PLLN = 125;
4545
RCC_OscInitStruct.PLL.PLLP = 2;
46-
RCC_OscInitStruct.PLL.PLLQ = 2;
46+
RCC_OscInitStruct.PLL.PLLQ = 10;
4747
RCC_OscInitStruct.PLL.PLLR = 2;
4848
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
4949
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
@@ -64,9 +64,14 @@ WEAK void SystemClock_Config(void)
6464
Error_Handler();
6565
}
6666

67+
/** Configure the programming delay
68+
*/
69+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
70+
6771
/* Initializes the peripherals clock */
6872
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
69-
| RCC_PERIPHCLK_USB;
73+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
74+
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
7075
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
7176
PeriphClkInitStruct.PLL2.PLL2M = 1;
7277
PeriphClkInitStruct.PLL2.PLL2N = 125;
@@ -80,6 +85,9 @@ WEAK void SystemClock_Config(void)
8085
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8186
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
8287
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
88+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
89+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
90+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
8391
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
8492
Error_Handler();
8593
}

Diff for: ‎variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp

+32-18
Original file line numberDiff line numberDiff line change
@@ -114,20 +114,27 @@ WEAK void SystemClock_Config(void)
114114

115115
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
116116

117+
/** Configure LSE Drive Capability
118+
* Warning : Only applied when the LSE is disabled.
119+
*/
120+
HAL_PWR_EnableBkUpAccess();
121+
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
122+
117123
/* Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef structure */
118-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE
119-
| RCC_OSCILLATORTYPE_LSE;
120-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
124+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE
125+
| RCC_OSCILLATORTYPE_CSI;
121126
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
122127
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
128+
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
129+
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
123130
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
124-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
125-
RCC_OscInitStruct.PLL.PLLM = 12;
126-
RCC_OscInitStruct.PLL.PLLN = 250;
131+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
132+
RCC_OscInitStruct.PLL.PLLM = 1;
133+
RCC_OscInitStruct.PLL.PLLN = 125;
127134
RCC_OscInitStruct.PLL.PLLP = 2;
128-
RCC_OscInitStruct.PLL.PLLQ = 2;
135+
RCC_OscInitStruct.PLL.PLLQ = 10;
129136
RCC_OscInitStruct.PLL.PLLR = 2;
130-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
137+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
131138
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
132139
RCC_OscInitStruct.PLL.PLLFRACN = 0;
133140
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
@@ -148,23 +155,30 @@ WEAK void SystemClock_Config(void)
148155
Error_Handler();
149156
}
150157

158+
/** Configure the programming delay
159+
*/
160+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
161+
151162
/* Initializes the peripherals clock */
152-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
153-
| RCC_PERIPHCLK_USB;
154-
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
155-
PeriphClkInitStruct.PLL2.PLL2M = 2;
156-
PeriphClkInitStruct.PLL2.PLL2N = 31;
163+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_ADCDAC
164+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SPI1
165+
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
166+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
167+
PeriphClkInitStruct.PLL2.PLL2M = 1;
168+
PeriphClkInitStruct.PLL2.PLL2N = 125;
157169
PeriphClkInitStruct.PLL2.PLL2P = 2;
158-
PeriphClkInitStruct.PLL2.PLL2Q = 12;
159-
PeriphClkInitStruct.PLL2.PLL2R = 3;
160-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_3;
170+
PeriphClkInitStruct.PLL2.PLL2Q = 15;
171+
PeriphClkInitStruct.PLL2.PLL2R = 4;
172+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
161173
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
162-
PeriphClkInitStruct.PLL2.PLL2FRACN = 2048;
174+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
163175
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
164176
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
165177
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
166178
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
167-
179+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
180+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
181+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
168182
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
169183
Error_Handler();
170184
}

Diff for: ‎variants/STM32H5xx/H562R(G-I)T/generic_clock.c

+29-17
Original file line numberDiff line numberDiff line change
@@ -33,14 +33,16 @@ WEAK void SystemClock_Config(void)
3333
/** Initializes the RCC Oscillators according to the specified parameters
3434
* in the RCC_OscInitTypeDef structure.
3535
*/
36-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_CSI;
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
37+
| RCC_OSCILLATORTYPE_CSI;
3738
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
39+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
3840
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
3941
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
4042
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
4143
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
4244
RCC_OscInitStruct.PLL.PLLM = 1;
43-
RCC_OscInitStruct.PLL.PLLN = 120;
45+
RCC_OscInitStruct.PLL.PLLN = 125;
4446
RCC_OscInitStruct.PLL.PLLP = 2;
4547
RCC_OscInitStruct.PLL.PLLQ = 10;
4648
RCC_OscInitStruct.PLL.PLLR = 2;
@@ -51,6 +53,7 @@ WEAK void SystemClock_Config(void)
5153
Error_Handler();
5254
}
5355

56+
5457
/** Initializes the CPU, AHB and APB buses clocks
5558
*/
5659
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -66,36 +69,45 @@ WEAK void SystemClock_Config(void)
6669
Error_Handler();
6770
}
6871

72+
/** Configure the programming delay
73+
*/
74+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
75+
6976
/** Initializes the peripherals clock
7077
*/
71-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_DAC
72-
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SDMMC1
73-
| RCC_PERIPHCLK_USB;
78+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
79+
| RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB
80+
| RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2
81+
| RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6;
7482
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
7583
PeriphClkInitStruct.PLL2.PLL2M = 1;
7684
PeriphClkInitStruct.PLL2.PLL2N = 125;
7785
PeriphClkInitStruct.PLL2.PLL2P = 2;
78-
PeriphClkInitStruct.PLL2.PLL2Q = 2;
79-
PeriphClkInitStruct.PLL2.PLL2R = 5;
86+
PeriphClkInitStruct.PLL2.PLL2Q = 15;
87+
PeriphClkInitStruct.PLL2.PLL2R = 10;
8088
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
8189
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
82-
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
83-
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVR;
90+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
91+
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
92+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8493
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
94+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
95+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
96+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
97+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
98+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
8599
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI;
86-
PeriphClkInitStruct.PLL3.PLL3M = 1;
87-
PeriphClkInitStruct.PLL3.PLL3N = 40;
100+
PeriphClkInitStruct.PLL3.PLL3M = 2;
101+
PeriphClkInitStruct.PLL3.PLL3N = 125;
88102
PeriphClkInitStruct.PLL3.PLL3P = 2;
89103
PeriphClkInitStruct.PLL3.PLL3Q = 5;
90104
PeriphClkInitStruct.PLL3.PLL3R = 2;
91-
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_0;
92-
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_MEDIUM;
93-
PeriphClkInitStruct.PLL3.PLL3FRACN = 0.0;
105+
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3;
106+
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE;
107+
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
94108
PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ;
95-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL3Q;
96-
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
109+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q;
97110
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL1Q;
98-
99111
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
100112
Error_Handler();
101113
}

Diff for: ‎variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp

+38-22
Original file line numberDiff line numberDiff line change
@@ -112,23 +112,27 @@ WEAK void SystemClock_Config(void)
112112
/** Initializes the RCC Oscillators according to the specified parameters
113113
* in the RCC_OscInitTypeDef structure.
114114
*/
115-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSE ;
116-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
115+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
116+
| RCC_OSCILLATORTYPE_CSI;
117117
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
118+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
119+
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
120+
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
118121
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
119-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE;
122+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
120123
RCC_OscInitStruct.PLL.PLLM = 1;
121-
RCC_OscInitStruct.PLL.PLLN = 62;
124+
RCC_OscInitStruct.PLL.PLLN = 125;
122125
RCC_OscInitStruct.PLL.PLLP = 2;
123-
RCC_OscInitStruct.PLL.PLLQ = 2;
126+
RCC_OscInitStruct.PLL.PLLQ = 10;
124127
RCC_OscInitStruct.PLL.PLLR = 2;
125-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_3;
128+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
126129
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
127-
RCC_OscInitStruct.PLL.PLLFRACN = 4096;
130+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
128131
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
129132
Error_Handler();
130133
}
131134

135+
132136
/** Initializes the CPU, AHB and APB buses clocks
133137
*/
134138
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -147,37 +151,49 @@ WEAK void SystemClock_Config(void)
147151
/** Configure the programming delay
148152
*/
149153
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
154+
150155
/** Initializes the peripherals clock
151-
*/
152-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC
153-
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB;
154-
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
156+
*/
157+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
158+
| RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB
159+
| RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2
160+
| RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6;
161+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
155162
PeriphClkInitStruct.PLL2.PLL2M = 1;
156-
PeriphClkInitStruct.PLL2.PLL2N = 32;
163+
PeriphClkInitStruct.PLL2.PLL2N = 125;
157164
PeriphClkInitStruct.PLL2.PLL2P = 2;
158-
PeriphClkInitStruct.PLL2.PLL2Q = 8;
159-
PeriphClkInitStruct.PLL2.PLL2R = 4;
165+
PeriphClkInitStruct.PLL2.PLL2Q = 15;
166+
PeriphClkInitStruct.PLL2.PLL2R = 10;
160167
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
161168
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
162169
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
163170
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
164171
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
165-
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
166172
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
167-
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_HSE;
168-
PeriphClkInitStruct.PLL3.PLL3M = 1;
169-
PeriphClkInitStruct.PLL3.PLL3N = 48;
173+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
174+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
175+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
176+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
177+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
178+
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI;
179+
PeriphClkInitStruct.PLL3.PLL3M = 2;
180+
PeriphClkInitStruct.PLL3.PLL3N = 125;
170181
PeriphClkInitStruct.PLL3.PLL3P = 2;
171-
PeriphClkInitStruct.PLL3.PLL3Q = 8;
182+
PeriphClkInitStruct.PLL3.PLL3Q = 5;
172183
PeriphClkInitStruct.PLL3.PLL3R = 2;
173-
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_0;
174-
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_MEDIUM;
184+
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3_VCIRANGE_3;
185+
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE;
175186
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
176187
PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ;
177-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3Q;
188+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q;
189+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL1Q;
178190
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
179191
Error_Handler();
180192
}
193+
194+
/** Configure the programming delay
195+
*/
196+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
181197
}
182198

183199
#ifdef __cplusplus

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