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Merge pull request #2556 from thernstig/C071RBTx
feat: Generic variant C071RBTx support
2 parents dffdc7a + a8a6903 commit 7a2786a

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Diff for: ‎CI/build/conf/cores_config.json

+1
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
"GENERIC_C031C4UX",
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"GENERIC_C031C6TX",
5151
"GENERIC_C031F4PX",
52+
"GENERIC_C071R8TX",
5253
"GENERIC_F031C4TX",
5354
"GENERIC_F031E6YX",
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"GENERIC_F031F4PX",

Diff for: ‎CI/build/conf/cores_config_ci.json

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Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@
4949
"GENERIC_C031C4UX",
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"GENERIC_C031C6TX",
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"GENERIC_C031F4PX",
52+
"GENERIC_C071R8TX",
5253
"GENERIC_F031C4TX",
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"GENERIC_F031E6YX",
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"GENERIC_F031F4PX",

Diff for: ‎README.md

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Original file line numberDiff line numberDiff line change
@@ -214,6 +214,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32C011J4<br>STM32C011J6 | Generic Board | *2.8.0* | |
215215
| :green_heart: | STM32C031C4<br>STM32C031C6 | Generic Board | *2.5.0* | |
216216
| :green_heart: | STM32C031F4<br>STM32C031F6 | Generic Board | *2.6.0* | |
217+
| :yellow_heart: | STM32C071R8<br>STM32C071RB | Generic Board | **2.9.0** | |
217218

218219
### Generic STM32F0 boards
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Diff for: ‎boards.txt

+16
Original file line numberDiff line numberDiff line change
@@ -1668,6 +1668,22 @@ GenC0.menu.pnum.GENERIC_C031F6PX.build.product_line=STM32C031xx
16681668
GenC0.menu.pnum.GENERIC_C031F6PX.build.variant=STM32C0xx/C011D6Y_C011F(4-6)(P-U)_C031F(4-6)P
16691669
GenC0.menu.pnum.GENERIC_C031F6PX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C031.svd
16701670

1671+
# Generic C071R8Tx
1672+
GenC0.menu.pnum.GENERIC_C071R8TX=Generic C071R8Tx
1673+
GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_size=65536
1674+
GenC0.menu.pnum.GENERIC_C071R8TX.upload.maximum_data_size=24576
1675+
GenC0.menu.pnum.GENERIC_C071R8TX.build.board=GENERIC_C071R8TX
1676+
GenC0.menu.pnum.GENERIC_C071R8TX.build.product_line=STM32C071xx
1677+
GenC0.menu.pnum.GENERIC_C071R8TX.build.variant=STM32C0xx/C071R(8-B)T
1678+
1679+
# Generic C071RBTx
1680+
GenC0.menu.pnum.GENERIC_C071RBTX=Generic C071RBTx
1681+
GenC0.menu.pnum.GENERIC_C071RBTX.upload.maximum_size=131072
1682+
GenC0.menu.pnum.GENERIC_C071RBTX.upload.maximum_data_size=24576
1683+
GenC0.menu.pnum.GENERIC_C071RBTX.build.board=GENERIC_C071RBTX
1684+
GenC0.menu.pnum.GENERIC_C071RBTX.build.product_line=STM32C071xx
1685+
GenC0.menu.pnum.GENERIC_C071RBTX.build.variant=STM32C0xx/C071R(8-B)T
1686+
16711687
# Upload menu
16721688
GenC0.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
16731689
GenC0.menu.upload_method.swdMethod.upload.protocol=swd

Diff for: ‎cmake/boards_db.cmake

+108
Original file line numberDiff line numberDiff line change
@@ -7130,6 +7130,114 @@ target_compile_options(GENERIC_C031F6PX_serial_none INTERFACE
71307130
"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
71317131
)
71327132

7133+
# GENERIC_C071R8TX
7134+
# -----------------------------------------------------------------------------
7135+
7136+
set(GENERIC_C071R8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C071R(8-B)T")
7137+
set(GENERIC_C071R8TX_MAXSIZE 65536)
7138+
set(GENERIC_C071R8TX_MAXDATASIZE 24576)
7139+
set(GENERIC_C071R8TX_MCU cortex-m0plus)
7140+
set(GENERIC_C071R8TX_FPCONF "-")
7141+
add_library(GENERIC_C071R8TX INTERFACE)
7142+
target_compile_options(GENERIC_C071R8TX INTERFACE
7143+
"SHELL:-DSTM32C071xx -D__CORTEX_SC=0"
7144+
"SHELL:"
7145+
"SHELL:"
7146+
"SHELL: "
7147+
-mcpu=${GENERIC_C071R8TX_MCU}
7148+
)
7149+
target_compile_definitions(GENERIC_C071R8TX INTERFACE
7150+
"STM32C0xx"
7151+
"ARDUINO_GENERIC_C071R8TX"
7152+
"BOARD_NAME=\"GENERIC_C071R8TX\""
7153+
"BOARD_ID=GENERIC_C071R8TX"
7154+
"VARIANT_H=\"variant_generic.h\""
7155+
)
7156+
target_include_directories(GENERIC_C071R8TX INTERFACE
7157+
${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
7158+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
7159+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
7160+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
7161+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
7162+
${GENERIC_C071R8TX_VARIANT_PATH}
7163+
)
7164+
7165+
target_link_options(GENERIC_C071R8TX INTERFACE
7166+
"LINKER:--default-script=${GENERIC_C071R8TX_VARIANT_PATH}/ldscript.ld"
7167+
"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
7168+
"LINKER:--defsym=LD_MAX_SIZE=65536"
7169+
"LINKER:--defsym=LD_MAX_DATA_SIZE=24576"
7170+
"SHELL: "
7171+
-mcpu=${GENERIC_C071R8TX_MCU}
7172+
)
7173+
7174+
add_library(GENERIC_C071R8TX_serial_disabled INTERFACE)
7175+
target_compile_options(GENERIC_C071R8TX_serial_disabled INTERFACE
7176+
"SHELL:"
7177+
)
7178+
add_library(GENERIC_C071R8TX_serial_generic INTERFACE)
7179+
target_compile_options(GENERIC_C071R8TX_serial_generic INTERFACE
7180+
"SHELL:-DHAL_UART_MODULE_ENABLED"
7181+
)
7182+
add_library(GENERIC_C071R8TX_serial_none INTERFACE)
7183+
target_compile_options(GENERIC_C071R8TX_serial_none INTERFACE
7184+
"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
7185+
)
7186+
7187+
# GENERIC_C071RBTX
7188+
# -----------------------------------------------------------------------------
7189+
7190+
set(GENERIC_C071RBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C071R(8-B)T")
7191+
set(GENERIC_C071RBTX_MAXSIZE 131072)
7192+
set(GENERIC_C071RBTX_MAXDATASIZE 24576)
7193+
set(GENERIC_C071RBTX_MCU cortex-m0plus)
7194+
set(GENERIC_C071RBTX_FPCONF "-")
7195+
add_library(GENERIC_C071RBTX INTERFACE)
7196+
target_compile_options(GENERIC_C071RBTX INTERFACE
7197+
"SHELL:-DSTM32C071xx -D__CORTEX_SC=0"
7198+
"SHELL:"
7199+
"SHELL:"
7200+
"SHELL: "
7201+
-mcpu=${GENERIC_C071RBTX_MCU}
7202+
)
7203+
target_compile_definitions(GENERIC_C071RBTX INTERFACE
7204+
"STM32C0xx"
7205+
"ARDUINO_GENERIC_C071RBTX"
7206+
"BOARD_NAME=\"GENERIC_C071RBTX\""
7207+
"BOARD_ID=GENERIC_C071RBTX"
7208+
"VARIANT_H=\"variant_generic.h\""
7209+
)
7210+
target_include_directories(GENERIC_C071RBTX INTERFACE
7211+
${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
7212+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
7213+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
7214+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
7215+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
7216+
${GENERIC_C071RBTX_VARIANT_PATH}
7217+
)
7218+
7219+
target_link_options(GENERIC_C071RBTX INTERFACE
7220+
"LINKER:--default-script=${GENERIC_C071RBTX_VARIANT_PATH}/ldscript.ld"
7221+
"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
7222+
"LINKER:--defsym=LD_MAX_SIZE=131072"
7223+
"LINKER:--defsym=LD_MAX_DATA_SIZE=24576"
7224+
"SHELL: "
7225+
-mcpu=${GENERIC_C071RBTX_MCU}
7226+
)
7227+
7228+
add_library(GENERIC_C071RBTX_serial_disabled INTERFACE)
7229+
target_compile_options(GENERIC_C071RBTX_serial_disabled INTERFACE
7230+
"SHELL:"
7231+
)
7232+
add_library(GENERIC_C071RBTX_serial_generic INTERFACE)
7233+
target_compile_options(GENERIC_C071RBTX_serial_generic INTERFACE
7234+
"SHELL:-DHAL_UART_MODULE_ENABLED"
7235+
)
7236+
add_library(GENERIC_C071RBTX_serial_none INTERFACE)
7237+
target_compile_options(GENERIC_C071RBTX_serial_none INTERFACE
7238+
"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
7239+
)
7240+
71337241
# GENERIC_F030C6TX
71347242
# -----------------------------------------------------------------------------
71357243

Diff for: ‎libraries/Wire/src/utility/twi.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -763,8 +763,8 @@ void i2c_init(i2c_t *obj, uint32_t timing, uint32_t ownAddress)
763763
__HAL_RCC_I2C2_FORCE_RESET();
764764
__HAL_RCC_I2C2_RELEASE_RESET();
765765
obj->irq = I2C2_EV_IRQn;
766-
#if !defined(STM32F0xx) && !defined(STM32G0xx) && !defined(STM32L0xx) && \
767-
!defined(STM32U0xx)
766+
#if !defined(STM32C0xx) && !defined(STM32F0xx) && !defined(STM32G0xx) && \
767+
!defined(STM32L0xx) && !defined(STM32U0xx)
768768
obj->irqER = I2C2_ER_IRQn;
769769
#endif /* !STM32F0xx && !STM32G0xx && !STM32L0xx && !STM32U0xx */
770770
i2c_handles[I2C2_INDEX] = handle;

Diff for: ‎variants/STM32C0xx/C071R(8-B)T/generic_clock.c

+27-2
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
*/
1313
#if defined(ARDUINO_GENERIC_C071R8TX) || defined(ARDUINO_GENERIC_C071RBTX)
1414
#include "pins_arduino.h"
15+
#include "stm32yyxx_ll_utils.h"
1516

1617
/**
1718
* @brief System Clock Configuration
@@ -20,8 +21,32 @@
2021
*/
2122
WEAK void SystemClock_Config(void)
2223
{
23-
/* SystemClock_Config can be generated by STM32CubeMX */
24-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
25+
26+
/* HSI configuration and activation */
27+
LL_RCC_HSI_Enable();
28+
while (LL_RCC_HSI_IsReady() != 1) {
29+
}
30+
31+
LL_RCC_HSI_SetCalibTrimming(64);
32+
LL_RCC_SetHSIDiv(LL_RCC_HSI_DIV_1);
33+
/* Set AHB prescaler*/
34+
LL_RCC_SetAHBPrescaler(LL_RCC_HCLK_DIV_1);
35+
36+
/* Sysclk activation on the HSI */
37+
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
38+
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI) {
39+
}
40+
41+
/* Set APB1 prescaler*/
42+
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
43+
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
44+
LL_SetSystemCoreClock(48000000);
45+
46+
/* Update the time base */
47+
if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) {
48+
Error_Handler();
49+
}
2550
}
2651

2752
#endif /* ARDUINO_GENERIC_* */

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