@@ -472,7 +472,9 @@ extern "C" {
472
472
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
473
473
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
474
474
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
475
+ #if !defined(STM32F2 ) && !defined(STM32F4 ) && !defined(STM32F7 ) && !defined(STM32H7 ) && !defined(STM32H5 )
475
476
#define PAGESIZE FLASH_PAGE_SIZE
477
+ #endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
476
478
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
477
479
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
478
480
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -601,6 +603,15 @@ extern "C" {
601
603
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
602
604
#endif /* STM32G4 */
603
605
606
+ #if defined(STM32U5 )
607
+
608
+ #define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster
609
+ #define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster
610
+ #define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection
611
+ #define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection
612
+
613
+ #endif /* STM32U5 */
614
+
604
615
#if defined(STM32H5 )
605
616
#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
606
617
#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
@@ -806,6 +817,21 @@ extern "C" {
806
817
#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
807
818
#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
808
819
#endif /* STM32U5 */
820
+
821
+ #if defined(STM32WBA )
822
+ #define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
823
+ #define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
824
+ #define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
825
+ #define GPIO_AF11_RF_IO1 GPIO_AF11_RF
826
+ #define GPIO_AF11_RF_IO2 GPIO_AF11_RF
827
+ #define GPIO_AF11_RF_IO3 GPIO_AF11_RF
828
+ #define GPIO_AF11_RF_IO4 GPIO_AF11_RF
829
+ #define GPIO_AF11_RF_IO5 GPIO_AF11_RF
830
+ #define GPIO_AF11_RF_IO6 GPIO_AF11_RF
831
+ #define GPIO_AF11_RF_IO7 GPIO_AF11_RF
832
+ #define GPIO_AF11_RF_IO8 GPIO_AF11_RF
833
+ #define GPIO_AF11_RF_IO9 GPIO_AF11_RF
834
+ #endif /* STM32WBA */
809
835
/**
810
836
* @}
811
837
*/
@@ -860,6 +886,10 @@ extern "C" {
860
886
#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
861
887
#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
862
888
889
+ #if defined(STM32F3 ) || defined(STM32G4 ) || defined(STM32H7 )
890
+ #define HRTIMInterruptResquests HRTIMInterruptRequests
891
+ #endif /* STM32F3 || STM32G4 || STM32H7 */
892
+
863
893
#if defined(STM32G4 )
864
894
#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
865
895
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
@@ -997,8 +1027,8 @@ extern "C" {
997
1027
#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0)
998
1028
#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1)
999
1029
#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
1000
-
1001
1030
#endif /* STM32F3 */
1031
+
1002
1032
/**
1003
1033
* @}
1004
1034
*/
@@ -1249,10 +1279,10 @@ extern "C" {
1249
1279
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
1250
1280
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
1251
1281
1252
- #if defined(STM32H5 ) || defined(STM32H7RS )
1282
+ #if defined(STM32H5 ) || defined(STM32H7RS ) || defined( STM32N6 )
1253
1283
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
1254
1284
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1255
- #endif /* STM32H5 || STM32H7RS */
1285
+ #endif /* STM32H5 || STM32H7RS || STM32N6 */
1256
1286
1257
1287
#if defined(STM32WBA )
1258
1288
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1264,10 +1294,10 @@ extern "C" {
1264
1294
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
1265
1295
#endif /* STM32WBA */
1266
1296
1267
- #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS )
1297
+ #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS ) || defined( STM32N6 )
1268
1298
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
1269
1299
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1270
- #endif /* STM32H5 || STM32WBA || STM32H7RS */
1300
+ #endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
1271
1301
1272
1302
#if defined(STM32F7 )
1273
1303
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1817,7 +1847,7 @@ extern "C" {
1817
1847
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
1818
1848
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
1819
1849
1820
- #define HAL_I2CFastModePlusConfig (SYSCFG_I2CFastModePlus , cmd ) ((cmd == ENABLE)? \
1850
+ #define HAL_I2CFastModePlusConfig (SYSCFG_I2CFastModePlus , cmd ) ((( cmd) == ENABLE)? \
1821
1851
HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
1822
1852
HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
1823
1853
@@ -1999,12 +2029,12 @@ extern "C" {
1999
2029
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
2000
2030
* @{
2001
2031
*/
2002
- #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS )
2032
+ #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS ) || defined( STM32N6 )
2003
2033
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
2004
2034
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
2005
2035
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
2006
2036
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
2007
- #endif /* STM32H5 || STM32WBA || STM32H7RS */
2037
+ #endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
2008
2038
2009
2039
/**
2010
2040
* @}
@@ -2731,6 +2761,12 @@ extern "C" {
2731
2761
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
2732
2762
#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
2733
2763
#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
2764
+ #if defined(STM32C0 )
2765
+ #define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
2766
+ #define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
2767
+ #define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
2768
+ #define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
2769
+ #endif /* STM32C0 */
2734
2770
#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
2735
2771
#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
2736
2772
#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3659,7 +3695,7 @@ extern "C" {
3659
3695
#endif
3660
3696
3661
3697
#if defined(STM32L4 ) || defined(STM32WB ) || defined(STM32G0 ) || defined(STM32G4 ) || defined(STM32L5 ) || \
3662
- defined(STM32WL ) || defined(STM32C0 ) || defined(STM32H7RS ) || defined(STM32U0 )
3698
+ defined(STM32WL ) || defined(STM32C0 ) || defined(STM32N6 ) || defined( STM32H7RS ) || defined(STM32U0 )
3663
3699
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
3664
3700
#else
3665
3701
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3910,7 +3946,8 @@ extern "C" {
3910
3946
*/
3911
3947
#if defined (STM32G0 ) || defined (STM32L5 ) || defined (STM32L412xx ) || defined (STM32L422xx ) || \
3912
3948
defined (STM32L4P5xx )|| defined (STM32L4Q5xx ) || defined (STM32G4 ) || defined (STM32WL ) || defined (STM32U5 ) || \
3913
- defined (STM32WBA ) || defined (STM32H5 ) || defined (STM32C0 ) || defined (STM32H7RS ) || defined (STM32U0 )
3949
+ defined (STM32WBA ) || defined (STM32H5 ) || defined (STM32C0 ) || defined (STM32N6 ) || \
3950
+ defined (STM32H7RS ) || defined (STM32U0 ) || defined (STM32U3 )
3914
3951
#else
3915
3952
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
3916
3953
#endif
@@ -4204,6 +4241,33 @@ extern "C" {
4204
4241
4205
4242
#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
4206
4243
#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
4244
+ #if defined(STM32U5 )
4245
+ #define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD
4246
+ #define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK
4247
+ #define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC
4248
+ #define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST
4249
+ #define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF
4250
+ #define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT
4251
+ #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM
4252
+ #define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM
4253
+ #define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK
4254
+ #define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ
4255
+ #define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT
4256
+ #define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0
4257
+ #define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1
4258
+ #define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM
4259
+ #define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG
4260
+ #define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM
4261
+ #define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM
4262
+ #define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT
4263
+ #define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM
4264
+ #define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM
4265
+ #define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID
4266
+ #define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0
4267
+ #define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1
4268
+ #define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK
4269
+ #define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK
4270
+ #endif
4207
4271
/**
4208
4272
* @}
4209
4273
*/
0 commit comments