Skip to content

Commit 713a020

Browse files
fpistmfpistm
committed
system(H5) update STM32H5xx HAL Drivers to v1.2.0
Included in STM32CubeH5 FW v1.2.0 Signed-off-by: Frederic Pillon <[email protected]>
1 parent 9078f73 commit 713a020

File tree

132 files changed

+4651
-2328
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

132 files changed

+4651
-2328
lines changed

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

+40-18
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
******************************************************************************
88
* @attention
99
*
10-
* Copyright (c) 2023 STMicroelectronics.
10+
* Copyright (c) 2021 STMicroelectronics.
1111
* All rights reserved.
1212
*
1313
* This software is licensed under terms that can be found in the LICENSE file
@@ -275,7 +275,7 @@ extern "C" {
275275
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
276276
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
277277

278-
#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5)
278+
#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
279279
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
280280
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
281281
#endif
@@ -548,6 +548,16 @@ extern "C" {
548548
#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
549549
#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
550550
#endif /* STM32U5 */
551+
#if defined(STM32U0)
552+
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
553+
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
554+
#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
555+
#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
556+
#define OB_USER_nBOOT0 OB_USER_NBOOT0
557+
#define OB_USER_nBOOT1 OB_USER_NBOOT1
558+
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
559+
#define OB_nBOOT0_SET OB_NBOOT0_SET
560+
#endif /* STM32U0 */
551561

552562
/**
553563
* @}
@@ -1239,10 +1249,10 @@ extern "C" {
12391249
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12401250
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12411251

1242-
#if defined(STM32H5)
1252+
#if defined(STM32H5) || defined(STM32H7RS)
12431253
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12441254
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1245-
#endif /* STM32H5 */
1255+
#endif /* STM32H5 || STM32H7RS */
12461256

12471257
#if defined(STM32WBA)
12481258
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1254,10 +1264,10 @@ extern "C" {
12541264
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12551265
#endif /* STM32WBA */
12561266

1257-
#if defined(STM32H5) || defined(STM32WBA)
1267+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
12581268
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12591269
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1260-
#endif /* STM32H5 || STM32WBA */
1270+
#endif /* STM32H5 || STM32WBA || STM32H7RS */
12611271

12621272
#if defined(STM32F7)
12631273
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1595,6 +1605,8 @@ extern "C" {
15951605
#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
15961606
#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
15971607

1608+
#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */
1609+
15981610
/**
15991611
* @}
16001612
*/
@@ -1987,12 +1999,12 @@ extern "C" {
19871999
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
19882000
* @{
19892001
*/
1990-
#if defined(STM32H5) || defined(STM32WBA)
2002+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
19912003
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
19922004
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
19932005
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
19942006
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
1995-
#endif /* STM32H5 || STM32WBA */
2007+
#endif /* STM32H5 || STM32WBA || STM32H7RS */
19962008

19972009
/**
19982010
* @}
@@ -2307,8 +2319,8 @@ extern "C" {
23072319
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23082320
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23092321
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2310-
# endif
2311-
# if defined(STM32F302xE) || defined(STM32F302xC)
2322+
#endif
2323+
#if defined(STM32F302xE) || defined(STM32F302xC)
23122324
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23132325
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23142326
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@@ -2341,8 +2353,8 @@ extern "C" {
23412353
((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23422354
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23432355
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2344-
# endif
2345-
# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
2356+
#endif
2357+
#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
23462358
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23472359
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23482360
((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@@ -2399,8 +2411,8 @@ extern "C" {
23992411
((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
24002412
((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
24012413
__HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
2402-
# endif
2403-
# if defined(STM32F373xC) ||defined(STM32F378xx)
2414+
#endif
2415+
#if defined(STM32F373xC) ||defined(STM32F378xx)
24042416
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24052417
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
24062418
#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@@ -2417,7 +2429,7 @@ extern "C" {
24172429
__HAL_COMP_COMP2_EXTI_GET_FLAG())
24182430
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
24192431
__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
2420-
# endif
2432+
#endif
24212433
#else
24222434
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24232435
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@@ -3642,8 +3654,12 @@ extern "C" {
36423654
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
36433655
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
36443656

3657+
#if defined(STM32U0)
3658+
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
3659+
#endif
3660+
36453661
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3646-
defined(STM32WL) || defined(STM32C0)
3662+
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
36473663
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36483664
#else
36493665
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3745,8 +3761,10 @@ extern "C" {
37453761
#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
37463762
#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
37473763
#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
3764+
#if !defined(STM32U0)
37483765
#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
37493766
#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
3767+
#endif
37503768

37513769
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
37523770
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3892,7 +3910,7 @@ extern "C" {
38923910
*/
38933911
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
38943912
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3895-
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0)
3913+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
38963914
#else
38973915
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
38983916
#endif
@@ -3929,7 +3947,8 @@ extern "C" {
39293947

39303948
#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \
39313949
defined (STM32H7) || \
3932-
defined (STM32L0) || defined (STM32L1)
3950+
defined (STM32L0) || defined (STM32L1) || \
3951+
defined (STM32WB)
39333952
#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
39343953
#endif
39353954

@@ -4214,6 +4233,9 @@ extern "C" {
42144233
#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
42154234

42164235
#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
4236+
4237+
#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
4238+
#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
42174239
/**
42184240
* @}
42194241
*/

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal.h

+6-8
Original file line numberDiff line numberDiff line change
@@ -202,8 +202,8 @@ extern HAL_TickFreqTypeDef uwTickFreq;
202202
/** @defgroup SBS_EPOCH_Selection EPOCH Selection
203203
* @{
204204
*/
205-
#define SBS_EPOCH_SEL_SECURE 0x0UL /*!< EPOCH secure selected */
206-
#define SBS_EPOCH_SEL_NONSECURE SBS_EPOCHSELCR_EPOCH_SEL_0 /*!< EPOCH non secure selected */
205+
#define SBS_EPOCH_SEL_NONSECURE 0x0UL /*!< EPOCH non secure selected */
206+
#define SBS_EPOCH_SEL_SECURE SBS_EPOCHSELCR_EPOCH_SEL_0 /*!< EPOCH secure selected */
207207
#define SBS_EPOCH_SEL_PUFCHECK SBS_EPOCHSELCR_EPOCH_SEL_1 /*!< EPOCH all zeros for PUF integrity check */
208208

209209
#define IS_SBS_EPOCH_SELECTION(SELECT) (((SELECT) == SBS_EPOCH_SEL_SECURE) || \
@@ -231,9 +231,9 @@ extern HAL_TickFreqTypeDef uwTickFreq;
231231
* @{
232232
*/
233233
#define SBS_HDPL_VALUE_0 0x000000B4U /*!< Hide protection level 0 */
234-
#define SBS_HDPL_VALUE_1 0x00000051U /*!< Hide protection level 0 */
235-
#define SBS_HDPL_VALUE_2 0x0000008AU /*!< Hide protection level 0 */
236-
#define SBS_HDPL_VALUE_3 0x0000006FU /*!< Hide protection level 0 */
234+
#define SBS_HDPL_VALUE_1 0x00000051U /*!< Hide protection level 1 */
235+
#define SBS_HDPL_VALUE_2 0x0000008AU /*!< Hide protection level 2 */
236+
#define SBS_HDPL_VALUE_3 0x0000006FU /*!< Hide protection level 3 */
237237
/**
238238
* @}
239239
*/
@@ -278,8 +278,7 @@ extern HAL_TickFreqTypeDef uwTickFreq;
278278
#define SBS_CLK SBS_SECCFGR_SBSSEC /*!< SBS clock control */
279279
#define SBS_CLASSB SBS_SECCFGR_CLASSBSEC /*!< Class B */
280280
#define SBS_FPU SBS_SECCFGR_FPUSEC /*!< FPU */
281-
#define SBS_SMPS SBS_SECCFGR_SDCE_SEC_EN /*!< SMPS */
282-
#define SBS_ALL (SBS_CLK | SBS_CLASSB | SBS_FPU | SBS_SMPS) /*!< All */
281+
#define SBS_ALL (SBS_CLK | SBS_CLASSB | SBS_FPU) /*!< All */
283282
/**
284283
* @}
285284
*/
@@ -667,7 +666,6 @@ extern HAL_TickFreqTypeDef uwTickFreq;
667666
#define IS_SBS_ITEMS_ATTRIBUTES(__ITEM__) ((((__ITEM__) & SBS_CLK) == SBS_CLK) || \
668667
(((__ITEM__) & SBS_CLASSB) == SBS_CLASSB) || \
669668
(((__ITEM__) & SBS_FPU) == SBS_FPU) || \
670-
(((__ITEM__) & SBS_SMPS) == SBS_SMPS) || \
671669
(((__ITEM__) & ~(SBS_ALL)) == 0U))
672670

673671
#define IS_SBS_ATTRIBUTES(__ATTRIBUTES__) (((__ATTRIBUTES__) == SBS_SEC) ||\

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_adc.h

+24
Original file line numberDiff line numberDiff line change
@@ -1754,6 +1754,30 @@ __LL_ADC_CALC_DATA_TO_VOLTAGE((__VREFANALOG_VOLTAGE__),\
17541754
(__ADC_DATA__),\
17551755
(__ADC_RESOLUTION__))
17561756

1757+
/**
1758+
* @brief Helper macro to calculate the voltage (unit: mVolt)
1759+
* corresponding to a ADC conversion data (unit: digital value)
1760+
* in differential ended mode.
1761+
* @note Analog reference voltage (Vref+) must be either known from
1762+
* user board environment or can be calculated using ADC measurement
1763+
* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
1764+
* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
1765+
* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
1766+
* (unit: digital value).
1767+
* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
1768+
* @arg @ref ADC_RESOLUTION_12B
1769+
* @arg @ref ADC_RESOLUTION_10B
1770+
* @arg @ref ADC_RESOLUTION_8B
1771+
* @arg @ref ADC_RESOLUTION_6B
1772+
* @retval ADC conversion data equivalent voltage value (unit: mVolt)
1773+
*/
1774+
#define __HAL_ADC_CALC_DIFF_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
1775+
__ADC_DATA__,\
1776+
__ADC_RESOLUTION__) \
1777+
__LL_ADC_CALC_DIFF_DATA_TO_VOLTAGE((__VREFANALOG_VOLTAGE__),\
1778+
(__ADC_DATA__),\
1779+
(__ADC_RESOLUTION__))
1780+
17571781
/**
17581782
* @brief Helper macro to calculate analog reference voltage (Vref+)
17591783
* (unit: mVolt) from ADC conversion data of internal voltage

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_conf_template.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -142,7 +142,7 @@ The real value may vary depending on the variations
142142
in voltage and temperature.*/
143143

144144
#if !defined (LSI_STARTUP_TIME)
145-
#define LSI_STARTUP_TIME 130UL /*!< Time out for LSI start up, in ms */
145+
#define LSI_STARTUP_TIME 130UL /*!< Time out for LSI start up, in us */
146146
#endif /* LSI_STARTUP_TIME */
147147

148148
/**

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_cordic.h

+16-5
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,6 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
149149
* @}
150150
*/
151151

152-
153152
/* Exported constants --------------------------------------------------------*/
154153
/** @defgroup CORDIC_Exported_Constants CORDIC Exported Constants
155154
* @{
@@ -166,6 +165,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
166165
#if USE_HAL_CORDIC_REGISTER_CALLBACKS == 1
167166
#define HAL_CORDIC_ERROR_INVALID_CALLBACK ((uint32_t)0x00000010U) /*!< Invalid Callback error */
168167
#endif /* USE_HAL_CORDIC_REGISTER_CALLBACKS */
168+
169169
/**
170170
* @}
171171
*/
@@ -183,6 +183,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
183183
#define CORDIC_FUNCTION_HARCTANGENT ((uint32_t)(CORDIC_CSR_FUNC_2 | CORDIC_CSR_FUNC_1 | CORDIC_CSR_FUNC_0))/*!< Hyperbolic Arctangent */
184184
#define CORDIC_FUNCTION_NATURALLOG ((uint32_t)(CORDIC_CSR_FUNC_3)) /*!< Natural Logarithm */
185185
#define CORDIC_FUNCTION_SQUAREROOT ((uint32_t)(CORDIC_CSR_FUNC_3 | CORDIC_CSR_FUNC_0)) /*!< Square Root */
186+
186187
/**
187188
* @}
188189
*/
@@ -212,6 +213,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
212213
#define CORDIC_PRECISION_15CYCLES ((uint32_t)(CORDIC_CSR_PRECISION_3\
213214
| CORDIC_CSR_PRECISION_2 | CORDIC_CSR_PRECISION_1\
214215
|CORDIC_CSR_PRECISION_0))
216+
215217
/**
216218
* @}
217219
*/
@@ -229,6 +231,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
229231
#define CORDIC_SCALE_5 ((uint32_t)(CORDIC_CSR_SCALE_2 | CORDIC_CSR_SCALE_0))
230232
#define CORDIC_SCALE_6 ((uint32_t)(CORDIC_CSR_SCALE_2 | CORDIC_CSR_SCALE_1))
231233
#define CORDIC_SCALE_7 ((uint32_t)(CORDIC_CSR_SCALE_2 | CORDIC_CSR_SCALE_1 | CORDIC_CSR_SCALE_0))
234+
232235
/**
233236
* @}
234237
*/
@@ -237,6 +240,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
237240
* @{
238241
*/
239242
#define CORDIC_IT_IEN CORDIC_CSR_IEN /*!< Result ready interrupt enable */
243+
240244
/**
241245
* @}
242246
*/
@@ -245,6 +249,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
245249
* @{
246250
*/
247251
#define CORDIC_DMA_REN CORDIC_CSR_DMAREN /*!< DMA Read requests enable */
252+
248253
/**
249254
* @}
250255
*/
@@ -253,6 +258,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
253258
* @{
254259
*/
255260
#define CORDIC_DMA_WEN CORDIC_CSR_DMAWEN /*!< DMA Write channel enable */
261+
256262
/**
257263
* @}
258264
*/
@@ -288,6 +294,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
288294
*/
289295
#define CORDIC_INSIZE_32BITS (0x00000000U) /*!< 32 bits input data size (Q1.31 format) */
290296
#define CORDIC_INSIZE_16BITS CORDIC_CSR_ARGSIZE /*!< 16 bits input data size (Q1.15 format) */
297+
291298
/**
292299
* @}
293300
*/
@@ -297,6 +304,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
297304
*/
298305
#define CORDIC_OUTSIZE_32BITS (0x00000000U) /*!< 32 bits output data size (Q1.31 format) */
299306
#define CORDIC_OUTSIZE_16BITS CORDIC_CSR_RESSIZE /*!< 16 bits output data size (Q1.15 format) */
307+
300308
/**
301309
* @}
302310
*/
@@ -305,6 +313,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
305313
* @{
306314
*/
307315
#define CORDIC_FLAG_RRDY CORDIC_CSR_RRDY /*!< Result Ready Flag */
316+
308317
/**
309318
* @}
310319
*/
@@ -316,6 +325,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
316325
#define CORDIC_DMA_DIR_IN ((uint32_t)0x00000001U) /*!< DMA direction : Input of CORDIC */
317326
#define CORDIC_DMA_DIR_OUT ((uint32_t)0x00000002U) /*!< DMA direction : Output of CORDIC */
318327
#define CORDIC_DMA_DIR_IN_OUT ((uint32_t)0x00000003U) /*!< DMA direction : Input and Output of CORDIC */
328+
319329
/**
320330
* @}
321331
*/
@@ -336,9 +346,9 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
336346
*/
337347
#if USE_HAL_CORDIC_REGISTER_CALLBACKS == 1
338348
#define __HAL_CORDIC_RESET_HANDLE_STATE(__HANDLE__) do{ \
339-
(__HANDLE__)->State = HAL_CORDIC_STATE_RESET; \
340-
(__HANDLE__)->MspInitCallback = NULL; \
341-
(__HANDLE__)->MspDeInitCallback = NULL; \
349+
(__HANDLE__)->State = HAL_CORDIC_STATE_RESET; \
350+
(__HANDLE__)->MspInitCallback = NULL; \
351+
(__HANDLE__)->MspDeInitCallback = NULL; \
342352
} while(0)
343353
#else
344354
#define __HAL_CORDIC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CORDIC_STATE_RESET)
@@ -416,7 +426,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
416426
* @}
417427
*/
418428

419-
/* Private macros --------------------------------------------------------*/
429+
/* Private macros ------------------------------------------------------------*/
420430
/** @defgroup CORDIC_Private_Macros CORDIC Private Macros
421431
* @{
422432
*/
@@ -584,6 +594,7 @@ void HAL_CORDIC_IRQHandler(CORDIC_HandleTypeDef *hcordic);
584594
/* Peripheral State functions *************************************************/
585595
HAL_CORDIC_StateTypeDef HAL_CORDIC_GetState(const CORDIC_HandleTypeDef *hcordic);
586596
uint32_t HAL_CORDIC_GetError(const CORDIC_HandleTypeDef *hcordic);
597+
587598
/**
588599
* @}
589600
*/

0 commit comments

Comments
 (0)