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fpistmfpistm
authoredMar 30, 2020
Merge pull request #1019 from fpistm/F4x1RE_update
2 parents 1b8664a + fd36818 commit 6ebfb5e

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‎boards.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,7 @@ Nucleo_64.menu.pnum.NUCLEO_F401RE.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
264264
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.board=NUCLEO_F401RE
265265
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.series=STM32F4xx
266266
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.product_line=STM32F401xE
267-
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.variant=NUCLEO_F401RE
267+
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.variant=NUCLEO_F4x1RE
268268
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
269269

270270
# NUCLEO_F411RE board
@@ -277,7 +277,7 @@ Nucleo_64.menu.pnum.NUCLEO_F411RE.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
277277
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.board=NUCLEO_F411RE
278278
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.series=STM32F4xx
279279
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.product_line=STM32F411xE
280-
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.variant=NUCLEO_F411RE
280+
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.variant=NUCLEO_F4x1RE
281281
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
282282

283283
# NUCLEO_F446RE board

‎variants/NUCLEO_F401RE/PeripheralPins.c

Lines changed: 0 additions & 246 deletions
This file was deleted.

‎variants/NUCLEO_F401RE/ldscript.ld

Lines changed: 0 additions & 186 deletions
This file was deleted.

‎variants/NUCLEO_F401RE/variant.cpp

Lines changed: 0 additions & 174 deletions
This file was deleted.

‎variants/NUCLEO_F411RE/PinNamesVar.h

Lines changed: 0 additions & 33 deletions
This file was deleted.

‎variants/NUCLEO_F411RE/ldscript.ld

Lines changed: 0 additions & 188 deletions
This file was deleted.

‎variants/NUCLEO_F411RE/variant.h

Lines changed: 0 additions & 139 deletions
This file was deleted.

‎variants/NUCLEO_F411RE/PeripheralPins.c renamed to ‎variants/NUCLEO_F4x1RE/PeripheralPins.c

Lines changed: 71 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,32 +1,16 @@
11
/*
22
*******************************************************************************
3-
* Copyright (c) 2019, STMicroelectronics
3+
* Copyright (c) 2020, STMicroelectronics
44
* All rights reserved.
55
*
6-
* Redistribution and use in source and binary forms, with or without
7-
* modification, are permitted provided that the following conditions are met:
6+
* This software component is licensed by ST under BSD 3-Clause license,
7+
* the "License"; You may not use this file except in compliance with the
8+
* License. You may obtain a copy of the License at:
9+
* opensource.org/licenses/BSD-3-Clause
810
*
9-
* 1. Redistributions of source code must retain the above copyright notice,
10-
* this list of conditions and the following disclaimer.
11-
* 2. Redistributions in binary form must reproduce the above copyright notice,
12-
* this list of conditions and the following disclaimer in the documentation
13-
* and/or other materials provided with the distribution.
14-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
15-
* may be used to endorse or promote products derived from this software
16-
* without specific prior written permission.
17-
*
18-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2811
*******************************************************************************
2912
* Automatically generated from STM32F411R(C-E)Tx.xml
13+
* Manually updated to support STM32F401R(D-E)Tx.xml
3014
*/
3115
#include "Arduino.h"
3216
#include "PeripheralPins.h"
@@ -70,9 +54,13 @@ WEAK const PinMap PinMap_I2C_SDA[] = {
7054
{PB_3, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)},
7155
{PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
7256
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
57+
#ifdef ARDUINO_NUCLEO_F411RE
7358
// {PB_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, // Warning: also on SCL
59+
#endif
7460
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
61+
#ifdef ARDUINO_NUCLEO_F411RE
7562
// {PB_9, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)},
63+
#endif
7664
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
7765
{NC, NP, 0}
7866
};
@@ -143,7 +131,9 @@ WEAK const PinMap PinMap_UART_TX[] = {
143131
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
144132
{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
145133
{PA_11, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
134+
#ifdef ARDUINO_NUCLEO_F411RE
146135
{PA_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
136+
#endif
147137
{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
148138
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
149139
{NC, NP, 0}
@@ -155,7 +145,9 @@ WEAK const PinMap PinMap_UART_RX[] = {
155145
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
156146
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
157147
{PA_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
148+
#ifdef ARDUINO_NUCLEO_F411RE
158149
{PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
150+
#endif
159151
{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
160152
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
161153
{NC, NP, 0}
@@ -182,12 +174,18 @@ WEAK const PinMap PinMap_UART_CTS[] = {
182174

183175
#ifdef HAL_SPI_MODULE_ENABLED
184176
WEAK const PinMap PinMap_SPI_MOSI[] = {
177+
#ifdef ARDUINO_NUCLEO_F411RE
185178
{PA_1, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
179+
#endif
186180
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
181+
#ifdef ARDUINO_NUCLEO_F411RE
187182
{PA_10, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
183+
#endif
188184
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
189185
// {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
186+
#ifdef ARDUINO_NUCLEO_F411RE
190187
{PB_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
188+
#endif
191189
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
192190
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
193191
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -198,8 +196,10 @@ WEAK const PinMap PinMap_SPI_MOSI[] = {
198196
#ifdef HAL_SPI_MODULE_ENABLED
199197
WEAK const PinMap PinMap_SPI_MISO[] = {
200198
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
199+
#ifdef ARDUINO_NUCLEO_F411RE
201200
{PA_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)},
202201
{PA_12, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
202+
#endif
203203
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
204204
// {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
205205
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
@@ -212,14 +212,20 @@ WEAK const PinMap PinMap_SPI_MISO[] = {
212212
#ifdef HAL_SPI_MODULE_ENABLED
213213
WEAK const PinMap PinMap_SPI_SCLK[] = {
214214
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
215+
#ifdef ARDUINO_NUCLEO_F411RE
215216
{PB_0, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
217+
#endif
216218
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
217219
// {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
218220
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
221+
#ifdef ARDUINO_NUCLEO_F411RE
219222
{PB_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
220223
// {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
221224
{PB_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)},
222225
{PC_7, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
226+
#else /* ARDUINO_NUCLEO_F401RE */
227+
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
228+
#endif
223229
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
224230
{NC, NP, 0}
225231
};
@@ -229,12 +235,18 @@ WEAK const PinMap PinMap_SPI_SCLK[] = {
229235
WEAK const PinMap PinMap_SPI_SSEL[] = {
230236
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
231237
// {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
232-
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
233-
// {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
238+
// {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
239+
{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
240+
#ifdef ARDUINO_NUCLEO_F411RE
234241
{PB_1, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
242+
#endif
235243
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
244+
#ifdef ARDUINO_NUCLEO_F411RE
236245
// {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, // Warning: also on SCLK
237246
// {PB_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)}, // Warning: also on SCLK
247+
#else /* ARDUINO_NUCLEO_F401RE */
248+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
249+
#endif
238250
{NC, NP, 0}
239251
};
240252
#endif
@@ -250,7 +262,11 @@ WEAK const PinMap PinMap_SPI_SSEL[] = {
250262
#ifdef HAL_PCD_MODULE_ENABLED
251263
WEAK const PinMap PinMap_USB_OTG_FS[] = {
252264
{PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
265+
#ifdef ARDUINO_NUCLEO_F411RE
253266
{PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_VBUS
267+
#else /* ARDUINO_NUCLEO_F401RE */
268+
{PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
269+
#endif
254270
{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
255271
{PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
256272
{PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
@@ -259,3 +275,34 @@ WEAK const PinMap PinMap_USB_OTG_FS[] = {
259275
#endif
260276

261277
//*** No USB_OTG_HS ***
278+
279+
//*** SD ***
280+
281+
#ifdef HAL_SD_MODULE_ENABLED
282+
WEAK const PinMap PinMap_SD[] = {
283+
#ifdef ARDUINO_NUCLEO_F411RE
284+
// {PA_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
285+
// {PA_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
286+
// {PA_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
287+
// {PB_4, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
288+
// {PB_5, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
289+
// {PB_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
290+
#endif
291+
// {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
292+
// {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
293+
#ifdef ARDUINO_NUCLEO_F411RE
294+
// {PB_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
295+
// {PB_14, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
296+
// {PB_15, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
297+
#endif
298+
// {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
299+
// {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
300+
{PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
301+
{PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
302+
{PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
303+
{PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
304+
{PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
305+
{PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
306+
{NC, NP, 0}
307+
};
308+
#endif

‎variants/NUCLEO_F4x1RE/ldscript.ld

Lines changed: 173 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,173 @@
1+
/**
2+
******************************************************************************
3+
* @file LinkerScript.ld
4+
* @author Auto-generated by STM32CubeIDE
5+
* Abstract : Linker script for NUCLEO-F401RE and NUCLEO-F411RE Boards
6+
*
7+
* Set heap size, stack size and stack location according
8+
* to application requirements.
9+
*
10+
* Set memory bank area and size if external memory is used
11+
******************************************************************************
12+
* @attention
13+
*
14+
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
15+
* All rights reserved.</center></h2>
16+
*
17+
* This software component is licensed by ST under BSD 3-Clause license,
18+
* the "License"; You may not use this file except in compliance with the
19+
* License. You may obtain a copy of the License at:
20+
* opensource.org/licenses/BSD-3-Clause
21+
*
22+
******************************************************************************
23+
*/
24+
25+
/* Entry Point */
26+
ENTRY(Reset_Handler)
27+
28+
/* Highest address of the user mode stack */
29+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
30+
31+
_Min_Heap_Size = 0x200; /* required amount of heap */
32+
_Min_Stack_Size = 0x400; /* required amount of stack */
33+
34+
/* Memories definition */
35+
MEMORY
36+
{
37+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
38+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
39+
}
40+
41+
/* Sections */
42+
SECTIONS
43+
{
44+
/* The startup code into "FLASH" Rom type memory */
45+
.isr_vector :
46+
{
47+
. = ALIGN(4);
48+
KEEP(*(.isr_vector)) /* Startup code */
49+
. = ALIGN(4);
50+
} >FLASH
51+
52+
/* The program code and other data into "FLASH" Rom type memory */
53+
.text :
54+
{
55+
. = ALIGN(4);
56+
*(.text) /* .text sections (code) */
57+
*(.text*) /* .text* sections (code) */
58+
*(.glue_7) /* glue arm to thumb code */
59+
*(.glue_7t) /* glue thumb to arm code */
60+
*(.eh_frame)
61+
62+
KEEP (*(.init))
63+
KEEP (*(.fini))
64+
65+
. = ALIGN(4);
66+
_etext = .; /* define a global symbols at end of code */
67+
} >FLASH
68+
69+
/* Constant data into "FLASH" Rom type memory */
70+
.rodata :
71+
{
72+
. = ALIGN(4);
73+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
74+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
75+
. = ALIGN(4);
76+
} >FLASH
77+
78+
.ARM.extab : {
79+
. = ALIGN(4);
80+
*(.ARM.extab* .gnu.linkonce.armextab.*)
81+
. = ALIGN(4);
82+
} >FLASH
83+
84+
.ARM : {
85+
. = ALIGN(4);
86+
__exidx_start = .;
87+
*(.ARM.exidx*)
88+
__exidx_end = .;
89+
. = ALIGN(4);
90+
} >FLASH
91+
92+
.preinit_array :
93+
{
94+
. = ALIGN(4);
95+
PROVIDE_HIDDEN (__preinit_array_start = .);
96+
KEEP (*(.preinit_array*))
97+
PROVIDE_HIDDEN (__preinit_array_end = .);
98+
. = ALIGN(4);
99+
} >FLASH
100+
101+
.init_array :
102+
{
103+
. = ALIGN(4);
104+
PROVIDE_HIDDEN (__init_array_start = .);
105+
KEEP (*(SORT(.init_array.*)))
106+
KEEP (*(.init_array*))
107+
PROVIDE_HIDDEN (__init_array_end = .);
108+
. = ALIGN(4);
109+
} >FLASH
110+
111+
.fini_array :
112+
{
113+
. = ALIGN(4);
114+
PROVIDE_HIDDEN (__fini_array_start = .);
115+
KEEP (*(SORT(.fini_array.*)))
116+
KEEP (*(.fini_array*))
117+
PROVIDE_HIDDEN (__fini_array_end = .);
118+
. = ALIGN(4);
119+
} >FLASH
120+
121+
/* Used by the startup to initialize data */
122+
_sidata = LOADADDR(.data);
123+
124+
/* Initialized data sections into "RAM" Ram type memory */
125+
.data :
126+
{
127+
. = ALIGN(4);
128+
_sdata = .; /* create a global symbol at data start */
129+
*(.data) /* .data sections */
130+
*(.data*) /* .data* sections */
131+
132+
. = ALIGN(4);
133+
_edata = .; /* define a global symbol at data end */
134+
135+
} >RAM AT> FLASH
136+
137+
/* Uninitialized data section into "RAM" Ram type memory */
138+
. = ALIGN(4);
139+
.bss :
140+
{
141+
/* This is used by the startup in order to initialize the .bss section */
142+
_sbss = .; /* define a global symbol at bss start */
143+
__bss_start__ = _sbss;
144+
*(.bss)
145+
*(.bss*)
146+
*(COMMON)
147+
148+
. = ALIGN(4);
149+
_ebss = .; /* define a global symbol at bss end */
150+
__bss_end__ = _ebss;
151+
} >RAM
152+
153+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
154+
._user_heap_stack :
155+
{
156+
. = ALIGN(8);
157+
PROVIDE ( end = . );
158+
PROVIDE ( _end = . );
159+
. = . + _Min_Heap_Size;
160+
. = . + _Min_Stack_Size;
161+
. = ALIGN(8);
162+
} >RAM
163+
164+
/* Remove information from the compiler libraries */
165+
/DISCARD/ :
166+
{
167+
libc.a ( * )
168+
libm.a ( * )
169+
libgcc.a ( * )
170+
}
171+
172+
.ARM.attributes 0 : { *(.ARM.attributes) }
173+
}

‎variants/NUCLEO_F411RE/variant.cpp renamed to ‎variants/NUCLEO_F4x1RE/variant.cpp

Lines changed: 25 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -111,50 +111,42 @@ extern "C" {
111111
#endif
112112
/**
113113
* @brief System Clock Configuration
114-
* The system Clock is configured as follow :
115-
* System Clock source = PLL (HSI)
116-
* SYSCLK(Hz) = 10000000
117-
* HCLK(Hz) = 10000000
118-
* AHB Prescaler = 1
119-
* APB1 Prescaler = 2
120-
* APB2 Prescaler = 1
121-
* HSI Frequency(Hz) = 16000000
122-
* PLL_M = 8
123-
* PLL_N = 100
124-
* PLL_P = 4
125-
* PLL_Q = 2
126-
* VDD(V) = 3.3
127-
* Main regulator output voltage = Scale1 mode
128-
* Flash Latency(WS) = 3
114+
* SYSCLK = 100000000 Hz for ARDUINO_NUCLEO_F411RE
115+
* SYSCLK = 84000000 Hz for ARDUINO_NUCLEO_F401RE
129116
* @param None
130117
* @retval None
131118
*/
132119
WEAK void SystemClock_Config(void)
133120
{
134-
RCC_OscInitTypeDef RCC_OscInitStruct;
135-
RCC_ClkInitTypeDef RCC_ClkInitStruct;
136-
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
121+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
122+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
137123

138124
/* Configure the main internal regulator output voltage */
139125
__HAL_RCC_PWR_CLK_ENABLE();
140-
126+
#ifdef ARDUINO_NUCLEO_F401RE
127+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
128+
#else /* ARDUINO_NUCLEO_F411RE */
141129
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
142-
130+
#endif
143131
/* Initializes the CPU, AHB and APB busses clocks */
144-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE;
145-
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
146-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
147-
RCC_OscInitStruct.HSICalibrationValue = 16;
132+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
133+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
148134
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
149-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
135+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
136+
#ifdef ARDUINO_NUCLEO_F401RE
150137
RCC_OscInitStruct.PLL.PLLM = 8;
138+
RCC_OscInitStruct.PLL.PLLN = 336;
139+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
140+
RCC_OscInitStruct.PLL.PLLQ = 7;
141+
#else /* ARDUINO_NUCLEO_F411RE */
142+
RCC_OscInitStruct.PLL.PLLM = 4;
151143
RCC_OscInitStruct.PLL.PLLN = 100;
152144
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
153145
RCC_OscInitStruct.PLL.PLLQ = 4;
146+
#endif
154147
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
155-
_Error_Handler(__FILE__, __LINE__);
148+
Error_Handler();
156149
}
157-
158150
/* Initializes the CPU, AHB and APB busses clocks */
159151
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
160152
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
@@ -163,16 +155,15 @@ WEAK void SystemClock_Config(void)
163155
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
164156
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
165157

158+
#ifdef ARDUINO_NUCLEO_F401RE
159+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
160+
#else /* ARDUINO_NUCLEO_F411RE */
166161
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
167-
_Error_Handler(__FILE__, __LINE__);
168-
}
169-
170-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
171-
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
172-
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
173-
_Error_Handler(__FILE__, __LINE__);
162+
#endif
163+
Error_Handler();
174164
}
175165
}
166+
176167
#ifdef __cplusplus
177168
}
178169
#endif

‎variants/NUCLEO_F401RE/variant.h renamed to ‎variants/NUCLEO_F4x1RE/variant.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ extern "C" {
9191
#define NUM_ANALOG_INPUTS 13
9292

9393
// On-board LED pin number
94-
#define LED_BUILTIN 13
94+
#define LED_BUILTIN PA5
9595
#define LED_GREEN LED_BUILTIN
9696

9797
// On-board user button
@@ -106,8 +106,8 @@ extern "C" {
106106

107107
// Default pin used for 'Serial' instance (ex: ST-Link)
108108
// Mandatory for Firmata
109-
#define PIN_SERIAL_RX 0
110-
#define PIN_SERIAL_TX 1
109+
#define PIN_SERIAL_RX PA3
110+
#define PIN_SERIAL_TX PA2
111111

112112
#ifdef __cplusplus
113113
} // extern "C"

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