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system(MP1) update STM32MP1xx HAL Drivers to v1.7.0
Included in STM32CubeMP1 FW 1.7.0 Signed-off-by: Frederic Pillon <[email protected]>
1 parent 463335f commit 6db1d44

19 files changed

+1339
-320
lines changed

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

+483-67
Large diffs are not rendered by default.

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -145,10 +145,10 @@ typedef enum
145145
(((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1))
146146

147147

148-
#define SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCSETR_ANA0_SEL_SEL /*!< PA0 analog switch opened */
149-
#define SYSCFG_SWITCH_PA0_CLOSE ((uint32_t)0x00000000) /*!< PA0 analog switch closed */
150-
#define SYSCFG_SWITCH_PA1_OPEN SYSCFG_PMCSETR_ANA1_SEL_SEL /*!< PA1 analog switch opened */
151-
#define SYSCFG_SWITCH_PA1_CLOSE ((uint32_t)0x00000000) /*!< PA1 analog switch closed*/
148+
#define SYSCFG_SWITCH_PA0_OPEN ((uint32_t)0x00000000) /*!< PA0 analog switch opened */
149+
#define SYSCFG_SWITCH_PA0_CLOSE SYSCFG_PMCSETR_ANA0_SEL_SEL /*!< PA0 analog switch closed */
150+
#define SYSCFG_SWITCH_PA1_OPEN ((uint32_t)0x00000000) /*!< PA1 analog switch opened */
151+
#define SYSCFG_SWITCH_PA1_CLOSE SYSCFG_PMCSETR_ANA1_SEL_SEL /*!< PA1 analog switch closed */
152152

153153
#define IS_SYSCFG_SWITCH_STATE(STATE) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA0_OPEN) || \
154154
(((STATE) & SYSCFG_SWITCH_PA0_CLOSE) == SYSCFG_SWITCH_PA0_CLOSE) || \

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_adc_ex.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -682,7 +682,7 @@ typedef struct
682682
#define ADC_CLEAR_COMMON_CONTROL_REGISTER(__HANDLE__) CLEAR_BIT(__LL_ADC_COMMON_INSTANCE((__HANDLE__)->Instance)->CCR, ADC_CCR_CKMODE | \
683683
ADC_CCR_PRESC | \
684684
ADC_CCR_VBATEN | \
685-
ADC_CCR_VSENSEEN | \
685+
ADC_CCR_TSEN | \
686686
ADC_CCR_VREFEN | \
687687
ADC_CCR_DAMDF | \
688688
ADC_CCR_DELAY | \

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_def.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
#if defined(USE_HAL_LEGACY)
3131
#include "Legacy/stm32_hal_legacy.h"
3232
#endif
33-
#include <stdio.h>
33+
#include <stddef.h>
3434

3535
/* Exported types ------------------------------------------------------------*/
3636

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_i2c.h

+4
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,10 @@ typedef struct __I2C_HandleTypeDef
223223

224224
__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
225225

226+
__IO uint32_t Devaddress; /*!< I2C Target device address */
227+
228+
__IO uint32_t Memaddress; /*!< I2C Target memory address */
229+
226230
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
227231
void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
228232
/*!< I2C Master Tx Transfer completed callback */

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_tim.h

+10-2
Original file line numberDiff line numberDiff line change
@@ -1913,6 +1913,8 @@ mode.
19131913
((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \
19141914
((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS))
19151915

1916+
#define IS_TIM_DMA_DATA_LENGTH(LENGTH) (((LENGTH) >= 0x1U) && ((LENGTH) < 0x10000U))
1917+
19161918
#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xFU)
19171919

19181920
#define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFFU)
@@ -2117,10 +2119,16 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S
21172119
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
21182120
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
21192121
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
2120-
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
2122+
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
2123+
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
2124+
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength,
2125+
uint32_t DataLength);
21212126
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
21222127
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
2123-
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
2128+
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
2129+
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
2130+
uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength,
2131+
uint32_t DataLength);
21242132
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
21252133
HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
21262134
uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_ll_adc.h

+7-7
Original file line numberDiff line numberDiff line change
@@ -706,7 +706,7 @@ typedef struct
706706
/* only by selecting the corresponding ADC internal channel. */
707707
#define LL_ADC_PATH_INTERNAL_NONE (0x00000000UL) /*!< ADC measurement paths all disabled */
708708
#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /*!< ADC measurement path to internal channel VrefInt */
709-
#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_VSENSEEN) /*!< ADC measurement path to internal channel temperature sensor */
709+
#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /*!< ADC measurement path to internal channel temperature sensor */
710710
#define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATEN) /*!< ADC measurement path to internal channel Vbat */
711711
#define LL_ADC_PATH_INTERNAL_VDDCORE (ADC2_OR_VDDCOREEN) /*!< ADC measurement path to internal channel Vddcore */
712712
/**
@@ -2390,7 +2390,7 @@ __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_CO
23902390
}
23912391
else
23922392
{
2393-
MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSEEN | ADC_CCR_VBATEN, PathInternal);
2393+
MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal);
23942394
}
23952395
}
23962396

@@ -2506,7 +2506,7 @@ __STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy
25062506
*/
25072507
__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
25082508
{
2509-
return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSEEN | ADC_CCR_VBATEN));
2509+
return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN));
25102510
}
25112511

25122512
/**
@@ -5109,7 +5109,7 @@ __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AW
51095109
+ ((AWDy & ADC_AWD_TR12_REGOFFSETGAP_MASK) * ADC_AWD_TR12_REGOFFSETGAP_VAL)
51105110
+ (AWDThresholdsHighLow));
51115111

5112-
MODIFY_REG(*preg, ADC_LTR1_LT1, AWDThresholdValue);
5112+
MODIFY_REG(*preg, ADC_LTR1_LTR1, AWDThresholdValue);
51135113
}
51145114

51155115
/**
@@ -5141,7 +5141,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_
51415141
+ ((AWDy & ADC_AWD_TR12_REGOFFSETGAP_MASK) * ADC_AWD_TR12_REGOFFSETGAP_VAL)
51425142
+ (AWDThresholdsHighLow));
51435143

5144-
return (uint32_t)(READ_BIT(*preg, ADC_LTR1_LT1));
5144+
return (uint32_t)(READ_BIT(*preg, ADC_LTR1_LTR1));
51455145
}
51465146

51475147
/**
@@ -5284,7 +5284,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
52845284
*/
52855285
__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
52865286
{
5287-
MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OSR), (Shift | (((Ratio - 1UL) << ADC_CFGR2_OSR_Pos))));
5287+
MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OSVR), (Shift | (((Ratio - 1UL) << ADC_CFGR2_OSVR_Pos))));
52885288
}
52895289

52905290
/**
@@ -5296,7 +5296,7 @@ __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint
52965296
*/
52975297
__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
52985298
{
5299-
return (((uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OSR))+(1UL << ADC_CFGR2_OSR_Pos)) >> ADC_CFGR2_OSR_Pos);
5299+
return (((uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OSVR))+(1UL << ADC_CFGR2_OSVR_Pos)) >> ADC_CFGR2_OSVR_Pos);
53005300
}
53015301

53025302
/**

Diff for: ‎system/Drivers/STM32MP1xx_HAL_Driver/LICENSE.txt

+6
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
This software component is provided to you as part of a software package and
2+
applicable license terms are in the Package_license file. If you received this
3+
software component outside of a package or without applicable license terms,
4+
the terms of the BSD-3-Clause license shall apply.
5+
You may obtain a copy of the BSD-3-Clause at:
6+
https://opensource.org/licenses/BSD-3-Clause

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