|
38 | 38 | #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
|
39 | 39 | #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
|
40 | 40 | #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
|
41 |
| - |
42 | 41 | /**
|
43 | 42 | * @}
|
44 | 43 | */
|
|
241 | 240 | #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
|
242 | 241 | #endif
|
243 | 242 |
|
244 |
| -#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) |
| 243 | +#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4) |
245 | 244 | #define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
|
246 | 245 | #define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
|
247 | 246 | #endif
|
|
313 | 312 | #endif /* STM32L4 */
|
314 | 313 |
|
315 | 314 | #if defined(STM32G0)
|
316 |
| -#define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1 |
317 |
| -#define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2 |
| 315 | +#define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1 |
| 316 | +#define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2 |
| 317 | +#define DMA_REQUEST_TIM16_TRIG_COM DMA_REQUEST_TIM16_COM |
| 318 | +#define DMA_REQUEST_TIM17_TRIG_COM DMA_REQUEST_TIM17_COM |
| 319 | + |
| 320 | +#define LL_DMAMUX_REQ_TIM16_TRIG_COM LL_DMAMUX_REQ_TIM16_COM |
| 321 | +#define LL_DMAMUX_REQ_TIM17_TRIG_COM LL_DMAMUX_REQ_TIM17_COM |
318 | 322 | #endif
|
319 | 323 |
|
320 | 324 | #if defined(STM32H7)
|
|
643 | 647 | #define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
|
644 | 648 | #define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable
|
645 | 649 | #define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset
|
| 650 | +#define HRTIM_TIMEEVENT_A HRTIM_EVENTCOUNTER_A |
| 651 | +#define HRTIM_TIMEEVENT_B HRTIM_EVENTCOUNTER_B |
| 652 | +#define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL |
| 653 | +#define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL |
646 | 654 | #endif /* STM32G4 */
|
647 | 655 |
|
648 | 656 | #if defined(STM32H7)
|
|
955 | 963 | #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
|
956 | 964 | #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
|
957 | 965 |
|
958 |
| -#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) |
| 966 | +#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4) |
959 | 967 | #define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
|
960 | 968 | #define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
|
961 | 969 | #endif
|
|
1450 | 1458 | #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
|
1451 | 1459 | #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
|
1452 | 1460 |
|
1453 |
| -#if defined(STM32L4) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) |
| 1461 | +#if defined(STM32L4) || defined(STM32L5) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) |
1454 | 1462 |
|
1455 | 1463 | #define HAL_HASH_MD5_Accumulate HAL_HASH_MD5_Accmlt
|
1456 | 1464 | #define HAL_HASH_MD5_Accumulate_End HAL_HASH_MD5_Accmlt_End
|
|
1472 | 1480 | #define HAL_HASHEx_SHA256_Accumulate_IT HAL_HASHEx_SHA256_Accmlt_IT
|
1473 | 1481 | #define HAL_HASHEx_SHA256_Accumulate_End_IT HAL_HASHEx_SHA256_Accmlt_End_IT
|
1474 | 1482 |
|
1475 |
| -#endif /* STM32L4 || STM32F4 || STM32F7 || STM32H7 */ |
| 1483 | +#endif /* STM32L4 || STM32L5 || STM32F2 || STM32F4 || STM32F7 || STM32H7 */ |
1476 | 1484 | /**
|
1477 | 1485 | * @}
|
1478 | 1486 | */
|
|
1531 | 1539 |
|
1532 | 1540 | #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
|
1533 | 1541 |
|
1534 |
| -#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) |
| 1542 | +#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1) |
1535 | 1543 | #define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
|
1536 | 1544 | #define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
|
1537 | 1545 | #define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
|
1538 | 1546 | #define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
|
1539 |
| -#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */ |
1540 |
| -#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) |
| 1547 | +#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */ |
| 1548 | +#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1) |
1541 | 1549 | #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
|
1542 | 1550 | #define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
|
1543 | 1551 | #define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
|
1544 | 1552 | #define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
|
1545 |
| -#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */ |
| 1553 | +#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */ |
1546 | 1554 |
|
1547 | 1555 | #if defined(STM32F4)
|
1548 | 1556 | #define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT
|
|
1563 | 1571 | */
|
1564 | 1572 |
|
1565 | 1573 | #if defined(STM32G0)
|
1566 |
| -#define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD |
1567 |
| -#define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD |
1568 |
| -#define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD |
1569 |
| -#define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler |
| 1574 | +#define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD |
| 1575 | +#define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD |
| 1576 | +#define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD |
| 1577 | +#define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler |
1570 | 1578 | #endif
|
1571 | 1579 | #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
|
1572 | 1580 | #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
|
|
3243 | 3251 | #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
|
3244 | 3252 | #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
|
3245 | 3253 |
|
3246 |
| -#if defined(STM32L4) |
| 3254 | +#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) |
3247 | 3255 | #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
|
3248 |
| -#elif defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) |
3249 | 3256 | #else
|
3250 | 3257 | #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
|
3251 | 3258 | #endif
|
|
3481 | 3488 | #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
|
3482 | 3489 | #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
|
3483 | 3490 | #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
|
3484 |
| -#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS |
3485 |
| -#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT |
3486 |
| -#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND |
| 3491 | +#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS |
| 3492 | +#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT |
| 3493 | +#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND |
3487 | 3494 | /* alias CMSIS for compatibilities */
|
3488 | 3495 | #define SDIO_IRQn SDMMC1_IRQn
|
3489 | 3496 | #define SDIO_IRQHandler SDMMC1_IRQHandler
|
|
3751 | 3758 | /** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
|
3752 | 3759 | * @{
|
3753 | 3760 | */
|
3754 |
| -#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) |
| 3761 | +#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7) |
3755 | 3762 | #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
|
3756 | 3763 | #endif /* STM32L4 || STM32F4 || STM32F7 */
|
3757 | 3764 | /**
|
|
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