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variants(U5): add generic generic U575C(G-I)x and U585CIx support
Signed-off-by: Frederic Pillon <[email protected]>
1 parent 937590b commit 4777231

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Diff for: ‎README.md

+6-2
Original file line numberDiff line numberDiff line change
@@ -693,8 +693,12 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
693693

694694
| Status | Device(s) | Name | Release | Notes |
695695
| :----: | :-------: | ---- | :-----: | :---- |
696-
| :green_heart: | STM32U575AGIxQ<br>STM32U575AIIxQ<br>STM32U585AIIxQ | Generic Board | *2.1.0* | |
697-
| :green_heart: | STM32U575ZGTxQ<br>STM32U575ZITxQ<br>STM32U585ZITxQ | Generic Board | *2.1.0* | |
696+
| :green_heart: | STM32U575AGIxQ<br>STM32U575AIIxQ | Generic Board | *2.1.0* | |
697+
| :yellow_heart: | STM32U575CGx<br>STM32U575CIx | Generic Board | **2.7.0** | |
698+
| :green_heart: | STM32U575ZGTxQ<br>STM32U575ZITxQ | Generic Board | *2.1.0* | |
699+
| :green_heart: | STM32U585AIIxQ | Generic Board | *2.1.0* | |
700+
| :yellow_heart: | STM32U585CIx | Generic Board | **2.7.0** | |
701+
| :green_heart: | STM32U585ZITxQ | Generic Board | *2.1.0* | |
698702

699703
### Generic STM32WB boards
700704

Diff for: ‎boards.txt

+40-8
Original file line numberDiff line numberDiff line change
@@ -9932,6 +9932,22 @@ GenU5.menu.pnum.GENERIC_U575AIIXQ.build.board=GENERIC_U575AIIXQ
99329932
GenU5.menu.pnum.GENERIC_U575AIIXQ.build.product_line=STM32U575xx
99339933
GenU5.menu.pnum.GENERIC_U575AIIXQ.build.variant=STM32U5xx/U575A(G-I)IxQ_U585AIIxQ
99349934

9935+
# Generic U575CITx
9936+
GenU5.menu.pnum.GENERIC_U575CITX=Generic U575CITx
9937+
GenU5.menu.pnum.GENERIC_U575CITX.upload.maximum_size=2097152
9938+
GenU5.menu.pnum.GENERIC_U575CITX.upload.maximum_data_size=786432
9939+
GenU5.menu.pnum.GENERIC_U575CITX.build.board=GENERIC_U575CITX
9940+
GenU5.menu.pnum.GENERIC_U575CITX.build.product_line=STM32U575xx
9941+
GenU5.menu.pnum.GENERIC_U575CITX.build.variant=STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)
9942+
9943+
# Generic U575CIUx
9944+
GenU5.menu.pnum.GENERIC_U575CIUX=Generic U575CIUx
9945+
GenU5.menu.pnum.GENERIC_U575CIUX.upload.maximum_size=2097152
9946+
GenU5.menu.pnum.GENERIC_U575CIUX.upload.maximum_data_size=786432
9947+
GenU5.menu.pnum.GENERIC_U575CIUX.build.board=GENERIC_U575CIUX
9948+
GenU5.menu.pnum.GENERIC_U575CIUX.build.product_line=STM32U575xx
9949+
GenU5.menu.pnum.GENERIC_U575CIUX.build.variant=STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)
9950+
99359951
# Generic U575ZGTxQ
99369952
GenU5.menu.pnum.GENERIC_U575ZGTXQ=Generic U575ZGTxQ
99379953
GenU5.menu.pnum.GENERIC_U575ZGTXQ.upload.maximum_size=1048576
@@ -9948,14 +9964,6 @@ GenU5.menu.pnum.GENERIC_U575ZITXQ.build.board=GENERIC_U575ZITXQ
99489964
GenU5.menu.pnum.GENERIC_U575ZITXQ.build.product_line=STM32U575xx
99499965
GenU5.menu.pnum.GENERIC_U575ZITXQ.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ
99509966

9951-
# Generic U585ZITxQ
9952-
GenU5.menu.pnum.GENERIC_U585ZITXQ=Generic U585ZITxQ
9953-
GenU5.menu.pnum.GENERIC_U585ZITXQ.upload.maximum_size=2097152
9954-
GenU5.menu.pnum.GENERIC_U585ZITXQ.upload.maximum_data_size=786432
9955-
GenU5.menu.pnum.GENERIC_U585ZITXQ.build.board=GENERIC_U585ZITXQ
9956-
GenU5.menu.pnum.GENERIC_U585ZITXQ.build.product_line=STM32U585xx
9957-
GenU5.menu.pnum.GENERIC_U585ZITXQ.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ
9958-
99599967
# Generic U585AIIxQ
99609968
GenU5.menu.pnum.GENERIC_U585AIIXQ=Generic U585AIIxQ
99619969
GenU5.menu.pnum.GENERIC_U585AIIXQ.upload.maximum_size=2097152
@@ -9964,6 +9972,30 @@ GenU5.menu.pnum.GENERIC_U585AIIXQ.build.board=GENERIC_U585AIIXQ
99649972
GenU5.menu.pnum.GENERIC_U585AIIXQ.build.product_line=STM32U585xx
99659973
GenU5.menu.pnum.GENERIC_U585AIIXQ.build.variant=STM32U5xx/U575A(G-I)IxQ_U585AIIxQ
99669974

9975+
# Generic U585CITx
9976+
GenU5.menu.pnum.GENERIC_U585CITX=Generic U585CITx
9977+
GenU5.menu.pnum.GENERIC_U585CITX.upload.maximum_size=2097152
9978+
GenU5.menu.pnum.GENERIC_U585CITX.upload.maximum_data_size=786432
9979+
GenU5.menu.pnum.GENERIC_U585CITX.build.board=GENERIC_U585CITX
9980+
GenU5.menu.pnum.GENERIC_U585CITX.build.product_line=STM32U585xx
9981+
GenU5.menu.pnum.GENERIC_U585CITX.build.variant=STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)
9982+
9983+
# Generic U585CIUx
9984+
GenU5.menu.pnum.GENERIC_U585CIUX=Generic U585CIUx
9985+
GenU5.menu.pnum.GENERIC_U585CIUX.upload.maximum_size=2097152
9986+
GenU5.menu.pnum.GENERIC_U585CIUX.upload.maximum_data_size=786432
9987+
GenU5.menu.pnum.GENERIC_U585CIUX.build.board=GENERIC_U585CIUX
9988+
GenU5.menu.pnum.GENERIC_U585CIUX.build.product_line=STM32U585xx
9989+
GenU5.menu.pnum.GENERIC_U585CIUX.build.variant=STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)
9990+
9991+
# Generic U585ZITxQ
9992+
GenU5.menu.pnum.GENERIC_U585ZITXQ=Generic U585ZITxQ
9993+
GenU5.menu.pnum.GENERIC_U585ZITXQ.upload.maximum_size=2097152
9994+
GenU5.menu.pnum.GENERIC_U585ZITXQ.upload.maximum_data_size=786432
9995+
GenU5.menu.pnum.GENERIC_U585ZITXQ.build.board=GENERIC_U585ZITXQ
9996+
GenU5.menu.pnum.GENERIC_U585ZITXQ.build.product_line=STM32U585xx
9997+
GenU5.menu.pnum.GENERIC_U585ZITXQ.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ
9998+
99679999
# Upload menu
996810000
GenU5.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
996910001
GenU5.menu.upload_method.swdMethod.upload.protocol=0

Diff for: ‎variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/generic_clock.c

+57-2
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,63 @@
2222
*/
2323
WEAK void SystemClock_Config(void)
2424
{
25-
/* SystemClock_Config can be generated by STM32CubeMX */
26-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
25+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
26+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
27+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
28+
29+
/** Configure the main internal regulator output voltage
30+
*/
31+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
32+
Error_Handler();
33+
}
34+
35+
/** Initializes the CPU, AHB and APB buses clocks
36+
*/
37+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
38+
| RCC_OSCILLATORTYPE_MSI;
39+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
40+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
41+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
42+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
43+
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
44+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_0;
45+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
46+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
47+
RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV4;
48+
RCC_OscInitStruct.PLL.PLLM = 3;
49+
RCC_OscInitStruct.PLL.PLLN = 10;
50+
RCC_OscInitStruct.PLL.PLLP = 2;
51+
RCC_OscInitStruct.PLL.PLLQ = 2;
52+
RCC_OscInitStruct.PLL.PLLR = 1;
53+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1;
54+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
55+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
56+
Error_Handler();
57+
}
58+
59+
/** Initializes the CPU, AHB and APB buses clocks
60+
*/
61+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
62+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
63+
| RCC_CLOCKTYPE_PCLK3;
64+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
65+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
66+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
67+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
68+
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
69+
70+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
71+
Error_Handler();
72+
}
73+
74+
/** Initializes the peripherals clock
75+
*/
76+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CLK48 | RCC_PERIPHCLK_LPUART1;
77+
PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48;
78+
PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
79+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
80+
Error_Handler();
81+
}
2782
}
2883

2984
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32U5xx/U575C(G-I)(T-U)_U585CI(T-U)/ldscript.ld

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@@ -0,0 +1,166 @@
1+
/*
2+
******************************************************************************
3+
**
4+
** File : LinkerScript.ld
5+
**
6+
** Author : STM32CubeIDE
7+
**
8+
** Abstract : Linker script for STM32U575xI Device from STM32U5 series
9+
**
10+
**
11+
** Set heap size, stack size and stack location according
12+
** to application requirements.
13+
**
14+
** Set memory bank area and size if external memory is used.
15+
**
16+
** Target : STMicroelectronics STM32
17+
**
18+
** Distribution: The file is distributed as is without any warranty
19+
** of any kind.
20+
**
21+
*****************************************************************************
22+
** @attention
23+
**
24+
** Copyright (c) 2023 STMicroelectronics.
25+
** All rights reserved.
26+
**
27+
** This software is licensed under terms that can be found in the LICENSE file
28+
** in the root directory of this software component.
29+
** If no LICENSE file comes with this software, it is provided AS-IS.
30+
**
31+
*****************************************************************************
32+
*/
33+
34+
/* Entry Point */
35+
ENTRY(Reset_Handler)
36+
37+
/* Highest address of the user mode stack */
38+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
39+
40+
_Min_Heap_Size = 0x200; /* required amount of heap */
41+
_Min_Stack_Size = 0x400; /* required amount of stack */
42+
43+
/* Memories definition */
44+
MEMORY
45+
{
46+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
47+
SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K
48+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
49+
}
50+
51+
/* Sections */
52+
SECTIONS
53+
{
54+
/* The startup code into "FLASH" Rom type memory */
55+
.isr_vector :
56+
{
57+
KEEP(*(.isr_vector)) /* Startup code */
58+
} >FLASH
59+
60+
/* The program code and other data into "FLASH" Rom type memory */
61+
.text :
62+
{
63+
*(.text) /* .text sections (code) */
64+
*(.text*) /* .text* sections (code) */
65+
*(.glue_7) /* glue arm to thumb code */
66+
*(.glue_7t) /* glue thumb to arm code */
67+
*(.eh_frame)
68+
69+
KEEP (*(.init))
70+
KEEP (*(.fini))
71+
72+
_etext = .; /* define a global symbols at end of code */
73+
} >FLASH
74+
75+
/* Constant data into "FLASH" Rom type memory */
76+
.rodata :
77+
{
78+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
79+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
80+
} >FLASH
81+
82+
.ARM.extab :
83+
{
84+
*(.ARM.extab* .gnu.linkonce.armextab.*)
85+
} >FLASH
86+
87+
.ARM :
88+
{
89+
__exidx_start = .;
90+
*(.ARM.exidx*)
91+
__exidx_end = .;
92+
} >FLASH
93+
94+
.preinit_array :
95+
{
96+
PROVIDE_HIDDEN (__preinit_array_start = .);
97+
KEEP (*(.preinit_array*))
98+
PROVIDE_HIDDEN (__preinit_array_end = .);
99+
} >FLASH
100+
101+
.init_array :
102+
{
103+
PROVIDE_HIDDEN (__init_array_start = .);
104+
KEEP (*(SORT(.init_array.*)))
105+
KEEP (*(.init_array*))
106+
PROVIDE_HIDDEN (__init_array_end = .);
107+
} >FLASH
108+
109+
.fini_array :
110+
{
111+
PROVIDE_HIDDEN (__fini_array_start = .);
112+
KEEP (*(SORT(.fini_array.*)))
113+
KEEP (*(.fini_array*))
114+
PROVIDE_HIDDEN (__fini_array_end = .);
115+
} >FLASH
116+
117+
/* Used by the startup to initialize data */
118+
_sidata = LOADADDR(.data);
119+
120+
/* Initialized data sections into "RAM" Ram type memory */
121+
.data :
122+
{
123+
_sdata = .; /* create a global symbol at data start */
124+
*(.data) /* .data sections */
125+
*(.data*) /* .data* sections */
126+
*(.RamFunc) /* .RamFunc sections */
127+
*(.RamFunc*) /* .RamFunc* sections */
128+
129+
_edata = .; /* define a global symbol at data end */
130+
} >RAM AT> FLASH
131+
132+
/* Uninitialized data section into "RAM" Ram type memory */
133+
.bss :
134+
{
135+
/* This is used by the startup in order to initialize the .bss section */
136+
_sbss = .; /* define a global symbol at bss start */
137+
__bss_start__ = _sbss;
138+
*(.bss)
139+
*(.bss*)
140+
*(COMMON)
141+
142+
_ebss = .; /* define a global symbol at bss end */
143+
__bss_end__ = _ebss;
144+
} >RAM
145+
146+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
147+
._user_heap_stack :
148+
{
149+
. = ALIGN(8);
150+
PROVIDE ( end = . );
151+
PROVIDE ( _end = . );
152+
. = . + _Min_Heap_Size;
153+
. = . + _Min_Stack_Size;
154+
. = ALIGN(8);
155+
} >RAM
156+
157+
/* Remove information from the compiler libraries */
158+
/DISCARD/ :
159+
{
160+
libc.a ( * )
161+
libm.a ( * )
162+
libgcc.a ( * )
163+
}
164+
165+
.ARM.attributes 0 : { *(.ARM.attributes) }
166+
}

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