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Updated stm32f4xx_hal_conf.h in variant
Signed-off-by: Frederic Pillon <[email protected]>
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‎variants/DISCO_F407VG/stm32f4xx_hal_conf.h

+89-85
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,11 @@
11
/**
22
******************************************************************************
3-
* @file stm32f4xx_hal_conf_template.h
4-
* @author MCD Application Team
5-
* @version V1.5.1
6-
* @date 01-July-2016
7-
* @brief HAL configuration template file.
8-
* This file should be copied to the application folder and renamed
9-
* to stm32f4xx_hal_conf.h.
3+
* @file stm32f4xx_hal_conf.h
4+
* @brief HAL configuration file.
105
******************************************************************************
116
* @attention
127
*
13-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
8+
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
149
*
1510
* Redistribution and use in source and binary forms, with or without modification,
1611
* are permitted provided that the following conditions are met:
@@ -54,49 +49,51 @@
5449
*/
5550
#define HAL_MODULE_ENABLED
5651
#define HAL_ADC_MODULE_ENABLED
57-
// #define HAL_CAN_MODULE_ENABLED
58-
// #define HAL_CRC_MODULE_ENABLED
59-
// #define HAL_CEC_MODULE_ENABLED
60-
// #define HAL_CRYP_MODULE_ENABLED
52+
/* #define HAL_CAN_MODULE_ENABLED */
53+
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
54+
/* #define HAL_CRC_MODULE_ENABLED */
55+
/* #define HAL_CEC_MODULE_ENABLED */
56+
/* #define HAL_CRYP_MODULE_ENABLED */
6157
#define HAL_DAC_MODULE_ENABLED
62-
// #define HAL_DCMI_MODULE_ENABLED
58+
/* #define HAL_DCMI_MODULE_ENABLED */
6359
#define HAL_DMA_MODULE_ENABLED
64-
// #define HAL_DMA2D_MODULE_ENABLED
65-
// #define HAL_ETH_MODULE_ENABLED
60+
/* #define HAL_DMA2D_MODULE_ENABLED */
61+
/* #define HAL_ETH_MODULE_ENABLED */
6662
#define HAL_FLASH_MODULE_ENABLED
67-
// #define HAL_NAND_MODULE_ENABLED
68-
// #define HAL_NOR_MODULE_ENABLED
69-
// #define HAL_PCCARD_MODULE_ENABLED
70-
// #define HAL_SRAM_MODULE_ENABLED
71-
// #define HAL_SDRAM_MODULE_ENABLED
72-
// #define HAL_HASH_MODULE_ENABLED
63+
/* #define HAL_NAND_MODULE_ENABLED */
64+
/* #define HAL_NOR_MODULE_ENABLED */
65+
/* #define HAL_PCCARD_MODULE_ENABLED */
66+
/* #define HAL_SRAM_MODULE_ENABLED */
67+
/* #define HAL_SDRAM_MODULE_ENABLED */
68+
/* #define HAL_HASH_MODULE_ENABLED */
7369
#define HAL_GPIO_MODULE_ENABLED
7470
#define HAL_I2C_MODULE_ENABLED
75-
// #define HAL_I2S_MODULE_ENABLED
76-
// #define HAL_IWDG_MODULE_ENABLED
77-
// #define HAL_LTDC_MODULE_ENABLED
78-
// #define HAL_DSI_MODULE_ENABLED
71+
/* #define HAL_I2S_MODULE_ENABLED */
72+
/* #define HAL_IWDG_MODULE_ENABLED */
73+
/* #define HAL_LTDC_MODULE_ENABLED */
74+
/* #define HAL_DSI_MODULE_ENABLED */
7975
#define HAL_PWR_MODULE_ENABLED
80-
// #define HAL_QSPI_MODULE_ENABLED
76+
/* #define HAL_QSPI_MODULE_ENABLED */
8177
#define HAL_RCC_MODULE_ENABLED
82-
// #define HAL_RNG_MODULE_ENABLED
78+
/* #define HAL_RNG_MODULE_ENABLED */
8379
#define HAL_RTC_MODULE_ENABLED
84-
// #define HAL_SAI_MODULE_ENABLED
85-
// #define HAL_SD_MODULE_ENABLED
80+
/* #define HAL_SAI_MODULE_ENABLED */
81+
/* #define HAL_SD_MODULE_ENABLED */
8682
#define HAL_SPI_MODULE_ENABLED
8783
#define HAL_TIM_MODULE_ENABLED
8884
#define HAL_UART_MODULE_ENABLED
89-
// #define HAL_USART_MODULE_ENABLED
90-
// #define HAL_IRDA_MODULE_ENABLED
91-
// #define HAL_SMARTCARD_MODULE_ENABLED
92-
// #define HAL_WWDG_MODULE_ENABLED
85+
/* #define HAL_USART_MODULE_ENABLED */
86+
/* #define HAL_IRDA_MODULE_ENABLED */
87+
/* #define HAL_SMARTCARD_MODULE_ENABLED */
88+
/* #define HAL_WWDG_MODULE_ENABLED */
9389
#define HAL_CORTEX_MODULE_ENABLED
9490
#define HAL_PCD_MODULE_ENABLED
9591
#define HAL_HCD_MODULE_ENABLED
96-
// #define HAL_FMPI2C_MODULE_ENABLED
97-
// #define HAL_SPDIFRX_MODULE_ENABLED
98-
// #define HAL_DFSDM_MODULE_ENABLED
99-
// #define HAL_LPTIM_MODULE_ENABLED
92+
/* #define HAL_FMPI2C_MODULE_ENABLED */
93+
/* #define HAL_SPDIFRX_MODULE_ENABLED */
94+
/* #define HAL_DFSDM_MODULE_ENABLED */
95+
/* #define HAL_LPTIM_MODULE_ENABLED */
96+
/* #define HAL_MMC_MODULE_ENABLED */
10097

10198
/* ########################## HSE/HSI Values adaptation ##################### */
10299
/**
@@ -105,11 +102,11 @@
105102
* (when HSE is used as system clock source, directly or through the PLL).
106103
*/
107104
#if !defined (HSE_VALUE)
108-
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
105+
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
109106
#endif /* HSE_VALUE */
110107

111108
#if !defined (HSE_STARTUP_TIMEOUT)
112-
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
109+
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
113110
#endif /* HSE_STARTUP_TIMEOUT */
114111

115112
/**
@@ -118,26 +115,26 @@
118115
* (when HSI is used as system clock source, directly or through the PLL).
119116
*/
120117
#if !defined (HSI_VALUE)
121-
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
118+
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */
122119
#endif /* HSI_VALUE */
123120

124121
/**
125122
* @brief Internal Low Speed oscillator (LSI) value.
126123
*/
127124
#if !defined (LSI_VALUE)
128-
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
129-
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
130-
The real value may vary depending on the variations
131-
in voltage and temperature.*/
125+
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */
126+
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
127+
The real value may vary depending on the variations
128+
in voltage and temperature. */
132129
/**
133130
* @brief External Low Speed oscillator (LSE) value.
134131
*/
135132
#if !defined (LSE_VALUE)
136-
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
133+
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
137134
#endif /* LSE_VALUE */
138135

139136
#if !defined (LSE_STARTUP_TIMEOUT)
140-
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
137+
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
141138
#endif /* LSE_STARTUP_TIMEOUT */
142139

143140
/**
@@ -146,7 +143,7 @@
146143
* frequency, this source is inserted directly through I2S_CKIN pad.
147144
*/
148145
#if !defined (EXTERNAL_CLOCK_VALUE)
149-
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
146+
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/
150147
#endif /* EXTERNAL_CLOCK_VALUE */
151148

152149
/* Tip: To avoid modifying this file each time you need to use different HSE,
@@ -156,8 +153,8 @@
156153
/**
157154
* @brief This is the HAL system configuration section
158155
*/
159-
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
160-
#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */
156+
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
157+
#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */
161158
#define USE_RTOS 0U
162159
#define PREFETCH_ENABLE 1U
163160
#define INSTRUCTION_CACHE_ENABLE 1U
@@ -185,56 +182,56 @@
185182
/* Definition of the Ethernet driver buffers size and count */
186183
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
187184
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
188-
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
189-
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
185+
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
186+
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
190187

191188
/* Section 2: PHY configuration section */
192189

193190
/* DP83848 PHY Address*/
194-
#define DP83848_PHY_ADDRESS 0x01U
191+
#define DP83848_PHY_ADDRESS 0x01U
195192
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
196-
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
193+
#define PHY_RESET_DELAY 0x000000FFU
197194
/* PHY Configuration delay */
198-
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
195+
#define PHY_CONFIG_DELAY 0x00000FFFU
199196

200-
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
201-
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
197+
#define PHY_READ_TO 0x0000FFFFU
198+
#define PHY_WRITE_TO 0x0000FFFFU
202199

203200
/* Section 3: Common PHY Registers */
204201

205-
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
206-
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
202+
#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */
203+
#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */
207204

208-
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
209-
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
210-
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
211-
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
212-
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
213-
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
214-
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
215-
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
216-
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
217-
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
205+
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
206+
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
207+
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
208+
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
209+
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
210+
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
211+
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
212+
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
213+
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
214+
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
218215

219-
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
220-
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
221-
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
216+
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
217+
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
218+
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
222219

223220
/* Section 4: Extended PHY Registers */
224221

225-
#define PHY_SR ((uint16_t)0x0010U) /*!< PHY status register Offset */
226-
#define PHY_MICR ((uint16_t)0x0011U) /*!< MII Interrupt Control Register */
227-
#define PHY_MISR ((uint16_t)0x0012U) /*!< MII Interrupt Status and Misc. Control Register */
222+
#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */
223+
#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */
224+
#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */
228225

229-
#define PHY_LINK_STATUS ((uint16_t)0x0001U) /*!< PHY Link mask */
230-
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
231-
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
226+
#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
227+
#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
228+
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
232229

233-
#define PHY_MICR_INT_EN ((uint16_t)0x0002U) /*!< PHY Enable interrupts */
234-
#define PHY_MICR_INT_OE ((uint16_t)0x0001U) /*!< PHY Enable output interrupt events */
230+
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
231+
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
235232

236-
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */
237-
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */
233+
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
234+
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
238235

239236
/* ################## SPI peripheral configuration ########################## */
240237

@@ -274,6 +271,10 @@
274271
#include "stm32f4xx_hal_can.h"
275272
#endif /* HAL_CAN_MODULE_ENABLED */
276273

274+
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
275+
#include "stm32f4xx_hal_can_legacy.h"
276+
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
277+
277278
#ifdef HAL_CRC_MODULE_ENABLED
278279
#include "stm32f4xx_hal_crc.h"
279280
#endif /* HAL_CRC_MODULE_ENABLED */
@@ -426,24 +427,27 @@
426427
#include "stm32f4xx_hal_lptim.h"
427428
#endif /* HAL_LPTIM_MODULE_ENABLED */
428429

430+
#ifdef HAL_MMC_MODULE_ENABLED
431+
#include "stm32f4xx_hal_mmc.h"
432+
#endif /* HAL_MMC_MODULE_ENABLED */
433+
429434
/* Exported macro ------------------------------------------------------------*/
430435
#ifdef USE_FULL_ASSERT
431436
/**
432437
* @brief The assert_param macro is used for function's parameters check.
433-
* @param expr: If expr is false, it calls assert_failed function
438+
* @param expr If expr is false, it calls assert_failed function
434439
* which reports the name of the source file and the source
435440
* line number of the call that failed.
436441
* If expr is true, it returns no value.
437442
* @retval None
438443
*/
439-
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
444+
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
440445
/* Exported functions ------------------------------------------------------- */
441446
void assert_failed(uint8_t* file, uint32_t line);
442447
#else
443-
#define assert_param(expr) ((void)0)
448+
#define assert_param(expr) ((void)0U)
444449
#endif /* USE_FULL_ASSERT */
445450

446-
447451
#ifdef __cplusplus
448452
}
449453
#endif

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