We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
1 parent a5baee3 commit 33278e9Copy full SHA for 33278e9
variants/Generic_F401Rx/variant.cpp
@@ -143,7 +143,7 @@ static uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
143
144
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
145
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
146
- RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
+ RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not
147
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
148
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
149
RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB
0 commit comments