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Merge pull request #141 from fpistm/hal_update
Updated HAL drivers and CMSIS for STM32F2/F4/L4
2 parents 24baacb + 894eb91 commit 30a305f

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Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f205xx.h

+1-2
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32f205xx.h
44
* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS STM32F205xx Device Peripheral Access Layer Header File.
86
* This file contains :
97
* - Data structures and the address mapping for all peripherals
@@ -84,6 +82,7 @@ typedef enum
8482
{
8583
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
8684
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
85+
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
8786
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
8887
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
8988
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f207xx.h

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Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
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* @file stm32f207xx.h
44
* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS STM32F207xx Device Peripheral Access Layer Header File.
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* This file contains :
97
* - Data structures and the address mapping for all peripherals
@@ -84,6 +82,7 @@ typedef enum
8482
{
8583
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
8684
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
85+
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
8786
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
8887
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
8988
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f215xx.h

+1-4
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
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* @file stm32f215xx.h
44
* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS STM32F215xx Device Peripheral Access Layer Header File.
86
* This file contains :
97
* - Data structures and the address mapping for all peripherals
@@ -84,6 +82,7 @@ typedef enum
8482
{
8583
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
8684
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
85+
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
8786
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
8887
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
8988
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
@@ -986,7 +985,6 @@ USB_OTG_HostChannelTypeDef;
986985
/*!< AHB2 peripherals */
987986
#define CRYP_BASE (AHB2PERIPH_BASE + 0x60000U)
988987
#define HASH_BASE (AHB2PERIPH_BASE + 0x60400U)
989-
#define HASH_DIGEST_BASE (AHB2PERIPH_BASE + 0x60710U)
990988
#define RNG_BASE (AHB2PERIPH_BASE + 0x60800U)
991989

992990
/*!< FSMC Bankx registers base address */
@@ -1101,7 +1099,6 @@ USB_OTG_HostChannelTypeDef;
11011099
#define DMA2_Stream7 ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE)
11021100
#define CRYP ((CRYP_TypeDef *) CRYP_BASE)
11031101
#define HASH ((HASH_TypeDef *) HASH_BASE)
1104-
#define HASH_DIGEST ((HASH_DIGEST_TypeDef *) HASH_DIGEST_BASE)
11051102
#define RNG ((RNG_TypeDef *) RNG_BASE)
11061103
#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
11071104
#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f217xx.h

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Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
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* @file stm32f217xx.h
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* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS STM32F217xx Device Peripheral Access Layer Header File.
86
* This file contains :
97
* - Data structures and the address mapping for all peripherals
@@ -84,6 +82,7 @@ typedef enum
8482
{
8583
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
8684
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
85+
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
8786
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
8887
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
8988
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
@@ -1088,7 +1087,6 @@ USB_OTG_HostChannelTypeDef;
10881087
#define DCMI_BASE (AHB2PERIPH_BASE + 0x50000U)
10891088
#define CRYP_BASE (AHB2PERIPH_BASE + 0x60000U)
10901089
#define HASH_BASE (AHB2PERIPH_BASE + 0x60400U)
1091-
#define HASH_DIGEST_BASE (AHB2PERIPH_BASE + 0x60710U)
10921090
#define RNG_BASE (AHB2PERIPH_BASE + 0x60800U)
10931091

10941092
/*!< FSMC Bankx registers base address */
@@ -1205,7 +1203,6 @@ USB_OTG_HostChannelTypeDef;
12051203
#define DCMI ((DCMI_TypeDef *) DCMI_BASE)
12061204
#define CRYP ((CRYP_TypeDef *) CRYP_BASE)
12071205
#define HASH ((HASH_TypeDef *) HASH_BASE)
1208-
#define HASH_DIGEST ((HASH_DIGEST_TypeDef *) HASH_DIGEST_BASE)
12091206
#define RNG ((RNG_TypeDef *) RNG_BASE)
12101207
#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
12111208
#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h

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@@ -2,8 +2,6 @@
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******************************************************************************
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* @file stm32f2xx.h
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* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS STM32F2xx Device Peripheral Access Layer Header File.
86
*
97
* The file is the unique include file that the application programmer
@@ -99,11 +97,11 @@
9997
#endif /* USE_HAL_DRIVER */
10098

10199
/**
102-
* @brief CMSIS Device version number V2.2.0
100+
* @brief CMSIS Device version number V2.2.1
103101
*/
104102
#define __STM32F2xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
105103
#define __STM32F2xx_CMSIS_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */
106-
#define __STM32F2xx_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
104+
#define __STM32F2xx_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
107105
#define __STM32F2xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
108106
#define __STM32F2xx_CMSIS_VERSION ((__STM32F2xx_CMSIS_VERSION_MAIN << 24)\
109107
|(__STM32F2xx_CMSIS_VERSION_SUB1 << 16)\

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/system_stm32f2xx.h

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@@ -2,8 +2,6 @@
22
******************************************************************************
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* @file system_stm32f2xx.h
44
* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS Cortex-M3 Device System Source File for STM32F2xx devices.
86
******************************************************************************
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* @attention

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Release_Notes.html

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Large diffs are not rendered by default.

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f205xx.s

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@@ -2,8 +2,6 @@
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******************************************************************************
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* @file startup_stm32f205xx.s
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* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief STM32F205xx Devices vector table for Atollic TrueSTUDIO toolchain.
86
* This module performs:
97
* - Set the initial SP

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f207xx.s

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@@ -2,8 +2,6 @@
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******************************************************************************
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* @file startup_stm32f207xx.s
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* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief STM32F207xx Devices vector table for Atollic TrueSTUDIO toolchain.
86
* This module performs:
97
* - Set the initial SP

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f215xx.s

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@@ -2,8 +2,6 @@
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******************************************************************************
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* @file startup_stm32f215xx.s
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* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief STM32F215xx Devices vector table for Atollic TrueSTUDIO toolchain.
86
* This module performs:
97
* - Set the initial SP

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f217xx.s

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@@ -2,8 +2,6 @@
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******************************************************************************
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* @file startup_stm32f217xx.s
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* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief STM32F217xx Devices vector table for Atollic TrueSTUDIO toolchain.
86
* This module performs:
97
* - Set the initial SP

Diff for: ‎system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c

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@@ -2,8 +2,6 @@
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******************************************************************************
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* @file system_stm32f2xx.c
44
* @author MCD Application Team
5-
* @version V2.2.0
6-
* @date 17-March-2017
75
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
86
*
97
* This file provides two functions and one global variable to be called from

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