Skip to content

Commit 258d8c3

Browse files
dojyorindojyorin
committed
Unify clock configuration of H5.
1 parent 7ef0723 commit 258d8c3

14 files changed

+114
-126
lines changed

Diff for: ‎variants/STM32H5xx/H503CB(T-U)/generic_clock.c

+1-7
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,6 @@ WEAK void SystemClock_Config(void)
6363
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
6464
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
6565
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
66-
6766
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
6867
Error_Handler();
6968
}
@@ -87,20 +86,15 @@ WEAK void SystemClock_Config(void)
8786
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8887
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8988
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
90-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
9189
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
9291
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
9392
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
9493
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
9594
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
9695
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
9796
Error_Handler();
9897
}
99-
100-
101-
/** Configure the programming delay
102-
*/
103-
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
10498
}
10599

106100
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32H5xx/H503KBU/generic_clock.c

+11-7
Original file line numberDiff line numberDiff line change
@@ -44,12 +44,11 @@ WEAK void SystemClock_Config(void)
4444
RCC_OscInitStruct.PLL.PLLM = 1;
4545
RCC_OscInitStruct.PLL.PLLN = 125;
4646
RCC_OscInitStruct.PLL.PLLP = 2;
47-
RCC_OscInitStruct.PLL.PLLQ = 2;
47+
RCC_OscInitStruct.PLL.PLLQ = 10;
4848
RCC_OscInitStruct.PLL.PLLR = 2;
4949
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
5050
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
5151
RCC_OscInitStruct.PLL.PLLFRACN = 0;
52-
5352
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
5453
Error_Handler();
5554
}
@@ -64,15 +63,19 @@ WEAK void SystemClock_Config(void)
6463
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
6564
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
6665
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
67-
6866
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
6967
Error_Handler();
7068
}
7169

70+
/** Configure the programming delay
71+
*/
72+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
73+
7274
/** Initializes the peripherals clock
7375
*/
7476
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
75-
| RCC_PERIPHCLK_USB;
77+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
78+
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
7679
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
7780
PeriphClkInitStruct.PLL2.PLL2M = 1;
7881
PeriphClkInitStruct.PLL2.PLL2N = 125;
@@ -83,14 +86,15 @@ WEAK void SystemClock_Config(void)
8386
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8487
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8588
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
86-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8789
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8891
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
89-
92+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
93+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
94+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
9095
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
9196
Error_Handler();
9297
}
93-
9498
}
9599

96100
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32H5xx/H503RBT/generic_clock.c

+11-7
Original file line numberDiff line numberDiff line change
@@ -24,14 +24,15 @@ WEAK void SystemClock_Config(void)
2424
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
2525
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
2626

27-
/* Configure the main internal regulator output voltage */
27+
/** Configure the main internal regulator output voltage
28+
*/
2829
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
2930

3031
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
3132

32-
/* Initializes the RCC Oscillators according to the specified parameters
33-
* in the RCC_OscInitTypeDef structure.
34-
*/
33+
/** Initializes the RCC Oscillators according to the specified parameters
34+
* in the RCC_OscInitTypeDef structure.
35+
*/
3536
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
3637
| RCC_OSCILLATORTYPE_CSI;
3738
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
@@ -51,7 +52,9 @@ WEAK void SystemClock_Config(void)
5152
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
5253
Error_Handler();
5354
}
54-
/* Initializes the CPU, AHB and APB buses clocks */
55+
56+
/** Initializes the CPU, AHB and APB buses clocks
57+
*/
5558
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
5659
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
5760
| RCC_CLOCKTYPE_PCLK3;
@@ -68,7 +71,8 @@ WEAK void SystemClock_Config(void)
6871
*/
6972
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
7073

71-
/* Initializes the peripherals clock */
74+
/** Initializes the peripherals clock
75+
*/
7276
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
7377
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
7478
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
@@ -82,8 +86,8 @@ WEAK void SystemClock_Config(void)
8286
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8387
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8488
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
85-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8689
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8791
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
8892
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
8993
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;

Diff for: ‎variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp

+12-8
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,8 @@ WEAK void SystemClock_Config(void)
109109
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
110110
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
111111

112-
/* Configure the main internal regulator output voltage */
112+
/** Configure the main internal regulator output voltage
113+
*/
113114
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
114115

115116
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
@@ -120,7 +121,9 @@ WEAK void SystemClock_Config(void)
120121
HAL_PWR_EnableBkUpAccess();
121122
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
122123

123-
/* Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef structure */
124+
/** Initializes the RCC Oscillators according to the specified parameters
125+
* in the RCC_OscInitTypeDef structure.
126+
*/
124127
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE
125128
| RCC_OSCILLATORTYPE_CSI;
126129
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
@@ -141,7 +144,8 @@ WEAK void SystemClock_Config(void)
141144
Error_Handler();
142145
}
143146

144-
/* Initializes the CPU, AHB and APB buses clocks */
147+
/** Initializes the CPU, AHB and APB buses clocks
148+
*/
145149
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
146150
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
147151
| RCC_CLOCKTYPE_PCLK3;
@@ -150,7 +154,6 @@ WEAK void SystemClock_Config(void)
150154
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
151155
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
152156
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
153-
154157
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
155158
Error_Handler();
156159
}
@@ -159,9 +162,10 @@ WEAK void SystemClock_Config(void)
159162
*/
160163
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
161164

162-
/* Initializes the peripherals clock */
163-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_ADCDAC
164-
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SPI1
165+
/** Initializes the peripherals clock
166+
*/
167+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
168+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
165169
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
166170
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
167171
PeriphClkInitStruct.PLL2.PLL2M = 1;
@@ -173,8 +177,8 @@ WEAK void SystemClock_Config(void)
173177
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
174178
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
175179
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
176-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
177180
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
181+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
178182
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
179183
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
180184
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;

Diff for: ‎variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,8 @@
157157
#define PIN_SERIAL_TX PA4
158158
#endif
159159

160-
#define HSE_VALUE 24000000UL /*!< Value of the External oscillator in Hz */
160+
// Value of the HSE Bypass in Hz
161+
#define HSE_VALUE 24000000UL
161162

162163
// Extra HAL modules
163164
#if !defined(HAL_DAC_MODULE_DISABLED)

Diff for: ‎variants/STM32H5xx/H562R(G-I)T/generic_clock.c

+11-18
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,6 @@ WEAK void SystemClock_Config(void)
5353
Error_Handler();
5454
}
5555

56-
5756
/** Initializes the CPU, AHB and APB buses clocks
5857
*/
5958
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -64,7 +63,6 @@ WEAK void SystemClock_Config(void)
6463
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
6564
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
6665
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
67-
6866
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
6967
Error_Handler();
7068
}
@@ -74,28 +72,21 @@ WEAK void SystemClock_Config(void)
7472
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
7573

7674
/** Initializes the peripherals clock
77-
*/
78-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
79-
| RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB
75+
*/
76+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC
77+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB
8078
| RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2
8179
| RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6;
8280
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
8381
PeriphClkInitStruct.PLL2.PLL2M = 1;
8482
PeriphClkInitStruct.PLL2.PLL2N = 125;
8583
PeriphClkInitStruct.PLL2.PLL2P = 2;
8684
PeriphClkInitStruct.PLL2.PLL2Q = 15;
87-
PeriphClkInitStruct.PLL2.PLL2R = 10;
85+
PeriphClkInitStruct.PLL2.PLL2R = 4;
8886
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
8987
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
9088
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
9189
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
92-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
93-
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
94-
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
95-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
96-
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
97-
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
98-
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
9990
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI;
10091
PeriphClkInitStruct.PLL3.PLL3M = 2;
10192
PeriphClkInitStruct.PLL3.PLL3N = 125;
@@ -106,15 +97,17 @@ WEAK void SystemClock_Config(void)
10697
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE;
10798
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
10899
PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ;
100+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
101+
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
102+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
103+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
104+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
105+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
106+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
109107
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q;
110-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL1Q;
111108
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
112109
Error_Handler();
113110
}
114-
115-
/** Configure the programming delay
116-
*/
117-
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
118111
}
119112

120113
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.cpp

+11-18
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,6 @@ WEAK void SystemClock_Config(void)
132132
Error_Handler();
133133
}
134134

135-
136135
/** Initializes the CPU, AHB and APB buses clocks
137136
*/
138137
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
@@ -143,7 +142,6 @@ WEAK void SystemClock_Config(void)
143142
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
144143
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
145144
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
146-
147145
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
148146
Error_Handler();
149147
}
@@ -153,28 +151,21 @@ WEAK void SystemClock_Config(void)
153151
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
154152

155153
/** Initializes the peripherals clock
156-
*/
157-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
158-
| RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_USB
154+
*/
155+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_ADCDAC
156+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USB
159157
| RCC_PERIPHCLK_SPI1 | RCC_PERIPHCLK_SPI2
160158
| RCC_PERIPHCLK_SPI3 | RCC_PERIPHCLK_SPI6;
161159
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
162160
PeriphClkInitStruct.PLL2.PLL2M = 1;
163161
PeriphClkInitStruct.PLL2.PLL2N = 125;
164162
PeriphClkInitStruct.PLL2.PLL2P = 2;
165163
PeriphClkInitStruct.PLL2.PLL2Q = 15;
166-
PeriphClkInitStruct.PLL2.PLL2R = 10;
164+
PeriphClkInitStruct.PLL2.PLL2R = 4;
167165
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
168166
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
169167
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
170168
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
171-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
172-
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
173-
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL1Q;
174-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
175-
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
176-
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
177-
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
178169
PeriphClkInitStruct.PLL3.PLL3Source = RCC_PLL3_SOURCE_CSI;
179170
PeriphClkInitStruct.PLL3.PLL3M = 2;
180171
PeriphClkInitStruct.PLL3.PLL3N = 125;
@@ -185,15 +176,17 @@ WEAK void SystemClock_Config(void)
185176
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3_VCORANGE_WIDE;
186177
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
187178
PeriphClkInitStruct.PLL3.PLL3ClockOut = RCC_PLL3_DIVQ;
179+
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLL2R;
180+
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
181+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
182+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
183+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
184+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
185+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
188186
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL3Q;
189-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL1Q;
190187
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
191188
Error_Handler();
192189
}
193-
194-
/** Configure the programming delay
195-
*/
196-
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
197190
}
198191

199192
#ifdef __cplusplus

Diff for: ‎variants/STM32H5xx/H562R(G-I)T/variant_WEACT_H562RG.h

+1
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,7 @@ P1 P2
222222
#define HAL_SD_MODULE_ENABLED
223223
#endif
224224

225+
// Value of the HSE Bypass in Hz
225226
#define HSE_VALUE 8000000UL
226227

227228
// SD card slot Definitions

0 commit comments

Comments
 (0)