system(F3): update STM32F3xx CMSIS Drivers to v2.3.8

Included in STM32CubeF3 FW v1.11.5

Signed-off-by: Frederic Pillon <[email protected]>

Author: fpistm

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h

@@ -1996,9 +1996,9 @@ typedef struct
 #define ADC34_CSR_ADRDY_EOS_SLV_Pos      (19U)                                 
 #define ADC34_CSR_ADRDY_EOS_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
 #define ADC34_CSR_ADRDY_EOS_SLV          ADC34_CSR_ADRDY_EOS_SLV_Msk           /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos      (20U)                                 
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV          ADC12_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos      (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV          ADC34_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
 #define ADC34_CSR_ADRDY_JEOC_SLV_Pos     (21U)                                 
 #define ADC34_CSR_ADRDY_JEOC_SLV_Msk     (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
 #define ADC34_CSR_ADRDY_JEOC_SLV         ADC34_CSR_ADRDY_JEOC_SLV_Msk          /*!< End of injected conversion of the slave ADC */

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h

@@ -2107,9 +2107,9 @@ typedef struct
 #define ADC34_CSR_ADRDY_EOS_SLV_Pos      (19U)                                 
 #define ADC34_CSR_ADRDY_EOS_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
 #define ADC34_CSR_ADRDY_EOS_SLV          ADC34_CSR_ADRDY_EOS_SLV_Msk           /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos      (20U)                                 
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV          ADC12_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos      (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV          ADC34_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
 #define ADC34_CSR_ADRDY_JEOC_SLV_Pos     (21U)                                 
 #define ADC34_CSR_ADRDY_JEOC_SLV_Msk     (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
 #define ADC34_CSR_ADRDY_JEOC_SLV         ADC34_CSR_ADRDY_JEOC_SLV_Msk          /*!< End of injected conversion of the slave ADC */

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f334x8.h

@@ -1998,9 +1998,9 @@ typedef struct
 #define ADC34_CSR_ADRDY_EOS_SLV_Pos      (19U)                                 
 #define ADC34_CSR_ADRDY_EOS_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
 #define ADC34_CSR_ADRDY_EOS_SLV          ADC34_CSR_ADRDY_EOS_SLV_Msk           /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos      (20U)                                 
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV          ADC12_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos      (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV          ADC34_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
 #define ADC34_CSR_ADRDY_JEOC_SLV_Pos     (21U)                                 
 #define ADC34_CSR_ADRDY_JEOC_SLV_Msk     (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
 #define ADC34_CSR_ADRDY_JEOC_SLV         ADC34_CSR_ADRDY_JEOC_SLV_Msk          /*!< End of injected conversion of the slave ADC */

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f358xx.h

@@ -1954,9 +1954,9 @@ typedef struct
 #define ADC34_CSR_ADRDY_EOS_SLV_Pos      (19U)                                 
 #define ADC34_CSR_ADRDY_EOS_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
 #define ADC34_CSR_ADRDY_EOS_SLV          ADC34_CSR_ADRDY_EOS_SLV_Msk           /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos      (20U)                                 
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV          ADC12_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos      (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV          ADC34_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
 #define ADC34_CSR_ADRDY_JEOC_SLV_Pos     (21U)                                 
 #define ADC34_CSR_ADRDY_JEOC_SLV_Msk     (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
 #define ADC34_CSR_ADRDY_JEOC_SLV         ADC34_CSR_ADRDY_JEOC_SLV_Msk          /*!< End of injected conversion of the slave ADC */

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f373xc.h

@@ -7363,9 +7363,13 @@ typedef struct
 #define CEC_TXDR_TXD             CEC_TXDR_TXD_Msk                              /*!< CEC Tx Data                              */
 
 /*******************  Bit definition for CEC_RXDR register  *******************/
-#define CEC_TXDR_RXD_Pos         (0U)                                          
-#define CEC_TXDR_RXD_Msk         (0xFFUL << CEC_TXDR_RXD_Pos)                   /*!< 0x000000FF */
-#define CEC_TXDR_RXD             CEC_TXDR_RXD_Msk                              /*!< CEC Rx Data                              */
+#define CEC_RXDR_RXD_Pos         (0U)
+#define CEC_RXDR_RXD_Msk         (0xFFUL << CEC_RXDR_RXD_Pos)                   /*!< 0x000000FF */
+#define CEC_RXDR_RXD             CEC_RXDR_RXD_Msk                              /*!< CEC Rx Data                              */
+/* Legacy aliases */
+#define CEC_TXDR_RXD_Pos         CEC_RXDR_RXD_Pos
+#define CEC_TXDR_RXD_Msk         CEC_RXDR_RXD_Msk
+#define CEC_TXDR_RXD             CEC_RXDR_RXD
 
 /*******************  Bit definition for CEC_ISR register  ********************/
 #define CEC_ISR_RXBR_Pos         (0U)                                          

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f378xx.h

@@ -7304,9 +7304,13 @@ typedef struct
 #define CEC_TXDR_TXD             CEC_TXDR_TXD_Msk                              /*!< CEC Tx Data                              */
 
 /*******************  Bit definition for CEC_RXDR register  *******************/
-#define CEC_TXDR_RXD_Pos         (0U)                                          
-#define CEC_TXDR_RXD_Msk         (0xFFUL << CEC_TXDR_RXD_Pos)                   /*!< 0x000000FF */
-#define CEC_TXDR_RXD             CEC_TXDR_RXD_Msk                              /*!< CEC Rx Data                              */
+#define CEC_RXDR_RXD_Pos         (0U)
+#define CEC_RXDR_RXD_Msk         (0xFFUL << CEC_RXDR_RXD_Pos)                   /*!< 0x000000FF */
+#define CEC_RXDR_RXD             CEC_RXDR_RXD_Msk                              /*!< CEC Rx Data                              */
+/* Legacy aliases */
+#define CEC_TXDR_RXD_Pos         CEC_RXDR_RXD_Pos
+#define CEC_TXDR_RXD_Msk         CEC_RXDR_RXD_Msk
+#define CEC_TXDR_RXD             CEC_RXDR_RXD
 
 /*******************  Bit definition for CEC_ISR register  ********************/
 #define CEC_ISR_RXBR_Pos         (0U)                                          

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f398xx.h

@@ -2063,9 +2063,9 @@ typedef struct
 #define ADC34_CSR_ADRDY_EOS_SLV_Pos      (19U)                                 
 #define ADC34_CSR_ADRDY_EOS_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_EOS_SLV_Pos) /*!< 0x00080000 */
 #define ADC34_CSR_ADRDY_EOS_SLV          ADC34_CSR_ADRDY_EOS_SLV_Msk           /*!< End of regular sequence flag of the slave ADC */
-#define ADC12_CSR_ADRDY_OVR_SLV_Pos      (20U)                                 
-#define ADC12_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC12_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
-#define ADC12_CSR_ADRDY_OVR_SLV          ADC12_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
+#define ADC34_CSR_ADRDY_OVR_SLV_Pos      (20U)
+#define ADC34_CSR_ADRDY_OVR_SLV_Msk      (0x1UL << ADC34_CSR_ADRDY_OVR_SLV_Pos) /*!< 0x00100000 */
+#define ADC34_CSR_ADRDY_OVR_SLV          ADC34_CSR_ADRDY_OVR_SLV_Msk           /*!< Overrun flag of the slave ADC */
 #define ADC34_CSR_ADRDY_JEOC_SLV_Pos     (21U)                                 
 #define ADC34_CSR_ADRDY_JEOC_SLV_Msk     (0x1UL << ADC34_CSR_ADRDY_JEOC_SLV_Pos) /*!< 0x00200000 */
 #define ADC34_CSR_ADRDY_JEOC_SLV         ADC34_CSR_ADRDY_JEOC_SLV_Msk          /*!< End of injected conversion of the slave ADC */

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h

@@ -102,11 +102,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V2.3.7
+  * @brief CMSIS Device version number V2.3.8
   */
 #define __STM32F3_CMSIS_VERSION_MAIN   (0x02) /*!< [31:24] main version */
 #define __STM32F3_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F3_CMSIS_VERSION_SUB2   (0x07) /*!< [15:8]  sub2 version */
+#define __STM32F3_CMSIS_VERSION_SUB2   (0x08) /*!< [15:8]  sub2 version */
 #define __STM32F3_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
 #define __STM32F3_CMSIS_VERSION        ((__STM32F3_CMSIS_VERSION_MAIN     << 24)\
                                        |(__STM32F3_CMSIS_VERSION_SUB1 << 16)\

Diff for: system/Drivers/CMSIS/Device/ST/STM32F3xx/License.md renamed to system/Drivers/CMSIS/Device/ST/STM32F3xx/LICENSE.md

@@ -1,19 +1,21 @@
 # STM32CubeF3 CMSIS Device MCU Component
 
+![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/cmsis_device_f3.svg?color=brightgreen)
+
 ## Overview
 
 **STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.
 
-**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series.
-   * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product
-   * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio
-   * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series
-   * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ...
-   * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series
+**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series.
+   * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
+   * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio.
+   * The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series.
+   * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library...
+   * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series.
 
-Two models of publication are proposed for the STM32Cube embedded software :
-   * The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series)
-   * The **MCU component** : progressively from November 2019, each STM32Cube software module being part of the STM32Cube MCU Package, will be delivered as an individual repo, allowing the user to select and get only the required software functions.
+Two models of publication are proposed for the STM32Cube embedded software:
+   * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
+   * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions.
 
 ## Description
 
@@ -32,4 +34,4 @@ The full **STM32CubeF3** MCU package is available [here](https://github.com/STMi
 ## Troubleshooting
 If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/cmsis_device_f3/issues/new).
 
-For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
+For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/topic/0TO0X000000BSqSWAW/stm32-mcus).