Skip to content

Commit 113ef68

Browse files
fpistmfpistm
committed
system(H5) update STM32H5xx HAL Drivers to v1.3.0
Included in STM32CubeH5 FW v1.3.0 Signed-off-by: Frederic Pillon <[email protected]>
1 parent ec3f793 commit 113ef68

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

60 files changed

+2446
-909
lines changed

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

+10-3
Original file line numberDiff line numberDiff line change
@@ -1817,7 +1817,7 @@ extern "C" {
18171817
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
18181818
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
18191819

1820-
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \
1820+
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \
18211821
HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
18221822
HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
18231823

@@ -2731,6 +2731,12 @@ extern "C" {
27312731
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
27322732
#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
27332733
#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
2734+
#if defined(STM32C0)
2735+
#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
2736+
#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
2737+
#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
2738+
#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
2739+
#endif /* STM32C0 */
27342740
#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
27352741
#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
27362742
#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3659,7 +3665,7 @@ extern "C" {
36593665
#endif
36603666

36613667
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3662-
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
3668+
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
36633669
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36643670
#else
36653671
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3910,7 +3916,8 @@ extern "C" {
39103916
*/
39113917
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
39123918
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3913-
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
3919+
defined (STM32WBA) || defined (STM32H5) || \
3920+
defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
39143921
#else
39153922
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39163923
#endif

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_exti.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -186,9 +186,10 @@ typedef struct
186186
#define EXTI_LINE_57 (EXTI_DIRECT | EXTI_REG2 | 0x19U)
187187
#endif /* EXTI_IMR2_IM57 */
188188
#if defined(EXTI_IMR2_IM58)
189+
#if defined(I3C2)
189190
#define EXTI_LINE_58 (EXTI_DIRECT | EXTI_REG2 | 0x1AU)
191+
#endif /* I3C2 */
190192
#endif /* EXTI_IMR2_IM58 */
191-
192193
/**
193194
* @}
194195
*/

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_fdcan.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -517,8 +517,8 @@ typedef void (*pFDCAN_ErrorStatusCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan,
517517
#define HAL_FDCAN_ERROR_PARAM ((uint32_t)0x00000020U) /*!< Parameter error */
518518
#define HAL_FDCAN_ERROR_PENDING ((uint32_t)0x00000040U) /*!< Pending operation */
519519
#define HAL_FDCAN_ERROR_RAM_ACCESS ((uint32_t)0x00000080U) /*!< Message RAM Access Failure */
520-
#define HAL_FDCAN_ERROR_FIFO_EMPTY ((uint32_t)0x00000100U) /*!< Put element in full FIFO */
521-
#define HAL_FDCAN_ERROR_FIFO_FULL ((uint32_t)0x00000200U) /*!< Get element from empty FIFO */
520+
#define HAL_FDCAN_ERROR_FIFO_EMPTY ((uint32_t)0x00000100U) /*!< Get element from empty FIFO */
521+
#define HAL_FDCAN_ERROR_FIFO_FULL ((uint32_t)0x00000200U) /*!< Put element in full FIFO */
522522
#define HAL_FDCAN_ERROR_LOG_OVERFLOW FDCAN_IR_ELO /*!< Overflow of CAN Error Logging Counter */
523523
#define HAL_FDCAN_ERROR_RAM_WDG FDCAN_IR_WDI /*!< Message RAM Watchdog event occurred */
524524
#define HAL_FDCAN_ERROR_PROTOCOL_ARBT FDCAN_IR_PEA /*!< Protocol Error in Arbitration Phase (Nominal Bit Time is used) */

‎system/Drivers/STM32H5xx_HAL_Driver/Inc/stm32h5xx_hal_flash_ex.h

+5-6
Original file line numberDiff line numberDiff line change
@@ -632,13 +632,12 @@ byte configuration */
632632
/** @defgroup FLASH_Programming_Delay FLASH Programming Delay
633633
* @{
634634
*/
635-
#define FLASH_PROGRAMMING_DELAY_0 0x00000000U /*!< programming delay set for Flash running at 70 MHz or
635+
#define FLASH_PROGRAMMING_DELAY_0 0x00000000U /*!< programming delay set for Flash running at 84 MHz or
636636
below */
637-
#define FLASH_PROGRAMMING_DELAY_1 FLASH_ACR_WRHIGHFREQ_0 /*!< programming delay set for Flash running between 70 MHz
638-
and 185 MHz */
639-
#define FLASH_PROGRAMMING_DELAY_2 FLASH_ACR_WRHIGHFREQ_1 /*!< programming delay set for Flash running between 185 MHz
640-
and 225 MHz */
641-
#define FLASH_PROGRAMMING_DELAY_3 FLASH_ACR_WRHIGHFREQ /*!< programming delay set for Flash at startup */
637+
#define FLASH_PROGRAMMING_DELAY_1 FLASH_ACR_WRHIGHFREQ_0 /*!< programming delay set for Flash running between 84 MHz
638+
and 168 MHz */
639+
#define FLASH_PROGRAMMING_DELAY_2 FLASH_ACR_WRHIGHFREQ_1 /*!< programming delay set for Flash running between 168 MHz
640+
and 250 MHz */
642641
/**
643642
* @}
644643
*/

0 commit comments

Comments
 (0)