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Merge pull request #1653 from ABOSTM/BOOTLOADER_JUMP_TO_APPLICATION
Bootloader jump to application
2 parents 3602dda + 0288818 commit 0ed0e8d

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16 files changed

+423
-305
lines changed

16 files changed

+423
-305
lines changed

‎system/STM32F0xx/system_stm32f0xx.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -184,10 +184,10 @@ void SystemInit(void)
184184
#endif
185185

186186
/* Reset HSI14 bit */
187-
RCC->CR2 &= (uint32_t)0xFFFFFFFEU;
187+
RCC->CR2 &= (uint32_t)0xFFFFFFFE;
188188

189-
/* Disable all interrupts */
190-
RCC->CIR = 0x00000000U;
189+
/* Disable all interrupts and clear pending bits */
190+
RCC->CIR = (uint32_t)0x00BF0000;
191191

192192
}
193193

‎system/STM32F1xx/system_stm32f1xx.c

+25-9
Original file line numberDiff line numberDiff line change
@@ -79,14 +79,33 @@
7979
/* #define DATA_IN_ExtSRAM */
8080
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
8181

82-
/*!< Uncomment the following line if you need to relocate your vector Table in
83-
Internal SRAM. */
82+
83+
/* Note: Following vector table addresses must be defined in line with linker
84+
configuration. */
85+
86+
/*!< Uncomment the following line and change the address
87+
if you need to relocate your vector Table at a custom base address (+ VECT_TAB_OFFSET) */
88+
/* #define VECT_TAB_BASE_ADDRESS 0x08000000 */
89+
90+
/*!< Uncomment the following line if you need to relocate your vector Table
91+
in Sram else user remap will be done by default in Flash. */
8492
/* #define VECT_TAB_SRAM */
93+
8594
#ifndef VECT_TAB_OFFSET
86-
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
87-
This value must be a multiple of 0x200. */
95+
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
96+
This value must be a multiple of 0x200. */
8897
#endif
8998

99+
#ifndef VECT_TAB_BASE_ADDRESS
100+
#if defined(VECT_TAB_SRAM)
101+
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
102+
This value must be a multiple of 0x200. */
103+
#else
104+
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
105+
This value must be a multiple of 0x200. */
106+
#endif /* VECT_TAB_SRAM */
107+
#endif /* VECT_TAB_BASE_ADDRESS */
108+
90109

91110
/**
92111
* @}
@@ -195,11 +214,8 @@ void SystemInit (void)
195214
#endif /* DATA_IN_ExtSRAM */
196215
#endif
197216

198-
#ifdef VECT_TAB_SRAM
199-
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
200-
#else
201-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
202-
#endif
217+
/* Configure the Vector Table location add offset address ------------------*/
218+
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
203219
}
204220

205221
/**

‎system/STM32F2xx/system_stm32f2xx.c

+28-13
Original file line numberDiff line numberDiff line change
@@ -66,13 +66,32 @@
6666
on STM322xG_EVAL board as data memory */
6767
/* #define DATA_IN_ExtSRAM */
6868

69-
/*!< Uncomment the following line if you need to relocate your vector Table in
70-
Internal SRAM. */
69+
/* Note: Following vector table addresses must be defined in line with linker
70+
configuration. */
71+
72+
/*!< Uncomment the following line and change the address
73+
if you need to relocate your vector Table at a custom base address (+ VECT_TAB_OFFSET) */
74+
/* #define VECT_TAB_BASE_ADDRESS 0x08000000 */
75+
76+
/*!< Uncomment the following line if you need to relocate your vector Table
77+
in Sram else user remap will be done by default in Flash. */
7178
/* #define VECT_TAB_SRAM */
79+
7280
#ifndef VECT_TAB_OFFSET
73-
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
74-
This value must be a multiple of 0x200. */
81+
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
82+
This value must be a multiple of 0x200. */
7583
#endif
84+
85+
#ifndef VECT_TAB_BASE_ADDRESS
86+
#if defined(VECT_TAB_SRAM)
87+
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
88+
This value must be a multiple of 0x200. */
89+
#else
90+
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
91+
This value must be a multiple of 0x200. */
92+
#endif /* VECT_TAB_SRAM */
93+
#endif /* VECT_TAB_BASE_ADDRESS */
94+
7695
/******************************************************************************/
7796

7897
/**
@@ -136,30 +155,26 @@ void SystemInit(void)
136155
RCC->CR |= (uint32_t)0x00000001;
137156

138157
/* Reset CFGR register */
139-
RCC->CFGR = 0x00000000;
158+
RCC->CFGR = (uint32_t)0x00000000;
140159

141160
/* Reset HSEON, CSSON and PLLON bits */
142161
RCC->CR &= (uint32_t)0xFEF6FFFF;
143162

144163
/* Reset PLLCFGR register */
145-
RCC->PLLCFGR = 0x24003010;
164+
RCC->PLLCFGR = (uint32_t)0x24003010;
146165

147166
/* Reset HSEBYP bit */
148167
RCC->CR &= (uint32_t)0xFFFBFFFF;
149168

150-
/* Disable all interrupts */
151-
RCC->CIR = 0x00000000;
169+
/* Disable all interrupts and clear pending bits */
170+
RCC->CIR = (uint32_t)0x00BF0000;
152171

153172
#ifdef DATA_IN_ExtSRAM
154173
SystemInit_ExtMemCtl();
155174
#endif /* DATA_IN_ExtSRAM */
156175

157176
/* Configure the Vector Table location add offset address ------------------*/
158-
#ifdef VECT_TAB_SRAM
159-
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
160-
#else
161-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
162-
#endif
177+
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
163178
}
164179

165180
/**

‎system/STM32F3xx/system_stm32f3xx.c

+16-18
Original file line numberDiff line numberDiff line change
@@ -84,32 +84,32 @@
8484
/** @addtogroup STM32F3xx_System_Private_Defines
8585
* @{
8686
*/
87-
#ifndef VECT_TAB_OFFSET
88-
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
89-
This value must be a multiple of 0x200. */
90-
#else
91-
#define USER_VECT_TAB_ADDRESS
92-
#endif
9387

9488
/* Note: Following vector table addresses must be defined in line with linker
9589
configuration. */
96-
/*!< Uncomment the following line if you need to relocate the vector table
97-
anywhere in Flash or Sram, else the vector table is kept at the automatic
98-
remap of boot address selected */
99-
/* #define USER_VECT_TAB_ADDRESS */
10090

101-
#if defined(USER_VECT_TAB_ADDRESS)
91+
/*!< Uncomment the following line and change the address
92+
if you need to relocate your vector Table at a custom base address (+ VECT_TAB_OFFSET) */
93+
/* #define VECT_TAB_BASE_ADDRESS 0x08000000 */
94+
10295
/*!< Uncomment the following line if you need to relocate your vector Table
103-
in Sram else user remap will be done in Flash. */
96+
in Sram else user remap will be done by default in Flash. */
10497
/* #define VECT_TAB_SRAM */
98+
99+
#ifndef VECT_TAB_OFFSET
100+
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
101+
This value must be a multiple of 0x200. */
102+
#endif
103+
104+
#ifndef VECT_TAB_BASE_ADDRESS
105105
#if defined(VECT_TAB_SRAM)
106106
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
107107
This value must be a multiple of 0x200. */
108108
#else
109109
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
110110
This value must be a multiple of 0x200. */
111111
#endif /* VECT_TAB_SRAM */
112-
#endif /* USER_VECT_TAB_ADDRESS */
112+
#endif /* VECT_TAB_BASE_ADDRESS */
113113

114114
/******************************************************************************/
115115
/**
@@ -190,13 +190,11 @@ void SystemInit(void)
190190
/* Reset USARTSW[1:0], I2CSW and TIMs bits */
191191
RCC->CFGR3 &= 0xFF00FCCCU;
192192

193-
/* Disable all interrupts */
194-
RCC->CIR = 0x00000000U;
193+
/* Disable all interrupts and clear pending bits */
194+
RCC->CIR = 0x009F0000U;
195195

196196
/* Configure the Vector Table location -------------------------------------*/
197-
#if defined(USER_VECT_TAB_ADDRESS)
198-
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation */
199-
#endif /* USER_VECT_TAB_ADDRESS */
197+
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
200198
}
201199

202200
/**

‎system/STM32F4xx/system_stm32f4xx.c

+23-21
Original file line numberDiff line numberDiff line change
@@ -79,32 +79,33 @@
7979
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
8080
STM32F479xx */
8181

82-
#ifndef VECT_TAB_OFFSET
83-
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
84-
This value must be a multiple of 0x200. */
85-
#else
86-
#define USER_VECT_TAB_ADDRESS
87-
#endif
88-
8982
/* Note: Following vector table addresses must be defined in line with linker
9083
configuration. */
91-
/*!< Uncomment the following line if you need to relocate the vector table
92-
anywhere in Flash or Sram, else the vector table is kept at the automatic
93-
remap of boot address selected */
94-
/* #define USER_VECT_TAB_ADDRESS */
9584

96-
#if defined(USER_VECT_TAB_ADDRESS)
85+
/*!< Uncomment the following line and change the address
86+
if you need to relocate your vector Table at a custom base address (+ VECT_TAB_OFFSET) */
87+
/* #define VECT_TAB_BASE_ADDRESS 0x08000000 */
88+
9789
/*!< Uncomment the following line if you need to relocate your vector Table
98-
in Sram else user remap will be done in Flash. */
90+
in Sram else user remap will be done by default in Flash. */
9991
/* #define VECT_TAB_SRAM */
92+
93+
#ifndef VECT_TAB_OFFSET
94+
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
95+
This value must be a multiple of 0x200. */
96+
#endif
97+
98+
#ifndef VECT_TAB_BASE_ADDRESS
10099
#if defined(VECT_TAB_SRAM)
101100
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
102101
This value must be a multiple of 0x200. */
103102
#else
104103
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
105104
This value must be a multiple of 0x200. */
106105
#endif /* VECT_TAB_SRAM */
107-
#endif /* USER_VECT_TAB_ADDRESS */
106+
#endif /* VECT_TAB_BASE_ADDRESS */
107+
108+
108109
/******************************************************************************/
109110

110111
/**
@@ -171,28 +172,29 @@ void SystemInit(void)
171172
RCC->CR |= (uint32_t)0x00000001;
172173

173174
/* Reset CFGR register */
174-
RCC->CFGR = 0x00000000;
175+
RCC->CFGR = (uint32_t)0x00000000;
175176

176177
/* Reset HSEON, CSSON and PLLON bits */
177178
RCC->CR &= (uint32_t)0xFEF6FFFF;
178179

179180
/* Reset PLLCFGR register */
180-
RCC->PLLCFGR = 0x24003010;
181+
RCC->PLLCFGR = (uint32_t)0x24003010;
181182

182183
/* Reset HSEBYP bit */
183184
RCC->CR &= (uint32_t)0xFFFBFFFF;
184185

185-
/* Disable all interrupts */
186-
RCC->CIR = 0x00000000;
186+
#if defined(RCC_CIR_PLLSAIRDYC)
187+
RCC->CIR = (uint32_t)0x00FF0000;
188+
#else
189+
RCC->CIR = (uint32_t)0x00BF0000;
190+
#endif
187191

188192
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
189193
SystemInit_ExtMemCtl();
190194
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
191195

192196
/* Configure the Vector Table location -------------------------------------*/
193-
#if defined(USER_VECT_TAB_ADDRESS)
194-
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
195-
#endif /* USER_VECT_TAB_ADDRESS */
197+
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
196198
}
197199

198200
/**

‎system/STM32F7xx/system_stm32f7xx.c

+17-18
Original file line numberDiff line numberDiff line change
@@ -63,31 +63,32 @@
6363
*/
6464

6565
/************************* Miscellaneous Configuration ************************/
66+
/* Note: Following vector table addresses must be defined in line with linker
67+
configuration. */
6668

69+
/*!< Uncomment the following line and change the address
70+
if you need to relocate your vector Table at a custom base address (+ VECT_TAB_OFFSET) */
71+
/* #define VECT_TAB_BASE_ADDRESS 0x08000000 */
72+
73+
/*!< Uncomment the following line if you need to relocate your vector Table
74+
in Sram else user remap will be done by default in Flash. */
75+
/* #define VECT_TAB_SRAM */
6776

6877
#ifndef VECT_TAB_OFFSET
6978
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
7079
This value must be a multiple of 0x200. */
71-
#else
72-
#define USER_VECT_TAB_ADDRESS
7380
#endif
7481

75-
/* Note: Following vector table addresses must be defined in line with linker
76-
configuration. */
77-
/*!< Define USER_VECT_TAB_ADDRESS line if you need to relocate the vector table
78-
anywhere in Flash or Sram, else the vector table is kept at the automatic
79-
remap of boot address selected */
80-
#if defined(USER_VECT_TAB_ADDRESS)
81-
/*!< Define VECT_TAB_SRAM if you need to relocate your vector Table
82-
in Sram else user remap will be done in Flash. */
82+
#ifndef VECT_TAB_BASE_ADDRESS
8383
#if defined(VECT_TAB_SRAM)
8484
#define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field.
8585
This value must be a multiple of 0x200. */
8686
#else
8787
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
8888
This value must be a multiple of 0x200. */
8989
#endif /* VECT_TAB_SRAM */
90-
#endif /* USER_VECT_TAB_ADDRESS */
90+
#endif /* VECT_TAB_BASE_ADDRESS */
91+
9192
/******************************************************************************/
9293

9394
/**
@@ -152,25 +153,23 @@ void SystemInit(void)
152153
RCC->CR |= (uint32_t)0x00000001;
153154

154155
/* Reset CFGR register */
155-
RCC->CFGR = 0x00000000;
156+
RCC->CFGR = (uint32_t)0x00000000;
156157

157158
/* Reset HSEON, CSSON and PLLON bits */
158159
RCC->CR &= (uint32_t)0xFEF6FFFF;
159160

160161
/* Reset PLLCFGR register */
161-
RCC->PLLCFGR = 0x24003010;
162+
RCC->PLLCFGR = (uint32_t)0x24003010;
162163

163164
/* Reset HSEBYP bit */
164165
RCC->CR &= (uint32_t)0xFFFBFFFF;
165166

166-
/* Disable all interrupts */
167-
RCC->CIR = 0x00000000;
167+
/* Disable all interrupts and clear pending bits */
168+
RCC->CIR = (uint32_t)0x00FF0000;
168169

169170

170171
/* Configure the Vector Table location -------------------------------------*/
171-
#if defined(USER_VECT_TAB_ADDRESS)
172-
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
173-
#endif /* USER_VECT_TAB_ADDRESS */
172+
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
174173
}
175174

176175
/**

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