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variants/STM32F4xx/F410T(8-B)Y/generic_clock.c

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41,22 +41,20 @@ WEAK void SystemClock_Config(void)
4141
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
4242
RCC_OscInitStruct.PLL.PLLQ = 4;
4343
RCC_OscInitStruct.PLL.PLLR = 2;
44-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
45-
{
44+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
4645
Error_Handler();
4746
}
4847

4948
/** Initializes the CPU, AHB and APB buses clocks
5049
*/
51-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
52-
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
50+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
51+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
5352
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
5453
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
5554
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
5655
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
5756

58-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
59-
{
57+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
6058
Error_Handler();
6159
}
6260
}

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