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boards.txt
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# See: https://arduino.github.io/arduino-cli/latest/platform-specification/
menu.pnum=Board part number
menu.xserial=U(S)ART support
menu.usb=USB support (if available)
menu.xusb=USB speed (if available)
menu.virtio=Virtual serial support
menu.opt=Optimize
menu.dbg=Debug symbols and core logs
menu.rtlib=C Runtime Library
menu.upload_method=Upload method
################################################################################
# Nucleo 144 boards
Nucleo_144.name=Nucleo-144
Nucleo_144.build.core=arduino
Nucleo_144.build.board=Nucleo_144
Nucleo_144.build.variant_h=variant_{build.board}.h
Nucleo_144.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
Nucleo_144.upload.maximum_size=0
Nucleo_144.upload.maximum_data_size=0
# NUCLEO_F207ZG board
Nucleo_144.menu.pnum.NUCLEO_F207ZG=Nucleo F207ZG
Nucleo_144.menu.pnum.NUCLEO_F207ZG.node=NODE_F207ZG
Nucleo_144.menu.pnum.NUCLEO_F207ZG.upload.maximum_size=1048576
Nucleo_144.menu.pnum.NUCLEO_F207ZG.upload.maximum_data_size=131072
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.mcu=cortex-m3
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.board=NUCLEO_F207ZG
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.series=STM32F2xx
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.product_line=STM32F207xx
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.variant=STM32F2xx/F207Z(C-E-F-G)T_F217Z(E-G)T
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Nucleo_144.menu.pnum.NUCLEO_F207ZG.build.cmsis_lib_gcc=arm_cortexM3l_math
# NUCLEO_F429ZI board
# Support: USB HID, Serial1 (USART1 on PG9, PG14) and Serial2 (USART2 on PD6, PD5)
Nucleo_144.menu.pnum.NUCLEO_F429ZI=Nucleo F429ZI
Nucleo_144.menu.pnum.NUCLEO_F429ZI.node=NODE_F429ZI
Nucleo_144.menu.pnum.NUCLEO_F429ZI.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_F429ZI.upload.maximum_data_size=196608
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.mcu=cortex-m4
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.board=NUCLEO_F429ZI
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.series=STM32F4xx
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.product_line=STM32F429xx
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.variant=STM32F4xx/F427Z(G-I)T_F429ZET_F429Z(G-I)(T-Y)_F437Z(G-I)T_F439Z(G-I)(T-Y)
Nucleo_144.menu.pnum.NUCLEO_F429ZI.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_F746ZG board
Nucleo_144.menu.pnum.NUCLEO_F746ZG=Nucleo F746ZG
Nucleo_144.menu.pnum.NUCLEO_F746ZG.node=NODE_F746ZG
Nucleo_144.menu.pnum.NUCLEO_F746ZG.upload.maximum_size=1048576
Nucleo_144.menu.pnum.NUCLEO_F746ZG.upload.maximum_data_size=327680
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.mcu=cortex-m7
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.board=NUCLEO_F746ZG
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.series=STM32F7xx
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.product_line=STM32F746xx
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.variant=STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.variant_h=variant_NUCLEO_F7x6ZG.h
Nucleo_144.menu.pnum.NUCLEO_F746ZG.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
# NUCLEO_F756ZG board
Nucleo_144.menu.pnum.NUCLEO_F756ZG=Nucleo F756ZG
Nucleo_144.menu.pnum.NUCLEO_F756ZG.node=NODE_F756ZG
Nucleo_144.menu.pnum.NUCLEO_F756ZG.upload.maximum_size=1048576
Nucleo_144.menu.pnum.NUCLEO_F756ZG.upload.maximum_data_size=327680
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.mcu=cortex-m7
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.board=NUCLEO_F756ZG
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.series=STM32F7xx
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.product_line=STM32F756xx
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.variant=STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y)
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.variant_h=variant_NUCLEO_F7x6ZG.h
Nucleo_144.menu.pnum.NUCLEO_F756ZG.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
# NUCLEO_F767ZI board
Nucleo_144.menu.pnum.NUCLEO_F767ZI=Nucleo F767ZI
Nucleo_144.menu.pnum.NUCLEO_F767ZI.node=NODE_F767ZI
Nucleo_144.menu.pnum.NUCLEO_F767ZI.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_F767ZI.upload.maximum_data_size=524288
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.mcu=cortex-m7
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.board=NUCLEO_F767ZI
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.series=STM32F7xx
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.product_line=STM32F767xx
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.variant=STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT
Nucleo_144.menu.pnum.NUCLEO_F767ZI.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
# NUCLEO_H743ZI board
Nucleo_144.menu.pnum.NUCLEO_H743ZI=Nucleo H743ZI
Nucleo_144.menu.pnum.NUCLEO_H743ZI.node=NODE_H743ZI
Nucleo_144.menu.pnum.NUCLEO_H743ZI.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_H743ZI.upload.maximum_data_size=524288
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.mcu=cortex-m7
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.board=NUCLEO_H743ZI
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.series=STM32H7xx
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.product_line=STM32H743xx
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.variant=STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT
Nucleo_144.menu.pnum.NUCLEO_H743ZI.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
Nucleo_144.menu.pnum.NUCLEO_H743ZI2=Nucleo H743ZI2
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.node="NODE_H743ZI,NOD_H743ZI2"
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.upload.maximum_data_size=524288
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.mcu=cortex-m7
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.board=NUCLEO_H743ZI2
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.series=STM32H7xx
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.product_line=STM32H743xx
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.variant=STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.variant_h=variant_NUCLEO_H743ZI.h
Nucleo_144.menu.pnum.NUCLEO_H743ZI2.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
# NUCLEO_L496ZG board
Nucleo_144.menu.pnum.NUCLEO_L496ZG=Nucleo L496ZG
Nucleo_144.menu.pnum.NUCLEO_L496ZG.node=NODE_L496ZG
Nucleo_144.menu.pnum.NUCLEO_L496ZG.upload.maximum_size=1048576
Nucleo_144.menu.pnum.NUCLEO_L496ZG.upload.maximum_data_size=327680
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.mcu=cortex-m4
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.board=NUCLEO_L496ZG
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.series=STM32L4xx
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.product_line=STM32L496xx
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.variant=STM32L4xx/L496Z(E-G)T_L4A6ZGT
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L496ZG-P board
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P=Nucleo L496ZG-P
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.node=NODE_L496ZG
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.upload.maximum_size=1048576
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.upload.maximum_data_size=327680
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.mcu=cortex-m4
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_L496ZG.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.board=NUCLEO_L496ZG_P
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.series=STM32L4xx
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.product_line=STM32L496xx
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.variant=STM32L4xx/L496ZGTxP_L4A6ZGTxP
Nucleo_144.menu.pnum.NUCLEO_L496ZG-P.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L4R5ZI board
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI=Nucleo L4R5ZI
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.node=NODE_L4R5ZI
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.upload.maximum_data_size=655360
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.mcu=cortex-m4
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.board=NUCLEO_L4R5ZI
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.series=STM32L4xx
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.product_line=STM32L4R5xx
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.variant=STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L4R5ZI-P board
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P=Nucleo L4R5ZI-P
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.node=NODE_L4R5ZI
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.upload.maximum_data_size=655360
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.mcu=cortex-m4
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.board=NUCLEO_L4R5ZI_P
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.series=STM32L4xx
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.product_line=STM32L4R5xx
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.variant=STM32L4xx/L4R5ZITxP
Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L552ZE-Q board
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q=Nucleo L552ZE-Q
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.node=NODE_L552ZE
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.upload.maximum_size=524288
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.upload.maximum_data_size=196608
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.mcu=cortex-m33
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.board=NUCLEO_L552ZE_Q
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.series=STM32L5xx
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.product_line=STM32L552xx
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ
Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math
# NUCLEO_U575ZI_Q board
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q=Nucleo U575ZI-Q
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.node=NOD_U575ZI
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.upload.maximum_size=2097152
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.upload.maximum_data_size=262144
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.mcu=cortex-m33
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.float-abi=-mfloat-abi=hard
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.board=NUCLEO_U575ZI_Q
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.series=STM32U5xx
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.product_line=STM32U575xx
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZITxQ
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math
Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
# Upload menu
Nucleo_144.menu.upload_method.MassStorage=Mass Storage
Nucleo_144.menu.upload_method.MassStorage.upload.protocol=
Nucleo_144.menu.upload_method.MassStorage.upload.tool=massStorageCopy
Nucleo_144.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
Nucleo_144.menu.upload_method.swdMethod.upload.protocol=0
Nucleo_144.menu.upload_method.swdMethod.upload.options=-g
Nucleo_144.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
Nucleo_144.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial)
Nucleo_144.menu.upload_method.serialMethod.upload.protocol=1
Nucleo_144.menu.upload_method.serialMethod.upload.options={serial.port.file} -s
Nucleo_144.menu.upload_method.serialMethod.upload.tool=stm32CubeProg
Nucleo_144.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU)
Nucleo_144.menu.upload_method.dfuMethod.upload.protocol=2
Nucleo_144.menu.upload_method.dfuMethod.upload.options=-g
Nucleo_144.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg
################################################################################
# Nucleo 64 boards
Nucleo_64.name=Nucleo-64
Nucleo_64.build.core=arduino
Nucleo_64.build.board=Nucleo_64
Nucleo_64.build.variant_h=variant_{build.board}.h
Nucleo_64.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
Nucleo_64.upload.maximum_size=0
Nucleo_64.upload.maximum_data_size=0
# NUCLEO_F030R8 board
Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8
Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_F030R8.upload.maximum_size=65536
Nucleo_64.menu.pnum.NUCLEO_F030R8.upload.maximum_data_size=8192
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.mcu=cortex-m0
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.board=NUCLEO_F030R8
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.series=STM32F0xx
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.product_line=STM32F030x8
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.variant=STM32F0xx/F030R8T
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_F070RB board
Nucleo_64.menu.pnum.NUCLEO_F070RB=Nucleo F070RB
Nucleo_64.menu.pnum.NUCLEO_F070RB.node="NODE_F070RB,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_data_size=16384
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.mcu=cortex-m0
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.board=NUCLEO_F070RB
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.series=STM32F0xx
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.product_line=STM32F070xB
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.variant=STM32F0xx/F070RBT
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_F072RB board
Nucleo_64.menu.pnum.NUCLEO_F072RB=Nucleo F072RB
Nucleo_64.menu.pnum.NUCLEO_F072RB.node="NODE_F072RB,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_F072RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_F072RB.upload.maximum_data_size=16384
Nucleo_64.menu.pnum.NUCLEO_F072RB.build.mcu=cortex-m0
Nucleo_64.menu.pnum.NUCLEO_F072RB.build.board=NUCLEO_F072RB
Nucleo_64.menu.pnum.NUCLEO_F072RB.build.series=STM32F0xx
Nucleo_64.menu.pnum.NUCLEO_F072RB.build.product_line=STM32F072xB
Nucleo_64.menu.pnum.NUCLEO_F072RB.build.variant=STM32F0xx/F072R8T_F072RB(H-I-T)
Nucleo_64.menu.pnum.NUCLEO_F072RB.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_F091RC board
Nucleo_64.menu.pnum.NUCLEO_F091RC=Nucleo F091RC
Nucleo_64.menu.pnum.NUCLEO_F091RC.node=NODE_F091RC
Nucleo_64.menu.pnum.NUCLEO_F091RC.upload.maximum_size=262144
Nucleo_64.menu.pnum.NUCLEO_F091RC.upload.maximum_data_size=32768
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.mcu=cortex-m0
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.board=NUCLEO_F091RC
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.series=STM32F0xx
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.product_line=STM32F091xC
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.variant=STM32F0xx/F091RBT_F091RC(H-T-Y)
Nucleo_64.menu.pnum.NUCLEO_F091RC.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_F103RB board
Nucleo_64.menu.pnum.NUCLEO_F103RB=Nucleo F103RB
Nucleo_64.menu.pnum.NUCLEO_F103RB.node="NODE_F103RB,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_F103RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_F103RB.upload.maximum_data_size=20480
Nucleo_64.menu.pnum.NUCLEO_F103RB.build.mcu=cortex-m3
Nucleo_64.menu.pnum.NUCLEO_F103RB.build.board=NUCLEO_F103RB
Nucleo_64.menu.pnum.NUCLEO_F103RB.build.series=STM32F1xx
Nucleo_64.menu.pnum.NUCLEO_F103RB.build.product_line=STM32F103xB
Nucleo_64.menu.pnum.NUCLEO_F103RB.build.variant=STM32F1xx/F103R(8-B)T
Nucleo_64.menu.pnum.NUCLEO_F103RB.build.cmsis_lib_gcc=arm_cortexM3l_math
# NUCLEO_F302R8 board
Nucleo_64.menu.pnum.NUCLEO_F302R8=Nucleo F302R8
Nucleo_64.menu.pnum.NUCLEO_F302R8.node=NODE_F302R8
Nucleo_64.menu.pnum.NUCLEO_F302R8.upload.maximum_size=65536
Nucleo_64.menu.pnum.NUCLEO_F302R8.upload.maximum_data_size=16384
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.board=NUCLEO_F302R8
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.series=STM32F3xx
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.product_line=STM32F302x8
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.variant=STM32F3xx/F302R(6-8)T
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_F303RE board
Nucleo_64.menu.pnum.NUCLEO_F303RE=Nucleo F303RE
Nucleo_64.menu.pnum.NUCLEO_F303RE.node=NODE_F303RE
Nucleo_64.menu.pnum.NUCLEO_F303RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_F303RE.upload.maximum_data_size=65536
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.board=NUCLEO_F303RE
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.series=STM32F3xx
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.product_line=STM32F303xE
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.variant=STM32F3xx/F303R(D-E)T
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_F401RE board
Nucleo_64.menu.pnum.NUCLEO_F401RE=Nucleo F401RE
Nucleo_64.menu.pnum.NUCLEO_F401RE.node=NODE_F401RE
Nucleo_64.menu.pnum.NUCLEO_F401RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_F401RE.upload.maximum_data_size=98304
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.board=NUCLEO_F401RE
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.series=STM32F4xx
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.product_line=STM32F401xE
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.variant=STM32F4xx/F401R(B-C-D-E)T
Nucleo_64.menu.pnum.NUCLEO_F401RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_F411RE board
Nucleo_64.menu.pnum.NUCLEO_F411RE=Nucleo F411RE
Nucleo_64.menu.pnum.NUCLEO_F411RE.node="NODE_F411RE,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_F411RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_F411RE.upload.maximum_data_size=131072
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.board=NUCLEO_F411RE
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.series=STM32F4xx
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.product_line=STM32F411xE
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.variant=STM32F4xx/F411R(C-E)T
Nucleo_64.menu.pnum.NUCLEO_F411RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_F446RE board
Nucleo_64.menu.pnum.NUCLEO_F446RE=Nucleo F446RE
Nucleo_64.menu.pnum.NUCLEO_F446RE.node=NODE_F446RE
Nucleo_64.menu.pnum.NUCLEO_F446RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_F446RE.upload.maximum_data_size=131072
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.board=NUCLEO_F446RE
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.series=STM32F4xx
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.product_line=STM32F446xx
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.variant=STM32F4xx/F446R(C-E)T
Nucleo_64.menu.pnum.NUCLEO_F446RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_G070RB board
Nucleo_64.menu.pnum.NUCLEO_G070RB=Nucleo G070RB
Nucleo_64.menu.pnum.NUCLEO_G070RB.node=NODE_G070RB
Nucleo_64.menu.pnum.NUCLEO_G070RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_G070RB.upload.maximum_data_size=36864
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.board=NUCLEO_G070RB
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.series=STM32G0xx
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.product_line=STM32G070xx
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.variant=STM32G0xx/G070RBT
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_64.menu.pnum.NUCLEO_G070RB.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_G071RB board
Nucleo_64.menu.pnum.NUCLEO_G071RB=Nucleo G071RB
Nucleo_64.menu.pnum.NUCLEO_G071RB.node=NODE_G071RB
Nucleo_64.menu.pnum.NUCLEO_G071RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_G071RB.upload.maximum_data_size=32768
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.board=NUCLEO_G071RB
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.series=STM32G0xx
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.product_line=STM32G071xx
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.variant=STM32G0xx/G071R(6-8)T_G071RB(I-T)_G081RB(I-T)
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_64.menu.pnum.NUCLEO_G071RB.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_G0B1RE board
Nucleo_64.menu.pnum.NUCLEO_G0B1RE=Nucleo G0B1RE
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.node=NOD_G0B1RE
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.upload.maximum_size=262144
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.upload.maximum_data_size=147456
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.board=NUCLEO_G0B1RE
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.series=STM32G0xx
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.product_line=STM32G0B1xx
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.variant=STM32G0xx/G0B1R(B-C-E)T_G0C1R(C-E)T
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_64.menu.pnum.NUCLEO_G0B1RE.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_G431RB board
Nucleo_64.menu.pnum.NUCLEO_G431RB=Nucleo G431RB
Nucleo_64.menu.pnum.NUCLEO_G431RB.node="NODE_G431RB,NOD_G431RB"
Nucleo_64.menu.pnum.NUCLEO_G431RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_G431RB.upload.maximum_data_size=32768
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.board=NUCLEO_G431RB
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.series=STM32G4xx
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.product_line=STM32G431xx
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.variant=STM32G4xx/G431R(6-8-B)(I-T)_G441RB(I-T)
Nucleo_64.menu.pnum.NUCLEO_G431RB.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_G474RE board
Nucleo_64.menu.pnum.NUCLEO_G474RE=Nucleo G474RE
Nucleo_64.menu.pnum.NUCLEO_G474RE.node=NODE_G474RE
Nucleo_64.menu.pnum.NUCLEO_G474RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_G474RE.upload.maximum_data_size=131072
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.board=NUCLEO_G474RE
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.series=STM32G4xx
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.product_line=STM32G474xx
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.variant=STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET
Nucleo_64.menu.pnum.NUCLEO_G474RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L010RB board
Nucleo_64.menu.pnum.NUCLEO_L010RB=Nucleo L010RB
Nucleo_64.menu.pnum.NUCLEO_L010RB.node=NODE_L010RB
Nucleo_64.menu.pnum.NUCLEO_L010RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_L010RB.upload.maximum_data_size=20480
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.board=NUCLEO_L010RB
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.series=STM32L0xx
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.product_line=STM32L010xB
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.variant=STM32L0xx/L010RBT
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_64.menu.pnum.NUCLEO_L010RB.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_L053R8 board
Nucleo_64.menu.pnum.NUCLEO_L053R8=Nucleo L053R8
Nucleo_64.menu.pnum.NUCLEO_L053R8.node=NODE_L053R8
Nucleo_64.menu.pnum.NUCLEO_L053R8.upload.maximum_size=65536
Nucleo_64.menu.pnum.NUCLEO_L053R8.upload.maximum_data_size=8192
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.board=NUCLEO_L053R8
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.series=STM32L0xx
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.product_line=STM32L053xx
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.variant=STM32L0xx/L052R(6-8)T_L053R(6-8)T_L063R8T
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_64.menu.pnum.NUCLEO_L053R8.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_L073RZ board
Nucleo_64.menu.pnum.NUCLEO_L073RZ=Nucleo L073RZ
Nucleo_64.menu.pnum.NUCLEO_L073RZ.node=NODE_L073RZ
Nucleo_64.menu.pnum.NUCLEO_L073RZ.upload.maximum_size=196608
Nucleo_64.menu.pnum.NUCLEO_L073RZ.upload.maximum_data_size=20480
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.mcu=cortex-m0plus
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.board=NUCLEO_L073RZ
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.series=STM32L0xx
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.product_line=STM32L073xx
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.variant=STM32L0xx/L072R(B-Z)T_L073R(B-Z)T_L083R(B-Z)T
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_64.menu.pnum.NUCLEO_L073RZ.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_L152RE board
Nucleo_64.menu.pnum.NUCLEO_L152RE=Nucleo L152RE
Nucleo_64.menu.pnum.NUCLEO_L152RE.node="NODE_L152RE,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_L152RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_L152RE.upload.maximum_data_size=81920
Nucleo_64.menu.pnum.NUCLEO_L152RE.build.mcu=cortex-m3
Nucleo_64.menu.pnum.NUCLEO_L152RE.build.board=NUCLEO_L152RE
Nucleo_64.menu.pnum.NUCLEO_L152RE.build.series=STM32L1xx
Nucleo_64.menu.pnum.NUCLEO_L152RE.build.product_line=STM32L152xE
Nucleo_64.menu.pnum.NUCLEO_L152RE.build.variant=STM32L1xx/L151RET_L152RET_L162RET
Nucleo_64.menu.pnum.NUCLEO_L152RE.build.cmsis_lib_gcc=arm_cortexM3l_math
# NUCLEO_L433RC_P board
Nucleo_64.menu.pnum.NUCLEO_L433RC_P=Nucleo L433RC-P
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.node=NODE_L433RC
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.upload.maximum_size=262144
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.upload.maximum_data_size=65536
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.board=NUCLEO_L433RC_P
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.series=STM32L4xx
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.product_line=STM32L433xx
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.variant=STM32L4xx/L433RCTxP
Nucleo_64.menu.pnum.NUCLEO_L433RC_P.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L452RE board
Nucleo_64.menu.pnum.NUCLEO_L452RE=Nucleo L452RE
Nucleo_64.menu.pnum.NUCLEO_L452RE.node=NODE_L452RE
Nucleo_64.menu.pnum.NUCLEO_L452RE.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_L452RE.upload.maximum_data_size=163840
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.board=NUCLEO_L452RE
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.series=STM32L4xx
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.product_line=STM32L452xx
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.variant=STM32L4xx/L452RC(I-T-Y)_L452RE(I-T-Y)x(P)_L462RE(I-T-Y)
Nucleo_64.menu.pnum.NUCLEO_L452RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L452RE-P board
Nucleo_64.menu.pnum.NUCLEO_L452REP=Nucleo L452RE-P
Nucleo_64.menu.pnum.NUCLEO_L452REP.node=NODE_L452RE
Nucleo_64.menu.pnum.NUCLEO_L452REP.upload.maximum_size=524288
Nucleo_64.menu.pnum.NUCLEO_L452REP.upload.maximum_data_size=163840
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.board=NUCLEO_L452RE_P
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.series=STM32L4xx
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.product_line=STM32L452xx
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.variant=STM32L4xx/L452RETxP
Nucleo_64.menu.pnum.NUCLEO_L452REP.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L476RG board
Nucleo_64.menu.pnum.NUCLEO_L476RG=Nucleo L476RG
Nucleo_64.menu.pnum.NUCLEO_L476RG.node=NODE_L476RG
Nucleo_64.menu.pnum.NUCLEO_L476RG.upload.maximum_size=1048576
Nucleo_64.menu.pnum.NUCLEO_L476RG.upload.maximum_data_size=98304
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.board=NUCLEO_L476RG
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.series=STM32L4xx
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.product_line=STM32L476xx
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.variant=STM32L4xx/L475R(C-E-G)T_L476R(C-E-G)T_L486RGT
Nucleo_64.menu.pnum.NUCLEO_L476RG.build.cmsis_lib_gcc=arm_cortexM4lf_math
# P_NUCLEO_WB55RG board
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG=P-Nucleo WB55RG
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.node="NODE_WB55RG,NOD_WB55RG"
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.upload.maximum_size=524288
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.upload.maximum_data_size=196608
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.mcu=cortex-m4
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.float-abi=-mfloat-abi=hard
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.board=P_NUCLEO_WB55RG
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.series=STM32WBxx
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.product_line=STM32WB55xx
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.variant=STM32WBxx/WB55R(C-E-G)V
Nucleo_64.menu.pnum.P_NUCLEO_WB55RG.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_WL55JC1 board
Nucleo_64.menu.pnum.NUCLEO_WL55JC1=Nucleo WL55JC1
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.node="NOD_WL55JC"
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.upload.maximum_size=262144
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.upload.maximum_data_size=65536
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.mcu=cortex-m4
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.board=NUCLEO_WL55JC1
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.series=STM32WLxx
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.product_line=STM32WLE5xx
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.cmsis_lib_gcc=arm_cortexM4l_math
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.build.st_extra_flags=-D{build.product_line} -DUSE_CM4_STARTUP_FILE {build.xSerial}
# Upload menu
Nucleo_64.menu.upload_method.MassStorage=Mass Storage
Nucleo_64.menu.upload_method.MassStorage.upload.protocol=
Nucleo_64.menu.upload_method.MassStorage.upload.tool=massStorageCopy
Nucleo_64.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
Nucleo_64.menu.upload_method.swdMethod.upload.protocol=0
Nucleo_64.menu.upload_method.swdMethod.upload.options=-g
Nucleo_64.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
Nucleo_64.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial)
Nucleo_64.menu.upload_method.serialMethod.upload.protocol=1
Nucleo_64.menu.upload_method.serialMethod.upload.options={serial.port.file} -s
Nucleo_64.menu.upload_method.serialMethod.upload.tool=stm32CubeProg
Nucleo_64.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU)
Nucleo_64.menu.upload_method.dfuMethod.upload.protocol=2
Nucleo_64.menu.upload_method.dfuMethod.upload.options=-g
Nucleo_64.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg
################################################################################
# Nucleo 32 boards
Nucleo_32.name=Nucleo-32
Nucleo_32.build.core=arduino
Nucleo_32.build.board=Nucleo_32
Nucleo_32.build.variant_h=variant_{build.board}.h
Nucleo_32.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
Nucleo_32.upload.maximum_size=0
Nucleo_32.upload.maximum_data_size=0
# NUCLEO_F031K6 board
Nucleo_32.menu.pnum.NUCLEO_F031K6=Nucleo F031K6
Nucleo_32.menu.pnum.NUCLEO_F031K6.node=NODE_F031K6
Nucleo_32.menu.pnum.NUCLEO_F031K6.upload.maximum_size=32768
Nucleo_32.menu.pnum.NUCLEO_F031K6.upload.maximum_data_size=4096
Nucleo_32.menu.pnum.NUCLEO_F031K6.build.mcu=cortex-m0
Nucleo_32.menu.pnum.NUCLEO_F031K6.build.board=NUCLEO_F031K6
Nucleo_32.menu.pnum.NUCLEO_F031K6.build.series=STM32F0xx
Nucleo_32.menu.pnum.NUCLEO_F031K6.build.product_line=STM32F031x6
Nucleo_32.menu.pnum.NUCLEO_F031K6.build.variant=STM32F0xx/F031K6T
Nucleo_32.menu.pnum.NUCLEO_F031K6.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_F042K6 board
Nucleo_32.menu.pnum.NUCLEO_F042K6=Nucleo F042K6
Nucleo_32.menu.pnum.NUCLEO_F042K6.node=NODE_F042K6
Nucleo_32.menu.pnum.NUCLEO_F042K6.upload.maximum_size=32768
Nucleo_32.menu.pnum.NUCLEO_F042K6.upload.maximum_data_size=6144
Nucleo_32.menu.pnum.NUCLEO_F042K6.build.mcu=cortex-m0
Nucleo_32.menu.pnum.NUCLEO_F042K6.build.board=NUCLEO_F042K6
Nucleo_32.menu.pnum.NUCLEO_F042K6.build.series=STM32F0xx
Nucleo_32.menu.pnum.NUCLEO_F042K6.build.product_line=STM32F042x6
Nucleo_32.menu.pnum.NUCLEO_F042K6.build.variant=STM32F0xx/F042K(4-6)T
Nucleo_32.menu.pnum.NUCLEO_F042K6.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_F303K8 board
Nucleo_32.menu.pnum.NUCLEO_F303K8=Nucleo F303K8
Nucleo_32.menu.pnum.NUCLEO_F303K8.node=NODE_F303K8
Nucleo_32.menu.pnum.NUCLEO_F303K8.upload.maximum_size=65536
Nucleo_32.menu.pnum.NUCLEO_F303K8.upload.maximum_data_size=12288
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.mcu=cortex-m4
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.float-abi=-mfloat-abi=hard
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.board=NUCLEO_F303K8
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.series=STM32F3xx
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.product_line=STM32F303x8
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_G031K8 board
Nucleo_32.menu.pnum.NUCLEO_G031K8=Nucleo G031K8
Nucleo_32.menu.pnum.NUCLEO_G031K8.node=NOD_G031K8
Nucleo_32.menu.pnum.NUCLEO_G031K8.upload.maximum_size=65536
Nucleo_32.menu.pnum.NUCLEO_G031K8.upload.maximum_data_size=8192
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.mcu=cortex-m0plus
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.board=NUCLEO_G031K8
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.series=STM32G0xx
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.product_line=STM32G031xx
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.cmsis_lib_gcc=arm_cortexM0l_math
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# NUCLEO_G431KB board
Nucleo_32.menu.pnum.NUCLEO_G431KB=Nucleo G431KB
Nucleo_32.menu.pnum.NUCLEO_G431KB.node="NODE_G431KB,NOD_G431KB"
Nucleo_32.menu.pnum.NUCLEO_G431KB.upload.maximum_size=131072
Nucleo_32.menu.pnum.NUCLEO_G431KB.upload.maximum_data_size=32768
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.mcu=cortex-m4
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.float-abi=-mfloat-abi=hard
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.board=NUCLEO_G431KB
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.series=STM32G4xx
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.product_line=STM32G431xx
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.variant=STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)
Nucleo_32.menu.pnum.NUCLEO_G431KB.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L031K6 board
Nucleo_32.menu.pnum.NUCLEO_L031K6=Nucleo L031K6
Nucleo_32.menu.pnum.NUCLEO_L031K6.node=NODE_L031K6
Nucleo_32.menu.pnum.NUCLEO_L031K6.upload.maximum_size=32768
Nucleo_32.menu.pnum.NUCLEO_L031K6.upload.maximum_data_size=8192
Nucleo_32.menu.pnum.NUCLEO_L031K6.build.mcu=cortex-m0plus
Nucleo_32.menu.pnum.NUCLEO_L031K6.build.board=NUCLEO_L031K6
Nucleo_32.menu.pnum.NUCLEO_L031K6.build.series=STM32L0xx
Nucleo_32.menu.pnum.NUCLEO_L031K6.build.product_line=STM32L031xx
Nucleo_32.menu.pnum.NUCLEO_L031K6.build.variant=STM32L0xx/L031K(4-6)T_L041K6T
Nucleo_32.menu.pnum.NUCLEO_L031K6.build.cmsis_lib_gcc=arm_cortexM0l_math
# NUCLEO_L412KB board
Nucleo_32.menu.pnum.NUCLEO_L412KB=Nucleo L412KB
Nucleo_32.menu.pnum.NUCLEO_L412KB.node=NODE_L412KB
Nucleo_32.menu.pnum.NUCLEO_L412KB.upload.maximum_size=131072
Nucleo_32.menu.pnum.NUCLEO_L412KB.upload.maximum_data_size=40960
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.mcu=cortex-m4
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.float-abi=-mfloat-abi=hard
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.board=NUCLEO_L412KB
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.series=STM32L4xx
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.product_line=STM32L412xx
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.variant=STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)
Nucleo_32.menu.pnum.NUCLEO_L412KB.build.cmsis_lib_gcc=arm_cortexM4lf_math
# NUCLEO_L432KC board
Nucleo_32.menu.pnum.NUCLEO_L432KC=Nucleo L432KC
Nucleo_32.menu.pnum.NUCLEO_L432KC.node=NODE_L432KC
Nucleo_32.menu.pnum.NUCLEO_L432KC.upload.maximum_size=262144
Nucleo_32.menu.pnum.NUCLEO_L432KC.upload.maximum_data_size=65536
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.mcu=cortex-m4
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.fpu=-mfpu=fpv4-sp-d16
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.float-abi=-mfloat-abi=hard
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.board=NUCLEO_L432KC
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.series=STM32L4xx
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.product_line=STM32L432xx
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.variant=STM32L4xx/L432K(B-C)U_L442KCU
Nucleo_32.menu.pnum.NUCLEO_L432KC.build.cmsis_lib_gcc=arm_cortexM4lf_math
# Upload menu
Nucleo_32.menu.upload_method.MassStorage=Mass Storage
Nucleo_32.menu.upload_method.MassStorage.upload.protocol=
Nucleo_32.menu.upload_method.MassStorage.upload.tool=massStorageCopy
Nucleo_32.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
Nucleo_32.menu.upload_method.swdMethod.upload.protocol=0
Nucleo_32.menu.upload_method.swdMethod.upload.options=-g
Nucleo_32.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
Nucleo_32.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial)
Nucleo_32.menu.upload_method.serialMethod.upload.protocol=1
Nucleo_32.menu.upload_method.serialMethod.upload.options={serial.port.file} -s
Nucleo_32.menu.upload_method.serialMethod.upload.tool=stm32CubeProg
Nucleo_32.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU)
Nucleo_32.menu.upload_method.dfuMethod.upload.protocol=2
Nucleo_32.menu.upload_method.dfuMethod.upload.options=-g
Nucleo_32.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg
################################################################################
# Discovery boards
Disco.name=Discovery
Disco.build.core=arduino
Disco.build.board=Disco
Disco.build.variant_h=variant_{build.board}.h
Disco.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
Disco.upload.maximum_size=0
Disco.upload.maximum_data_size=0
# B_G431B_ESC1 board
Disco.menu.pnum.B_G431B_ESC1=B-G431B-ESC1
Disco.menu.pnum.B_G431B_ESC1.node="NODE_G431CB,NOD_G431CB,DIS_G431CB"
Disco.menu.pnum.B_G431B_ESC1.upload.maximum_size=131072
Disco.menu.pnum.B_G431B_ESC1.upload.maximum_data_size=32768
Disco.menu.pnum.B_G431B_ESC1.build.mcu=cortex-m4
Disco.menu.pnum.B_G431B_ESC1.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.B_G431B_ESC1.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.B_G431B_ESC1.build.board=B_G431B_ESC1
Disco.menu.pnum.B_G431B_ESC1.build.series=STM32G4xx
Disco.menu.pnum.B_G431B_ESC1.build.product_line=STM32G431xx
Disco.menu.pnum.B_G431B_ESC1.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
Disco.menu.pnum.B_G431B_ESC1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.B_G431B_ESC1.build.cmsis_lib_gcc=arm_cortexM4lf_math
# B-L072Z-LRWAN1 board
Disco.menu.pnum.B_L072Z_LRWAN1=B-L072Z-LRWAN1
Disco.menu.pnum.B_L072Z_LRWAN1.node="DIS_L072Z,NODE_L072CZ"
Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_size=196608
Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_data_size=20480
Disco.menu.pnum.B_L072Z_LRWAN1.build.mcu=cortex-m0plus
Disco.menu.pnum.B_L072Z_LRWAN1.build.board=B_L072Z_LRWAN1
Disco.menu.pnum.B_L072Z_LRWAN1.build.series=STM32L0xx
Disco.menu.pnum.B_L072Z_LRWAN1.build.product_line=STM32L072xx
Disco.menu.pnum.B_L072Z_LRWAN1.build.variant=STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY
Disco.menu.pnum.B_L072Z_LRWAN1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.B_L072Z_LRWAN1.build.cmsis_lib_gcc=arm_cortexM0l_math
Disco.menu.pnum.B_L072Z_LRWAN1.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
# B-L475E-IOT01A board
Disco.menu.pnum.B_L475E_IOT01A=B-L475E-IOT01A
Disco.menu.pnum.B_L475E_IOT01A.node=DIS_L4IOT
Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_size=1048576
Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_data_size=98304
Disco.menu.pnum.B_L475E_IOT01A.build.mcu=cortex-m4
Disco.menu.pnum.B_L475E_IOT01A.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.B_L475E_IOT01A.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.B_L475E_IOT01A.build.board=B_L475E_IOT01A
Disco.menu.pnum.B_L475E_IOT01A.build.series=STM32L4xx
Disco.menu.pnum.B_L475E_IOT01A.build.product_line=STM32L475xx
Disco.menu.pnum.B_L475E_IOT01A.build.variant=STM32L4xx/L475V(C-E-G)T_L476V(C-E-G)T_L486VGT
Disco.menu.pnum.B_L475E_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.B_L475E_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
# B_L4S5I_IOT01A board
Disco.menu.pnum.B_L4S5I_IOT01A=B-L4S5I-IOT01A
Disco.menu.pnum.B_L4S5I_IOT01A.node="DIS_L4IOT,DIS_L4S5VI"
Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_size=2097152
Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_data_size=655360
Disco.menu.pnum.B_L4S5I_IOT01A.build.mcu=cortex-m4
Disco.menu.pnum.B_L4S5I_IOT01A.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.B_L4S5I_IOT01A.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.B_L4S5I_IOT01A.build.board=B_L4S5I_IOT01A
Disco.menu.pnum.B_L4S5I_IOT01A.build.series=STM32L4xx
Disco.menu.pnum.B_L4S5I_IOT01A.build.product_line=STM32L4S5xx
Disco.menu.pnum.B_L4S5I_IOT01A.build.variant=STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT
Disco.menu.pnum.B_L4S5I_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.B_L4S5I_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
# B_U585I_IOT02A board
Disco.menu.pnum.B_U585I_IOT02A=B-U585I-IOT02A
Disco.menu.pnum.B_U585I_IOT02A.node="NOD_U585AI"
Disco.menu.pnum.B_U585I_IOT02A.upload.maximum_size=2097152
Disco.menu.pnum.B_U585I_IOT02A.upload.maximum_data_size=262144
Disco.menu.pnum.B_U585I_IOT02A.build.mcu=cortex-m33
Disco.menu.pnum.B_U585I_IOT02A.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.B_U585I_IOT02A.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.B_U585I_IOT02A.build.board=B_U585I_IOT02A
Disco.menu.pnum.B_U585I_IOT02A.build.series=STM32U5xx
Disco.menu.pnum.B_U585I_IOT02A.build.product_line=STM32U585xx
Disco.menu.pnum.B_U585I_IOT02A.build.variant=STM32U5xx/U575A(G-I)IxQ_U585AIIxQ
Disco.menu.pnum.B_U585I_IOT02A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.B_U585I_IOT02A.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math
# DISCO_F030R8 board
Disco.menu.pnum.DISCO_F030R8=STM32F030R8-DISCVL
Disco.menu.pnum.DISCO_F030R8.node="No_mass_storage_for_this_board_Use_STLink_upload_method"
Disco.menu.pnum.DISCO_F030R8.upload.maximum_size=65536
Disco.menu.pnum.DISCO_F030R8.upload.maximum_data_size=8192
Disco.menu.pnum.DISCO_F030R8.build.mcu=cortex-m0
Disco.menu.pnum.DISCO_F030R8.build.board=DISCO_F030R8
Disco.menu.pnum.DISCO_F030R8.build.series=STM32F0xx
Disco.menu.pnum.DISCO_F030R8.build.product_line=STM32F030x8
Disco.menu.pnum.DISCO_F030R8.build.variant=STM32F0xx/F030R8T
Disco.menu.pnum.DISCO_F030R8.build.cmsis_lib_gcc=arm_cortexM0l_math
# DISCO_F072RB board
Disco.menu.pnum.DISCO_F072RB=STM32F072B-DISCOVERY
Disco.menu.pnum.DISCO_F072RB.node="No_mass_storage_for_this_board_Use_STLink_upload_method"
Disco.menu.pnum.DISCO_F072RB.upload.maximum_size=131072
Disco.menu.pnum.DISCO_F072RB.upload.maximum_data_size=16384
Disco.menu.pnum.DISCO_F072RB.build.mcu=cortex-m0
Disco.menu.pnum.DISCO_F072RB.build.board=DISCO_F072RB
Disco.menu.pnum.DISCO_F072RB.build.series=STM32F0xx
Disco.menu.pnum.DISCO_F072RB.build.product_line=STM32F072xB
Disco.menu.pnum.DISCO_F072RB.build.variant=STM32F0xx/F072R8T_F072RB(H-I-T)
Disco.menu.pnum.DISCO_F072RB.build.cmsis_lib_gcc=arm_cortexM0l_math
# DISCO_F100RB board
Disco.menu.pnum.DISCO_F100RB=STM32F100RB-DISCVL
Disco.menu.pnum.DISCO_F100RB.node=DIS_F100RB
Disco.menu.pnum.DISCO_F100RB.upload.maximum_size=131071
Disco.menu.pnum.DISCO_F100RB.upload.maximum_data_size=8192
Disco.menu.pnum.DISCO_F100RB.build.mcu=cortex-m3
Disco.menu.pnum.DISCO_F100RB.build.board=DISCO_F100RB
Disco.menu.pnum.DISCO_F100RB.build.series=STM32F1xx
Disco.menu.pnum.DISCO_F100RB.build.product_line=STM32F100xB
Disco.menu.pnum.DISCO_F100RB.build.variant=STM32F1xx/F100R(8-B)T
Disco.menu.pnum.DISCO_F100RB.build.cmsis_lib_gcc=arm_cortexM3l_math
# DISCO_F303VC board
Disco.menu.pnum.DISCO_F303VC=STM32F3-DISCOVERY
Disco.menu.pnum.DISCO_F303VC.node=DIS_F303VC
Disco.menu.pnum.DISCO_F303VC.upload.maximum_size=262144
Disco.menu.pnum.DISCO_F303VC.upload.maximum_data_size=40960
Disco.menu.pnum.DISCO_F303VC.build.mcu=cortex-m4
Disco.menu.pnum.DISCO_F303VC.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.DISCO_F303VC.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.DISCO_F303VC.build.board=DISCO_F303VC
Disco.menu.pnum.DISCO_F303VC.build.series=STM32F3xx
Disco.menu.pnum.DISCO_F303VC.build.product_line=STM32F303xC
Disco.menu.pnum.DISCO_F303VC.build.variant=STM32F3xx/F303V(B-C)T
Disco.menu.pnum.DISCO_F303VC.build.cmsis_lib_gcc=arm_cortexM4lf_math
# DISCO_F407VG board
Disco.menu.pnum.DISCO_F407VG=STM32F407G-DISC1
Disco.menu.pnum.DISCO_F407VG.node=DIS_F407VG
Disco.menu.pnum.DISCO_F407VG.upload.maximum_size=1048576
Disco.menu.pnum.DISCO_F407VG.upload.maximum_data_size=131072
Disco.menu.pnum.DISCO_F407VG.build.mcu=cortex-m4
Disco.menu.pnum.DISCO_F407VG.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.DISCO_F407VG.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.DISCO_F407VG.build.board=DISCO_F407VG
Disco.menu.pnum.DISCO_F407VG.build.series=STM32F4xx
Disco.menu.pnum.DISCO_F407VG.build.product_line=STM32F407xx
Disco.menu.pnum.DISCO_F407VG.build.variant=STM32F4xx/F407V(E-G)T_F417V(E-G)T
Disco.menu.pnum.DISCO_F407VG.build.cmsis_lib_gcc=arm_cortexM4lf_math
# DISCO_F413ZH board
Disco.menu.pnum.DISCO_F413ZH=STM32F413H-DISCO
Disco.menu.pnum.DISCO_F413ZH.node=DIS_F413ZH
Disco.menu.pnum.DISCO_F413ZH.upload.maximum_size=1572864
Disco.menu.pnum.DISCO_F413ZH.upload.maximum_data_size=327680
Disco.menu.pnum.DISCO_F413ZH.build.mcu=cortex-m4
Disco.menu.pnum.DISCO_F413ZH.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.DISCO_F413ZH.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.DISCO_F413ZH.build.board=DISCO_F413ZH
Disco.menu.pnum.DISCO_F413ZH.build.series=STM32F4xx
Disco.menu.pnum.DISCO_F413ZH.build.product_line=STM32F413xx
Disco.menu.pnum.DISCO_F413ZH.build.variant=STM32F4xx/F413Z(G-H)(J-T)_F423ZH(J-T)
Disco.menu.pnum.DISCO_F413ZH.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.DISCO_F413ZH.build.cmsis_lib_gcc=arm_cortexM4lf_math
# DISCO_F746NG board
Disco.menu.pnum.DISCO_F746NG=STM32F746G-DISCOVERY
Disco.menu.pnum.DISCO_F746NG.node=DIS_F746NG
Disco.menu.pnum.DISCO_F746NG.upload.maximum_size=1048576
Disco.menu.pnum.DISCO_F746NG.upload.maximum_data_size=327680
Disco.menu.pnum.DISCO_F746NG.build.mcu=cortex-m7
Disco.menu.pnum.DISCO_F746NG.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.DISCO_F746NG.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.DISCO_F746NG.build.board=DISCO_F746NG
Disco.menu.pnum.DISCO_F746NG.build.series=STM32F7xx
Disco.menu.pnum.DISCO_F746NG.build.product_line=STM32F746xx
Disco.menu.pnum.DISCO_F746NG.build.variant=STM32F7xx/F746B(E-G)T_F746N(E-G)H_F750N8H_F756BGT_F756NGH
Disco.menu.pnum.DISCO_F746NG.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.DISCO_F746NG.build.cmsis_lib_gcc=arm_cortexM7lfsp_math
# DISCO_G0316 board
Disco.menu.pnum.DISCO_G0316=STM32G0316-DISCO
Disco.menu.pnum.DISCO_G0316.node=NODE_G031J6
Disco.menu.pnum.DISCO_G0316.upload.maximum_size=32768
Disco.menu.pnum.DISCO_G0316.upload.maximum_data_size=8192
Disco.menu.pnum.DISCO_G0316.build.mcu=cortex-m0plus
Disco.menu.pnum.DISCO_G0316.build.board=DISCO_G0316
Disco.menu.pnum.DISCO_G0316.build.series=STM32G0xx
Disco.menu.pnum.DISCO_G0316.build.product_line=STM32G031xx
Disco.menu.pnum.DISCO_G0316.build.variant=STM32G0xx/G031J(4-6)M_G041J6M
Disco.menu.pnum.DISCO_G0316.build.cmsis_lib_gcc=arm_cortexM0l_math
Disco.menu.pnum.DISCO_G0316.build.st_extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0
# STM32WB5MM-DK board
Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK
Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG"
Disco.menu.pnum.STM32WB5MM_DK.upload.maximum_size=827392
Disco.menu.pnum.STM32WB5MM_DK.upload.maximum_data_size=196608
Disco.menu.pnum.STM32WB5MM_DK.build.mcu=cortex-m4
Disco.menu.pnum.STM32WB5MM_DK.build.fpu=-mfpu=fpv4-sp-d16
Disco.menu.pnum.STM32WB5MM_DK.build.float-abi=-mfloat-abi=hard
Disco.menu.pnum.STM32WB5MM_DK.build.board=STM32WB5MM_DK
Disco.menu.pnum.STM32WB5MM_DK.build.series=STM32WBxx
Disco.menu.pnum.STM32WB5MM_DK.build.product_line=STM32WB5Mxx
Disco.menu.pnum.STM32WB5MM_DK.build.variant=STM32WBxx/WB5MMGH
Disco.menu.pnum.STM32WB5MM_DK.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.STM32WB5MM_DK.build.cmsis_lib_gcc=arm_cortexM4lf_math
# Upload menu
Disco.menu.upload_method.MassStorage=Mass Storage
Disco.menu.upload_method.MassStorage.upload.protocol=
Disco.menu.upload_method.MassStorage.upload.tool=massStorageCopy
Disco.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
Disco.menu.upload_method.swdMethod.upload.protocol=0
Disco.menu.upload_method.swdMethod.upload.options=-g
Disco.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
Disco.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial)
Disco.menu.upload_method.serialMethod.upload.protocol=1
Disco.menu.upload_method.serialMethod.upload.options={serial.port.file} -s
Disco.menu.upload_method.serialMethod.upload.tool=stm32CubeProg
Disco.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU)
Disco.menu.upload_method.dfuMethod.upload.protocol=2
Disco.menu.upload_method.dfuMethod.upload.options=-g
Disco.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg
################################################################################
# Eval boards
Eval.name=Eval
Eval.build.core=arduino
Eval.build.board=Eval
Eval.build.variant_h=variant_{build.board}.h
Eval.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
Eval.upload.maximum_size=0
Eval.upload.maximum_data_size=0
# STEVAL_MKSBOX1V1 board
Eval.menu.pnum.STEVAL_MKSBOX1V1=SensorTile.box
Eval.menu.pnum.STEVAL_MKSBOX1V1.upload.maximum_size=2097152
Eval.menu.pnum.STEVAL_MKSBOX1V1.upload.maximum_data_size=655360
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.mcu=cortex-m4
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.fpu=-mfpu=fpv4-sp-d16
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.float-abi=-mfloat-abi=hard
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.board=STEVAL_MKSBOX1V1
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.series=STM32L4xx
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.product_line=STM32L4R9xx
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.variant=STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Eval.menu.pnum.STEVAL_MKSBOX1V1.build.cmsis_lib_gcc=arm_cortexM4lf_math
# Upload menu
Eval.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
Eval.menu.upload_method.swdMethod.upload.protocol=0
Eval.menu.upload_method.swdMethod.upload.options=-g
Eval.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
Eval.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU)
Eval.menu.upload_method.dfuMethod.upload.protocol=2
Eval.menu.upload_method.dfuMethod.upload.options=-g
Eval.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg
################################################################################
# STM32MP1 microprocessor series (MPU + MCU)
STM32MP1.name=STM32MP1 series coprocessor
STM32MP1.upload.maximum_size=0